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JP3581248B2 - Ratio differential relay - Google Patents

Ratio differential relay Download PDF

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JP3581248B2
JP3581248B2 JP11291898A JP11291898A JP3581248B2 JP 3581248 B2 JP3581248 B2 JP 3581248B2 JP 11291898 A JP11291898 A JP 11291898A JP 11291898 A JP11291898 A JP 11291898A JP 3581248 B2 JP3581248 B2 JP 3581248B2
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JPH11308755A (en
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康明 三宅
幹夫 新谷
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ティーエム・ティーアンドディー株式会社
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Description

【０００１】
【発明の属する技術分野】
この発明は、電力系統の変圧器の保護を行う比率差動継電装置、特にインラッシュ電流中の直流分でＣＴが飽和しても不要に動作しない信頼度の高い比率差動継電装置に関するものである。
【０００２】
【従来の技術】
図１７は従来の比率差動継電装置が適用される電力系統を示す図であり、図において、１は被保護変圧器、２は変圧器１の一次側に設置された遮断器、３は変圧器１の二次側に設置された遮断器、４は変圧器１の一次側電流１１（高圧側電流）を計測する変流器（以下、ＣＴという）、５は変圧器１の二次電流Ｉ２（低圧側電流）を計測する変流器（以下、ＣＴという）、６は保護範囲内に故障が発生したとき、遮断器２および遮断器３をトリップして変圧器１を電力系統から遮断する比率差動継電装置である。
【０００３】
図１８は例えば特開昭５３−１１１４５１号公報に記載された従来の比率差動継電装置を示す構成図であり、図において、１１は図１７のＣＴ４から計測された一次電流Ｉ１とＣＴ５から計測された二次電流Ｉ２を比較し、電流値が大きい方の電流を抑制電流Ｉｒとして導出する抑制電流導出器、１２は一次電流Ｉ１と二次電流Ｉ２の差動電流導出器、１３は抑制電流Ｉｒに対する差動電流Ｉｄの比率が所定値以上であるときトリップ信号を出力する比率差動器である。２０は電力系統がインラッシュ状態にないと判定したときに非ロック信号を出す非インラッシュ検出手段、１７は比率差動器１３からトリップ信号が出力され、かつ、非インラッシュ検出手段２０から非ロック信号が出力されると、遮断器のトリップ信号を出力して変圧器１を電力系統から遮断する論理積回路である。
【０００４】
非インラッシュ検出手段２０において、１４は差動電流導出器１２により導出された差動電流Ｉｄに含まれている基本波成分Ｉｄ０を抽出する基本波フィルタ、１５は差動電流導出器１２により導出された差動電流Ｉｄに含まれる第２高調波成分Ｉｄ２を抽出する第２高調波フィルタ、１６は差動電流Ｉｄが所定値以上であって、基本波成分Ｉｄ０に対する第２高調波成分Ｉｄ２の比率が所定値以下のとき電力系統がインラッシュ状態にないと判定し、非ロック信号を出力するインラッシュ判定器である。
【０００５】
次に動作を説明する。比率差動継電装置６の一般的な機能は、図１７に示すように、電力系統に外部故障ＦＯが発生しても、変圧器１を電力系統から遮断しないが、電力系統に内部故障ＦＩが発生した場合には、変圧器１を保護するために変圧器１を電力系統から遮断するものである。具体的には、まず、抑制電流導出器１１が、ＣＴ４により計測された一次電流Ｉ１とＣＴ５により計測された二次電流Ｉ２を比較し、電流値が大きい方の電流を抑制電流Ｉｒとして導出する。また、差動電流導出器１２が、ＣＴ４により計測された一次電流Ｉ１とＣＴ５により計測された二次電流Ｉ２のベクトル差を差動電流Ｉｄとして導出する。そして、比率差動器１３は、一般的に、抑制電流Ｉｒに対する差動電流Ｉｄの比率が所定値以上であるとき、電力系統において内部故障ＦＩが発生した可能性が高いので、以下の条件を具備する場合には、トリップ信号を出力する。
Ｉｄ＞ＫＦ１×Ｉｒ＋ＫＭ
但し、ＫＦ１、ＫＭは所定の定数
【０００６】
一方、フィルタ１４およびフィルタ１５は、差動電流導出器１２により導出された差動電流Ｉｄに含まれている基本波成分Ｉｄ０および第２高調波成分Ｉｄ２をそれぞれ抽出する。そして、インラッシュ判定器１６は上記両成分から電力系統がインラッシュ状態にあるか否かを判定する。このインラッシュ判定器１６を含む非インラッシュ検出手段２０の設置は、電力系統がインラッシュ状態にある場合（一般に、遮断器３が開状態のとき、遮断器２を開状態から閉状態にするとインラッシュ状態になる）には、インラッシュ電流が変圧器１に流入するため、電力系統において内部故障ＦＩが発生した場合と近似した現象が発生する関係上、比率差動器１３がトリップ信号を出力する場合があるが、この場合、電力系統に内部故障ＦＩが発生しているわけではないので、変圧器１が電力系統から遮断されないようにする必要があるためである。
【０００７】
即ち、非インラッシュ検出手段２０は、電力系統がインラッシュ状態にない場合に限り非ロック信号を出力して、比率差動器１３が出力するトリップ信号を有効にするため、差動電流Ｉｄが所定値以上であって、基本波成分Ｉｄ０に対する第２高調波成分Ｉｄ２の比率が次式に示す所定値以下のとき電力系統がインラッシュ状態にないと判定し、非ロック信号を出力する。
Ｉｄ２＜ＫＦ２×Ｉｄ０
但し、ＫＦ２は所定の定数
ここで、基本波成分Ｉｄ０に対する第２高調波成分Ｉｄ２の比率を判定に使用するのは、インラッシュ電流は、故障電流に比べて第２高調波電流成分Ｉｄ２を多く含んでいるからである。論理積回路１７は、比率差動器１３からトリップ信号が出力され、かつ、非インラッシュ検出手段２０から非ロック信号が出力されると、電力系統に内部故障ＦＩが発生したものと判断して、変圧器１を電力系統から遮断し、一連の動作が終了する。
【０００８】
次に、インラッシュ電流に対する動作を図１９、図２０の波形図により説明する。なお、図１９、図２０の（ａ）はインラッシュ発生時のＣＴ４の一次側電流、（ｂ）はインラッシュ発生時のＣＴ４の二次側電流を示している。図１９において、比率差動器１３は、差動電流Ｉｄが上記所定値以上でインラッシュ発生から時間ｔＯＰ１３（例えば２サイクル、５０Ｈｚベースで４０ｍｓ）後に出力するが（ｃ）、インラッシュ電流には第２高調波成分Ｉｄ２が多く含まれるのでインラッシュ判定器１６は出力しない（ｄ）。従って論理積回路１７は出力しない（ｅ）。
【０００９】
次に、インラッシュ電流によりＣＴが飽和した場合の動作を図２０の波形図により説明する。比率差動器１３は、ＣＴ飽和がないときと同様に、時間ｔＯＰ１３後に出力する（ｃ）。インラッシュ電流の第３波目まではＣＴ飽和がなくいわゆる半波状に典型的なインラッシュ電流波形であるが、第４波目からインラッシュ電流中の直流分が積分されたことによりＣＴ鉄心が飽和し（ｂ）、ＣＴ二次電流の波形はやや正負にも振れる形となり、調波分析すると第３高調波が増加し、第２高調波成分の比率が低下したものとなる。このため、インラッシュ判定器１６は第４波の立ち上がり時点から時間ｔＯＰ１６後に、インラッシュ時であるにも関わらず誤って非ロック信号を出力し（ｄ）、従って論理積回路１７が不要に出力し（ｅ）、変圧器１が電力系統から遮断されてしまう。
【００１０】
【発明が解決しようとする課題】
この発明は、上記のような問題を解決するためになされたもので、比率差動器の出力である遮断器のトリップ信号が、インラッシュ時には遮断器の動作を引き起こさないようにする信頼度の高い比率差動継電装置を得ることを目的とする。
【００１１】
【課題を解決するための手段】
この発明に係る比率差動継電装置は、被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分と第２高調波成分を抽出し、基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、差動電流中の直流分が所定値以上のとき出力する直流分検出手段、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記直流分検出手段を、差動電流中の直流成分を導出する直流分導出手段と、この直流分導出手段の出力を積分し、積分量が所定値以上のとき出力する直流分積分手段とで構成すると共に、上記直流分検出手段の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理積回路への非ロック信号を出さないようにしたものである。
【００１２】
また、被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分と第２高調波成分を抽出し、基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、差動電流中の直流分が所定値以上のとき出力する直流分検出手段、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記直流分検出手段を、差動電流中の直流成分を導出する直流分導出手段と、直流分の大きさが所定値以上のとき出力する直流分レベル検出手段と、直流分レベル検出手段の出力が所定時間継続したとき出力するタイマ手段とで構成すると共に、上記直流分検出手段の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理積回路への非ロック信号を出さないようにしたものである。
【００１３】
また、被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分と第２高調波成分を抽出し、基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、差動電流中の直流分が所定値以上のとき出力する直流分検出手段、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記直流分検出手段を、差動電流中の直流成分を導出する直流分導出手段と、差動電流中の基本波に対する直流分の大きさ比率が所定値以上のとき出力する直流分含有率検出手段と、直流分含有率検出手段の出力が所定時間継続したとき出力するタイマ手段とで構成すると共に、上記直流分検出手段の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理積回路への非ロック信号を出さないようにしたものである。
【００１４】
また、被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分と第２高調波成分を抽出し、基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、差動電流中の基本波成分と第２高調波成分との割合に応じて出力する第２高調波検出手段、 および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記第２高調波検出手段の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理積回路への非ロック信号を出さないようにしたものである。
【００１５】
また、第２高調波検出手段は、差動電流中の基本波分に対する第２高調波分の比率が所定値以上のとき出力する第２高調波含有率検出手段と、この第２高調波含有率検出手段の出力が所定時間継続したとき出力するタイマ手段とを備えたものである。
【００１６】
また、第２高調波検出手段は、差動電流中の基本波分に対する第２高調波分の比率が所定値以上減少傾向にあるとき出力する第２高調波減少検出手段を備えたものである。
【００１７】
また、被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、および高圧側端子の各相電流および零相電流の加算値または低圧側端子の各相電流および零相電流の加算値のいずれかに応じて出力する直流分検出手段、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記直流分検出手段の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理積回路への非ロック信号を出さないようにしたものである。
【００１８】
また、直流分検出手段は、高圧側端子の各相電流および零相電流の加算手段と、この加算手段の出力が所定値以上のとき出力する出力レベル検出手段と、低圧側端子の各相電流および零相電流の加算手段と、この加算手段の出力が所定値以上のとき出力する出力レベル検出手段と、上記両出力レベル検出手段の出力の論理和を出力する論理和回路とを備えたものである。
【００１９】
また、直流分検出手段は、高圧側端子の各相電流および零相電流の加算手段と、この加算手段の出力中の基本波に対する直流分の比率が所定値以上のとき出力する直流分合有率検出手段と、低圧側端子の各相電流および零相電流の加算手段と、この加算手段の出力中の基本波に対する直流分の比率が所定値以上のとき出力する直流分含有率検出手段と、上記両直流分含有率検出手段の出力の論理和を出力する論理和手段とを備えたものである。
【００２０】
また、被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分と第２高調波成分を抽出し、基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、差動電流中の直流成分を導出する直流分導出手段、この直流分導出手段の出力を積分し、積分量が一定値以上のとき出力する直流分積分手段、この直流分積分手段から一度出力があると所定時間幅のパルスを出力するワンショットタイマ、上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき被保護装置を系統から遮断する信号を出す論理積回路、および上記ワンショトタイマの出力により上記論理積回路の出力をロックするインヒビット回路を備えたものである。
【００２１】
また、被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分と第２高調波成分を抽出し、基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、差 動電流中の直流分が所定値以上のとき出力する直流分検出手段、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記直流分検出手段を、差動電流中の直流成分を導出する直流分導出手段と、この直流分導出手段の出力を積分し、積分量が第１の所定値以上のとき出力する第１の直流分積分手段と、上記直流分導出手段の出力を積分し、積分量が第２の所定値以上のとき出力する第２の直流分積分手段とで構成すると共に、上記直流分検出手段の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理回路への非ロック信号を出さないようにしたものである。
【００２２】
また、被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、上記抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波電流に対する第２高調波電流の比率が所定値以下のとき出力する非インラッシュ検出手段、高圧側端子電流中の直流成分を導出する直流分導出手段、この直流分導出手段の出力を積分し、積分量が所定値以上のとき出力する直流分積分手段、低圧側端子電流中の直流成分を導出する直流分導出手段、この直流分導出手段の出力を積分し、積分量が所定値以上のとき出力する直流分積分手段、上記両直流分積分手段の出力の論理和を出力する論理和回路、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記論理和回路の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理回路への非ロック信号を出さないようにしたものである。
【００２３】
【発明の実施の形態】
実施の形態１．
図１はこの発明の実施の形態１に係る比率差動継電装置を示すブロック構成図であり、図において、１００は第２高調波成分Ｉｄ２の比率感度を制御できる可変比率インラッシュ判定器、１０１は差動電流Ｉｄ中の直流分を導出する直流分導出器、１０２は直流分導出器１０１の出力を積分して、積分量が所定値以上になったとき出力する直流分積分手段である。その他の構成は図１８に示すものと同様である。
【００２４】
次に、図２の波形図により動作を説明する。なお、図の（ａ）はインラッシュ発生時のＣＴ４の一次側電流、（ｂ）はインラッシュ発生時のＣＴ４の二次側電流を示している。インラッシュ電流が印加される差動電流導出器１２の出力差動電流Ｉｄ中の直流分が直流分導出器１０１で導出され（ｆ）、直流分導出器１０１の出力Ｉｄｄが直流分積分手段１０２により積分される。この積分量が所定値に達する、インラッシュ電流印加から時間ｔＯＰ１０２後に直流分積分手段１０２が出力して（ｇ）、可変比率インラッシュ判定器１００の第２高調波の比率感度（すなわちインラッシュかどうかを判定する第２高調波の基本波に対する含有比率、以下同じ）を、例えば１２％から８％に変更する。この感度の低減により、インラッシュ電流によりＣＴが飽和して（ｂ）差動電流Ｉｄ中の第２高調波含有率が低下しても、インラッシュ判定器１００は非ロック信号を出力しない（ｅ）。このため、論理積手段１７からインラッシュ時に不要に変圧器を遮断する信号が出力されることはなくなる。
【００２５】
実施の形態２．
図３はこの発明の実施の形態２に係る比率差動継電装置を示すブロック構成図であり、図において、１０３は直流分Ｉｄｄの大きさが所定値以上のとき出力する直流分レベル検出手段、１０４は直流レベル検出手段１０３の出力が所定時間以上継続したとき出力するタイマである。その他の構成は図１と同様である。
【００２６】
次に動作を説明する。インラッシュ電流が印加される差動電流導出器１２の出力差動電流Ｉｄ中の直流分が直流分導出器１０１で導出され、直流分導出器１０１の出力Ｉｄｄの大きさが所定値（例えば定格電流の１０％）以上あれば、直流分レベル検出器１０３が出力し、タイマ１０４が付勢される。所定時間後（例えばＴ１＝１秒後）にタイマ１０４がカウントアップすると、可変比率インラッシュ判定器１００の第２高調波比率感度を、例えば１２％から８％に変更する。この感度の低減により、インラッシュ電流によりＣＴ４が飽和して差動電流Ｉｄ中の第２高調波含有率が低下してもインラッシュ判定器１００は非ロック信号を出力しない。従って、インラッシュ時に論理積手段１７から不要に変圧器１を遮断する信号が出力されることはない。
【００２７】
実施の形態３．
図４はこの発明の実施の形態３に係る比率差動継電装置を示すブロック構成図であり、図において、１０５は差動電流Ｉｄ中の基本波に対する直流分Ｉｄｄの比率が所定値（例えば４０％）以上のとき出力する直流分含有率検出手段、１０６は直流分含有率検出手段１０５の出力が所定時間継続したとき出力するタイマである。
【００２８】
次に、図５の波形図により動作を説明する。インラッシュ電流が印加される差動電流導出器１２の出力差動電流Ｉｄ中の直流分が直流分導出器１０１で導出され（ｆ）、直流分Ｉｄｄの大きさが基本波フィルタ１４の基本波分出力Ｉｄ０に比べて所定比率以上の大きさであれば、直流分含有率検出手段１０５が検出時間ｔＯＰ１０５後に出力し（ｇ）、タイマ１０６が付勢される。所定時間後（例えばＴ２＝１秒後）にタイマ１０６がカウントアップすると（ｈ）、可変比率インラッシュ判定器１００の第２高調波比率感度を、例えば１２％から８％に変更する。この感度の低減により、インラッシュ電流によりＣＴ４が飽和して差動電流Ｉｄ中の第２高調波含有率が低下しても、インラッシュ判定器１００は出力しない（ｅ）。従って、インラッシュ時に論理積手段１７から不要に変圧器１を遮断する信号が出力されることはない。
【００２９】
実施の形態４．
図６はこの発明の実施の形態４に係る比率差動継電装置を示すブロック構成図であり、図において、１０７は差動電流Ｉｄ中の基本波電流Ｉｄ０に対する第２高調波分電流Ｉｄ２の比率が所定比率（例えば１２％）以上のとき出力する第２高調波含有率検出手段、１０８は第２高調波含有率検出手段１０７の出力が所定時間継続したとき出力するタイマである。
【００３０】
次に、図７の波形図により動作を説明する。インラッシュ電流が印加される差動電流導出器１２の出力差動電流Ｉｄ中の第２高調波分電流Ｉｄ２が第２高調波フィルタ１５で導出され、第２高調波分電流Ｉｄ２の大きさが基本波フィルタ１４の基本波分電流Ｉｄ０の大きさに対して所定比率以上であれば、第２高調波含有率検出手段１０７が検出時間ｔＯＰ１０７後に出力し（ｆ）、タイマ１０８が付勢される。所定時間後（例えばＴ３＝１秒後）にタイマ１０８がカウントアップすると（ｇ）、可変比率インラッシュ判定器１００の第２高調波比率感度を、例えば１２％から８％に変更する。この感度の低減により、インラッシュ電流によりＣＴ４が飽和して（ｂ）差動電流Ｉｄ中の第２高調波含有率が低下しても、インラッシュ判定器１００は出力しない（ｅ）。従って、インラッシュ時に論理積回路１７から不要に変圧器１を遮断する信号が出力されることはない。
【００３１】
実施の形態５．
図８はこの発明の実施の形態５に係る比率差動継電装置を示すブロック構成図であり、図において、１０９は差動電流Ｉｄ中の基本波電流Ｉｄ０に対する第２高調波分電流Ｉｄ２の比率が所定比率（例えば−２％／サイクル）以上減少傾向のとき出力する第２高調波減少検出手段である。その他の構成は図１と同様のものである。
【００３２】
一般にインラッシュ電流中の第２高調波含有率は時間の経過と共にやや増加するのが普通であるが、この実施の形態５は、ＣＴ飽和の開始で第２高調波電流が減少する傾向をとらえ、可変インラッシュ判定器１００の感度を変更するものである。次に、図９の波形図により動作を説明する。インラッシュ電流が印加される差動電流導出器１２の出力差動電流Ｉｄ中の第２高調波分電流Ｉｄ２が第２高調波フィルタ１５から導出され、第２高調波分電流Ｉｄ２の大きさの基本波フィルタ１４の基本波電流Ｉｄ０の大きさに対する比率が所定比率以上の減少傾向であれば、第２高調波減少検出手段１０９が検出時間ｔＯＰ１０９後に出力し（ｆ）、可変比率インラッシュ判定器１００の第２高調波比率感度を、例えば１２％から８％に変更する。この感度の低減により、インラッシュ電流によりＣＴ４が飽和して差動電流Ｉｄ中の第２高調波含有率が低下してもインラッシュ判定器１００は非ロック信号を出力しない（ｅ）。従って、インラッシュ時に論理積回路１７から不要に変圧器１を遮断する信号が出力されることはない。
【００３３】
実施の形態６．
図１０はこの発明の実施の形態６に係る比率差動継電装置を示すブロック構成図であり、図において、１１０は高圧側の相電流Ｉ１Ａ、相電流Ｉ１Ｂ、相電流Ｉ１Ｃおよび零相電流Ｉ１Ｎを加算する第１の加算手段、１１２は第１の加算手段１１０の出力が所定値以上の大きさのとき出力する第１のレベル検出手段、１１１は低圧側の相電流Ｉ２Ａ、相電流Ｉ２Ｂ、相電流Ｉ２Ｃおよび零相電流Ｉ２Ｎを加算する第２の加算手段、１１３は第２の加算手段１１１の出力が所定値以上の大きさのとき出力する第２のレベル検出手段、１１４は論理和手段である。
【００３４】
次に動作を説明する。第１の加算手段１１０、第２の加算手段１１１の出力は各ＣＴの飽和がなければ健全時、外部故障時、内部故障時、インラッシュ時のいずれでも零であるが 少なくともＡ相、Ｂ相、Ｃ相、いずれかのＣＴが飽和すれば零でなくなる。例えば高圧側から直流分を多く含むインラッシュ電流が印加された場合、いずれかのＣＴ飽和により第１の加算回路１１０から出力があり、その値が所定値以上であるとき第１のレベル検出手段１１２が出力し、論理和手段１１４を経由して可変比率インラッシュ判定器１００の第２高調波比率感度を、例えば１２％から８％に変更する。この感度の低減により、インラッシュ電流によりＣＴ４が飽和して高圧側電流Ｉ１中の第２高調波含有率が低下してもインラッシュ判定器１００は非ロック信号を出力しない。従って、論理積回路１７が不要に出力することはない。低圧側についても同様の動作をする。
【００３５】
図１６にこの実施の形態の適用が有効であるような電力系統図を示す。図１６において、２０１は母線、２０３は変圧器、２０２は遮断器である。図１６の系統で変圧器１が運転中（遮断器２、遮断器３共に閉）、遮断器２０２を閉にすると、インラッシュ電流がＣＴ４、ＣＴ５を貫通する形となり比率差動継電装置６の差動回路には差動電流は発生しない（差動電流導出器１２の出力はない）が、実施の形態６によれば上記のように差動電流からでなく、高圧側または低圧側の電流からインラッシュ電流によるＣＴの飽和を検出する方法をとるので、このような系統に適用しても誤動作を防ぐことができる。
【００３６】
実施の形態７．
図１１はこの発明の実施の形態７に係る比率差動継電装置を示すブロック構成図であり、図において、１１５は第１の加算手段１１０の出力中の基本波に対する直流分の比率が所定値以上のとき出力する第１の直流分合有率検出手段、１１６は第２の加算手段１１１の出力中の基本波に対する直流分の比率が所定値以上のとき出力する第２の直流分合有率検出手段、１１７は論理和手段である。その他の構成は図１０と同様である。
【００３７】
次に動作を説明する。第１の加算手段１１０、第２の加算手段１１１の出力は各ＣＴの飽和がなければ健全時、外部故障時、内部故障時、インラッシュ時のいずれも零であるが、少なくともＡ相、Ｂ相、Ｃ相、いずれかのＣＴが飽和すれば零でなくなる。例えば高圧側から直流分を多く含むインラッシュ電流が印加された場合、いずれかのＣＴ飽和により第１の加算手段１１０から出力があり、その出力中に所定比率以上の直流分が含まれる場合は、第１の直流分合有率検出手段１１５が出力し、論理和手段１１７を経由し、可変比率インラッシュ判定器１００の検出感度を、例えば１２％から８％に変更する。
【００３８】
この感度の低減により、インラッシュ電流によりＣＴが飽和して高圧側電流Ｉ１中の第２高調波含有率が低下しても、インラッシュ判定器１００は非ロック信号を出力しない。従って、インラッシュ時に論理積回路１７が不要に出力することはない。実施の形態７によれば、上記のように、差動電流からでなく高圧側または低圧側の電流からインラッシュ電流によるＣＴの飽和を検出する方法をとっているので、実施の形態６と同様に図１６のような系統に適用するときに特に有効である。
【００３９】
実施の形態８．
図１２はこの発明の実施の形態８に係る比率差動継電装置を示すブロック構成図であり、図において、１１８は直流分積分手段１０２から一度出力があると所定時間幅のパルスを出力するワンショットタイマである。ここでワンショットタイマ１１８のパルス時間幅はインラッシュ電流の直流分によるＣＴの飽和継続時間を考慮して例えば１秒に設定する。１１９はインヒビット回路である。
【００４０】
次に動作を説明する。インラッシュ電流が印加される差動電流導出器１２の出力差動電流Ｉｄ中の直流分が直流分導出器１０１で導出され、直流分導出器１０１の出力電流Ｉｄｄが直流分積分手段１０２により積分される。積分量が所定値に達すると、直流分積分手段１０２が出力してワンショットタイマ１１８を付勢し、所定時間幅のパルスが出力される。このため、インラッシュ判定器１００から非ロック信号が出ても、インヒビット手段１１９はＣＴが飽和している間、ワンショットタイマ１１８の出力によりロックされているので、ＣＴが飽和しても不要に出力することはない。
【００４１】
実施の形態９．
図１３はこの発明の実施の形態９に係る比率差動継電装置を示すブロック構成図であり、図において、１２０は直流分導出器１０１の出力Ｉｄｄを積分して、積分量が直流分積分手段１０２の検出レベルより大きい第２の所定値以上になったとき出力する第２の直流分積分手段である。その他の構成は図１と同様である。
【００４２】
次に、図１４の波形図により動作を説明する。インラッシュ電流が印加される差動電流導出器１２の出力差動電流Ｉｄ中の直流分が直流分導出器１０１で導出され、直流分導出器１０１の出力Ｉｄｄが直流分積分手段１０２により積分される。時間ｔＯＰ１０２後に積分量が所定値に達すると直流分積分手段１０２が出力して（ｇ）、可変比率インラッシュ判定器１００の第２高調波比率感度を、例えば１２％から８％に変更する。さらにインラッシュ電流が継続して、動作時間ｔＯＰ１２０後に第２の直流分積分手段１２０の検出レベルに達すると第２の直流分積分手段１２０が出力して（ｈ）、可変インラッシュ判定器１００の第２高調波比率感度を今度は、例えば８％から６％に変更する。この２段の感度の低減により、インラッシュ電流によりＣＴが飽和して差動電流Ｉｄ中の第２高調波含有率が低下してもインラッシュ判定器１００は非ロック信号を出力しない。従って、インラッシュ時に論理積回路１７から不要に変圧器を遮断する信号が出力される
ことはない。
【００４３】
実施の形態１０．
図１５はこの発明の実施の形態１０に係る比率差動継電装置を示すブロック構成図であり、図において、１２１は高圧側の端子電流Ｉ１中の直流分を導出する直流分導出器、１２３は直流分導出器１２１の出力を積分して積分量が所定値以上のとき出力する第１の直流分積分手段、１２２は低圧側の端子電流Ｉ２中の直流分を導出する直流分導出器、１２４は直流分導出器１２２の出力を積分して積分量が所定値以上のとき出力する第２の直流分積分手段、１２５は出力によりインラッシュ判定器１００の第２高調波比率感度を変更する論理和回路である。
【００４４】
次に動作を説明する。例えば高圧側からインラッシュ電流が印加されると、高圧側電流Ｉ１中の直流分が第１の直流分導出器１２１で導出され、第１の直流分導出器１２１の出力が第１の直流分積分手段１２３により積分される。積分量が所定値以上になると第１の直流分積分手段１２３が出力して可変比率インラッシュ判定器１００の第２高調波比率感度を、例えば１２％から８％に変更する。この感度の低減により、インラッシュ電流によりＣＴ４が飽和して端子電流中の第２高調波含有率が低下してもインラッシュ判定器１００は非ロック信号を出力しない。従って、インラッシュ時に論理積回路１７から不要に変圧器を遮断する信号が出力されることはない。低圧側についても同様に動作する。実施の形態１０によれば、上記のように差動電流からでなく高圧側または低圧側の電流からインラッシュ電流によるＣＴの飽和を検出するものであるので、実施の形態６、実施の形態７と同様に図１６のような系統にも適用できる。
【００４５】
【発明の効果】
以上のように、この発明によれば、差動電流中の直流分を抽出し、その直流分を積分して積分量が所定値以上のときＣＴ飽和の恐れありと判断し、ＣＴ飽和による第２高調波成分含有率減少により非インラッシュ検出手段が不要に出力しないよう、ＣＴ飽和より先行してインラッシュ判定器の第２高調波比率感度を変更するように構成したので、信頼度の高い比率差動継電装置が得られる。
【００４６】
また、差動電流中の直流分を抽出し、その直流分が所定値を超える期間が所定時間以上継続したときＣＴ飽和の恐れありと判断し、ＣＴ飽和による第２高調波成分含有率減少により非インラッシュ検出手段が不要に出力しないよう、ＣＴ飽和より先行してインラッシュ判定器の第２高調波比率感度を変更するように構成したので、信頼度の高い比率差動継電装置が得られる。
【００４７】
また、差動電流中の直流分を抽出し、差動電流中の基本波に対する直流分の大きさ比率が所定値を超える期間が所定時間以上継続したときＣＴ飽和の恐れありと判断し、ＣＴ飽和による第２高調波成分含有率減少により非インラッシュ検出手段が不要に出力しないよう、ＣＴ飽和より先行してインラッシュ判定器の第２高調波比率感度を変更するように構成したので、信頼度の高い比率差動継電装置が得られる。
【００４８】
また、差動電流中の第２高調波分を抽出し、差動電流中の基本波に対する第２高調波の大きさ比率が所定値を超える期間が所定値時間以上継続したときＣＴ飽和の恐れありと判断し、ＣＴ飽和による第２高調波成分含有率減少により非インラッシュ検出手段が不要に出力しないよう、ＣＴ飽和より先行してインラッシュ判定器の第２高調波比率感度を変更するように構成したので、信頼度の高い比率差動継電装置が得られる。
【００４９】
また、差動電流中の第２高調波分を抽出し、第２高調波分が減少傾向にあればＣＴ飽和の恐れがありと判断し、ＣＴ飽和による第２高調波成分含有率減少により非インラッシュ検出手段が不要に出力しないよう、ＣＴ飽和より先行してインラッシュ判定器の第２高調波比率感度を変更するように構成したので、信頼度の高い比率差動継電装置が得られる。
【００５０】
また、高圧側または低圧側端子の各相電流と零相電流を加算した出力が所定値以上のとき、ＣＴ飽和の恐れありと判断し、ＣＴ飽和による第２高調波成分含有率減少により非インラッシュ検出手段が不要に出力しないよう、ＣＴ飽和より先行してインラッシュ判定器の第２高調波比率感度を変更するように構成したので、信頼度の高い比率差動継電装置が得られる。
【００５１】
また、差動電流からでなく高圧側または低圧側の電流からインラッシュ電流によるＣＴの飽和を検出するものであるので、インラッシュ電流が貫通する系統においても有効に適用できる。
【００５２】
また、高圧側または低圧側端子の各相電流と零相電流を加算した出力中の基本波に対する直流分の比率が所定値以上のとき、高圧側ＣＴ飽和の恐れありと判断し、ＣＴ飽和による第２高調波成分含有率減少により非インラッシュ検出手段が不要に出力しないよう、ＣＴ飽和より先行してインラッシュ判定器の第２高調波比率感度を変更するように構成したので、信頼度の高い比率差動継電装置が得られる。
【００５３】
また、差動電流中の直流分を抽出し、その直流分を積分して積分量が所定値以上のときＣＴ飽和の恐れありと判断し、ＣＴ飽和による第２高調波成分含有率減少により非インラッシュ検出手段が不要に出力しないよう、ＣＴ飽和より先行して、所定時間幅のパルスを発生し、パルス出力の継続期間中トリップ手段をロックするように構成したので、インラッシュ電流のためＣＴが飽和しても不要に動作しない信頼度の高い比率差動継電装置が得られる。
【００５４】
また、差動電流中の直流分を抽出し、その直流分を積分して積分量が所定値以上のときＣＴ飽和の恐れありと判断し、ＣＴ飽和による第２高調波成分含有率減少により非インラッシュ検出手段が不要に出力しないよう、ＣＴ飽和より先行してインラッシュ判定器の第２高調波比率感度を変更し、積分量が第２の所定値以上を超えるときはインラッシュ判定器の第２高調波比率感度を更に変更するよう構成したのでインラッシュ電流のためＣＴが飽和しても不要に動作しない信頼度の高い比率差動継電装置が得られる。
【００５５】
また、高圧側または低圧側端子電流中の直流分を抽出し、その直流分を積分して積分量が所定値以上のときＣＴ飽和の恐れありと判断し、ＣＴ飽和による第２高調波成分含有率減少により非インラッシュ検出手段が不要に出力しないよう、ＣＴ飽和より先行してインラッシュ判定器の第２高調波比率感度を変更するように構成したので、インラッシュ電流のためＣＴが飽和しても不要に動作しない信頼度の高い比率差動継電装置が得られる。
【図面の簡単な説明】
【図１】この発明の実施の形態１に係る比率差動継電装置のブロック図である。
【図２】実施の形態１の動作を説明する波形図である。
【図３】この発明の実施の形態２に係る比率差動継電装置のブロック図である。
【図４】この発明の実施の形態３に係る比率差動継電装置のブロック図である。
【図５】実施の形態３の動作を説明する波形図である。
【図６】この発明の実施の形態４に係る比率差動継電装置のブロック図である。
【図７】実施の形態４の動作を説明する波形図である。
【図８】この発明の実施の形態５に係る比率差動継電装置のブロック図である。
【図９】実施の形態４の動作を説明する波形図である。
【図１０】この発明の実施の形態６に係る比率差動継電装置のブロック図である。
【図１１】この発明の実施の形態７に係る比率差動継電装置のブロック図である。
【図１２】この発明の実施の形態８に係る比率差動継電装置のブロック図である。
【図１３】この発明の実施の形態９係る比率差動継電装置のブロック図である。
【図１４】実施の形態９の動作を説明する波形図である。
【図１５】この発明の実施の形態１０に係る比率差動継電装置のブロック図である。
【図１６】実施の形態６、実施の形態７、実施の形態１０が適用される電力系統を示す系統図である。
【図１７】従来の比率差動継電装置が適用される電力系統を示す系統図である。
【図１８】従来の比率差動継電装置を示すブロック図である。
【図１９】ＣＴが飽和しないときの従来の比率差動継電装置の動作を説明する波形図である。
【図２０】ＣＴが飽和したときの従来の比率差動継電装置の動作を説明する波形図である。
【符号の説明】
１１ 抑制電流導出器、１２ 差動電流導出器、１３ 比率差動器、
１４、１５ フィルタ、１６ インラッシュ判定器、１７ 論理積回路、
２０ 非インラッシュ検出手段、１００ 可変比率インラッシュ判定器、
１０１、１２１、１２２ 直流分導出器、
１０２、１２０、１２３、１２５ 直流分積分手段、
１０３、１１２、１１３ レベル検出手段、
１０４、１０６、１０８ タイマ、
１０５、１１５、１１６ 直流分含有率検出手段、
１０７ 第２高調波含有率検出手段、１０９ 第２高調波減少検出手段、
１１０、１１１ 加算手段、１１４、１１７、１２４ 論理和回路、
１１８ ワンショトタイマ、１１９ インヒビット回路。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a ratio differential relay device for protecting a transformer in a power system, and more particularly to a highly reliable ratio differential relay device that does not operate unnecessarily even when CT is saturated by a DC component in an inrush current. Things.
[0002]
[Prior art]
FIG. 17 is a diagram showing a power system to which a conventional ratio differential relay device is applied. In the figure, 1 is a protected transformer, 2 is a circuit breaker installed on the primary side of the transformer 1, and 3 is Circuit breaker installed on the secondary side of transformer 1, 4 is a current transformer (hereinafter referred to as CT) for measuring primary side current 11 (high-side current) of transformer 1, 5 is the secondary side of transformer 1 A current transformer (hereinafter referred to as CT) 6 for measuring the current I2 (low-voltage side current), 6 trips the circuit breaker 2 and the circuit breaker 3 when a failure occurs within the protection range, and disconnects the transformer 1 from the power system. It is a ratio differential relay that cuts off.
[0003]
FIG. 18 is a block diagram showing a conventional ratio differential relay device described in, for example, JP-A-53-111451. In the figure, reference numeral 11 denotes a primary current I1 and CT5 measured from CT4 in FIG. A suppression current deriving device that compares the measured secondary current I2 and derives a current having a larger current value as a suppression current Ir, 12 is a differential current deriving device for the primary current I1 and the secondary current I2, and 13 is a suppression current deriving device. This is a ratio differential device that outputs a trip signal when a ratio of the differential current Id to the current Ir is equal to or more than a predetermined value. Reference numeral 20 denotes a non-inrush detecting unit that outputs a non-lock signal when it is determined that the power system is not in an inrush state. Reference numeral 17 denotes a trip signal output from the ratio differential unit 13 and a non-inrush detecting unit 20 outputs a non-inrush signal. When a lock signal is output, the AND circuit outputs a trip signal of the circuit breaker to cut off the transformer 1 from the power system.
[0004]
In the non-inrush detecting means 20, a reference numeral 14 denotes a fundamental wave filter for extracting a fundamental wave component Id0 included in the differential current Id derived by the differential current deriving unit 12, and 15 denotes a fundamental wave filter derived by the differential current deriving unit 12. A second harmonic filter 16 for extracting a second harmonic component Id2 included in the obtained differential current Id, the second harmonic filter 16 having a differential current Id equal to or more than a predetermined value and having a second harmonic component Id2 with respect to the fundamental component Id0. An inrush determiner that determines that the power system is not in an inrush state when the ratio is equal to or less than a predetermined value and outputs a non-lock signal.
[0005]
Next, the operation will be described. As shown in FIG. 17, the general function of the ratio differential relay device 6 is that the transformer 1 is not cut off from the power system even if an external fault FO occurs in the power system, but the internal fault FI Is generated, the transformer 1 is shut off from the power system to protect the transformer 1. Specifically, first, the suppression current deriving unit 11 compares the primary current I1 measured by CT4 with the secondary current I2 measured by CT5, and derives a current having a larger current value as the suppression current Ir. . Further, the differential current deriving unit 12 derives a vector difference between the primary current I1 measured by CT4 and the secondary current I2 measured by CT5 as a differential current Id. In general, when the ratio of the differential current Id to the suppression current Ir is equal to or more than a predetermined value, the ratio differential 13 has a high possibility that an internal failure FI has occurred in the power system. If so, a trip signal is output.
Id> KF1 × Ir + KM
However, KF1 and KM are predetermined constants
[0006]
On the other hand, the filter 14 and the filter 15 respectively extract the fundamental component Id0 and the second harmonic component Id2 included in the differential current Id derived by the differential current deriving device 12. Then, the inrush determiner 16 determines whether or not the power system is in an inrush state based on the two components. The non-inrush detecting means 20 including the inrush determiner 16 is installed when the power system is in an inrush state (generally, when the circuit breaker 3 is in the open state and the circuit breaker 2 is changed from the open state to the closed state). In the inrush state), the inrush current flows into the transformer 1, so that a phenomenon similar to the case where the internal failure FI occurs in the power system occurs, so that the ratio differential unit 13 outputs the trip signal. Although output may occur, in this case, since the internal failure FI has not occurred in the power system, it is necessary to prevent the transformer 1 from being disconnected from the power system.
[0007]
That is, the non-inrush detecting means 20 outputs the non-lock signal only when the power system is not in the inrush state, and enables the trip signal output from the ratio differential unit 13. When the ratio of the second harmonic component Id2 to the fundamental component Id0 is equal to or greater than a predetermined value and equal to or less than a predetermined value shown in the following equation, it is determined that the power system is not in an inrush state, and a non-lock signal is output.
Id2 <KF2 × Id0
However, KF2 is a predetermined constant
The reason why the ratio of the second harmonic component Id2 to the fundamental component Id0 is used for the determination is that the inrush current contains more second harmonic current components Id2 than the fault current. When the trip signal is output from the ratio differential device 13 and the non-lock signal is output from the non-inrush detecting means 20, the AND circuit 17 determines that the internal fault FI has occurred in the power system. Then, the transformer 1 is disconnected from the power system, and a series of operations ends.
[0008]
Next, the operation for the inrush current will be described with reference to the waveform diagrams of FIGS. 19A and 20A show the primary current of CT4 when inrush occurs, and FIG. 20B shows the secondary current of CT4 when inrush occurs. In FIG. 19, the ratio differential device 13 outputs the differential current Id after the time tOP13 (for example, 2 cycles, 40 ms based on 50 Hz) from the occurrence of inrush when the differential current Id is equal to or more than the predetermined value (c). Since a large amount of the second harmonic component Id2 is included, the inrush determiner 16 does not output (d). Therefore, the AND circuit 17 does not output (e).
[0009]
Next, the operation when the CT is saturated by the inrush current will be described with reference to the waveform diagram of FIG. The ratio differential unit 13 outputs the signal after the time tOP13 as in the case where there is no CT saturation (c). Up to the third wave of the inrush current, there is no CT saturation, and the waveform is a typical half-wave inrush current waveform. However, since the DC component in the inrush current is integrated from the fourth wave, the CT core becomes Saturation (b), the waveform of the CT secondary current fluctuates slightly in the positive and negative directions, and the harmonic analysis shows that the third harmonic increases and the ratio of the second harmonic component decreases. For this reason, the inrush determiner 16 erroneously outputs the non-lock signal after the time tOP16 from the rising point of the fourth wave, despite the inrush time (d). Therefore, the AND circuit 17 does not need to output. (E), the transformer 1 is cut off from the power system.
[0010]
[Problems to be solved by the invention]
The present invention has been made to solve the above problems,Ensure that the breaker trip signal, which is the output of the ratio differential, does not trigger the breaker during inrushAn object of the present invention is to obtain a highly reliable differential relay.
[0011]
[Means for Solving the Problems]
The ratio differential relay device according to the present invention includes a suppression current deriving unit that derives a suppression current from each terminal current of the protected device, a differential current derivation unit that derives a differential current from each terminal current, and a suppression current. A ratio differential means for outputting when the differential current has a predetermined relationship, extracting a fundamental wave component and a second harmonic component in the differential current, wherein a ratio of the second harmonic component to the fundamental wave component is equal to or less than a predetermined value. Non-inrush detecting means for outputting when the DC component in the differential current is greater than or equal to a predetermined value, and DC component detecting means for outputting when the DC component in the differential current is equal to or greater than a predetermined value. Equipped with an AND circuit that issues a signal that disconnects the device from the system,The DC component detecting unit includes a DC component deriving unit that derives a DC component in the differential current, and a DC component integrating unit that integrates an output of the DC component deriving unit and outputs when the integration amount is equal to or greater than a predetermined value. With the configuration, the output of the DC component detecting means lowers the ratio sensitivity of the second harmonic in the non-inrush detecting means so that the non-inrush detecting means does not output a non-lock signal to the AND circuit. didThings.
[0012]
Also,Suppression current deriving means for deriving a suppression current from each terminal current of the protected device, differential current deriving means for deriving a differential current from each of the terminal currents, and a ratio to output when the suppression current and the differential current have a predetermined relationship A differential means, a non-inrush detecting means for extracting a fundamental component and a second harmonic component in the differential current and outputting when a ratio of the second harmonic component to the fundamental component is equal to or less than a predetermined value; DC component detecting means for outputting when the DC component is equal to or more than a predetermined value, and an AND circuit for outputting a signal for shutting off the protected device from the system when both the ratio differential means and the non-inrush detecting means have outputs. DC component deriving means for deriving a DC component in the differential current; DC component level detecting means for outputting when the magnitude of the DC component is a predetermined value or more; and DC component level detecting. The output of the means is a predetermined time And a timer means for outputting a signal when the connection is continued, and by lowering the ratio sensitivity of the second harmonic in the non-inrush detecting means by the output of the DC component detecting means, from the non-inrush detecting means to the AND circuit. No lock signal is outputThings.
[0013]
Also,Suppression current deriving means for deriving a suppression current from each terminal current of the protected device, differential current deriving means for deriving a differential current from each of the terminal currents, and a ratio to output when the suppression current and the differential current have a predetermined relationship A differential means, a non-inrush detecting means for extracting a fundamental component and a second harmonic component in the differential current and outputting when a ratio of the second harmonic component to the fundamental component is equal to or less than a predetermined value; DC component detecting means for outputting when the DC component is equal to or more than a predetermined value, and an AND circuit for outputting a signal for shutting off the protected device from the system when both the ratio differential means and the non-inrush detecting means have outputs. A DC component deriving unit that derives a DC component in the differential current, and a DC component that outputs when the magnitude ratio of the DC component to the fundamental wave in the differential current is equal to or greater than a predetermined value. Content detection means and DC component Timer means for outputting when the output of the rate detecting means continues for a predetermined time, and by lowering the ratio sensitivity of the second harmonic in the non-inrush detecting means by the output of the DC component detecting means, The non-lock signal from the rush detection means to the AND circuit is not output.Things.
[0014]
Also,Suppression current deriving means for deriving a suppression current from each terminal current of the protected device, differential current deriving means for deriving a differential current from each of the terminal currents, and a ratio to output when the suppression current and the differential current have a predetermined relationship A differential means, a non-inrush detecting means for extracting a fundamental component and a second harmonic component in the differential current and outputting when a ratio of the second harmonic component to the fundamental component is equal to or less than a predetermined value; Second harmonic detecting means for outputting in accordance with the ratio between the fundamental wave component and the second harmonic component therein, And an AND circuit for outputting a signal for shutting off the device to be protected from the system when both the ratio differential means and the non-inrush detecting means output, and the non-inrush signal is output by the output of the second harmonic detecting means. The ratio sensitivity of the second harmonic in the detecting means is reduced so that the non-inrush detecting means does not output a non-lock signal to the AND circuit.Things.
[0015]
The second harmonic detecting means includes a second harmonic content detecting means for outputting when a ratio of the second harmonic to the fundamental wave in the differential current is equal to or more than a predetermined value, and a second harmonic content detecting means. Timer means for outputting when the output of the rate detecting means has continued for a predetermined time.
[0016]
Further, the second harmonic detecting means includes second harmonic decrease detecting means for outputting when the ratio of the second harmonic to the fundamental in the differential current tends to decrease by a predetermined value or more. .
[0017]
Also,Suppression current derivation means for deriving suppression current from each terminal current of the protected device, differential current derivation means for deriving differential current from each terminal current, ratio difference output when suppression current and differential current have a predetermined relationship Operating means, non-inrush detecting means for outputting when the ratio of the second harmonic component to the fundamental wave component in the differential current is equal to or less than a predetermined value, and the sum or low voltage of each phase current and zero-phase current of the high voltage side terminal. DC component detecting means for outputting in accordance with one of the added values of each phase current and zero-phase current of the side terminal, and when both the ratio differential means and the non-inrush detecting means output, the protected device is connected to the system. An AND circuit for outputting a signal to cut off the second harmonic from the non-inrush detection means by lowering the ratio sensitivity of the second harmonic in the non-inrush detection means by the output of the DC component detection means. It was not allowed to issue a non-locking signal to the roadThings.
[0018]
Further, the DC component detecting means includes means for adding each phase current and the zero-phase current of the high voltage side terminal, output level detecting means for outputting when the output of the adding means is equal to or more than a predetermined value, and each phase current of the low voltage side terminal. And a zero-phase current adding means, an output level detecting means for outputting when an output of the adding means is equal to or more than a predetermined value, and a logical sum circuit for outputting a logical sum of outputs of the two output level detecting means. It is.
[0019]
The DC component detecting means includes means for adding each phase current and the zero-phase current of the high-voltage side terminal, and DC sharing output when the ratio of the DC component to the fundamental wave in the output of the adding means is equal to or more than a predetermined value. Rate detection means, addition means for each phase current and zero-phase current of the low-voltage side terminal, and DC component content rate detection means for outputting when the ratio of the DC component to the fundamental wave in the output of the addition means is a predetermined value or more. And a logical sum means for outputting a logical sum of the outputs of the two DC component content rate detecting means.
[0020]
A suppression current deriving means for deriving a suppression current from each terminal current of the protected device; a differential current deriving means for deriving a differential current from each of the terminal currents; an output when the suppression current and the differential current have a predetermined relationship. A non-inrush detecting means for extracting a fundamental component and a second harmonic component in the differential current and outputting when a ratio of the second harmonic component to the fundamental component is equal to or less than a predetermined value; DC component deriving means for deriving a DC component in a dynamic current, DC component integrating means for integrating the output of the DC component deriving means, and outputting when the amount of integration is equal to or more than a certain value, and once output from the DC component integrating means. And a one-shot timer for outputting a pulse having a predetermined time width, an AND circuit for outputting a signal for shutting off the protected device from the system when both the ratio differential means and the non-inrush detecting means output, and the one-shot timer The output is obtained with the inhibit circuit for locking the output of the AND circuit.
[0021]
Also,Suppression current deriving means for deriving a suppression current from each terminal current of the protected device, differential current deriving means for deriving a differential current from each of the terminal currents, and a ratio to output when the suppression current and the differential current have a predetermined relationship A differential means, a non-inrush detecting means for extracting a fundamental wave component and a second harmonic component in the differential current and outputting when a ratio of the second harmonic component to the fundamental wave component is equal to or less than a predetermined value; DC component detecting means for outputting when the DC component in the dynamic current is equal to or more than a predetermined value, and logic for outputting a signal for shutting off the protected device from the system when both the ratio differential means and the non-inrush detecting means output. A DC component detecting means, a DC component deriving means for deriving a DC component in the differential current, and integrating the output of the DC component deriving means, when the integrated amount is equal to or more than a first predetermined value. A first DC component integrating means for outputting the DC component, and a second DC component integrating means for integrating the output of the DC component deriving device and outputting when the integral amount is equal to or greater than a second predetermined value. The ratio sensitivity of the second harmonic in the non-inrush detecting means is lowered by the output of the minute detecting means so that the non-inrush detecting means does not output a non-lock signal to the logic circuit.Things.
[0022]
Also,Suppression current derivation means for deriving suppression current from each terminal current of the protected device, differential current derivation means for deriving differential current from each terminal current, and outputs when the suppression current and the differential current have a predetermined relationship. Ratio differential means, non-inrush detecting means for outputting when the ratio of the second harmonic current to the fundamental wave current in the differential current is equal to or less than a predetermined value, and DC component deriving means for deriving a DC component in the high-side terminal current A DC component integrating means for integrating the output of the DC component deriving means and outputting when the integrated amount is equal to or more than a predetermined value; a DC component deriving means for deriving a DC component in the low voltage side terminal current; DC integration means that outputs when the amount of integration is equal to or greater than a predetermined value, an OR circuit that outputs the logical sum of the outputs of both DC integration means, and the ratio differential means and the non-inrush detection means. Both have output An AND circuit for outputting a signal for shutting off the device to be protected from the system, and lowering the ratio sensitivity of the second harmonic in the non-inrush detecting means by the output of the OR circuit to reduce the ratio sensitivity of the non-inrush detecting means. The lock signal to the above logic circuit is not output.Things.
[0023]
BEST MODE FOR CARRYING OUT THE INVENTION
Embodiment 1 FIG.
FIG. 1 is a block diagram showing a ratio differential relay device according to Embodiment 1 of the present invention. In the figure, reference numeral 100 denotes a variable ratio inrush determiner capable of controlling the ratio sensitivity of a second harmonic component Id2; Reference numeral 101 denotes a DC component deriving device that derives a DC component in the differential current Id, and 102 denotes a DC component integrator that integrates an output of the DC component deriving device 101 and outputs the result when the integration amount becomes equal to or more than a predetermined value. . Other configurations are the same as those shown in FIG.
[0024]
Next, the operation will be described with reference to the waveform diagram of FIG. (A) of the figure shows the primary side current of CT4 at the time of inrush occurrence, and (b) shows the secondary side current of CT4 at the time of inrush occurrence. The direct current component in the output differential current Id of the differential current deriving device 12 to which the inrush current is applied is derived by the direct current deriving device 101 (f), and the output Idd of the direct current deriving device 101 is converted to the direct current integrating means 102. Is integrated by The DC component integrating means 102 outputs (g) after the time tOP102 from the application of the inrush current when the integration amount reaches a predetermined value, and the ratio sensitivity of the second harmonic of the variable ratio inrush determiner 100 (that is, The content ratio of the second harmonic to the fundamental wave, which determines whether or not the second harmonic is the same, is changed, for example, from 12% to 8%. Due to this reduction in sensitivity, the inrush determiner 100 does not output a non-lock signal even if the CT is saturated by the inrush current and (b) the second harmonic content in the differential current Id decreases (e). ). For this reason, the signal which shuts down the transformer unnecessarily at the time of inrush from the AND means 17 is not output.
[0025]
Embodiment 2 FIG.
FIG. 3 is a block diagram showing a ratio differential relay device according to Embodiment 2 of the present invention. In the figure, reference numeral 103 denotes a DC component level detecting means that outputs when the magnitude of the DC component Idd is equal to or larger than a predetermined value. And 104 are timers that output when the output of the DC level detecting means 103 has continued for a predetermined time or more. Other configurations are the same as those in FIG.
[0026]
Next, the operation will be described. The DC component in the output differential current Id of the differential current deriving device 12 to which the inrush current is applied is derived by the DC component deriving device 101, and the magnitude of the output Idd of the DC component deriving device 101 is a predetermined value (for example, rated If the current is 10% or more, the DC component level detector 103 outputs and the timer 104 is activated. When the timer 104 counts up after a predetermined time (for example, after T1 = 1 second), the second harmonic ratio sensitivity of the variable ratio inrush determiner 100 is changed from 12% to 8%, for example. Due to this reduction in sensitivity, even if CT4 is saturated by the inrush current and the second harmonic content in the differential current Id decreases, the inrush determiner 100 does not output the unlock signal. Therefore, a signal for unnecessarily shutting down the transformer 1 is not output from the logical AND means 17 at the time of inrush.
[0027]
Embodiment 3 FIG.
FIG. 4 is a block diagram showing a ratio differential relay device according to Embodiment 3 of the present invention. In the figure, reference numeral 105 denotes a ratio of the DC component Idd to the fundamental wave in the differential current Id which is a predetermined value (for example, 40%) or more, and a DC component detection means 106 which outputs when the output of the DC component content detection means 105 has continued for a predetermined period of time.
[0028]
Next, the operation will be described with reference to the waveform diagram of FIG. The direct current component in the output differential current Id of the differential current deriving device 12 to which the inrush current is applied is derived by the direct current deriving device 101 (f), and the magnitude of the direct current component Idd is the fundamental wave of the fundamental filter 14. If the output is equal to or larger than the predetermined ratio compared to the minute output Id0, the DC component content detecting unit 105 outputs the signal after the detection time tOP105 (g), and the timer 106 is activated. When the timer 106 counts up after a predetermined time (for example, after T2 = 1 second) (h), the second harmonic ratio sensitivity of the variable ratio inrush determiner 100 is changed from 12% to 8%, for example. Due to this reduction in sensitivity, even if CT4 is saturated by the inrush current and the second harmonic content in the differential current Id decreases, the inrush determiner 100 does not output (e). Therefore, a signal for unnecessarily shutting down the transformer 1 is not output from the logical AND means 17 at the time of inrush.
[0029]
Embodiment 4 FIG.
FIG. 6 is a block diagram showing a ratio differential relay device according to Embodiment 4 of the present invention. In the drawing, reference numeral 107 denotes a ratio of the second harmonic component current Id2 to the fundamental wave current Id0 in the differential current Id. The second harmonic content detection means 108 outputs when the ratio is equal to or more than a predetermined ratio (for example, 12%), and a timer 108 outputs when the output of the second harmonic content detection means 107 continues for a predetermined time.
[0030]
Next, the operation will be described with reference to the waveform diagram of FIG. The second harmonic component current Id2 in the output differential current Id of the differential current deriving unit 12 to which the inrush current is applied is derived by the second harmonic filter 15, and the magnitude of the second harmonic component current Id2 is reduced. If the ratio is equal to or more than a predetermined ratio with respect to the magnitude of the fundamental wave component current Id0 of the fundamental wave filter 14, the second harmonic content detection means 107 outputs after the detection time tOP107 (f), and the timer 108 is activated. . When the timer 108 counts up after a predetermined time (for example, after T3 = 1 second) (g), the second harmonic ratio sensitivity of the variable ratio inrush determiner 100 is changed from 12% to 8%, for example. Due to this reduction in sensitivity, CT4 is saturated by the inrush current and (b) even if the second harmonic content in the differential current Id decreases, the inrush determiner 100 does not output (e). Therefore, a signal for unnecessarily shutting down the transformer 1 is not output from the AND circuit 17 at the time of inrush.
[0031]
Embodiment 5 FIG.
FIG. 8 is a block diagram showing a ratio differential relay device according to Embodiment 5 of the present invention. In the drawing, reference numeral 109 denotes a ratio of the second harmonic component current Id2 to the fundamental current Id0 in the differential current Id. Second harmonic decrease detection means for outputting when the ratio is decreasing more than a predetermined ratio (for example, -2% / cycle). Other configurations are the same as those in FIG.
[0032]
Generally, the content of the second harmonic in the inrush current generally increases slightly with the passage of time. However, in the fifth embodiment, the tendency of the second harmonic current to decrease at the onset of CT saturation is considered. , To change the sensitivity of the variable inrush determiner 100. Next, the operation will be described with reference to the waveform diagram of FIG. The second harmonic component current Id2 in the output differential current Id of the differential current deriving device 12 to which the inrush current is applied is derived from the second harmonic filter 15, and has the magnitude of the second harmonic component current Id2. If the ratio of the fundamental wave filter 14 to the magnitude of the fundamental wave current Id0 tends to decrease by a predetermined ratio or more, the second harmonic decrease detection unit 109 outputs after the detection time tOP109 (f), and the variable ratio inrush determination unit The second harmonic ratio sensitivity of 100 is changed, for example, from 12% to 8%. Due to the reduction in sensitivity, even if CT4 is saturated by the inrush current and the second harmonic content in the differential current Id is reduced, the inrush determiner 100 does not output the unlock signal (e). Therefore, a signal for unnecessarily shutting down the transformer 1 is not output from the AND circuit 17 at the time of inrush.
[0033]
Embodiment 6 FIG.
FIG. 10 is a block diagram showing a ratio differential relay device according to Embodiment 6 of the present invention. In the drawing, reference numeral 110 denotes a high-side phase current I1A, a phase current I1B, a phase current I1C, and a zero-phase current I1N. Is a first level detecting means for outputting when the output of the first adding means 110 is equal to or larger than a predetermined value, and 111 is a low-voltage side phase current I2A, a phase current I2B, Second adding means for adding the phase current I2C and the zero-phase current I2N; 113, a second level detecting means for outputting when the output of the second adding means 111 is greater than or equal to a predetermined value; It is.
[0034]
Next, the operation will be described. The outputs of the first adding means 110 and the second adding means 111 are zero at the time of soundness, external failure, internal failure, and inrush when there is no saturation of each CT. , C phase, if any CT is saturated, it will not be zero. For example, when an inrush current containing a large DC component is applied from the high voltage side, there is an output from the first adder circuit 110 due to any CT saturation, and when the value is equal to or more than a predetermined value, the first level detection means The second harmonic ratio sensitivity of the variable ratio inrush determiner 100 is changed from, for example, 12% to 8% via the OR circuit 114. Due to this reduction in sensitivity, even if CT4 is saturated by the inrush current and the second harmonic content in the high-voltage side current I1 decreases, the inrush determiner 100 does not output the unlock signal. Therefore, the AND circuit 17 does not output unnecessarily. The same operation is performed on the low pressure side.
[0035]
FIG. 16 shows a power system diagram in which the application of this embodiment is effective. In FIG. 16, 201 is a bus, 203 is a transformer, and 202 is a circuit breaker. In the system shown in FIG. 16, when the transformer 1 is operating (the circuit breakers 2 and 3 are both closed) and the circuit breaker 202 is closed, the inrush current passes through CT4 and CT5 and the ratio differential relay 6 No differential current is generated in the differential circuit (there is no output from the differential current deriving unit 12). However, according to the sixth embodiment, not the differential current as described above but the high-voltage side or the low-voltage side Since the method of detecting the saturation of CT due to the inrush current from the current is employed, malfunction can be prevented even when applied to such a system.
[0036]
Embodiment 7 FIG.
FIG. 11 is a block diagram showing a ratio differential relay device according to Embodiment 7 of the present invention. In the drawing, reference numeral 115 denotes a predetermined ratio of the DC component to the fundamental wave output from the first adding means 110. The first DC sharing ratio detecting means 116 that outputs when the ratio is equal to or more than the value is a second DC sharing ratio that outputs when the ratio of the DC component to the fundamental wave output from the second adding unit 111 is equal to or more than a predetermined value. The percentage detecting means 117 is a logical sum means. Other configurations are the same as those in FIG.
[0037]
Next, the operation will be described. The outputs of the first adding means 110 and the second adding means 111 are zero in a healthy state, an external failure state, an internal failure state, and an in-rush state unless each CT is saturated. If any one of the phase, the C phase, and the CT is saturated, the value is not zero. For example, when an inrush current including a large amount of DC component is applied from the high voltage side, an output is provided from the first adding means 110 due to any CT saturation, and a DC component of a predetermined ratio or more is included in the output. The first DC sharing ratio detection means 115 outputs the signal, and the detection sensitivity of the variable ratio inrush determiner 100 is changed from 12% to 8% via the OR means 117.
[0038]
Due to this reduction in sensitivity, even if the CT is saturated by the inrush current and the second harmonic content in the high-side current I1 is reduced, the inrush determiner 100 does not output the unlock signal. Therefore, there is no unnecessary output from the AND circuit 17 at the time of inrush. According to the seventh embodiment, as described above, the method of detecting the saturation of the CT due to the inrush current from the high-voltage side or the low-voltage side current instead of the differential current is used. This is particularly effective when applied to a system as shown in FIG.
[0039]
Embodiment 8 FIG.
FIG. 12 is a block diagram showing a ratio differential relay device according to Embodiment 8 of the present invention. In the drawing, reference numeral 118 denotes a pulse having a predetermined time width when there is an output from the DC component integrating means 102 once. This is a one-shot timer. Here, the pulse time width of the one-shot timer 118 is set to, for example, one second in consideration of the CT continuation time due to the DC component of the inrush current. 119 is an inhibit circuit.
[0040]
Next, the operation will be described. The DC component in the output differential current Id of the differential current deriving device 12 to which the inrush current is applied is derived by the DC component deriving device 101, and the output current Idd of the DC component deriving device 101 is integrated by the DC component integrating means 102. Is done. When the integration amount reaches a predetermined value, the DC component integration means 102 outputs the signal to activate the one-shot timer 118, and a pulse having a predetermined time width is output. For this reason, even if the unlock signal is output from the inrush determiner 100, the inhibit means 119 is locked by the output of the one-shot timer 118 while the CT is saturated. No output.
[0041]
Embodiment 9 FIG.
FIG. 13 is a block diagram showing the configuration of a ratio differential relay device according to Embodiment 9 of the present invention. In the drawing, reference numeral 120 denotes an integral of the output Idd of the DC component deriving device 101, and the integral amount is DC integral. A second DC integration means for outputting when the detection level is equal to or more than a second predetermined value larger than the detection level of the means 102; Other configurations are the same as those in FIG.
[0042]
Next, the operation will be described with reference to the waveform diagram of FIG. The DC component in the output differential current Id of the differential current deriving device 12 to which the inrush current is applied is derived by the DC component deriving device 101, and the output Idd of the DC component deriving device 101 is integrated by the DC component integrating means 102. You. When the integration amount reaches a predetermined value after the time tOP102, the DC component integration means 102 outputs (g), and the second harmonic ratio sensitivity of the variable ratio inrush determiner 100 is changed from, for example, 12% to 8%. Further, when the inrush current continues and reaches the detection level of the second DC component integrating means 120 after the operation time tOP120, the second DC component integrating means 120 outputs (h), and the variable inrush determining device 100 This time, the second harmonic ratio sensitivity is changed, for example, from 8% to 6%. Due to the two-stage reduction in sensitivity, even if CT is saturated by the inrush current and the second harmonic content in the differential current Id is reduced, the inrush determiner 100 does not output the unlock signal. Accordingly, a signal for unnecessarily shutting down the transformer is output from the AND circuit 17 at the time of inrush.
Never.
[0043]
Embodiment 10 FIG.
FIG. 15 is a block diagram showing a ratio differential relay device according to Embodiment 10 of the present invention. In the drawing, reference numeral 121 denotes a DC component deriving device for deriving a DC component in the high-voltage side terminal current I1, and 123 Is a first DC component integrating means for integrating the output of the DC component deriving device 121 and outputting when the integration amount is equal to or more than a predetermined value; 122, a DC component deriving device for deriving a DC component in the low voltage side terminal current I2; 124 is a second DC component integrating means for integrating the output of the DC component deriving device 122 and outputting when the integration amount is equal to or more than a predetermined value, and 125 changing the second harmonic ratio sensitivity of the inrush determination device 100 according to the output. It is an OR circuit.
[0044]
Next, the operation will be described. For example, when an inrush current is applied from the high voltage side, the DC component in the high voltage side current I1 is derived by the first DC component deriving device 121, and the output of the first DC component deriving device 121 is output by the first DC component. The integration is performed by the integration means 123. When the amount of integration becomes equal to or more than a predetermined value, the first DC component integrating means 123 outputs and changes the second harmonic ratio sensitivity of the variable ratio inrush determiner 100 from, for example, 12% to 8%. Due to this reduction in sensitivity, even if CT4 is saturated by the inrush current and the second harmonic content in the terminal current is reduced, the inrush determiner 100 does not output the unlock signal. Therefore, a signal for unnecessarily shutting down the transformer is not output from the AND circuit 17 at the time of inrush. The same operation is performed on the low pressure side. According to the tenth embodiment, as described above, the saturation of the CT due to the inrush current is detected not from the differential current but from the high voltage side or the low voltage side current. Therefore, the sixth and seventh embodiments are described. Similarly to the system shown in FIG.
[0045]
【The invention's effect】
As described above, according to the present invention,If the differenceThe DC component in the dynamic current is extracted, and the DC component is integrated. When the integrated amount is equal to or more than a predetermined value, it is determined that there is a risk of CT saturation, and the non-inrush detection is performed due to a decrease in the second harmonic component content due to the CT saturation. Since the second harmonic ratio sensitivity of the inrush determiner is changed prior to CT saturation so that the means does not output unnecessarily, a highly reliable ratio differential relay can be obtained.
[0046]
In addition, a DC component in the differential current is extracted, and when a period in which the DC component exceeds a predetermined value continues for a predetermined time or more, it is determined that there is a risk of CT saturation. Since the second harmonic ratio sensitivity of the inrush determiner is changed prior to CT saturation so that the non-inrush detecting means does not output unnecessarily, a highly reliable ratio differential relay device can be obtained. Can be
[0047]
Further, a DC component in the differential current is extracted, and when a period in which the magnitude ratio of the DC component to the fundamental wave in the differential current exceeds a predetermined value continues for a predetermined time or more, it is determined that there is a possibility of CT saturation, Since the second harmonic ratio sensitivity of the inrush determiner is changed prior to CT saturation so that the non-inrush detecting means does not needlessly output due to the decrease of the second harmonic component content due to saturation, the reliability is improved. A high ratio differential relay is obtained.
[0048]
In addition, the second harmonic component in the differential current is extracted, and when the magnitude ratio of the second harmonic to the fundamental wave in the differential current exceeds a predetermined value for more than a predetermined time, CT saturation may occur. The second harmonic ratio sensitivity of the inrush determiner is changed prior to CT saturation so that the non-inrush detection means does not needlessly output due to the reduction of the second harmonic component content due to CT saturation. Therefore, a highly reliable ratio differential relay device can be obtained.
[0049]
In addition, the second harmonic component in the differential current is extracted, and if the second harmonic component tends to decrease, it is determined that there is a risk of CT saturation. Since the second harmonic ratio sensitivity of the inrush determiner is changed prior to CT saturation so that the inrush detection means does not output unnecessarily, a highly reliable ratio differential relay device can be obtained. .
[0050]
When the output obtained by adding the phase currents of the high-voltage and low-voltage terminals and the zero-phase current is equal to or more than a predetermined value, it is determined that there is a risk of CT saturation, and the non-impedance due to a decrease in the second harmonic component content due to CT saturation. Since the second harmonic ratio sensitivity of the inrush determiner is changed prior to CT saturation so that the rush detection means does not output unnecessarily, a highly reliable ratio differential relay device can be obtained.
[0051]
Further, since the CT saturation due to the inrush current is detected not from the differential current but from the high voltage side or the low voltage side current, it can be effectively applied to a system through which the inrush current passes.
[0052]
Further, when the ratio of the DC component to the fundamental wave in the output obtained by adding each phase current of the high voltage side or low voltage side terminal and the zero-phase current is equal to or more than a predetermined value, it is determined that there is a risk of high voltage side CT saturation, Since the second harmonic ratio sensitivity of the inrush determiner is changed prior to the CT saturation so that the non-inrush detecting means does not output unnecessarily due to the decrease in the content of the second harmonic component, the reliability is improved. A high ratio differential relay is obtained.
[0053]
In addition, a DC component in the differential current is extracted, and the DC component is integrated. When the integrated amount is equal to or more than a predetermined value, it is determined that there is a risk of CT saturation. In order to prevent the inrush detection means from outputting unnecessarily, a pulse having a predetermined time width is generated prior to the CT saturation, and the trip means is locked for the duration of the pulse output. , A highly reliable ratio differential relay device that does not operate unnecessarily even when saturation occurs.
[0054]
In addition, a DC component in the differential current is extracted, and the DC component is integrated. When the integrated amount is equal to or more than a predetermined value, it is determined that there is a risk of CT saturation. The second harmonic ratio sensitivity of the inrush determination unit is changed prior to CT saturation so that the inrush detection unit does not output unnecessarily, and when the integration amount exceeds a second predetermined value or more, the inrush determination unit detects the second harmonic ratio sensitivity. Since the second harmonic ratio sensitivity is configured to be further changed, a highly reliable ratio differential relay device that does not operate unnecessarily even when CT is saturated due to inrush current is obtained.
[0055]
Further, a DC component in the high-side or low-voltage side terminal current is extracted, and the DC component is integrated. When the integrated amount is equal to or more than a predetermined value, it is determined that there is a risk of CT saturation, and the second harmonic component content due to CT saturation is included. Since the second harmonic ratio sensitivity of the inrush determiner is changed prior to CT saturation so that the non-inrush detection means does not output unnecessarily due to the rate decrease, CT is saturated due to inrush current. Thus, a highly reliable ratio differential relay device that does not operate unnecessarily can be obtained.
[Brief description of the drawings]
FIG. 1 is a block diagram of a ratio differential relay device according to Embodiment 1 of the present invention.
FIG. 2 is a waveform diagram illustrating an operation of the first embodiment.
FIG. 3 is a block diagram of a ratio differential relay device according to Embodiment 2 of the present invention.
FIG. 4 is a block diagram of a ratio differential relay device according to Embodiment 3 of the present invention.
FIG. 5 is a waveform chart illustrating an operation of the third embodiment.
FIG. 6 is a block diagram of a ratio differential relay device according to Embodiment 4 of the present invention.
FIG. 7 is a waveform chart illustrating an operation of the fourth embodiment.
FIG. 8 is a block diagram of a ratio differential relay device according to Embodiment 5 of the present invention.
FIG. 9 is a waveform chart illustrating an operation of the fourth embodiment.
FIG. 10 is a block diagram of a ratio differential relay device according to Embodiment 6 of the present invention.
FIG. 11 is a block diagram of a ratio differential relay device according to Embodiment 7 of the present invention.
FIG. 12 is a block diagram of a ratio differential relay device according to Embodiment 8 of the present invention.
FIG. 13 is a block diagram of a ratio differential relay device according to Embodiment 9 of the present invention.
FIG. 14 is a waveform chart illustrating an operation of the ninth embodiment.
FIG. 15 is a block diagram of a ratio differential relay device according to Embodiment 10 of the present invention.
FIG. 16 is a system diagram showing a power system to which the sixth, seventh, and tenth embodiments are applied.
FIG. 17 is a system diagram showing a power system to which a conventional ratio differential relay device is applied.
FIG. 18 is a block diagram showing a conventional ratio differential relay device.
FIG. 19 is a waveform diagram illustrating the operation of the conventional ratio differential relay device when CT is not saturated.
FIG. 20 is a waveform diagram illustrating the operation of the conventional ratio differential relay device when CT is saturated.
[Explanation of symbols]
11 suppression current deriving device, 12 differential current deriving device, 13 ratio differential device,
14, 15 filter, 16 inrush decision unit, 17 AND circuit,
20 non-inrush detecting means, 100 variable ratio inrush determining device,
101, 121, 122 DC component deriving device,
102, 120, 123, 125 DC integration means,
103, 112, 113 level detecting means,
104, 106, 108 timers,
105, 115, 116 DC component content rate detection means,
107 second harmonic content detection means, 109 second harmonic decrease detection means,
110, 111 adding means, 114, 117, 124 OR circuit,
118 one-shot timer, 119 inhibit circuit.

Claims (12)

被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分と第２高調波成分を抽出し、基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、差動電流中の直流分が所定値以上のとき出力する直流分検出手段、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記直流分検出手段を、差動電流中の直流成分を導出する直流分導出手段と、この直流分導出手段の出力を積分し、積分量が所定値以上のとき出力する直流分積分手段とで構成すると共に、上記直流分検出手段の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理積回路への非ロック信号を出さないようにしたことを特徴とする比率差動継電装置。Suppression current deriving means for deriving a suppression current from each terminal current of the protected device, differential current deriving means for deriving a differential current from each of the terminal currents, and a ratio to output when the suppression current and the differential current have a predetermined relationship A differential means, a non-inrush detecting means for extracting a fundamental component and a second harmonic component in the differential current and outputting when a ratio of the second harmonic component to the fundamental component is equal to or less than a predetermined value; DC component detecting means for outputting when the DC component is equal to or more than a predetermined value, and an AND circuit for outputting a signal for shutting off the protected device from the system when both the ratio differential means and the non-inrush detecting means have outputs. A DC component deriving unit that derives a DC component in the differential current, and a DC component integration unit that integrates an output of the DC component deriving unit and outputs when the amount of integration is equal to or greater than a predetermined value. Means and Characterized in that the output of the serial DC component detecting means and to not issue a non-locking signal by lowering the ratio sensitivity of the second harmonic wave in the non-rush detecting means from the non-rush detecting means to said logical product circuit And differential relay device. 被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分と第２高調波成分を抽出し、基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、差動電流中の直流分が所定値以上のとき出力する直流分検出手段、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記直流分検出手段を、差動電流中の直流成分を導出する直流分導出手段と、直流分の大きさが所定値以上のとき出力する直流分レベル検出手段と、直流分レベル検出手段の出力が所定時間継続したとき出力するタイマ手段とで構成すると共に、上記直流分検出手段の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理積回路への非ロック信号を出さないようにしたことを特徴とする比率差動継電装置。 Suppression current deriving means for deriving a suppression current from each terminal current of the protected device, differential current deriving means for deriving a differential current from each of the terminal currents, and a ratio to output when the suppression current and the differential current have a predetermined relationship A differential means, a non-inrush detecting means for extracting a fundamental component and a second harmonic component in the differential current and outputting when a ratio of the second harmonic component to the fundamental component is equal to or less than a predetermined value; DC component detecting means for outputting when the DC component is equal to or more than a predetermined value, and an AND circuit for outputting a signal for shutting off the protected device from the system when both the ratio differential means and the non-inrush detecting means have outputs. DC component deriving means for deriving a DC component in the differential current; DC component level detecting means for outputting when the magnitude of the DC component is a predetermined value or more; and DC component level detecting. The output of the means is a predetermined time And a timer means for outputting a signal when the connection is continued, and by lowering the ratio sensitivity of the second harmonic in the non-inrush detecting means by the output of the DC component detecting means, from the non-inrush detecting means to the AND circuit. Characterized in that a non-lock signal is not output. 被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分と第２高調波成分を抽出し、基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、差動電流中の直流分が所定値以上のとき出力する直流分検出手段、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記直流分検出手段を、差動電流中の直流成分を導出する直流分導出手段と、差動電流中の基本波に対する直流分の大きさ比率が所定値以上のとき出力する直流分含有率検出手段と、直流分含有率検出手段の出力が所定時間継続したとき出力するタイマ手段とで構成すると共に、上記直流分検出手段の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理積回路への非ロック信号を出さないようにしたことを特徴とする比率差動継電装置。 Suppression current deriving means for deriving a suppression current from each terminal current of the protected device, differential current deriving means for deriving a differential current from each of the terminal currents, and a ratio to output when the suppression current and the differential current have a predetermined relationship A differential means, a non-inrush detecting means for extracting a fundamental component and a second harmonic component in the differential current and outputting when a ratio of the second harmonic component to the fundamental component is equal to or less than a predetermined value; DC component detecting means for outputting when the DC component is equal to or more than a predetermined value, and an AND circuit for outputting a signal for shutting off the protected device from the system when both the ratio differential means and the non-inrush detecting means have outputs. A DC component deriving unit that derives a DC component in the differential current, and a DC component that outputs when the magnitude ratio of the DC component to the fundamental wave in the differential current is equal to or greater than a predetermined value. Content detection means and DC component Timer means for outputting when the output of the rate detecting means continues for a predetermined time, and by lowering the ratio sensitivity of the second harmonic in the non-inrush detecting means by the output of the DC component detecting means, A non-lock signal from the rush detection means to the AND circuit is not output . 被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分と第２高調波成分を抽出し、基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、差動電流中の基本波成分と第２高調波成分との割合に応じて出力する第２高調波検出手段、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記第２高調波検出手段の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理積回路への非ロック信号を出さないようにしたことを特徴とする比率差動継電装置。 Suppression current deriving means for deriving a suppression current from each terminal current of the protected device, differential current deriving means for deriving a differential current from each of the terminal currents, and a ratio to output when the suppression current and the differential current have a predetermined relationship A differential means, a non-inrush detecting means for extracting a fundamental component and a second harmonic component in the differential current and outputting when a ratio of the second harmonic component to the fundamental component is equal to or less than a predetermined value; A second harmonic detecting means for outputting a signal in accordance with a ratio between the fundamental wave component and the second harmonic component, and a system for protecting the protected device when both the ratio differential means and the non-inrush detecting means output. An AND circuit for outputting a signal for shutting off from the second harmonic detecting means. The output of the second harmonic detecting means lowers the ratio sensitivity of the second harmonic in the non-inrush detecting means to reduce the ratio sensitivity of the non-inrush detecting means to the AND circuit. Non-b Ratio differential relay device being characterized in that so as not issue a click signal. 第２高調波検出手段は、差動電流中の基本波分に対する第２高調波分の比率が所定値以上のとき出力する第２高調波含有率検出手段と、この第２高調波含有率検出手段の出力が所定時間継続したとき出力するタイマ手段とを備えたことを特徴とする請求項４記載の比率差動継電装置。The second harmonic detecting means includes a second harmonic content detecting means for outputting when a ratio of the second harmonic to a fundamental wave in the differential current is equal to or more than a predetermined value, and a second harmonic content detecting means. 5. The ratio differential relay device according to claim 4, further comprising timer means for outputting when the output of the means continues for a predetermined time. 第２高調波検出手段は、差動電流中の基本波分に対する第２高調波分の比率が所定値以上減少傾向にあるとき出力する第２高調波減少検出手段を備えたことを特徴とする請求項４記載の比率差動継電装置。The second harmonic detecting means includes second harmonic decrease detecting means for outputting when the ratio of the second harmonic to the fundamental in the differential current is decreasing by a predetermined value or more. The ratio differential relay according to claim 4 . 被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、および高圧側端子の各相電流および零相電流の加算値または低圧側端子の各相電流および零相電流の加算値のいずれかに応じて出力する直流分検出手段、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記直流分検出手段の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理積回路への非ロック信号を出さないようにしたことを特徴とする比率差動継電装置。 Suppression current derivation means for deriving suppression current from each terminal current of the protected device, differential current derivation means for deriving differential current from each terminal current, ratio difference output when suppression current and differential current have a predetermined relationship Operating means, non-inrush detecting means for outputting when the ratio of the second harmonic component to the fundamental wave component in the differential current is equal to or less than a predetermined value, and the sum or low voltage of each phase current and zero-phase current of the high voltage side terminal. DC component detecting means for outputting in accordance with one of the added values of each phase current and zero-phase current of the side terminal, and when both the ratio differential means and the non-inrush detecting means output, the protected device is connected to the system. An AND circuit for outputting a signal to cut off the second harmonic from the non-inrush detection means by lowering the ratio sensitivity of the second harmonic in the non-inrush detection means by the output of the DC component detection means. Ratio differential relay device being characterized in that so as not issue a non-locking signal to the road. 直流分検出手段は、高圧側端子の各相電流および零相電流の加算手段と、この加算手段の出力が所定値以上のとき出力する出力レベル検出手段と、低圧側端子の各相電流および零相電流の加算手段と、この加算手段の出力が所定値以上のとき出力する出力レベル検出手段と、上記両出力レベル検出手段の出力の論理和を出力する論理和回路とを備えたことを特徴とする請求項７記載の比率差動継電装置。DC component detecting means includes means for adding each phase current and zero-phase current of the high voltage side terminal, output level detecting means for outputting when the output of the adding means is equal to or more than a predetermined value, and each phase current and zero voltage of the low voltage side terminal. Phase current adding means, an output level detecting means for outputting when the output of the adding means is equal to or more than a predetermined value, and an OR circuit for outputting a logical sum of outputs of the two output level detecting means. The ratio differential relay device according to claim 7, wherein 直流分検出手段は、高圧側端子の各相電流および零相電流の加算手段と、この加算手段の出力中の基本波に対する直流分の比率が所定値以上のとき出力する直流分合有率検出手段と、低圧側端子の各相電流および零相電流の加算手段と、この加算手段の出力中の基本波に対する直流分の比率が所定値以上のとき出力する直流分含有率検出手段と、上記両直流分含有率検出手段の出力の論理和を出力する論理和手段とを備えたことを特徴とする請求項７記載の比率差動継電装置。DC component detecting means includes means for adding each phase current and zero-phase current of the high-voltage side terminal, and DC sharing ratio output when the ratio of the DC component to the fundamental wave in the output of the adding means is equal to or greater than a predetermined value. A means for adding each phase current and a zero-phase current of the low-voltage side terminal; a DC component content ratio detecting means for outputting when a ratio of a DC component to a fundamental wave in an output of the adding means is a predetermined value or more; 8. The ratio differential relay device according to claim 7, further comprising: OR means for outputting a logical sum of outputs of the both DC component content rate detecting means. 被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分と第２高調波成分を抽出し、基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、差動電流中の直流成分を導出する直流分導出手段、この直流分導出手段の出力を積分し、積分量が一定値以上のとき出力する直流分積分手段、この直流分積分手段から一度出力があると所定時間幅のパルスを出力するワンショットタイマ、上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき被保護装置を系統から遮断する信号を出す論理積回路、および上記ワンショトタイマの出力により上記論理積回路の出力をロックするインヒビット回路を備えたことを特徴とする比率差動継電装置。Suppression current deriving means for deriving a suppression current from each terminal current of the protected device, differential current deriving means for deriving a differential current from each of the terminal currents, and a ratio to output when the suppression current and the differential current have a predetermined relationship A differential means, a non-inrush detecting means for extracting a fundamental wave component and a second harmonic component in the differential current, and outputting when a ratio of the second harmonic component to the fundamental wave component is equal to or less than a predetermined value; DC component deriving means for deriving a DC component therein, a DC component integrating means for integrating the output of the DC component deriving means, and outputting when the integration amount is equal to or more than a predetermined value, and a predetermined once output from the DC component integrating means. A one-shot timer for outputting a pulse having a time width, an AND circuit for outputting a signal for shutting off the protected device from the system when both the ratio differential means and the non-inrush detecting means output, and an output of the one-shot timer Ratio differential relay apparatus characterized by comprising the inhibit circuit for locking the output of the AND circuit by. 被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波成分と第２高調波成分を抽出し、基本波成分に対する第２高調波成分の比率が所定値以下のとき出力する非インラッシュ検出手段、差動電流中の直流分が所定値以上のとき出力する直流分検出手段、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記直流分検出手段を、差動電流中の直流成分を導出する直流分導出手段と、この直流分導出手段の出力を積分し、積分量が第１の所定値以上のとき出力する第１の直流分積分手段と、上記直流分導出手段の出力を積分し、積分量が第２の所定値以上のとき出力する第２の直流分積分手段とで構成すると共に、上記直流分検出手段の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理回路への非ロック信号を出さないように したことを特徴とする比率差動継電装置。 Suppression current deriving means for deriving a suppression current from each terminal current of the protected device, differential current deriving means for deriving a differential current from each of the terminal currents, and a ratio to output when the suppression current and the differential current have a predetermined relationship A differential means, a non-inrush detecting means for extracting a fundamental component and a second harmonic component in the differential current and outputting when a ratio of the second harmonic component to the fundamental component is equal to or less than a predetermined value; DC component detecting means for outputting when the DC component is equal to or more than a predetermined value, and an AND circuit for outputting a signal for shutting off the protected device from the system when both the ratio differential means and the non-inrush detecting means have outputs. A DC component deriving device for deriving a DC component in a differential current, integrating the output of the DC component deriving device, and outputting when the integrated amount is equal to or greater than a first predetermined value. A first DC component integrating means; A second DC component integrating means for integrating the output of the flow component deriving device and outputting when the integrated amount is equal to or greater than a second predetermined value, and the non-inrush detecting device based on an output of the DC component detecting device. the second harmonic ratio differential relay apparatus characterized by lowering the ratio sensitivity was not allowed to issue a non-locking signal to the logic circuit from the non inrush detection means in. 被保護装置の各端子電流から抑制電流を導出する抑制電流導出手段、上記各端子電流から差動電流を導出する差動電流導出手段、上記抑制電流と差動電流が所定の関係のとき出力する比率差動手段、差動電流中の基本波電流に対する第２高調波電流の比率が所定値以下のとき出力する非インラッシュ検出手段、高圧側端子電流中の直流成分を導出する直流分導出手段、この直流分導出手段の出力を積分し、積分量が所定値以上のとき出力する直流分積分手段、低圧側端子電流中の直流成分を導出する直流分導出手段、この直流分導出手段の出力を積分し、積分量が所定値以上のとき出力する直流分積分手段、上記両直流分積分手段の出力の論理和を出力する論理和回路、および上記比率差動手段と非インラッシュ検出手段から共に出力ありのとき、被保護装置を系統から遮断する信号を出す論理積回路を備え、上記論理和回路の出力により上記非インラッシュ検出手段における第２高調波の比率感度を下げて上記非インラッシュ検出手段から上記論理回路への非ロック信号を出さないようにしたことを特徴とする比率差動継電装置。 Suppression current derivation means for deriving suppression current from each terminal current of the protected device, differential current derivation means for deriving differential current from each terminal current, and outputs when the suppression current and the differential current have a predetermined relationship. Ratio differential means, non-inrush detecting means for outputting when the ratio of the second harmonic current to the fundamental wave current in the differential current is equal to or less than a predetermined value, and DC component deriving means for deriving a DC component in the high-side terminal current A DC component integrating means for integrating the output of the DC component deriving means and outputting when the integrated amount is equal to or more than a predetermined value; a DC component deriving means for deriving a DC component in the low voltage side terminal current; DC integration means that outputs when the amount of integration is equal to or greater than a predetermined value, an OR circuit that outputs the logical sum of the outputs of both DC integration means, and the ratio differential means and the non-inrush detection means. Both have output An AND circuit for outputting a signal for shutting off the device to be protected from the system, and lowering the ratio sensitivity of the second harmonic in the non-inrush detecting means by the output of the OR circuit to reduce the ratio sensitivity of the non-inrush detecting means. A ratio differential relay device , wherein a non-lock signal is not output to the logic circuit .
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