JP3308797B2 - Synchronizer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronizer in a digital radio communication apparatus, and more particularly to a synchronizer capable of correctly acquiring synchronization even when an interference wave exists.

[0002]

2. Description of the Related Art When performing wireless communication, it is necessary to synchronize a transmitter and a receiver. Therefore, a known pattern is inserted into the transmission sequence, a correlation is obtained on the receiving side, and synchronization is obtained by determining a time having a high correlation as a known pattern reception time.

As shown in the block diagram of FIG. 3, a conventional synchronizer includes a correlator A301, a memory A302, and a correlator B30.
3 and a memory B 304 and a synchronization determination circuit 305. The frame format of the transmission signal is shown in FIG.
Shown in The operation will be described with reference to FIGS.

In FIG. 2, the known pattern for synchronization is located at the center of the transmitted signal, but it can be forward or backward. The symbol length is M symbols, and FIG.
Then, M = 10. Usually, this known pattern is called a synchronization word or a synchronization symbol.

A memory A and a memory B respectively store a synchronization word (here, M symbols) of a desired wave and an interference wave,
sw1 ₁ , sw1 ₂ , ..., sw1 _M , sw2 ₁ , sw2 ₂ ,
..., sw2 _M is stored. sw1 _x and sw2 _x are a set of the in-phase component and the quadrature component of the synchronization word of the desired wave of the x symbol and a set of the in-phase component and the quadrature component of the synchronization word of the interference wave, respectively, and are expressed here as complex numbers.

FIG. 7 shows the configuration of the correlator A. The correlator A has a shift register that stores the quadrature component and the in-phase component of the A / D-converted received wave by the synchronization word length. This shift register can be shared with the correlator B. N received data in the shift register from the time T-N + 1 to T at time _{T, r T-N + 1} , r T-N + 2, ..., r T is stored. r _T is a set of an in-phase component and a quadrature component of the received signal at time T, and is represented here as a complex number.
The correlator A outputs a correlation value s1 between the synchronization word (contents of the memory A) of the desired wave and the received wave.

[0007]

[Formula 1] X bar represents the complex conjugate of X, and | X | represents the magnitude of X. s1 indicates how similar the waveform of the synchronization word of the desired signal for M symbols is to the waveform of the received signal. The more similar the waveforms are, the closer to 1 the value becomes, and the value becomes 1 when they completely match. Conversely, if the waveforms are not similar, the more they are dissimilar 0
Approach. By performing the correlation with the received waveform, if the time has a high correlation value, it can be determined that the synchronization word has been received.

The configuration of the correlator B is the same as the configuration of the correlator A. As shown in FIG. 7, the correlator B has a shift register that stores the quadrature component and the in-phase component of the A / D-converted received wave by the synchronization word length. This shift register can be shared with the correlator A. N received data in the shift register from the time T-N + 1 to T at time _{T, r T-N + 1} , r T-N + 2, ..., r T is stored.
r _T is a set of an in-phase component and a quadrature component of the received signal at time T, and is represented here as a complex number. The correlator B outputs a correlation value s2 between the synchronization word of the interference wave (contents of the memory B) and the received wave.

[0009]

[Formula 2] The synchronization determination circuit 305 determines whether or not it is the synchronization word reception time based on the respective inputs from the correlators A and B. For example, a time when a reception time having a high correlation value is quickly obtained from both the correlator A and the correlator B is determined as the synchronization word reception time.

FIG. 6 shows a configuration of a conventional synchronization determination circuit.
6, the synchronization determination circuit includes a logic circuit 601, a latch circuit 602, an address counter 603, and a comparator 604.

The outputs of the correlator A and the correlator B are given as inputs 1 and 2 to the input of the OR circuit 601 respectively. The latch circuit 603 stores the value of the address counter 602 when the output of the OR circuit 601 becomes logic 1 for the first time. The address counter 602 changes at each sampling clock timing and is reset at a predetermined cycle. The comparator 604 compares the value of the address counter 602 representing the current time with the output stored in the latch circuit 603 for storing the time determined as the synchronization word reception time. In this case, a logic 0 is output.

[0012]

In the case of the above-described conventional configuration, there is a problem that when an interference wave is present and its influence is large, sufficient synchronization acquisition performance cannot be obtained. From the viewpoint of frequency utilization efficiency, it is desirable that the same frequency can be used in adjacent cells, and it is required that correct synchronization can be obtained even when an interference wave exists.

[0013]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problem, according to the present invention, when the synchronization word of an interference wave is known, the synchronization word is short, and the effect of fading is constant near the synchronization word reception time. Under recognition, using the fact that the desired wave and the interference wave can be estimated in the vicinity of the synchronization word reception time, the received wave is separated into the desired wave component and the interference wave component, and the synchronization word of the desired wave and the synchronization word of the interference wave are used. By obtaining a correlation with each component of the received wave, it is possible to obtain synchronization acquisition performance with higher accuracy than before.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) FIG. 1 is a functional block diagram showing a synchronizer according to a first embodiment of the present invention. FIG. 1 differs from the conventional synchronization device in that a fading estimation device is provided. 1 includes a correlator A101, a memory A102, a correlator B103,
It comprises a memory B 104, a synchronization determination circuit 105 and a fading estimation device 105.

FIG. 5 is a functional block diagram showing a detailed configuration of the fading estimation device. In FIG. 5, the fading estimating apparatus includes a memory C501, a correlator C502, a correlator D503, a memory D504, and a complex calculator 505.

The operation of the fading estimation device configured as described above will be described with reference to FIGS.

.., Sw1 ₂ ,..., Sw1 _M , sw2 ₁ , sw1 ₁ , sw1 ₂ ,...
sw2 ₂ ,..., sw2 _M are stored. sw1 _x , sw2 _x
Is a set of the in-phase component and the quadrature component of the synchronization word of the desired wave and the interference wave of the x-th symbol, respectively, and is expressed here as a complex number. The memory C and the memory D in FIG.
It can be shared with the memories A and B in FIG.

The configuration of the correlator C in FIG. 5 is the same as the configuration of the correlators A and B shown in FIG. The correlator C has a shift register that stores the quadrature component and the in-phase component of the A / D-converted received wave by the synchronization word length. This shift register can be shared with the correlator D of FIG. At time T, the shift register stores time T−N + 1.
N received data from r to _T , r _{T-N + 1} , r _{T-N + 2} ,
…, R _T is stored. r _T is a set of an in-phase component and a quadrature component of the received signal at time T, and is represented here as a complex number. The correlator C of FIG. 5 outputs a correlation value rs1 between the synchronization word of the desired wave (the contents of the memory C of FIG. 5) and the received wave.

[0019]

[Equation 3] X bar represents the complex conjugate of X, and | X | represents the magnitude of X. rs1 indicates how similar the waveform of the synchronization word of the desired wave of M symbols is to the waveform of the received signal. The more similar the waveforms are, the closer to 1 becomes, and it becomes 1 when they completely match. Conversely, if the waveforms are not similar, the closer they are, the closer to zero. By performing the correlation with the received waveform, if the time has a high correlation value, it can be determined that the synchronization word has been received.

The configuration of the correlator D is the same as the configuration of the correlator C. As shown in FIG. 7, the correlator D has a shift register that stores the quadrature component and the in-phase component of the A / D converted received wave by the synchronization word length. This shift register can be shared with the correlator C of FIG. N received data in the shift register from the time T-N + 1 to T at time _{T, r T-N + 1} , r T-N + 2, ..., r T is stored. r _T is a set of an in-phase component and a quadrature component of the received signal at time T, and is represented here as a complex number. The correlator D of FIG. 5 outputs a correlation value rs2 between the synchronization word (contents of the memory D) of the interference wave and the received wave.

[0021]

(Equation 4) The complex calculator calculates the outputs rs1 and rs2 of the correlators C and D.
Then, the fading of the desired wave and the fading of the interference wave, X and Y, which are obtained as follows, are output.

[0022]

(Equation 5) The synchronization words (here, M symbols) of the desired wave and the interference wave are respectively stored in the memories A and B in FIG.
w1 ₁ , sw1 ₂ ,..., sw1 _M , sw2 ₁ , sw2 ₂ ,
..., sw2 _M is stored. sw1 _x and sw2 _x are a set of the in-phase component and the quadrature component of the synchronization word of the desired wave of the x symbol and a set of the in-phase component and the quadrature component of the synchronization word of the interference wave, respectively, and are expressed here as complex numbers.

The correlator A of FIG. 1 has a shift register for storing the quadrature component and the in-phase component of the A / D-converted received wave by the synchronization word length. This shift register can be shared with the correlator B of FIG. N received data in the shift register from the time T-N + 1 to T at time _{T, r T-N + 1} , r T-N + 2, ..., r T is stored.
r _T is a set of an in-phase component and a quadrature component of the received signal at time T, and is represented here as a complex number.

The correlator A shown in FIG. 1 outputs a synchronization word (contents of the memory A) of a desired wave and a correlation value s1 obtained by removing an estimated interference wave from a received wave. Specifically, subtracting the synchronization word of the interference wave from the value of the shift register and subtracting the synchronization word of the interference wave from the value of the shift register,
The synchronization word of the desired wave is correlated.

[0025]

(Equation 6) X bar represents the complex conjugate of X, and | X | represents the magnitude of X. s1 indicates how similar the waveform of the synchronization word of the desired signal for M symbols is to the waveform of the received signal. The more similar the waveforms are, the closer to 1 the value becomes, and the value becomes 1 when they completely match. Conversely, if the waveforms are not similar, the more they are dissimilar 0
Approach. By performing the correlation with the received waveform, if the time has a high correlation value, it can be determined that the synchronization word has been received.

The correlator B of FIG. 1 has a shift register for storing the quadrature component and the in-phase component of the A / D-converted received wave by the synchronization word length, similarly to the correlator A of FIG. This shift register can be shared with the correlator A in FIG. At time T, the shift register stores the time T−N +
N received data from 1 to T, r _{T-N + 1} , r _{T-N + 2} ,
…, R _T is stored. r _T is a set of an in-phase component and a quadrature component of the received signal at time T, and is represented here as a complex number. The correlator B shown in FIG. 1 outputs a synchronization word (contents of the memory B) of the interference wave and a correlation value s2 of a signal obtained by removing the desired wave estimated from the received wave. Specifically, the fading of the desired wave × the synchronization word of the desired wave is subtracted from each value of the shift register, and the result is divided by the synchronization word of the interference wave, and the synchronization word of the interference wave is correlated.

[0027]

[Formula 7] The configuration of the synchronization determination circuit 105 in FIG. 1 conforms to the conventional configuration. However, not only the method described in the conventional configuration but also a method using an AND circuit instead of the OR circuit, or a method of performing cumulative addition for each burst or frame time is possible.

(Second Embodiment) In contrast to the first embodiment, when there are a plurality of interference waves, if all the interference waves can be estimated, a highly accurate correlation can be obtained in each of them, and a higher speed can be obtained. Can be acquired synchronously.

FIG. 8 shows a synchronizer according to a second embodiment of the present invention as functional blocks. FIG. 8 shows a block diagram of the synchronizer when a plurality of interference waves exist. 8 includes a correlator 1801, a memory 1802, a correlator 2
803, a memory 2804,..., A correlator n805, and a memory n8
06, a synchronization determination circuit 807 and a fading estimation device 808
It is composed of

FIG. 9 shows a block diagram of the fading estimating apparatus when there are a plurality of interference waves. In FIG. 9, the fading estimating apparatus includes a first correlator 901
, A first memory 902, a second correlator 903, a second memory 904,..., An n-th correlator 905, and an n-th memory 906
And a complex calculator 907.

The function of each correlator and each memory in FIG. 9 conforms to the function of each correlator and each memory in the fading estimator of FIG. 5 described in the first embodiment.

In the fading estimator of FIG. 9, it is assumed that X ₁ , X ₂ ,..., X _n are obtained as outputs, and n−
The synchronization word of one interference wave is represented by {sw1 ₁ , sw1 ₂ ,.
_{sw1 M}, {sw2 1 .sw2} 2, ..., sw2 M}, {s
wn _1, swn _2, ..., and swn _M}, each of the correlation values of the synchronous word and the received wave s _1, s _2, ..., if the s _n,

(Equation 8) That relationship has come.

The configuration of the correlator in FIG. 8 is an extension of the configuration of the correlator in FIG. 1 in the first embodiment, and when correlating with the k-th interference wave,

(Equation 9) Is output.

The configuration of the synchronization determination circuit 807 is similar to that of the conventional configuration, similarly to the synchronization determination circuit in the first embodiment.

As described above, according to the second embodiment of the present invention, by utilizing a plurality of estimable interference waves, it is possible to correctly acquire synchronization even in a situation where the number of interference waves is large. It is possible.

[0036]

As is clear from the embodiments described above, the synchronizer of the present invention has an effect that synchronization can be correctly obtained even when an interference wave exists.

[Brief description of the drawings]

FIG. 1 is a block diagram of a synchronization device according to a first embodiment of the present invention;

FIG. 2 shows a frame format of a transmission signal according to the first embodiment of the present invention;

FIG. 3 is a block diagram of a conventional synchronizer;

FIG. 4 shows an output waveform of a correlator having a conventional configuration used in the present invention;

FIG. 5 is a block diagram of a fading estimation device according to the first embodiment of the present invention;

FIG. 6 is a block diagram of a synchronization determination circuit according to the first embodiment of the present invention;

FIG. 7 is a detailed functional block diagram of a correlator having a conventional configuration used in the present invention;

FIG. 8 is a block diagram of a synchronization device according to a second embodiment of the present invention;

FIG. 9 is a block diagram of a fading estimation device according to a second embodiment of the present invention.

[Explanation of symbols]

 101, 301 Correlator A 102, 302 Memory A 103, 303 Correlator B 104, 304 Memory B 105, 305, 807 Synchronization determination circuit 106, 808 Fading estimator 501 Memory C 502 Correlator C 503 Correlator D 504 Memory D 505,907 complex calculator 601 OR circuit 602 address counter 603 latch circuit 604 comparator 701 shift register 702 complex multiplier 703 memory 801 correlator 1 802 memory 1 803 correlator 2 804 memory 2 805 correlator n 806 memory n 901 First correlator 902 First memory 903 Second correlator 904 Second memory 905 Nth correlator 906 Nth memory

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04L 27/00-27/38 H04L 7/08

Claims (2)

(57) [Claims] 1. A synchronizing apparatus which inserts a known pattern into a transmission sequence, obtains a correlation at a receiving side, and determines a time having a high correlation as a known pattern reception time to acquire synchronization. A fading estimator for correctly estimating the fading of the desired wave and the interference wave in the vicinity of the synchronization word of the received wave using the synchronization word of the wave and the synchronization word of the interference wave; and a first memory for storing the synchronization word of the desired wave. A second memory for storing a synchronization word of the interference wave; and a correlation value between a synchronization word of a desired wave stored in the first memory and a signal obtained by removing an interference wave estimated by the fading estimation device from a reception wave. And a first correlator for calculating a desired word estimated by the fading estimator from the synchronization word and the received wave of the interference wave stored in the second memory. A second correlator that calculates a correlation value between the first and second correlators; and a synchronization determination circuit that obtains synchronization by obtaining a high correlation value from one of the output of the first correlator and the output of the second correlator. A synchronization device characterized by the above-mentioned. 2. A synchronizing apparatus which inserts a known pattern into a transmission sequence, obtains a correlation at a receiving side, and determines a time having a high correlation as a known pattern reception time to acquire synchronization. A fading estimating apparatus for correctly estimating fading of a desired wave and an interference wave in the vicinity of a synchronization word of a received wave using a synchronization word of a wave and synchronization words of a plurality of interference waves; and a first storing a synchronization word of the desired wave. A second memory group that stores synchronization words of the plurality of interference waves for each interference wave; and a plurality of the plurality of synchronization words of a desired wave stored in the first memory and the reception wave, the plurality of synchronization words being received by the fading estimation device. A third correlator for calculating a correlation value between the interference wave and a signal obtained by removing each estimated interference wave, a synchronization word of the interference wave stored in each of the second memory groups, and a reception wave Fourth calculating a correlation value between minus the desired wave estimated by al the fading estimation apparatus
A synchronizing device comprising: a correlator group; and a synchronization determination circuit that obtains synchronization by obtaining a high correlation value from one of the output of the third correlator and each output of the fourth correlator group. .