JP3304061B2 - Manufacturing method of printed wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board.

[0002]

2. Description of the Related Art In recent years, there has been a strong demand for lighter, thinner and smaller electronic devices, and higher-density packages are also required for electronic components and mounting boards constituting these devices. In order to meet this demand, development of the packaging technology itself has been regarded as important. There are two main issues in the development of mounting technology: development of mounting components and development of a board and a mounting method.

[0003] With respect to mounted components, the pitch of semiconductor terminals has been reduced from 0.5 mm to 0.3 mm pitch at present, and chip components are currently 1005 mm.
Chips (1.0 × 0.5 mm) have come to be commonly used, and from the viewpoint of the mounting method, further miniaturization results in higher mounting cost.

Therefore, development of a substrate and a mounting method is an important point in realizing high-density mounting. At present, a glass epoxy substrate is a general high-density mounting substrate. In this case, a glass woven fabric impregnated with a heat-resistant epoxy resin is used as an insulating substrate material.

[0005] Drills and Cu plated through holes (through holes) are used for electrical connection between the inner and outer layers by such a glass epoxy substrate. Although this has been widely recognized in the world and has been established through technological development over many years, it cannot be said that it is sufficient for future demand for higher density. The reason for this is that when high-density wiring is performed on an ordinary glass-epoxy multilayer substrate, the through-holes disturb the wiring space and increase the wiring length because of the through-holes (through-holes). . In addition, since there is a through hole, wiring space is reduced, and CAD (compu
Another factor is the difficulty in automatic wiring by ter aided design). Further, there is a problem that it is difficult to perform drilling in the future drilling of small diameter holes, and the cost ratio required for drilling becomes higher than now.

[0006] In response to such problems, various new multilayer substrates have been developed in the multilayer substrate industry. First, there is an SVH (Surface-Buried Via Hole) multilayer substrate as an extension of the current Cu plating through substrate technology using a drill. In the SVH substrate, via connection is performed not only in the through-hole but also in the surface layer portion, so that a higher-density wiring is possible as compared with the through-hole substrate. Further, the via portion of the surface layer is filled with an insulating resin, and Cu plating is further formed thereon so that a component mounting pad can be formed on the via portion. According to this method, only through-holes for insertion components are present on the surface, and high-density component mounting is possible. However, the SVH substrate is an improvement of the glass epoxy multi-layer technology, and the problem that drilling is difficult still occurs.

On the other hand, as a new attempt, a multilayer substrate having a complete inner via hole (IVH) structure has been proposed. Representative examples include ALIVH substrates (Any Layer Inner Via Hole, registered trademark of Matsushita Electric Industrial Co., Ltd.) and SLC substrates (Surface Laminar Circuits, I
BM registered trademark).

According to these methods, very inexpensive and high-density wirings can be formed.
In such a high-density substrate, a finer wiring processing technique is required in order not only to have the IVH structure but also to increase the wiring density of the inner layer and the surface layer. In such fine wiring processing, how to make the surface roughness of the conductor to be the wiring an important point is a method of manufacturing a printed wiring board. Incidentally, in the conventional manufacturing method, a roughening process is performed before patterning the conductor.

[0009]

In the conventional method of manufacturing a printed circuit board, a roughening treatment is performed by a chemical etching method or a mechanical polishing method before patterning a conductor pattern in order to increase the adhesion with an etching resist or a solder resist. I went. However, when fine processing of a conductor pattern is required for a printed wiring board, it may be preferable to perform a roughening process after patterning the conductor pattern. However, in the conventional manufacturing method, it is difficult to perform a roughening process after patterning the conductor pattern.

[0010] The reason is that in a conventional printed wiring board in which each layer is electrically connected by plating a through hole or the like, a hole such as a through hole exists on the surface of the printed wiring board. Therefore, in the case of the method of roughening after patterning, in the etching method, not only the conductor pattern but also the inside of the through hole is etched, and in the mechanical polishing method, foreign substances such as abrasives and polishing residues are likely to remain in the through hole. This is because a defect occurs. From the above, it is difficult to roughen the conductor pattern after patterning.

However, in recent years, in order to increase the mounting density, printed wiring boards having no holes such as through holes on the surface of the wiring board without using through holes for electrical connection between layers (Japanese Unexamined Patent Publication H
06-268345, JP-A-08-111574) have come to be used. In such a printed wiring board, since there is no hole such as a through hole on the surface, the above-described problem does not occur, and the surface can be roughened after patterning.

In such a printed wiring board, a finer conductor pattern is required, and a more accurate pattern is required. When a fine conductor pattern is formed by an etching method, a different degree of roughening may be preferable as the surface roughening state of the conductor pattern at the time of forming an etching resist and after forming the pattern. At the time of etching resist formation, since etching resists with excellent adhesion are said to be used as etching resists, which are said to be relatively suitable for finer refinement such as liquid resists, it is difficult to remove the etching resist if roughening is large. Or peeled pieces remain. In the case of the photo method, it is preferable that the degree of roughening is not so large from the viewpoint of avoiding adverse effects during exposure due to irregular reflection on the conductor foil surface. However, on the other hand, after the pattern is formed after the etching, it is preferable that the degree of roughening is large from the viewpoint of the adhesion to the solder resist. In particular, in the case of a printed wiring board in which interlayer connection is performed using a conductive paste or the like, which is used recently, since the electrical reliability of the interlayer connection is affected by the degree of surface roughness of the conductor pattern, the conductor pattern after patterning is used. It may be preferable that the roughening is large.

As described above, a different degree of roughening is required as the surface roughening state of the conductor pattern after the formation of the etching resist and after the pattern formation after the etching, and the conventional manufacturing method of performing a roughening process before patterning the conductor pattern. The method may not satisfy the requirement and cause a problem.

The present invention considers such problems of the conventional method for manufacturing a printed wiring board, and achieves a highly reliable print by satisfying both the adhesiveness of an etching resist, the peeling property, and the adhesiveness with a solder resist. An object of the present invention is to provide a method for manufacturing a printed wiring board that can manufacture a wiring board. Further, it is an object of the present invention to provide a method for manufacturing a printed wiring board capable of manufacturing a highly reliable multilayer printed wiring board by satisfying both adhesion and peeling properties of an etching resist and adhesion and electrical connectivity between respective layers. It is the purpose.

[0015]

In order to solve the above-mentioned problems, the present invention according to claim 1 has a glossy surface on one or both sides of a substrate having a through hole filled with a conductive paste. A conductive film formed of a single-sided glossy copper foil , a conductive film patterning process of forming an etching resist on the conductive film and then patterning to form a conductive film pattern, and a conductive film patterning process. Thereafter, the etching resist is removed, a patterning inspection is performed by image recognition, and then a roughening treatment step of roughening the surface of the conductive film pattern is performed. is there.

According to a second aspect of the present invention, a substrate having a through hole filled with a conductive paste is provided on one or both sides of the substrate.
A first substrate having a conductive film pattern whose surface is roughened is prepared, and a second substrate in which a desired through-hole is filled with a conductive paste is replaced with a conductive film filled in the through-hole of the second substrate. The first substrate and the second substrate were bonded to each other such that the surface of the conductive paste and at least a part of the conductive film pattern surface of the first substrate faced each other, and were bonded to the first substrate. Laminating another conductive film of a single-sided glossy copper foil on the opposite surface of the second substrate so that the glossy surface becomes the surface, and heating and pressing the laminated conductive film forming step, and patterning the another conductive film Forming a different conductive film pattern, and performing a patterning inspection by image recognition after the stacked conductive film patterning step, and then performing a roughening process on the surface of the different conductive film pattern. conductive film roughness A method for manufacturing a printed wiring board which comprises a lamination step and a processing step.

[0017]

[0018]

According to a third aspect of the present invention, in the printed wiring board according to the second aspect, the laminating step is performed once or repeatedly on the another substrate. It is a manufacturing method of.

According to a fourth aspect of the present invention, there is provided a method for forming a solder resist on the exposed surface of another conductive film pattern after the laminating step is performed once or repeatedly. 4. The method for manufacturing a printed wiring board according to claim 2 , comprising a step.

The invention of claim 5, in the roughening treatment process and / or the laminated conductive roughening treatment process according to claim 1-4, characterized by using a chemical etching method
A method for manufacturing a printed wiring board according to any one of the above.

[0022] The present invention of claim 6, in the roughening treatment step and / or the laminated conductive roughening treatment step, according to any one of claims 1 to 4, characterized in that using mechanical polishing method This is a method for manufacturing a printed wiring board.

[0023]

[0024]

[0025]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) First, the first embodiment of the present invention will be described.
An embodiment will be described with reference to the drawings.

FIG. 1 is a cross-sectional view showing a method of manufacturing a printed wiring board according to the first embodiment of the present invention, for each manufacturing step. First, a substrate 102 made of an aramid nonwoven fabric and a thermosetting epoxy resin having a through hole formed at a desired position is prepared, and after filling a conductive paste 103 into the through hole,
A copper foil 101 is adhered to both surfaces of the substrate 102 and heated and pressed (corresponding to the conductive film forming step of the present invention; FIG. 1A). Next, a liquid resist is applied by a roll coater to form an etching resist 104 (FIG. 1B), and a conductor pattern 106 is formed by photolithography (corresponding to the conductive film patterning step of the present invention; 1
(C), (d), (e)). After forming the conductor pattern 106, the conductor pattern is subjected to a roughening treatment by a chemical etching method or a mechanical polishing method (corresponding to the roughening treatment step of the present invention; FIG. 1 (f)). A solder resist 108 is applied on the roughened copper foil 107 by screen printing,
Post-curing is performed for 60 minutes in a hot-air drying furnace heated to a temperature of ° C. (corresponding to the solder resist forming step of the present invention;
(G)). As described above, the printed wiring board according to the present embodiment is obtained.

In the above steps, since a liquid resist is used as the etching resist 104, the ten-point average roughness Rz is 0.1 μm <Rz before the liquid resist is applied. It is preferably in the range <3 μm. This is because if the degree of roughening is small, adhesion to the liquid resist is poor, and if the degree of roughening is too large, peeling becomes difficult. In addition, when using a normal glossy copper foil, it has been confirmed that the roughness is within the range of the above-mentioned degree of roughening even when untreated. Further, as the degree of surface roughening of the copper foil 101 before the solder resist is applied, the ten-point average roughness Rz is preferably in the range of 3 μm <Rz. This is because if the degree of roughening is small, the adhesion may deteriorate.

As the mechanical polishing method, it is preferable to use buff polishing or jet scrub.

As described above, the method of manufacturing a printed wiring board according to the present embodiment includes the steps of:
Since the roughening process is performed, it is possible to achieve both the adhesion and the peelability of the etching resist and the adhesion with the solder resist.

In the case where inspection by image recognition such as AOI is performed after patterning, the inspection can be performed before the roughening process, so that the difference in reflectance between the conductor pattern and the substrate can be increased, and the binarization can be compared. There is also an advantage that image recognition is easy because the target can be easily made.

Although the solder resist forming step of the present invention has been described as being included in the method for manufacturing a printed wiring board according to the present embodiment, a structure not including this step may be adopted if no solder resist is formed. .

Second Embodiment Next, a second embodiment of the present invention will be described.
An embodiment will be described with reference to the drawings. This embodiment is different from the above-described first embodiment in that the printed wiring board to be manufactured is a multilayer board. Therefore, in the present embodiment, the same reference numerals are given to the same components as those in the first embodiment, and the description will be omitted. In addition, for those not particularly described, the first
It is assumed to be the same as the embodiment.

FIG. 2 is a cross-sectional view showing a method of manufacturing a printed wiring board according to a second embodiment of the present invention for each manufacturing step. First, a double-sided printed wiring board (the state shown in FIG. 1F) that has been completed up to the roughening process is prepared by the same manufacturing method as that of the printed wiring board according to the first embodiment. Using the double-sided printed wiring board as an inner layer substrate, a through hole is formed at a desired position, a substrate 102 filled with a conductive paste in the through hole is laminated on both sides, and copper foil is laminated on both sides and heated and pressed (the present invention). 2 (a) and 2 (b)). Next, a liquid resist is applied on the substrate 102 by a roll coater to form an etching resist, and a conductive pattern is formed by photolithography. Then, the conductive pattern is formed by chemical etching or mechanical polishing. (Corresponding to the stacked conductive film patterning step and the stacked roughening processing step of the present invention; FIG. 2 (c)). By repeating this process,
A multilayer substrate is obtained (FIG. 2D).

As described above, the method for manufacturing a printed wiring board according to the present embodiment includes the steps of:
Since the roughening process is performed, it is possible to achieve both the adhesion and peeling of the etching resist, the adhesion with the solder resist, and the adhesion and electrical connectivity between the respective layers. Thereby, the electrical reliability when a multilayer substrate is formed can be improved.

[0036]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the method for manufacturing a printed wiring board according to the present invention will be described below.

Embodiment 1 First, Embodiment 1 of the present invention will be described. This example is an example corresponding to the method for manufacturing a printed wiring board according to the first embodiment of the present invention.

Hereinafter, this embodiment will be described together with a comparative example.

For evaluating the peelability of the etching resist,
For this purpose, the following examples and comparative examples were prepared. This rating
The results are shown in Table 1 below. First, a substrate made of aramid nonwoven fabric and a thermosetting epoxy resin was used as a substrate.
A sample having a size of 0 mm × 240 mm and a thickness of 0.15 mm was prepared, and a through hole was formed at a desired position. The through-hole was filled with a conductive paste, and a single-sided glossy copper foil (Furukawa Circuit Foil Co., Ltd., glossy surface Rz = 0.3 μm) was stuck on both sides and heated and pressed (corresponding to FIG. 1A). Then,
Using, in the pre-treatment of copper foil before forming the conductor pattern ,
Examples and Comparative Example, untreated (light is not performed roughening
Sawamen Rz = 0.3 [mu] m, and corresponds to the Examples in Table 1), jet scrub treatment (Rz = 2.9 .mu.m, 3.8 .mu.m, the former
Values correspond to the examples in Table 1, and the latter values correspond to the comparative examples in Table 1.
The corresponding), chemical etching (Rz = 2.8 .mu.m,
4.2 μm, the former value corresponds to the example of Table 1, the latter value
Corresponds to the comparative example in Table 1) . For the chemical etching treatment, a micro-etching agent (Mec Corporation) was used. Next, a liquid resist (Nippon Paint Co., Ltd.) was applied by a roll coater (corresponding to FIG. 1B), and a conductor pattern was formed by photolithography (FIG. 1).
(Corresponds to (c), (d) and (e)). Next, the conductor pattern
To evaluate the peelability of the solder resist formed on top
In the evaluation shown in Table 1,
As examples, the following examples and comparative examples were prepared. this
The evaluation results are shown in Table 2 below. That is, as shown in Table 2.
As an example, after forming a conductor pattern , the conductor pattern was roughened by a chemical etching method and a mechanical polishing method (corresponding to FIG. 1F). In the mechanical polishing method, a roughening treatment was performed using buff polishing and jet scrub so that Rz = 4 to 6 μm (corresponding to the examples in Table 2) . In the chemical etching treatment, a roughening treatment was performed so that Rz = 4 to 6 μm (corresponding to the examples in Table 2) . Also, as a comparative example shown in Table 2,
After the formation of the conductor pattern, a substrate not subjected to a roughening treatment was prepared (corresponding to the example in Table 1) . As above
A solder resist (Taiyo Ink Co., Ltd.) was applied to each of the prepared substrates by screen printing, placed in a hot-air drying furnace heated to 150 ° C., and post-cured for 60 minutes (corresponding to FIG. 1 (g)).

As described above, the peelability of the liquid resist and the adhesion of the solder resist were evaluated for the obtained examples and comparative examples.

First, the results of observing the substrate surface after peeling to evaluate the peelability of the etching resist are shown in Table 1.

[0042]

[Table 1]

According to Table 1, if a normal bright copper foil is used,
It was confirmed that the stripping of the etching resist was better when it was left untreated.

Next, in order to evaluate the adhesion of the solder resist, a cross cut was made in a grid pattern on the solder resist in accordance with the test method of JIS D-0202, and a peel test was performed with a cellophane adhesive tape. Table 2 shows the results of evaluating the peeling.

[0045]

[Table 2]

According to Table 2, if the surface of the copper foil is roughened before the solder resist is applied and the degree of roughening is set so that the ten-point average roughness Rz is in the range of 3 μm <Rz, the adhesion of the solder resist is improved. It was confirmed that it became good.

(Embodiment 2) Next, Embodiment 2 of the present invention will be described. This example is an example corresponding to the method for manufacturing a printed wiring board according to the second embodiment of the present invention.

Hereinafter, this embodiment will be described together with a comparative example.

A double-sided printed wiring board is manufactured in the same manner as in Example 1. Using the double-sided printed wiring board as the inner layer substrate, forming a through hole at a desired position, laminating a substrate filled with a conductive paste in the through hole on both sides, and laminating a single-sided glossy copper foil (Furukawa Circuit Foil) on both sides. Heat and pressure were applied (corresponding to FIGS. 2A and 2B). A conductive pattern was formed on the substrate by a photolithography method to form a multilayer substrate (corresponding to FIG. 2C). In order to evaluate the electrical connection reliability, this process was repeated to form a six-layer plate, and a pattern in which 500 interlayer connection holes were connected in a chain with a conductor pattern was formed (FIG. 3). As a roughening treatment, the mechanical polishing method uses a jet scrub and Rz = 2 to 2
Roughening treatment was performed to 6 μm. In the chemical etching treatment, a roughening treatment was performed so that Rz = 2 to 6 μm.
An untreated product was prepared as a comparative example.

The resistance value of the 500 interlayer connection holes was set to the initial state and after two solder reflows (200 ° C. or more for 1 minute, 24 minutes).
0 ° C. or more for 10 seconds) and the state after performing the solder reflow twice and then performing the PCT (pressure cooker test) for 8 hours (121 ° C. saturation), and the resistance value from the initial state was measured. Table 3 shows the results of evaluating the rate of change of.

[0051]

[Table 3]

According to Table 3, the surface of the copper foil is roughened before another substrate is laminated, and the degree of roughening is determined by the ten-point average roughness R.
It has been confirmed that when z is in the range of 3 μm <Rz, the electrical reliability of a multilayer substrate can be improved.

[0053]

As is apparent from the above description,
According to the first aspect of the present invention, a highly reliable printed wiring board can be manufactured by satisfying both the adhesiveness and peelability of an etching resist, the adhesiveness with a solder resist, and the adhesiveness and electrical connectivity between layers. A method for manufacturing a printed wiring board can be provided. The present invention according to claim 4 provides a method for manufacturing a printed wiring board capable of manufacturing a multilayer printed wiring board with high reliability by achieving both the adhesion and the peeling of the etching resist and the adhesion between the layers. can do.

That is, according to the present invention, like a printed wiring board for making an electrical connection using a conductive paste,
By patterning the conductor pattern of a printed wiring board with no holes on the surface and then roughening it, the adhesion and peelability of the etching resist, the adhesion with the solder resist, and the electrical reliability of a multilayer substrate This is a method of manufacturing a printed wiring board that can satisfy both requirements, and can realize a manufacturing method that can respond to finer circuit patterns.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a method for manufacturing a printed wiring board according to a first embodiment of the present invention, for each manufacturing process.

FIGS. 2A and 2B are cross-sectional views illustrating a method for manufacturing a printed wiring board according to a second embodiment of the present invention, for each manufacturing process.

FIG. 3 is a sectional view showing a six-layer plate formed according to a second embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Copper foil 102 Substrate 103 Conductive paste 104 Etching resist 105 Patterned etching resist 106 Patterned copper foil 107 Roughened copper foil 108 Solder resist

Continued on the front page (72) Inventor Kazunori Sakamoto 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) References JP-A-6-262375 (JP, A) JP-A-9-130051 (JP) JP-A-62-3942 (JP, A) JP-A-3-3297 (JP, A) JP-A-6-302956 (JP, A) JP-A-52-68971 (JP, A) 3-288493 (JP, A) JP-A-7-231152 (JP, A) JP-A-61-140194 (JP, A) JP-A-7-323502 (JP, A) JP-A-9-272994 (JP, A) A) JP-A-8-220011 (JP, A) JP-A-6-94437 (JP, A) JP-A-8-139452 (JP, A) JP-A-9-83108 (JP, A) JP-A-9 JP-A-312461 (JP, A) JP-A-9-36551 (JP, A) JP-A-7-263828 (JP, A) JP-A-61-173104 (JP, A) JP-A-3-282302 (JP, A) JP-A-5-37101 (JP, A) (58) Fields studied (Int. Cl. ⁷ , DB Name) H05K 3/00 H05K 3/38 H05K 3/46

Claims (6)

(57) [Claims] 1. A conductive film forming step of forming a conductive film made of a single-sided glossy copper foil on one or both sides of a substrate having a through hole filled with a conductive paste so that a glossy surface becomes a surface, A conductive film patterning step of forming a conductive film pattern by patterning after forming an etching resist on the film; and after the conductive film patterning step, the etching resist is peeled off, and then a patterning inspection is performed by image recognition. A roughening step of roughening the surface of the conductive film pattern. 2. A first substrate having a conductive film pattern whose surface is roughened is prepared on one or both sides of a substrate having a through hole filled with a conductive paste, and a conductive paste is provided in a desired through hole. Is filled with the second substrate so that the surface of the conductive paste filled in the through-hole of the second substrate and at least a part of the conductive film pattern surface of the first substrate face each other. The first substrate and the second substrate are bonded to each other, and another conductive surface of the single-sided glossy copper foil is formed so that the glossy surface becomes a surface on the opposite side of the second substrate bonded to the first substrate. A step of forming a laminated conductive film by bonding and heating and pressurizing the film; a step of patterning the another conductive film to form another conductive film pattern; and a step of patterning the laminated conductive film. Patterning by recognition Performs grayed inspection method for producing a printed wiring board characterized in that it comprises a subsequent lamination step and a laminating conductive film roughening treatment step of roughening the surface of the another conductive pattern. 3. The method for manufacturing a printed wiring board according to claim 2 , wherein the laminating step is performed once or a plurality of times on the another substrate. 4. A solder resist forming step of forming a solder resist on the exposed surface of the another conductive film pattern after performing the laminating step once or repeatedly a plurality of times. Claim 2 or 3
Method for manufacturing a printed wiring board according to. 5. The roughening treatment step and / or the laminated conductive roughening treatment step, a method for manufacturing a printed wiring board according to any one of claims 1-4, characterized by using a chemical etching method . 6. The roughening treatment step and / or the laminated conductive roughening treatment step, a method for manufacturing a printed wiring board according to any one of claims 1 to 4, characterized in that using mechanical polishing method .