JP2004214227A - Interlayer connection part and multilayer wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a highly reliable multilayer wiring board which can securely connect layers. <P>SOLUTION: The board is provided with a conductor layer and an insulating layer which is brought into contact with at least a part of the conductor layer. The board is provided with a conductor post which passes through the insulating layer, and is projected from the surface of the insulating layer on a face opposite to the conductor layer. The conductor post of the wiring board having a solder layer formed on the surface of the tip of the conductor post and is mainly composed of tin and a gold coating face of a layer to be connected, which has an interlayer connection land composed of a copper layer, a diffusion preventing metal layer and a gold coat in this order are thermally pressurized through an adhesive layer so as to be bonded with one another by soldering. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an interlayer connection part and a multilayer wiring board. More specifically, the present invention relates to an interlayer connection portion obtained by simultaneously performing electrical connection and adhesion between layers and a multilayer wiring board having the interlayer connection portion.
[0002]
[Prior art]
In recent years, with the demand for higher functionality of electronic devices and the demand for lighter, thinner and smaller electronic devices, high-density integration of electronic components and further high-density mounting have been advanced, and semiconductor packages used for these electronic devices have been developed. The size and the number of pins are increasing more and more than ever.
[0003]
A conventional circuit board is called a printed wiring board, which consists of a laminated board made of glass fiber woven fabric impregnated with epoxy resin.After patterning the copper foil attached to the glass epoxy board, multiple layers are stacked. The mainstream was to use a wiring board in which a via hole was formed by bonding, drilling a through-hole, and performing copper plating on the wall surface of the hole to form a via hole, and making electrical connection between layers. However, the mounting components have been reduced in size and density, and the wiring density of the above-mentioned wiring boards has become insufficient, and problems have arisen in mounting components. Under these circumstances, in order to realize further miniaturization, weight reduction, multi-pin and high-speed signal transmission, it is required to increase the density of wiring, reduce the diameter of vias, and reduce the thickness of the interlayer insulating layer. A multilayer wiring board using a new interlayer connection method instead of a sequential lamination method such as a build-up method has been proposed.
[0004]
In such a situation, a conductor post is formed on one of the lands of a wiring pattern having a land for interlayer connection and a connected body having a land for interlayer connection with the wiring pattern, and at least the conductor post is formed. A multilayer having an interlayer connection part in which a solder layer is formed on the tip surface or the surface of the opposing land, and the conductor post and the opposing land are solder-bonded through an adhesive layer through a process of close contact, pressure, and heating. A wiring board (for example, see Patent Document 1) has been proposed.
[0005]
[Patent Document 1]
Japanese Patent Application No. 2001-384834 (pages 12-26, FIG. 1)
[0006]
[Problems to be solved by the invention]
However, according to the conventional technique, when an alloy layer formed at an interlayer joint obtained by soldering is given a high-temperature heat history due to a curing step of an adhesive layer, the diffusion rate of atoms during alloy growth is increased. May cause Kirkendall voids, especially Kirkendall voids only at the interface between the connected layer and the solder layer when soldered to a gold film coated on the connected layer mainly made of copper May be grown, and it is required to improve the connection reliability by preventing voids.
[0007]
The present invention has been made in view of such a current problem of interlayer connection in a multilayer wiring board on which a semiconductor chip is mounted. An object is to provide a multilayer wiring board having the same.
[0008]
[Means for Solving the Problems]
That is, the present invention
(1) A tin-based solder layer formed at the tip of a conductor post for interlayer connection, and a conductive layer made of at least a copper layer and a metal layer made of a metal for preventing diffusion are bonded via an adhesive layer. An interlayer connection part obtained by soldering by thermocompression bonding;
(2) The interlayer connecting portion according to (1), wherein the conductor layer includes a gold layer, and the gold layer and the solder layer are soldered.
(3) The interlayer connecting portion according to the above (1) or (2), wherein the conductor layer is a land for interlayer connection;
(4) The interlayer connection according to the above item 1 or 2, wherein the conductor layer is a conductor circuit layer;
(5) The interlayer connection according to any one of (1) to (4), wherein the diffusion prevention metal layer is made of nickel.
(6) The interlayer connection part according to any one of (1) to (5), wherein the interlayer connection part forms an alloy higher than the melting point of the solder layer;
(7) The soldering is performed by bringing the solder layer and the adhesive layer into contact with each other, heating the solder layer at a temperature equal to or higher than the melting point of the solder layer, melting the solder layer, and then pressing the solder layer. An interlayer connection part according to any of the above,
(8) A multilayer wiring board having the interlayer connection part according to any one of (1) to (7),
(9) The multilayer wiring board according to (8), wherein the multilayer wiring board is obtained by including a plurality of wiring boards each including an insulating layer and a conductor circuit layer in contact with the insulating layer and having at least a copper layer and a diffusion preventing metal layer in this order.
(10) The multilayer wiring board according to (9), wherein the conductive circuit layer is embedded in the insulating layer so as to expose one surface from the insulating layer.
It is.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
The present invention provides a solder layer containing tin as a main component formed at the tip of a conductor post for interlayer connection, and at least a copper layer and a diffusion prevention layer of a conductor layer made of a diffusion prevention metal layer, with an adhesive layer interposed therebetween. An interlayer connection part obtained by soldering by thermocompression bonding. The conductor layer may be any of a land for interlayer connection and a conductor circuit layer. Further, the present invention is a multilayer wiring board having this interlayer connection.
[0010]
In the present invention, the purpose of forming the diffusion preventing metal layer on the conductor layer is to suppress Kirkendall voids generated at the solder joint between the solder layer and the conductor layer due to the difference in diffusion speed between the metal layers forming the respective layers. It is to be. In the present invention, by providing the diffusion preventing metal layer only on the conductor layer side, the metal forming the conductor post, the metal forming the solder layer, and the diffusion preventing metal layer When a metal layer is further formed, an alloy composed of the metal is formed, and the melting point of the alloy is preferably higher than the melting point of the solder layer. By forming this alloy, the joint portion is not remelted even with a heat history higher than the solder melting point expected in the chip reflow step, the package reflow step, and the like.
[0011]
On the other hand, the purpose of forming a gold layer on the surface of the diffusion preventing metal layer of the conductor layer is to oxidize the oxidized diffusion preventing metal layer when obtaining a multilayer wiring board by laminating a plurality of wiring boards for manufacturing a multilayer wiring board. In order to make it easier for the solder layer of the conductor post and the diffusion prevention metal layer to be more easily solder-joined, it is difficult to make solder joints. It is. In addition, if a resin having a surface cleaning function is used for the adhesive layer and the function can sufficiently remove the oxide film of the diffusion preventing metal layer, the gold coating is unnecessary.
Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited thereto. FIGS. 1 and 2 show an example of an embodiment embodying the present invention. Hereinafter, details will be described with reference to FIGS.
[0012]
As a first example of a manufacturing method for obtaining an interlayer connection portion or a multilayer wiring board of the present invention, first, a two-layer structure including a metal foil 101 and an insulating layer 102 is prepared (FIG. 1A). Vias 103 are formed in the insulating layer 102 (FIG. 1B).
It is preferable to use a readily available copper foil as the metal foil 101. The two-layer structure can be obtained by directly applying a resin varnish on the metal foil 101 by printing, curtain coating, bar coating, or the like. Further, a two-layer structure such as a commercially available copper foil with resin (for example, copper foil with polyimide) may be prepared. The two-layer structure can also be obtained by etching one copper foil of the glass epoxy double-sided copper-clad laminate over the entire surface.
[0013]
The method of forming the via 103 may be any method as long as it is a method suitable for this manufacturing method, and examples thereof include dry etching using laser and plasma, and chemical etching. As the laser, a carbon dioxide gas laser, an ultraviolet laser, an excimer laser, or the like can be used.
When the insulating layer 102 includes a reinforcing fiber such as glass epoxy, it is preferable to use a carbon dioxide laser capable of forming a via 103 through a resin and a glass cloth. When the insulating layer 102 does not include a reinforcing fiber such as polyimide, it is preferable to use an ultraviolet laser capable of forming a finer via 103. When the insulating layer 102 is made of a photosensitive resin, the via 103 can be formed by selectively exposing and developing the insulating layer 102.
[0014]
Next, a copper post 104 is formed by electrolytic plating using the metal foil 101 as a lead (electrode for power supply) for electrolytic plating (FIG. 1C). It is formed by plating (FIG. 1D). By these electrolytic plating, conductor posts 106 are formed in portions of the insulating layer 102 where the vias 103 are formed.
[0015]
Examples of the method of forming the copper post 104 include a method of forming by electroless plating and a method of printing a paste containing copper, in addition to the method of forming by copper plating. It is very preferable to form the copper post 104 by electrolytic plating because the shape of the tip of the copper post 104 can be freely controlled. Further, by increasing the volume ratio occupied by the copper posts in the conductor posts 106 as much as possible, it is possible to obtain the conductor posts 106 with low resistance and stability.
[0016]
Examples of the method of forming the solder film 105 include a method of forming by electroless plating and a method of printing a paste containing solder, in addition to the method of forming by solder plating. In particular, the method using electroplating is very suitable because the metal that can be plated is more diverse and the management of the chemical solution is easier than the method using electroless plating.
As a material of the solder coating 105, it is preferable to use a solder containing Sn as a main component. More preferably, it is an environment-friendly Pb-free solder.
[0017]
Next, a patterned plating resist (not shown) is formed on the metal foil 101. Subsequently, the diffusion preventing metal layer 107 is formed by electrolytic plating using the metal foil 101 as a lead (electrode for power supply) for electrolytic plating. After that, a gold film 108 is further formed by electrolytic plating, and the plating resist is removed (FIG. 1E). By this electrolytic plating, a diffusion preventing metal layer 107 and a gold film 108 are formed on a portion of the metal foil 101 where the plating resist is not formed. The material of the diffusion preventing metal layer 107 is preferably nickel. Further, the plating resist can be formed, for example, by laminating a UV-sensitive dry film resist on the metal foil 101, selectively exposing it using a negative film or the like, and then developing it.
[0018]
Finally, using the formed gold film 108 as an etching resist, the metal foil 101 is selectively etched to form a copper circuit 109, thereby obtaining a conductor circuit 110 and a wiring substrate 120 (FIG. 1 (f) )). At this time, when the wiring board 120 is a wiring board for a multilayer wiring board, connection lands are also formed in the conductor circuit pattern at the same time. Since the diffusion preventing metal layer 107 is covered with the gold coating 108, there is no problem if either an acidic or alkaline etchant is used for etching copper. Preferably, when the diffusion preventing metal layer 107 is nickel, a commercially available alkaline etching solution can be used to etch only copper without dissolving nickel, so that the copper circuit 109 can be easily obtained. Can be.
[0019]
Subsequently, a multilayer wiring board obtained by using the wiring board 120 obtained above will be described in detail. FIG. 3 is a diagram for explaining an example of a method of manufacturing a multilayer wiring board using the wiring board 120 according to the first embodiment of the present invention, and FIG. It is sectional drawing which shows a structure.
[0020]
First, an adhesive layer 111 is formed on the surface of the insulating layer 102 of the wiring substrate 120 obtained above, and subsequently, a plurality of wiring substrates 120 on which the adhesive layer 111 is formed and a core substrate 130 are aligned. (FIG. 3A). In the following description, for convenience, a method of laminating a plurality of wiring boards 120 to obtain an interlayer connection portion and a multilayer wiring board will be described. However, soldering between a conductor post and a connected layer on which a diffusion prevention metal layer is formed is described. There is no limitation as long as it is an interlayer connection obtained by joining. Therefore, in the present invention, it is not essential that the conductive circuit formed on the wiring board 120 has the diffusion preventing metal layer formed thereon, but the circuit having the connected layer on which any diffusion preventing metal layer is formed is provided. It may be an interlayer joint obtained by joining to a substrate.
[0021]
The adhesive layer 111 may be formed by a method suitable for the resin used. For example, a resin varnish may be directly applied by printing, curtain coating, bar coating, or the like, or a dry film type resin may be vacuum-laminated. And a method of laminating by a method such as vacuum press. Although FIG. 3A shows an example in which the adhesive layer 111 is formed on the surface of the insulating layer 102, the adhesive layer 111 may be formed on the conductor circuit 110 side and on the surface of the core substrate 130.
[0022]
Positioning includes a method of reading and positioning a positioning mark formed in advance on the wiring board 120 for multilayer wiring board production and the core substrate 130 with an image recognition device, a method of positioning with a positioning pin or the like, and the like. Can be used.
[0023]
Finally, the plurality of wiring boards 120 for manufacturing a multilayer wiring board and the core board 130 are thermocompression-bonded (FIG. 3B). In the thermocompression bonding step, for example, using a vacuum press, the solder of the solder coating 105 is heated until the solder is melted, pressurized to solder-join the solder coating 105 and the conductor circuit 110a, and further heated to form an adhesive layer 111. Is cured and integrated. According to the above steps, the conductor circuit 110a and the conductor post 106 are solder-bonded with the solder film 105, and the multilayer wiring board 140 in which the respective layers are bonded with the adhesive layer 111 can be obtained.
[0024]
FIG. 2 is a view for explaining a second example of a method of manufacturing a wiring board for manufacturing a multilayer wiring board according to an embodiment of the present invention, and FIG. 2 (f) is a wiring board for manufacturing a multilayer wiring board obtained. It is sectional drawing which shows the structure of.
[0025]
The second example of the method for manufacturing a wiring board for manufacturing a multilayer wiring board of the present invention is different from the first example in that instead of forming the conductive circuit 110 by selectively etching the metal foil 101, The basic manufacturing method is almost the same in that a conductor circuit 210 is formed by electrolytic plating using 201 as a lead for electrolytic plating (electrode for power supply). The metal plate 201 may be a metal foil. Hereinafter, the second example will be described in detail only with respect to portions different from the first example.
[0026]
First, a patterned plating resist (not shown) is formed on the metal plate 201, and subsequently, the metal film 201 is used as a lead (electrode for power supply) for electrolytic plating, and the gold film layer 208, the diffusion preventing metal layer 207, After the copper circuit 209 is formed by electrolytic plating, the plating resist is removed (FIG. 2A). By this electrolytic plating, a conductor circuit 210 (a gold film layer 208, a diffusion preventing metal layer 208, and a copper circuit 209) is formed on a portion of the metal plate 201 where the plating resist is not formed.
The material of the metal plate 201 may be any material as long as it is suitable for this manufacturing method. In particular, the material has resistance to a used chemical solution and can be finally removed by etching. It is necessary. Examples of the material of such a metal plate 201 include copper and copper alloy.
On the other hand, the plating resist can be formed by, for example, laminating an ultraviolet-sensitive dry film resist on the metal plate 201, selectively exposing the resist using a negative film or the like, and then developing the same.
[0027]
The material of the diffusion preventing metal layer 207 is preferably nickel as in the first example. Here, the purpose of forming the diffusion preventing metal layer 207 is to facilitate the solder bonding, and when the metal plate 201 is made of copper or a copper alloy, when the metal plate 201 is removed by etching, the copper circuit 209 is formed. It also protects it from being etched.
[0028]
Next, an insulating layer 202 is formed on the conductor circuit 210 (FIG. 2B), and a via 203 is formed in the insulating layer 202 (FIG. 2C). As the resin forming the insulating layer 202, any resin suitable for this manufacturing method can be used. The insulating layer 202 may be formed by a method suitable for the resin to be used. For example, a resin varnish may be directly applied by printing, curtain coating, bar coating, or the like, or a dry film type resin may be vacuum-laminated or vacuum-coated. Examples of the method include lamination by a method such as pressing. In particular, commercially available copper foil with resin is easily available, and is formed by embedding and embossing the conductor circuit 210 by vacuum lamination and finally etching the copper foil, so that the surface of the insulating layer 202 becomes conductive conductor 210 Since the substrate becomes very flat without being affected by the irregularities, it is more preferable to use a wiring board in which the conductive circuit layer is embedded in the insulating layer so as to expose one surface from the insulating layer. On the other hand, the method of forming the via 203 is the same as in the first example.
[0029]
Next, a copper post 204 and a solder coating 205 are formed, and a conductor post 206 is formed (FIGS. 2D to 2E). These forming methods are the same as in the first example.
[0030]
Finally, the wiring board 220 is obtained by etching the metal plate 201 (FIG. 2F). The wiring board shown in FIG. 2F shows an example in which the conductor circuit 210 is composed of three layers of a copper circuit 209, a diffusion preventing metal layer 207, and a gold film layer 208. In addition, since the diffusion preventing metal layer 207 is covered with the gold film, there is no problem whether the etching solution used for etching the metal plate 201 is either acidic or alkaline.
[0031]
The details of the multilayer wiring board obtained by using the above-described wiring board are as shown in FIG. 4, but are basically the same as those of the multilayer wiring board shown in FIG.
[0032]
In the present invention, the adhesive for forming the adhesive layer has a function of removing an oxide film present on a solder surface or a surface of a metal to be connected, a surface cleaning function showing a reduction function of an oxide film, and the like. It is more preferable to have high performance. By bringing the solder surface and the land for interlayer connection into contact with the adhesive layer, the metal surface can be cleaned by the surface cleaning function of the adhesive. Further, at the time of solder joining, it is more preferable to heat until the temperature reaches the melting point of the solder, melt the solder, and then apply the predetermined pressure to perform the solder joining. In the heating and melting step of the solder, the oxide film on the surface of the solder layer is reduced and melted, and a convex shape and further the most stable dome shape can be formed due to the surface tension of the molten solder. The metal surface forming the land can be cleaned. By cleaning both surfaces, when the solder comes into contact with the non-joining surface, a force for wetting and spreading on the surface to be joined acts, and the adhesive layer at the solder joint is eliminated. Accordingly, the resin joining is less likely to occur in the solder joint using the adhesive layer, and the electrical connection reliability is high.
[0033]
Specific examples of preferable adhesives used in the present invention include, for example, a resin composition comprising a combination of a resin having at least one or more phenolic hydroxyl groups and a resin acting as a curing agent thereof.
[0034]
The resin having at least one or more phenolic hydroxyl groups used in the adhesive preferably used in the present invention is preferably selected from a phenol novolak resin, an alkylphenol novolak resin, a resole resin, and a polyvinyl phenol resin. Can be used. Further, phenolphthaline, 2,4-dihydroxybenzoic acid, 2,5-dihydroxybenzoic acid and the like are also preferable.
[0035]
As a resin having a phenolic hydroxyl group used for a preferable adhesive in the present invention, an epoxy resin, an isocyanate resin or the like is used as a resin acting as a curing agent. Specifically, any of them is based on phenol-based compounds such as bisphenols, phenol novolaks, alkylphenol novolacs, biphenols, naphthols and resorcinols, and skeletons such as aliphatic, cycloaliphatic and unsaturated aliphatics. Examples thereof include modified epoxy compounds and isocyanate compounds.
[0036]
The resin having a phenolic hydroxyl group in a preferred adhesive is preferably contained in the adhesive in an amount of 5 wt% or more and 80 wt% or less. When the content is less than 5% by weight, the effect of cleaning the metal surface is reduced, and there is a possibility that solder joining cannot be performed. On the other hand, if the content is more than 80% by weight, a sufficient cured product cannot be obtained, and the bonding strength and reliability may be reduced. The compounding amount of the resin acting as a curing agent for the resin having a phenolic hydroxyl group is, for example, such that the epoxy group equivalent or the isocyanate group equivalent is at least 0.5 times the hydroxyl group equivalent of the resin having the phenolic hydroxyl group. It is preferably at most 5 times, but this is not the case when good metal bonding properties and cured physical properties can be obtained. Further, in addition to the above components, various additives such as an inorganic filler, a curing catalyst, a coloring agent, an antifoaming agent, a flame retardant, a coupling agent, and a solvent may be added to the adhesive.
[0037]
【Example】
Hereinafter, the present invention will be described more specifically with reference to Examples, but the present invention is not limited thereto.
[0038]
<Formulation example 1 of adhesive varnish>
106 g of cresol novolak resin (PR-HF-3, manufactured by Sumitomo Durez Co., Ltd.), 105 g of phenolphthaline (manufactured by Tokyo Chemical Industry), and diallyl bisphenol A type epoxy resin (RE-810NM, manufactured by Nippon Kayaku Co., Ltd.) 450 g were dissolved in 165 g of methyl ethyl ketone to prepare an adhesive varnish.
[0039]
<Manufacture of wiring board: Example>
Using a UV-YAG laser for the polyimide resin insulation film of a flexible printed wiring board (Sumitomo Bakelite, A1 flexible) composed of copper foil (metal foil 101, thickness 18 μm) and polyimide resin insulation film (insulation film 102, thickness 25 μm) Thus, 300 vias (vias 103) having a top diameter of 45 μm and a bottom diameter of 25 μm were formed. After cleaning the inside of the via and the periphery of the via with a permanganate resin etching solution, electrolytic copper plating is performed using the copper foil on the back surface as a lead for electrolytic plating (electrode for power supply), and the via is filled with copper. Copper posts (conductor posts 104) were formed. Here, the time of electrolytic copper plating was adjusted so that the diameter of the copper post was 45 μm. Next, on the surface of the copper post, a Sn-Ag solder layer (solder film 105) was formed with a thickness of 4 μm by electrolytic plating. The height of the tip surface of the solder layer protruding from the insulating film surface was 10 μm.
[0040]
Next, a dry film resist (AQ-2058, manufactured by Asahi Kasei) is roll-laminated on the copper foil, aligned, and then exposed and developed using a predetermined negative film to form a conductor circuit 110. A plating resist was formed. Next, using a copper foil as a lead for electrolytic plating, a nickel layer (diffusion preventing metal layer 107) and subsequently a gold layer (gold film layer 108) were formed by electrolytic plating. Further, after the resist was removed, the copper foil was selectively etched using the already formed gold layer or nickel layer as an etching resist to form a wiring pattern (conductor circuit 110). Through the above steps, the wiring substrate 120 was obtained.
[0041]
<Manufacture of wiring board: Comparative example>
In the method of manufacturing a wiring board of the above-described embodiment, the steps up to the step of forming a plating resist on a copper foil were performed in the same manner as in the embodiment. Next, a gold layer (gold film layer 108) was formed by electrolytic plating using the copper foil as a lead for electrolytic plating. That is, the difference from the embodiment is that there is no step of forming a nickel layer by plating. Further, after the resist was removed, the copper foil was selectively etched using the already formed gold layer or nickel layer as an etching resist to form a wiring pattern (conductor circuit 110). Through the above steps, the wiring substrate 120 was obtained.
[0042]
<Manufacture of multilayer wiring board>
The wiring boards obtained by the methods shown in Examples and Comparative Examples (X: a wiring board having a nickel layer formed thereon, Y: a wiring board having no nickel layer formed thereon) were obtained by bar coating. The adhesive varnish (Formulation Example 1) was applied to the surface of the insulating layer, that is, the surface on which the Sn-Ag solder layer was formed, and then dried at 80 ° C. for 20 minutes to form an adhesive layer (adhesive layer) having a thickness of 20 μm. 111).
[0043]
On the other hand, using a glass epoxy double-sided copper-clad laminate equivalent to FR-5 (manufactured by Sumitomo Bakelite, ELC-4781) having a 12 μm thick copper foil formed on both sides, the copper foil is selectively etched to form a circuit pattern. Thus, a core substrate (core substrate 130) was obtained.
[0044]
Next, a positioning mark formed in advance on the wiring board (X) or (Y) obtained in the above step and the core board is read by an image recognition device, and both are aligned. Thermocompression bonding was performed under a condition of 0.5 MPa for 1 minute. Thus, a multilayer wiring board (X ′: using the wiring board (X)) and (Y ′: using the wiring board (Y)) were obtained. Further, the obtained multilayer wiring board was subjected to a heat treatment at 200 ° C. for 60 minutes to cure the adhesive.
[0045]
<Section evaluation of solder joint>
In order to evaluate the solder joints of the obtained multilayer wiring boards (X ′) and (Y ′) in detail, the sections were polished, buffed, and finally finished by ion milling. Thereafter, the solder joints between the wiring boards of the multilayer wiring boards (X ′) and (Y ′) were observed with an electron microscope, and the composition was analyzed. The cross section of the joint was observed on both the multilayer wiring board before the heat treatment and the multilayer wiring board after the heat treatment.
[0046]
In the multilayer wiring board (X ′) in which the nickel layer was provided on the conductor circuit, no Kirkendall void was observed in the cross-sectional observation before and after the heat treatment. Further, an alloy mainly composed of Sn, Au, and Cu was formed at the joint. On the other hand, in the multilayer wiring board (Y ′) having no nickel layer, it was observed that microvoids considered to be Kirkendall voids occurred at the interface between the conductor circuit and the solder layer before the heat treatment. Furthermore, in the cross-sectional observation after the heat treatment at 200 ° C. for 60 minutes, Kirkendall voids at the interface between the conductor layer and the solder alloy grew and expanded to just before peeling. In each case (X ′, Y ′), although an alloy was formed at the interface between the conductor post and the solder, the occurrence of Kirkendall voids and the expansion of voids due to the heat treatment were not observed.
[0047]
From the above results, it is clear that the formation and growth of Kirkendall voids can be suppressed by forming the diffusion preventing metal layer 107. Further, the interface between the conductor post and the solder layer is not provided with the diffusion preventing metal layer. However, an alloy can be formed without generating and growing Kirkendall voids.
[0048]
【The invention's effect】
According to the present invention, it is possible to provide a highly reliable multilayer wiring board which can be reliably connected between layers.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a first example of a method of manufacturing a wiring board according to an embodiment of the present invention.
FIG. 2 is a sectional view showing a second example of the method for manufacturing a wiring board according to the embodiment of the present invention;
FIG. 3 is a cross-sectional view illustrating an example of a method for manufacturing a multilayer wiring board when the first wiring board according to the embodiment of the present invention is used.
FIG. 4 is a cross-sectional view illustrating an example of a method for manufacturing a multilayer wiring board when the second wiring board according to the embodiment of the present invention is used.
[Explanation of symbols]
101 metal foil
201 metal plate
102, 202 insulating layer
103, 203 via
104, 204 Copper post
105, 205 Solder film
106, 206 Conductor post
107, 207 Diffusion prevention metal layer
108, 208 Gold film layer
109, 209 copper circuit
110, 210 conductor circuit
110a, 210a conductor circuit
111, 211 adhesive layer
120, 220 wiring board
130, 230 core substrate
140, 240 multilayer wiring board

Claims (10)

The solder layer mainly composed of tin formed at the tip of the conductor post for interlayer connection and the diffusion prevention layer of the conductor layer composed of at least a copper layer and a diffusion prevention metal layer are thermocompression bonded via an adhesive layer. An interlayer connection obtained by soldering. 2. The interlayer connection according to claim 1, wherein the conductor layer includes a gold layer, and the gold layer and the solder layer are joined by soldering. The interlayer connection part according to claim 1, wherein the conductor layer is a land for interlayer connection. 3. The interlayer connection according to claim 1, wherein the conductor layer is a conductor circuit layer. The interlayer connection according to any one of claims 1 to 4, wherein the diffusion prevention metal layer is made of nickel. The interlayer connection according to any one of claims 1 to 5, wherein the interlayer connection is formed of an alloy having a melting point higher than a melting point of the solder layer. 7. The soldering method according to claim 1, wherein the soldering is performed by bringing the solder layer into contact with the adhesive layer, heating the solder layer at a temperature equal to or higher than the melting point of the solder layer, melting the solder layer, and then pressing the solder layer. Interlayer connection. A multilayer wiring board comprising the interlayer connection part according to claim 1. 9. The multilayer wiring board according to claim 8, wherein the multilayer wiring board is obtained by including a plurality of wiring boards each having an insulating layer and a conductor circuit layer in contact with the insulating layer and having at least a copper layer and a diffusion preventing metal layer in this order. 10. The multilayer wiring board according to claim 9, wherein the conductive circuit layer is embedded in the insulating layer so as to expose one surface from the insulating layer.

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