JP3220206B2 - Phase control circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase control circuit for a power converter connected to an AC system.

[0002]

2. Description of the Related Art FIG.
There were the following. In the figure, a three-phase AC of a synchronous power supply synchronized with an AC system is applied to a three-phase / two-phase conversion circuit 1. The three-phase / two-phase conversion circuit 1 performs vector synthesis of the three-phase AC voltage to obtain a d-axis component sinθ and a q-axis component cos
to θ. The d-axis component sinθ is applied to the analog signal input section A of the multiplying D / A converter circuits 2 and 3, and the q-axis component cosθ is the analog signal input of the multiplying D / A converter circuits 4 and 5. Added to Part A.

On the other hand, data stored in the P-ROM circuits 6 and 7 is read out by a pulse train obtained by dividing the digital signal generated by the feedback loop, and the d-axis component sinφ is obtained from the P-ROM circuit 6. , P-ROM circuit 7 supplies q-axis component c
osφ is generated. Of these, the d-axis component sinφ is D / A
The q-axis component cosφ is applied to each digital signal input section B of the converter circuits 2 and 4 and the D / A converter circuits 3 and 5
To each analog signal input section B.

Therefore, the D / A converter circuits 2, 3,
Reference numerals 4 and 5 each output an analog signal corresponding to the product of the input values. The arithmetic circuit 8 calculates the phase difference (θ−φ) between the three-phase AC voltage of the synchronous power supply and the signal generated by the signal of the feedback loop based on these four types of analog signals. It should be noted that detailed calculation contents for obtaining the phase difference are publicly known, and therefore description thereof will be omitted. This phase difference signal is applied to a phase error amplifier (hereinafter, referred to as a loop filter) 12 as a phase error signal. Loop filter 12 is proportional,
It is an integral type, and amplifies and outputs the phase error by PI calculation. The output of the loop filter 12 is added to the bias voltage of the bias setting unit 13 and applied to the V / F converter 11. The V / F converter 11 generates a pulse having a frequency proportional to the voltage. The pulses are counted by counter circuits 9 and 10, respectively, and the counted value is added as a read signal for reading each data of the P-ROM circuits 6 and 7, and a phase at which the ignition pulse determination circuit 14 generates a timing pulse. Provided to the signal.

The above-described feedback loop circuit is known as a phase-locked loop circuit (hereinafter, referred to as a PLL), and is controlled so that the phase difference (θ−φ) becomes zero as a whole. The arc pulse determination circuit 14 can generate a stable phase control signal even for instantaneous fluctuations of the synchronous power supply.

[0006]

The above-described conventional phase control circuit has no means for positively removing the influence of the system voltage on lower-order harmonics. For this reason, when applied to a system with a large frequency fluctuation of the system or a system with a small short-circuit capacity, hunting occurs due to mutual interference between the PLL loop and other control loops such as a constant current control loop due to distortion of the voltage waveform. There was a problem that continued.

Further, when the voltage waveform of the synchronous power supply is distorted due to low-order harmonics, it also affects the output phase signal of the PLL, and a firing angle variation occurs in the gate pulse signal generated by the firing pulse determination circuit 14. There was a problem. Incidentally, when the firing angle variation occurs in the gate pulse signal, there is also a problem that a harmonic is generated in the system due to the output fluctuation of the power converter.

The present invention has been made to solve the above problems, and provides a phase control circuit capable of generating a stable phase control signal even if waveform distortion occurs due to fluctuations in system voltage or frequency. The purpose is to:

[0009]

SUMMARY OF THE INVENTION The present invention amplifies a phase error between a synchronizing signal and a feedback signal in a loop of a phase locked loop circuit which inputs a synchronizing signal of a synchronizing power supply and outputs a phase control signal. In a phase control circuit having a loop filter, a filter means for reducing a low-order harmonic component with respect to a synchronous power supply is provided on a path where the loop filter is provided.

In this case, it is preferable that the filter means reduces the second harmonic component of the synchronous power supply.

[0011]

According to the present invention, a filter means for reducing low-order harmonic components with respect to the synchronous power supply is provided in the installation path of the loop filter, so that even if the voltage waveform of the system is momentarily distorted, a stable phase is obtained. A control signal is obtained.

[0012] The loss of phase (1
Phase) and voltage imbalance, the synchronization signal contains a large amount of second harmonics. Therefore, the adverse effect can be reliably removed by the filter means for reducing the second harmonic component of the synchronous power supply.

[0013]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In the drawing, the same elements as those in FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted. This phase control circuit differs from that of FIG. 3 in that a notch filter 15 as filter means for reducing the second harmonic component of the synchronous power supply is provided at the subsequent stage of the loop filter 12.

The operation of the embodiment constructed as described above will be described below with particular reference to the time chart of FIG.

First, it is assumed that the voltage waveform of the synchronous power supply is distorted including the second harmonic component as shown by the solid line in FIG. At this time, the output voltage of the loop filter 12 is
It fluctuates as shown by the solid line in (b). If notch filter 15 is not provided for this variation, V / F
As shown in FIG. 2C, the converter 11 increases the pulse oscillation frequency at a location where the voltage is high, and decreases the pulse oscillation frequency at a location where the voltage is low. When the oscillation frequency fluctuates in this way, the count values of the counter circuits 9 and 10, which divide and count these pulses, are increased to the increasing speed and the maximum point as shown by the saw-tooth solid lines in FIG. The arrival timing changes. FIG. 2 (d) shows a phase train of six phases, that is, a pulse train of a phase signal used for firing pulse control every 60 degrees.
It is represented in analog form for easy understanding. The firing pulse determination circuit 14 determines whether the count values of the counter circuits 9 and 10
when it becomes the value E _c shown in parallel solid lines to the time axis of (d), it generates the firing pulses shown in FIG. 2 (e).

Thus, when the oscillation frequency of the V / F converter 11 increases due to the distortion of the voltage waveform of the synchronous power supply, the phase of the ignition pulse advances, and conversely, when the oscillation frequency of the V / F converter 11 decreases, the ignition pulse The phase will be delayed.

Next, as in this embodiment, a loop filter
Fig. 2 (b) when a notch filter 15 is provided after 12
A constant voltage is applied to the V / F converter 11 as shown by the broken line in FIG. This is because the voltage waveform of the synchronous power supply is
As shown by a broken line in (a), this corresponds to a state of a sine wave. As described above, when the oscillation frequency of the V / F converter 11 is stabilized, the count values of the counter circuits 9 and 10 are reduced as shown in FIG.
As indicated by the broken line, the increasing speed and the timing of reaching the maximum point are also aligned, whereby the firing pulse determination circuit 14 always generates firing pulses at equal intervals as shown in FIG. appear. As a result, a stable phase control signal can be obtained even if the voltage waveform of the synchronous power supply is distorted including the second harmonic due to a system failure or the like.

When the second harmonic is included, the transformer used in the output circuit of the power converter and the like causes DC polarization, but the second harmonic component is reduced as in this embodiment. This DC bias can also be reduced.

In the above embodiment, the notch filter 15 for reducing the second harmonic is used. In addition to the notch filter for the second harmonic, a notch filter for reducing other low-order harmonics is used in combination. By doing so, a more stable phase control signal can be obtained.

In the above embodiment, the notch filter 15 is provided after the loop filter 12, but the notch filter 15
Is provided before the loop filter 12, the same operation as described above is performed.

Incidentally, the above-described notch filter 15 reduces the second harmonic, but this can be processed by another filter means. That is, the phase difference (θ−
A so-called one-cycle integration circuit that samples the value of φ) over one cycle period, averages the obtained values, and outputs the result may be used in place of the notch filter 15. Also in this case, a stable phase control signal can be obtained even if the voltage waveform of the synchronous power supply includes the second harmonic.

[0022]

As is apparent from the above description, according to the present invention, since the filter means provided in the installation path of the loop filter attenuates low-order harmonic components with respect to the synchronous power supply, the voltage waveform of the system is reduced. Even if it is distorted momentarily, a stable phase control signal can be obtained.

In particular, by providing a filter means for attenuating the second harmonic component of the synchronous power supply, it is possible to reliably remove adverse effects due to open phase (one phase) of the synchronous power supply, voltage imbalance, and the like.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a time chart for explaining the operation of one embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a conventional phase control device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 3-phase / 2-phase conversion circuit 2,3,4,5 D / A converter circuit 6,7 P-ROM circuit 8 Operation circuit 9,10 Counter circuit 11 V / F converter 12 Phase error amplifier circuit 14 Determination of firing pulse Circuit 15 Notch filter

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H02J 3/38 H02M 1/08

Claims (2)

(57) [Claims] 1. A proportional-integral type circuit for amplifying a phase error between a synchronous signal and a feedback signal in a loop of a phase-locked loop circuit for inputting a synchronous signal of a synchronous power supply and outputting a phase control signal.
A phase control circuit having a phase error amplifier circuit, characterized in that the installation path of the phase error amplifier circuit includes filter means for reducing low-order harmonic components with respect to the synchronous power supply. 2. The apparatus according to claim 1, wherein said filter means is a second power supply of said synchronous power supply.
The phase control circuit according to claim 1, wherein a harmonic component is reduced.