JP3271381B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having an insulated gate type power switching element such as an insulated gate bipolar transistor (IGBT) and a circuit for protecting the switching element from overvoltage.

[0002]

2. Description of the Related Art In order to secure a safe operation area in use of a power switching element, it is required that the element is not broken even at an abnormal voltage higher than a voltage generated during a normal operation. In order to provide such a surplus withstand voltage performance, a circuit for protecting against overvoltage is built in. FIG. 2 shows an I-type circuit having such an overvoltage protection function.
In the GBT, the IGBT portion has n on the p-type drain layer 1.
⁺ N ^- conductivity modulation layer 3 laminated via buffer layer 2
The p-type base layer 4 is selectively formed on the surface layer of the above, and the n-type source layer 5 is further formed on the surface layer. Then, a gate electrode 7 made of polycrystalline silicon and connected to the G terminal is provided on a region between the conductivity modulation layer 3 and the source layer 5 of the base layer 4 via a gate oxide film 61, Further, the drain electrode 8 is in contact with the drain layer 1 and connected to the D terminal, and is in common contact with the base layer 4 and the source layer 5,
Source electrodes 9 connected to the S terminals are provided. In the IGBT, when a positive potential with respect to the source electrode 9 is applied to the gate electrode 7, the surface of the base layer 7 is inverted to form a channel. 3 injected. In response to this, holes are injected from the drain layer 1, so that the conductivity of the conductivity modulation layer sharply rises, and a low resistance element is obtained. This IG
A plurality of, in this case, two, p-wells 11 are formed in the extension of the n ^- conductivity modulation layer 3 of the BT, and the anode electrode 12 comes into contact with the contact holes formed in the initial oxide film 62 on the surface thereof. I have. The p well 11 is shallower than the p base layer 4,
The pn junction between the conductivity modulation layer 3 and the pn junction between the p base layer 4 and the conductivity modulation layer has a larger curvature. Further, n in the oxide film 63 on the surface of the conductivity modulation layer 3 ^- Zener diode 21, 22, 23 consisting of a p layer and the n layer selectively formed by diffusing an impurity into the polycrystalline silicon layer is formed ing. Each anode electrode 12 is a gate electrode 7 of the IGBT.
And the gate electrode 7 is connected to the source electrode 9 via anti-series zener diodes 22 and 23 in the forward direction.

In this semiconductor device, when an overvoltage is applied between the source (gate) and the drain in an off state where the source and the gate have the same potential, a pn junction between the p well 11 and the conductivity modulation layer 3 is formed. Avalanche breakdown occurs first, current flows to the gate side via the gate resistor, and the gate potential rises, and I
The GBT is turned on. As a result, it is possible to protect the element by passing overvoltage energy between the source and the drain.

The Zener diode 21 prevents the on / off of the gate potential in the daily operation of the IGBT from being propagated to the drain layer 1 side. On the other hand, the zener diodes 22 and 23 connected in reverse series have their gates turned on due to overvoltage,
A surge voltage generated when the device is turned off is absorbed to prevent the gate oxide film 6 from being broken. Another conventional semiconductor device shown in FIG. 3 has an initial oxide film 63 for increasing the limit voltage.
The upper zener diodes 21 and 23 are connected to the conductor 20 so that three
Connected by

In order to extract carriers when the IGBT is turned off, a p-well 4 is formed simultaneously with the p-type base layer 4.
1 and 42 are formed on the surface layer of the n ⁻ layer 3, the p well 41 is connected to the S terminal via the electrode 91, and the p well 42 is connected to the S terminal via the source electrode 9.

[0006]

However, such an IGBT with a built-in overvoltage protection circuit has the following problems. (1) When the p-well 11 is formed by ion implantation of boron using the initial oxide film 62 as a mask, ions
Therefore, the edge of the p-well 11 has a gentle shape as shown by a dotted line 13 in FIG. 2 and the avalanche resistance is reduced.

(2) Actually, since the resistivity of the n ⁻ layer 3 formed by the epitaxial method varies, the p wells 11 and n ⁻
The avalanche breakdown voltage of the pn junction with the layer 3 varies, and the variation may be close to 100 to 400 V in the high withstand voltage element of the n ⁻ layer 3 having a high resistivity. (3) Zener diodes 21 and 2 of the semiconductor device shown in FIG.
When a negative voltage is applied to the gate electrodes connected to the polycrystalline silicon layers 2 and 23, the inversion layer 14 is formed on the surface layer of the n ⁻ layer 3. When the inversion layer 14 is formed, between the p-type extraction region 41 and the p-well 11 of the avalanche diode,
And the parasitic MOSFET formed by the p-well 11 and the p-type extraction region 42 is turned on, and the extraction region 41
From the p-well 11 to the extraction region 42 from the p-well 11 increases.

An object of the present invention is to solve each of the above problems,
Semiconductor device in which the avalanche withstand voltage of the avalanche diode for overvoltage protection is stabilized, the avalanche breakdown voltage value is uniform, or the leakage current flowing in the avalanche diode region does not increase due to the application of a voltage to the gate electrode. Is to provide each.

[0009]

In order to achieve the above-mentioned object, the present invention provides a method for forming a first conductive type high resistivity layer on a surface layer of a main element controlled by a voltage applied to a gate electrode. The second conductivity type of the second conductivity type having a bonding surface having a larger curvature than the bonding surface of the second conductivity type region connected to the first main electrode of the main element is present in the surface layer. An avalanche diode is provided in a semiconductor device in which an avalanche diode region is formed and the avalanche diode is connected between a gate electrode of the main element and a second main electrode to protect the main element from overvoltage between the gate electrode and the main electrode. It is assumed that the thickness of the insulating film surrounding the exposed surface of the region is 0.6 μm or more. In addition, on the insulating film surrounding the exposed surface of the avalanche diode region, the electrodes that are separated from the electrodes that are in contact with the exposed surface have arbitrary conductive layers that can be connected to the electrodes. Shall be. Alternatively, in addition to the above avalanche diode has a Zener diode comprising a first conductivity type region and a second conductivity type region in the semiconductor layer formed through an insulating film on the surface of the high resistivity layer, the in the semiconductor device which is connected to and between the gate electrode and the avalanche diode region of the Zener diode between the gate electrode and the first main electrode, the wand
A plurality of diodes are connected in series to the semiconductor layer.
The semiconductor layer is divided between the Zener diodes, and the connection between them is made by a conductor having a width smaller than that of the semiconductor layer.

[0010]

The thickness of the insulating film surrounding the exposed surface of the second conductivity type region forming the avalanche diode in the high resistivity layer is reduced to 0.6.
When the thickness is not less than μm, ions passing through the insulating film serving as a mask for forming the second conductivity type region are reduced, and the curvature of the second conductivity type region is prevented from being reduced. Also, if a plurality of conductive layers separated from the electrode in contact with the exposed surface are provided on the oxide film surrounding the exposed surface, when the conductive layer is set to the same potential as the electrode, the junction surface of the avalanche diode is provided. The avalanche breakdown voltage is increased by widening the depletion layer from the substrate, but the avalanche breakdown voltage is reduced if a part or all of the conductive layer is disconnected from the electrode. Therefore, it is possible to adjust the connection of the conductive layer according to the variation in the resistivity of the high resistivity layer, and to set the target avalanche breakdown voltage.

When the semiconductor layers forming the Zener diode are not continuous and connection is required, if the connection is made by a narrow conductor wider than the semiconductor layer, the inverted layer formed even when a voltage is applied to the semiconductor layer will be formed. The leakage current is reduced due to the squeezing at the connection part between them.

[0012]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
State. N of the conductivity modulation layer of the semiconductor device shown in FIG.^-layer
3 is p⁺N on the drain layer ⁺Layer 2 laminated sub
Using a straight, epitaxial growth on it
I do. This n^-A gate oxide film 61 on the surface of layer 3
A gate electrode 7 made of polycrystalline silicon is formed. Further
Self-alignment using this gate electrode 7 as a mask
Ion implantation of boron by the^-Surface layer of layer 3
A p base layer 4 having a width of 40 μm and a depth of 5 μm or more is formed.
You. The p-well 11 is 10 ke using the initial oxide film 62 as a mask.
1 × 10 with V accelerating voltage¹²cm^-2B at the above dose
⁺Into a circular or polygonal shape with a diameter of 18μm
Then, a depth is formed shallower than 5 μm. At this time, the initial oxidation
If the thickness of the film 62 is thinner than 0.6 μm, B⁺The initial oxide film
Stickiness and avalanche resistance decrease. Initial oxide film 63
Is about 0.8 μm, a desirable 1 mA avalanche
Breakdown current can be obtained and avalanche withstand capability can be reduced to 1 μm.
Further improve. Figure 4 shows the initial oxide film thickness and avalanche.
This shows the relationship with the breakdown current.

FIG. 1 shows an embodiment of the second invention, in which a p-well 11 is used.
The anode electrode 12 in contact with ^-Positive Abala in Layer 3
When a reverse bias is applied to the
The depletion layer is expanded as shown by. According to the present invention, the initial oxidation
On the film 62, a plurality of metal or polycrystalline silicon
The conductive layers 71 and 72 are separately formed. anode
Close the switch 81 and connect the electrode 12 and the conductive layer 71
The depletion layer spreads to the dotted line 52, and the avalanche breakdown voltage
Will be higher. Switch 82 is closed with conductive layer 71 and conductive layer 72 closed.
Avalanche breakdown voltage becomes higher.
Therefore, after forming the avalanche diode, n^-Layer 3
Avalanche breakdown voltage too high due to high resistivity
To open switch 82 or even switch 81
The avalanche breakdown voltage may be reduced. Like this
Avalanche breakdown due to predetermined overvoltage
A Schottky diode can be built in.

[0014]

FIG. 6 shows a p-type avalanche diode region 11 and a pull-out region, as in the semiconductor device of FIG.
39 is a plan view of a zener diode 21 of the zener diodes formed on the oxide film 62 between 41 and 42. FIG. In this case, the polycrystalline silicon layers forming the p-layer and the n-layer of the three series Zener diodes are separated, and an insulating layer 24 such as PSG is interposed therebetween, and the connection of each Zener diode is multiplied. Metal layer 25 narrower than crystalline silicon layer
An example performed in the above will be described. As a result, the leakage current when a negative voltage is applied to the polycrystalline silicon layer is as shown in FIG.
FIG. 5B shows the conventional semiconductor device shown in FIG.
The leakage current when applying a negative voltage was reduced.

[0016]

According to the present invention, an insulating film serving as a mask when an avalanche diode region for detecting overvoltage is formed by ion implantation on a surface layer of a high resistivity layer of the same semiconductor substrate as an insulated gate device. By setting the thickness to 0.6 μm or more, ions were not implanted through the mask, and a decrease in avalanche withstand capability could be prevented. Variations in the avalanche breakdown voltage due to variations in the resistivity of the high-resistivity layer of the semiconductor substrate are caused by expanding the depletion layer on the insulating film on the surface surrounding the avalanche diode region and forming a conductive layer that serves as a field plate that increases the avalanche breakdown voltage. The avalanche breakdown voltage can be reduced by adjusting the connection between the conductive layer and the avalanche diode electrode. Moreover, the problem of the inversion layer is formed immediately below the Zener diode for protection is formed on the surface, cane
The problem was solved by dividing the semiconductor layer forming the diode and connecting the gap with a conductive layer having a width smaller than that of the semiconductor layer, thereby making it difficult to form an inversion layer.

[Brief description of the drawings]

FIG. 1 is a sectional view of an avalanche diode part of a semiconductor device according to an embodiment of the present invention;

FIG. 2 is an IGB with an overvoltage protection function according to the present invention;
Cross section of T

FIG. 3 is a cross-sectional view of a conventional IGBT with an overvoltage protection function.

FIG. 4 is a diagram showing a relationship between an initial oxide film thickness near an avalanche diode and an avalanche breakdown voltage.

FIG. 5 shows the gates of the semiconductor device of the conventional example (a) and the embodiment (b).
The voltage applied to the electrode and the current flowing to the avalanche diode area
Voltage-current characteristic diagram

FIG. 6 illustrates overvoltage absorption in yet another embodiment of the present invention .
Plan view of Zener diode

[Explanation of symbols]

 Reference Signs List 1 p + drain layer 2 n + buffer layer 3 n− conductivity modulation layer 4 p base layer 5 n source layer 61 gate oxide film 62 initial oxide film 7 gate electrode 8 drain electrode 9 source electrode 11 avalanche diode p region 12 anode electrode 21, 22, 23 Zener diode 24 Insulating layer 25 Metal layer 71, 72 Conductive layer 81, 82 Switch

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 29/78 H01L 29/90

Claims (3)

(57) [Claims] 1. A high-resistivity layer of a first conductivity type of a main element controlled by a voltage applied to a gate electrode, which is present on the surface layer and is connected to a first main electrode of the main element. An avalanche diode region of a second conductivity type having a junction surface having a larger curvature than the junction surface of the second conductivity type region between the first conductivity type layer and the avalanche diode is formed by a gate electrode and a second main electrode. To protect the main element from overvoltage between the gate electrode and the main electrode,
A semiconductor device, wherein the thickness of an insulating film surrounding an exposed surface of an avalanche diode region is 0.6 μm or more. 2. A high-resistivity layer of the first conductivity type of the main element, which is controlled by a voltage applied to the gate electrode, is present on the surface layer, and is connected to the first main electrode of the main element. An avalanche diode region of a second conductivity type having a junction surface having a larger curvature than the junction surface of the second conductivity type region between the first conductivity type layer and the avalanche diode is formed by a gate electrode and a second main electrode. To protect the main element from overvoltage between the gate electrode and the main electrode,
On the insulating film surrounding the exposed surface of the avalanche diode region, it is separated into electrodes that are in contact with the exposed surface, and it is required that any number of them have a plurality of conductive layers that can be connected to the electrode. Characteristic semiconductor device. 3. The method is controlled by a voltage applied to a gate electrode.
The surface of the high resistivity layer of the first conductivity type of the main element
Second conductive layer present in the layer and connected to the first main electrode of the main element
The bonding surface with a larger curvature than the bonding surface of the
Avalanche diode of the second conductivity type between layers
A region is formed and the avalanche diode is gated
The main element is connected between the electrode and the second main electrode to
Protects against overvoltages between the poles and the main electrode, avalanche
In addition to the ion, an insulating film is interposed on the surface of the high resistivity layer.
First conductive connected in series to the semiconductor layer formed by
A zener diode consisting of a gate region and a second conductivity type region.
The Zener diode has a gate electrode and a first main electrode
Between the gate electrode and the avalanche diode region
Between the semiconductor layer and the semiconductor layer,
And the connection between them is better than the semiconductor layer.
A semiconductor device characterized by being made of a conductor having a narrow width .