JP3247662B2 - Carrier tape - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a carrier tape having a plurality of storage recesses for storing electronic components in a longitudinal direction.

[0002]

2. Description of the Related Art Conventionally, there has been known a semiconductor package having a plurality of electrode terminals such as solder balls and solder bumps arranged on a bottom surface of a chip mounting substrate or a bottom surface of a chip mold portion. If the electrode terminals directly contact the carrier tape when such a semiconductor package is housed in the housing recess formed in the carrier tape and transported, the electrode terminals may be contaminated. To this end, there has been known a carrier tape in which a bottom edge of a semiconductor package is placed on a shelf formed on an inner peripheral surface of a storage recess to prevent contact between the bottom surface of the storage recess and an electrode terminal. In such a carrier tape, storage recesses are formed by air pressure molding, vacuum molding, press molding, or the like, but it is difficult to form the corners of the shelf at a right angle due to restrictions on the processing accuracy of a molding die. As a result, the corner of this shelf is formed on the arc surface, and the corner of the semiconductor package interferes with this arc surface,
There is a problem that the semiconductor package rattles in the storage recess.

[0003]

On the other hand, in order to prevent the corner of the shelf and the corner of the semiconductor package from coming into contact with each other, the 4
If the corners are protruded outward and escaped, the spacing between the storage recesses in the length direction of the carrier tape is increased, or the width of the carrier tape is increased. As a result, there are problems that the number of stored semiconductor packages is reduced and that a wide carrier tape must be used.

An object of the present invention is to provide a carrier tape that can increase the number of electronic components stored.

[0005]

The present invention solves the above-mentioned problems by the following means. That is, according to the present invention, in a carrier tape having a plurality of storage recesses for storing electronic components in a length direction, an inner peripheral surface of the storage recess is formed substantially perpendicular to a bottom surface, and a bottom surface of the electronic component is formed. A tapered surface that supports a peripheral portion is formed below the inner peripheral surface, and an inner peripheral surface corner of the storage recess is formed substantially perpendicular to a bottom surface, and a bottom surface corner of the electronic component and the tapered surface are formed. And a carrier tape configured to prevent interference of the carrier tape.

[0006]

Embodiments of the present invention will be described below in more detail with reference to the drawings. FIG. 1 is a plan view of a carrier tape according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing a state cut along line II-II in FIG.

A carrier tape according to an embodiment of the present invention has a large number of storage recesses 1 formed at predetermined intervals in the length direction and a predetermined interval at one end in the width direction. This is an embossed carrier tape having a large number of feed holes 2. After the electronic component 3 is stored in the storage recess 1, a top tape (not shown) is attached to the carrier tape.

The storage recess 1 is a substantially rectangular parallelepiped portion for storing the electronic component 3, and as shown in FIG. 1, the opening has a substantially square shape. The storage recess 1 includes a bottom surface 1a, a detection hole 1b penetrating the bottom surface 1a, a tapered surface 1c, an inner peripheral surface 1d, an inner peripheral surface corner 1e, and an opening 1f. The storage recess 1 is formed by press-forming, vacuum-forming a resin sheet of a thermoplastic resin such as polystyrene, polyvinyl chloride, amorphous polyester, and polycarbonate.
It is formed by pneumatic molding, vacuum pneumatic molding or pneumatic plug assist molding.

As shown in FIG. 2, the tapered surface 1c is an inclined surface that supports the bottom peripheral edge 3b of the electronic component 3 so as to form a gap between the component bottom surface 3a and the bottom surface 1a. The tapered surface 1c supports the electronic component 3 so that the ball terminal 3c protruding from the component bottom surface 3a does not contact the bottom surface 1a. The tapered surface 1c is formed below the inner peripheral surface 1d, and has an inclination angle represented by the following equation 1.

[0010]

(Equation 1)

The inner peripheral surface 1d is a portion slightly inclined toward the opening 1f so that the electronic component 3 can be easily mounted on the tapered surface 1c. The inner peripheral surface 1d is formed substantially perpendicular to the bottom surface 1a (the inclination angle is about 5 degrees with respect to the vertical direction).

The inner peripheral surface corner 1e is a relief portion for preventing interference between the bottom surface corner 3d of the electronic component 3 and the tapered surface 1c.
It is formed substantially perpendicular to the bottom surface 1a, preferably at 0 to 15 degrees, more preferably at 3 to 8 degrees with respect to the vertical direction. In addition, as shown in FIG.
It is formed in a substantially circular arc shape.
As shown in (1), it is preferable to be formed in a substantially arc shape and to be formed outward from the inner peripheral surface 1d.

As shown in FIG. 2, the electronic component 3 has a substantially rectangular parallelepiped BGA (Ball G
area package (semiconductor package) such as rid array) and CSP (Chip Scale Package).

The carrier tape according to the embodiment of the present invention has the following effects. (1) In the embodiment of the present invention, the inner peripheral surface corner 1e of the storage recess 1 is formed substantially perpendicular to the bottom surface 1a so as to prevent interference between the bottom surface corner of the electronic component and the tapered surface. Configured. Also, a tapered surface 1c may be formed on the inner peripheral surface corner 1e. In the embodiment of the present invention, since the inner peripheral surface corner 1e is formed substantially perpendicular to the bottom surface 1a, the area of the inner peripheral surface corner 1e (when viewed from above the opening surface) is reduced, The space between the storage recesses 1 in the tape length direction is reduced. As a result, storage recesses 1 per carrier tape 1
And the number of electronic components 3 that can be stored in the carrier tape increases, and the width in the tape width direction can be shortened.

(2) In the embodiment of the present invention, the bottom surface 1a
Since the inner peripheral surface corner 1e is formed substantially perpendicular to the inner peripheral surface corner 1e, the inner peripheral surface corner 1e can be used as a rib for reinforcing the storage recess 1.

[0016]

As described above in detail, according to the present invention, the inner peripheral surface corner of the storage recess is formed substantially perpendicular to the bottom surface to prevent interference between the bottom surface corner of the electronic component and the tapered surface. As a result, the number of stored electronic components can be increased.

[Brief description of the drawings]

FIG. 1 is a plan view of a carrier tape according to an embodiment of the present invention.

FIG. 2 is a sectional view showing a state cut along a line II-II in FIG. 1;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Storage recessed part 1a Bottom surface 1b Detecting hole 1c Tapered surface 1d Inner peripheral surface 1e Inner peripheral surface corner 1f Opening 2 Sending hole 3 Electronic component 3a Component bottom surface 3b Bottom peripheral edge 3c Ball terminal 3d corner

──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-11-227871 (JP, A) JP-A-10-208769 (JP, A) JP-A-11-152164 (JP, A) JP-A-11- 115963 (JP, A) JP-A-10-139090 (JP, A) JP-A-7-112785 (JP, A) JP-A 9-124092 (JP, A) JP-A-10-120077 (JP, A) JP-A-11-105920 (JP, A) Patent 2862203 (JP, B2) Patent 2632084 (JP, B2) Utility model registration 2514030 (JP, Y2) 20302 (JP, B2) (58) Fields investigated (Int. Cl. ⁷ , DB name) B65D 73/02 B65D 85/86 H05K 13/00-13/02

Claims (1)

(57) [Claims] 1. A carrier tape having a plurality of storage recesses for storing electronic components in a length direction, wherein an inner peripheral surface of the storage recess is formed substantially perpendicular to a bottom surface,
A tapered surface that supports a bottom peripheral edge of the electronic component is formed below the inner peripheral surface, and an inner peripheral surface corner of the storage recess is formed substantially perpendicular to the bottom surface, and a bottom surface corner of the electronic component is formed. A carrier tape configured to prevent interference between the carrier tape and the tapered surface.