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JP2000327025A - Carrier tape - Google Patents

Carrier tape

Info

Publication number
JP2000327025A
JP2000327025A JP11136113A JP13611399A JP2000327025A JP 2000327025 A JP2000327025 A JP 2000327025A JP 11136113 A JP11136113 A JP 11136113A JP 13611399 A JP13611399 A JP 13611399A JP 2000327025 A JP2000327025 A JP 2000327025A
Authority
JP
Japan
Prior art keywords
carrier tape
inner peripheral
peripheral surface
electronic part
tapered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11136113A
Other languages
Japanese (ja)
Other versions
JP3247662B2 (en
Inventor
Hiroki Kanbe
広樹 神戸
Kazuya Sato
一弥 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Polymer Co Ltd
Shin Etsu Chemical Co Ltd
Original Assignee
Shin Etsu Polymer Co Ltd
Shin Etsu Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Polymer Co Ltd, Shin Etsu Chemical Co Ltd filed Critical Shin Etsu Polymer Co Ltd
Priority to JP13611399A priority Critical patent/JP3247662B2/en
Publication of JP2000327025A publication Critical patent/JP2000327025A/en
Application granted granted Critical
Publication of JP3247662B2 publication Critical patent/JP3247662B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a carrier tape in which the number of electronic part items to be carrier can be increased. SOLUTION: A tapered surface 1c is a slope to support the bottom surface peripheral edge section of an electronic part item 3, and is formed at the lower section of an inner peripheral surface 1d. When the tapered surface 1c is formed at inner peripheral surface corner sections 1e as well, in order to prevent an interference between the bottom surface corner sections 3d of the electronic part item 3 and the tapered surfaces 1c from occurring, the tapered surface 1c needs to be greatly bent and projected to the outside. However, the inner peripheral surface corner section 1e is approx. vertical to a bottom surface 1a, and a release amount of the electronic part item 3 from the bottom surface corner sections 3d becomes smaller, and an interval of a housing recess section 1 in the tape length direction becomes narrower. As a result, the installation number of the housing recess sections 1 per carrier tape is increased, and the number of the electronic part items 3 which can be carried on the carrier tape is increased, and, the length in the width direction of the tape becomes shorter.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電子部品を収納す
る収納凹部を長さ方向に複数有するキャリアテープに関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a carrier tape having a plurality of storage recesses for storing electronic components in a longitudinal direction.

【0002】[0002]

【従来の技術】従来より、チップ搭載基板の底面やチッ
プモールド部の底面に配列された複数のハンダボールや
ハンダバンプなどの電極端子を有する半導体パッケージ
が知られている。キャリアテープに形成された収納凹部
に、このような半導体パッケージを収納して搬送する際
に、電極端子がキャリアテープに直接接触すると、電極
端子の汚染を招くおそれがある。このために、収納凹部
の内周面に形成された棚部に、半導体パッケージの底面
周縁部を載せて、この収納凹部の底面と電極端子との接
触を防止するキャリアテープが知られている。このよう
なキャリアテープは、圧空成形、真空成形又はプレス成
形などにより収納凹部が形成されるが、成形金型の加工
精度などの制約から、棚部の角を直角に形成することが
難しい。その結果、この棚部の角が円弧面に形成され
て、半導体パッケージの角とこの円弧面とが干渉して、
半導体パッケージが収納凹部内でがたついてしまうとい
う問題があった。
2. Description of the Related Art Conventionally, a semiconductor package having a plurality of electrode terminals such as solder balls and solder bumps arranged on a bottom surface of a chip mounting substrate or a bottom surface of a chip mold portion has been known. If the electrode terminals directly contact the carrier tape when such a semiconductor package is housed in the housing recess formed in the carrier tape and transported, the electrode terminals may be contaminated. To this end, there has been known a carrier tape in which a bottom edge of a semiconductor package is placed on a shelf formed on an inner peripheral surface of a storage recess to prevent contact between the bottom surface of the storage recess and an electrode terminal. In such a carrier tape, storage recesses are formed by air pressure molding, vacuum molding, press molding, or the like, but it is difficult to form the corners of the shelf at a right angle due to restrictions on the processing accuracy of a molding die. As a result, the corner of this shelf is formed on the arc surface, and the corner of the semiconductor package interferes with this arc surface,
There is a problem that the semiconductor package rattles in the storage recess.

【0003】[0003]

【発明が解決しようとする課題】一方、棚部の角と半導
体パッケージの角とが接触しないように、収納凹部の4
隅を外側に突出させて逃がすと、キャリアテープの長さ
方向における収納凹部の間隔が広くなったり、キャリア
テープの幅が広くなってしまう。その結果、半導体パッ
ケージの収納個数が減少したり、幅の広いキャリアテー
プを使用しなければならないという問題があった。
On the other hand, in order to prevent the corner of the shelf and the corner of the semiconductor package from coming into contact with each other, the 4
If the corners are protruded outward and escaped, the spacing between the storage recesses in the length direction of the carrier tape is increased, or the width of the carrier tape is increased. As a result, there are problems that the number of stored semiconductor packages is reduced and that a wide carrier tape must be used.

【0004】本発明の課題は、電子部品の収納個数を増
加させることができるキャリアテープを提供することで
ある。
An object of the present invention is to provide a carrier tape that can increase the number of electronic components stored.

【0005】[0005]

【課題を解決するための手段】本発明は、以下のような
解決手段により、前記課題を解決する。すなわち、請求
項1の発明は、電子部品を収納する収納凹部を長さ方向
に複数有するキャリアテープにおいて、前記収納凹部の
内周面を底面に対して略垂直に形成し、前記電子部品の
底面周縁部を支持するテーパ面を前記内周面の下方に形
成するとともに、前記収納凹部の内周面角部を底面と略
垂直に形成して、前記電子部品の底面角部と前記テーパ
面との干渉を防止するように構成したことを特徴とする
キャリアテープである。
The present invention solves the above-mentioned problems by the following means. That is, the invention according to claim 1 is a carrier tape having a plurality of storage recesses for storing electronic components in a length direction, wherein an inner peripheral surface of the storage recess is formed substantially perpendicular to a bottom surface, A tapered surface that supports a peripheral portion is formed below the inner peripheral surface, and an inner peripheral surface corner of the storage recess is formed substantially perpendicular to a bottom surface, and a bottom surface corner of the electronic component and the tapered surface are formed. And a carrier tape configured to prevent interference of the carrier tape.

【0006】[0006]

【発明の実施の形態】以下、図面を参照して、本発明の
実施形態についてさらに詳しく説明する。図1は、本発
明の実施形態に係るキャリアテープの平面図であり、図
2は、図1のII−II線で切断した状態を示す断面図
である。
Embodiments of the present invention will be described below in more detail with reference to the drawings. FIG. 1 is a plan view of a carrier tape according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing a state cut along line II-II in FIG.

【0007】本発明の実施形態に係るキャリアテープ
は、長さ方向に所定の間隔を空けて多数形成された収納
凹部1と、幅方向の一方の端部に所定の間隔を空けて形
成された多数の送り孔2とを備えるエンボスキャリアテ
ープである。このキャリアテープには、収納凹部1に電
子部品3を収納した後に、図示しないトップテープが貼
り付けられる。
A carrier tape according to an embodiment of the present invention has a large number of storage recesses 1 formed at predetermined intervals in the length direction and a predetermined interval at one end in the width direction. This is an embossed carrier tape having a large number of feed holes 2. After the electronic component 3 is stored in the storage recess 1, a top tape (not shown) is attached to the carrier tape.

【0008】収納凹部1は、電子部品3を収納する略直
方体の部分であり、図1に示すように、開口部の形状が
略正方形である。この収納凹部1は、底面1aと、この
底面1aを貫通する検知孔1bと、テーパ面1cと、内
周面1dと、内周面角部1eと、開口部1fとを備えて
いる。この収納凹部1は、熱可塑性樹脂のポリスチレ
ン、ポリ塩化ビニル、アモルファスポリエステル、ポリ
カーボネート等の樹脂シートをプレス成形、真空成形、
圧空成形、真空圧空成形又は圧空プラグアシスト成形し
たものである。
The storage recess 1 is a substantially rectangular parallelepiped portion for storing the electronic component 3, and as shown in FIG. 1, the opening has a substantially square shape. The storage recess 1 includes a bottom surface 1a, a detection hole 1b penetrating the bottom surface 1a, a tapered surface 1c, an inner peripheral surface 1d, an inner peripheral surface corner 1e, and an opening 1f. The storage recess 1 is formed by press-forming, vacuum-forming a resin sheet of a thermoplastic resin such as polystyrene, polyvinyl chloride, amorphous polyester, and polycarbonate.
It is formed by pneumatic molding, vacuum pneumatic molding or pneumatic plug assist molding.

【0009】テーパ面1cは、図2に示すように、部品
底面3aと底面1aとの間に間隙を形成するように、こ
の電子部品3の底面周縁部3bを支持する傾斜面であ
る。このテーパ面1cは、部品底面3aから突出するボ
ール端子3cと底面1aとが接触しないように、この電
子部品3を支持する。テーパ面1cは、内周面1dの下
方に形成されており、以下の式1に示す傾斜角度を備え
ている。
As shown in FIG. 2, the tapered surface 1c is an inclined surface that supports the bottom peripheral edge 3b of the electronic component 3 so as to form a gap between the component bottom surface 3a and the bottom surface 1a. The tapered surface 1c supports the electronic component 3 so that the ball terminal 3c protruding from the component bottom surface 3a does not contact the bottom surface 1a. The tapered surface 1c is formed below the inner peripheral surface 1d, and has an inclination angle represented by the following equation 1.

【0010】[0010]

【式1】 (Equation 1)

【0011】内周面1dは、テーパ面1c上に電子部品
3を容易に搭載可能なように開口部1fに向かって僅か
に傾斜した部分である。この内周面1dは、底面1aに
対して略垂直(傾斜角度が垂直方向に対して約5度)に
形成されている。
The inner peripheral surface 1d is a portion slightly inclined toward the opening 1f so that the electronic component 3 can be easily mounted on the tapered surface 1c. The inner peripheral surface 1d is formed substantially perpendicular to the bottom surface 1a (the inclination angle is about 5 degrees with respect to the vertical direction).

【0012】内周面角部1eは、電子部品3の底面角部
3dとテーパ面1cとの干渉を防止する逃げ部であり、
底面1aに対して略垂直に形成し、好ましくは、垂直方
向に対して0〜15度、より好ましくは3〜8度であ
る。また、この内周面角部1eは、図1に示すように、
略円弧状に形成し、また、この内周面角度1eは、図1
に示すように、略円弧状に形成され、内周面1dより外
方向に形成することが好ましい。
The inner peripheral surface corner 1e is a relief portion for preventing interference between the bottom surface corner 3d of the electronic component 3 and the tapered surface 1c.
It is formed substantially perpendicular to the bottom surface 1a, preferably at 0 to 15 degrees, more preferably at 3 to 8 degrees with respect to the vertical direction. In addition, as shown in FIG.
It is formed in a substantially circular arc shape.
As shown in (1), it is preferable to be formed in a substantially arc shape and to be formed outward from the inner peripheral surface 1d.

【0013】電子部品3は、図2に示すように、底面に
ボール端子3cなどを有する略直方体のBGA(Ball G
rid Array )、CSP(Chip Scale Package)などのエ
リアパッケージ(半導体パッケージ)などである。
As shown in FIG. 2, the electronic component 3 has a substantially rectangular parallelepiped BGA (Ball G
area package (semiconductor package) such as rid array) and CSP (Chip Scale Package).

【0014】本発明の実施形態に係るキャリアテープ
は、以下に記載するような効果を有する。 (1) 本発明の実施形態では、収納凹部1の内周面角
部1eを底面1aに対して略垂直に形成して、電子部品
の底面角部とテーパ面との干渉を防止するように構成し
た。また、この内周面角部1eにもテーパ面1cを形成
してもよい。本発明の実施形態では、内周面角部1eを
底面1aに対して略垂直に形成してあるので、内周面角
部1eの面積(開口面の上方から見た場合)が小さくな
り、テープ長さ方向における収納凹部1の間隔が狭くな
る。その結果、キャリアテープ1本当たりの収納凹部1
の設置個数が増加して、キャリアテープに収納可能な電
子部品3の個数が増加するとともに、テープ幅方向の幅
を短くすることができる。
The carrier tape according to the embodiment of the present invention has the following effects. (1) In the embodiment of the present invention, the inner peripheral surface corner 1e of the storage recess 1 is formed substantially perpendicular to the bottom surface 1a so that interference between the bottom surface corner of the electronic component and the tapered surface is prevented. Configured. Also, a tapered surface 1c may be formed on the inner peripheral surface corner 1e. In the embodiment of the present invention, since the inner peripheral surface corner 1e is formed substantially perpendicular to the bottom surface 1a, the area of the inner peripheral surface corner 1e (when viewed from above the opening surface) is reduced, The space between the storage recesses 1 in the tape length direction is reduced. As a result, storage recesses 1 per carrier tape 1
And the number of electronic components 3 that can be stored in the carrier tape increases, and the width in the tape width direction can be shortened.

【0015】(2) 本発明の実施形態では、底面1a
に対して略垂直に内周面角部1eが形成されているため
に、収納凹部1を補強するリブとして、この内周面角部
1eを利用することができる。
(2) In the embodiment of the present invention, the bottom surface 1a
Since the inner peripheral surface corner 1e is formed substantially perpendicular to the inner peripheral surface corner 1e, the inner peripheral surface corner 1e can be used as a rib for reinforcing the storage recess 1.

【0016】[0016]

【発明の効果】以上詳しく説明したように、本発明によ
れば、収納凹部の内周面角部を底面と略垂直に形成し
て、電子部品の底面角部とテーパ面との干渉を防止する
ように構成したので、電子部品の収納個数を増加させる
ことができる。
As described above in detail, according to the present invention, the inner peripheral surface corner of the storage recess is formed substantially perpendicular to the bottom surface to prevent interference between the bottom surface corner of the electronic component and the tapered surface. As a result, the number of stored electronic components can be increased.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施形態に係るキャリアテープの平面
図である。
FIG. 1 is a plan view of a carrier tape according to an embodiment of the present invention.

【図2】図1のII−II線で切断した状態を示す断面
図である。
FIG. 2 is a sectional view showing a state cut along a line II-II in FIG. 1;

【符号の説明】[Explanation of symbols]

1 収納凹部 1a 底面 1b 検知孔 1c テーパ面 1d 内周面 1e 内周面角部 1f 開口部 2 送り孔 3 電子部品 3a 部品底面 3b 底面周縁部 3c ボール端子 3d 角部 DESCRIPTION OF SYMBOLS 1 Storage recessed part 1a Bottom surface 1b Detecting hole 1c Tapered surface 1d Inner peripheral surface 1e Inner peripheral surface corner 1f Opening 2 Sending hole 3 Electronic component 3a Component bottom surface 3b Bottom peripheral edge 3c Ball terminal 3d corner

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 電子部品を収納する収納凹部を長さ方向
に複数有するキャリアテープにおいて、 前記収納凹部の内周面を底面に対して略垂直に形成し、
前記電子部品の底面周縁部を支持するテーパ面を前記内
周面の下方に形成するとともに、前記収納凹部の内周面
角部を底面と略垂直に形成して、前記電子部品の底面角
部と前記テーパ面との干渉を防止するように構成したこ
と、 を特徴とするキャリアテープ。
1. A carrier tape having a plurality of storage recesses for storing electronic components in a length direction, wherein an inner peripheral surface of the storage recess is formed substantially perpendicular to a bottom surface,
A tapered surface that supports a bottom peripheral edge of the electronic component is formed below the inner peripheral surface, and an inner peripheral surface corner of the storage recess is formed substantially perpendicular to the bottom surface, and a bottom surface corner of the electronic component is formed. A carrier tape configured to prevent interference between the carrier tape and the tapered surface.
JP13611399A 1999-05-17 1999-05-17 Carrier tape Expired - Lifetime JP3247662B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13611399A JP3247662B2 (en) 1999-05-17 1999-05-17 Carrier tape

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13611399A JP3247662B2 (en) 1999-05-17 1999-05-17 Carrier tape

Publications (2)

Publication Number Publication Date
JP2000327025A true JP2000327025A (en) 2000-11-28
JP3247662B2 JP3247662B2 (en) 2002-01-21

Family

ID=15167610

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13611399A Expired - Lifetime JP3247662B2 (en) 1999-05-17 1999-05-17 Carrier tape

Country Status (1)

Country Link
JP (1) JP3247662B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004224405A (en) * 2003-01-24 2004-08-12 Sumitomo Bakelite Co Ltd Embossed carrier tape
US6981595B2 (en) 2002-05-01 2006-01-03 Entegris, Inc. Carrier tape for electronic components
US10384860B2 (en) * 2016-07-27 2019-08-20 Taiyo Yuden Co., Ltd. Carrier tape for electronic component storage tape, electronic component storage tape, and method for manufacturing electronic component storage tape

Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0123389B2 (en) * 1986-10-25 1989-05-02 Kawashima Hiroyuki
JPH0520302B2 (en) * 1985-03-19 1993-03-19 Murata Manufacturing Co
JPH07112785A (en) * 1993-10-15 1995-05-02 Rh Murphy Co Inc Tray for ball terminal integrated circuit
JP2514030Y2 (en) * 1990-11-30 1996-10-16 信越化学工業株式会社 Chip tray
JPH09124092A (en) * 1995-10-31 1997-05-13 Yayoi Kk Electronic component carrier
JP2632084B2 (en) * 1990-11-26 1997-07-16 三菱電機株式会社 Emboss type carrier tape
JPH10120077A (en) * 1996-10-18 1998-05-12 Shin Etsu Polymer Co Ltd Carrier tape and mold assembly for forming carrier tape
JPH10139090A (en) * 1996-11-12 1998-05-26 Yayoi Kk Package of parts
JPH10208769A (en) * 1997-01-23 1998-08-07 Furukawa Battery Co Ltd:The Sealed square battery and manufacture thereof
JP2862203B2 (en) * 1994-06-28 1999-03-03 信越ポリマー株式会社 Carrier tape for BGA package
JPH11105920A (en) * 1997-10-03 1999-04-20 Shin Etsu Polymer Co Ltd Carrier tape
JPH11115963A (en) * 1997-10-13 1999-04-27 Ricoh Co Ltd Thermal expansion/contraction carrier tape, and taping method
JPH11152164A (en) * 1997-11-19 1999-06-08 Fujitsu Ltd Emboss-carrier type taping, emboss-carrier tape and packaging method for semiconductor device
JPH11227871A (en) * 1998-02-13 1999-08-24 Ricoh Co Ltd Carrier tape

Patent Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0520302B2 (en) * 1985-03-19 1993-03-19 Murata Manufacturing Co
JPH0123389B2 (en) * 1986-10-25 1989-05-02 Kawashima Hiroyuki
JP2632084B2 (en) * 1990-11-26 1997-07-16 三菱電機株式会社 Emboss type carrier tape
JP2514030Y2 (en) * 1990-11-30 1996-10-16 信越化学工業株式会社 Chip tray
JPH07112785A (en) * 1993-10-15 1995-05-02 Rh Murphy Co Inc Tray for ball terminal integrated circuit
JP2862203B2 (en) * 1994-06-28 1999-03-03 信越ポリマー株式会社 Carrier tape for BGA package
JPH09124092A (en) * 1995-10-31 1997-05-13 Yayoi Kk Electronic component carrier
JPH10120077A (en) * 1996-10-18 1998-05-12 Shin Etsu Polymer Co Ltd Carrier tape and mold assembly for forming carrier tape
JPH10139090A (en) * 1996-11-12 1998-05-26 Yayoi Kk Package of parts
JPH10208769A (en) * 1997-01-23 1998-08-07 Furukawa Battery Co Ltd:The Sealed square battery and manufacture thereof
JPH11105920A (en) * 1997-10-03 1999-04-20 Shin Etsu Polymer Co Ltd Carrier tape
JPH11115963A (en) * 1997-10-13 1999-04-27 Ricoh Co Ltd Thermal expansion/contraction carrier tape, and taping method
JPH11152164A (en) * 1997-11-19 1999-06-08 Fujitsu Ltd Emboss-carrier type taping, emboss-carrier tape and packaging method for semiconductor device
JPH11227871A (en) * 1998-02-13 1999-08-24 Ricoh Co Ltd Carrier tape

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6981595B2 (en) 2002-05-01 2006-01-03 Entegris, Inc. Carrier tape for electronic components
JP2004224405A (en) * 2003-01-24 2004-08-12 Sumitomo Bakelite Co Ltd Embossed carrier tape
US10384860B2 (en) * 2016-07-27 2019-08-20 Taiyo Yuden Co., Ltd. Carrier tape for electronic component storage tape, electronic component storage tape, and method for manufacturing electronic component storage tape

Also Published As

Publication number Publication date
JP3247662B2 (en) 2002-01-21

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