JP2966354B2 - Semiconductor device mounting method - Google Patents
Semiconductor device mounting methodInfo
- Publication number
- JP2966354B2 JP2966354B2 JP8234886A JP23488696A JP2966354B2 JP 2966354 B2 JP2966354 B2 JP 2966354B2 JP 8234886 A JP8234886 A JP 8234886A JP 23488696 A JP23488696 A JP 23488696A JP 2966354 B2 JP2966354 B2 JP 2966354B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- insulating resin
- resin
- circuit board
- curing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Description
【0001】[0001]
【発明の属する技術分野】本発明は、フェースダウン
(表面実装)で回路基板上に半導体装置を実装する際の
半導体装置の実装方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device mounting method for mounting a semiconductor device on a circuit board face down (surface mounting).
【0002】[0002]
【従来の技術】近年の電子機器の小型化や薄型化などに
伴い、LSIチップの高速化、高集積化、多ピン化と同
時に、LSIチップを高密度に回路基板に実装するため
の高密度実装技術が進んできている。そのため、LSI
チップのパッケージもさまざまな形状や構造が提案され
ている(日経エレクトロニクス1993年8−2号n
o.587掲載『LSIパッケージ最前線高密度実装を
後押し』P93〜99)。フェ−スダウン(表面実装の
一種)による実装方法もそのうちの一つである。2. Description of the Related Art As electronic devices have become smaller and thinner in recent years, the speed of LSI chips, the degree of integration, and the number of pins have been increased. Packaging technology has advanced. Therefore, LSI
Various shapes and structures have also been proposed for chip packages (Nikkei Electronics 1993 No. 8-2 n
o. 587, “Pushing the Leading Edge in High Density Packaging of LSI Packages”, pp. 93-99 A mounting method using face down (a type of surface mounting) is one of them.
【0003】以下、従来のフェ−スダウン実装による半
導体装置の実装方法について説明する。フェ−スダウン
実装とは、回路基板上に半導体装置の突起電極を下向き
に実装する実装方法であり、その従来のフェ−スダウン
実装により、実際に回路基板上に半導体装置を実装して
いる様子を示しているのが、図9、10、11及び12
である。従来、半導体装置の回路基板上への実装には半
田付けがよく利用されていたが、近年、半導体装置のパ
ッケージの小型化と接続端子数の増加により、接続端子
間隔が狭くなり、従来の半田付け技術で対処することが
次第に困難になってきた。そこで、最近では裸の半導体
装置を回路基板上に直付けして実装面積の小型化と効率
的使用を図ろうとする方法が考案されてきた。なかで
も、有効な方法であるとされているのは、半導体装置を
回路基板に接続するに際し、あらかじめ半導体装置の電
極パッド上に密着金属や拡散防止金属の蒸着膜を形成
し、更にその上にメッキにより半田層を形成しておき、
このような電極構造を備えた半導体装置を下向きにし
て、高温に加熱して半田を回路基板の端子電極に融着す
るという実装方法である。この実装方法によれば、接続
後の機械的強度が強く、接続が一括にできる。(例え
ば、工業調査会、1980年1月15日発行、日本マイ
クロエレクトロニクス協会編、『IC化実装技術』) 以下図面を参照しながら、半田突起電極を有する半導体
装置を回路基板の端子電極へ実装する、上述した従来の
実装方法の具体例について説明する。従来例として、図
9、10、11及び12は半田突起電極を有する半導体
装置を回路基板へフェ−スダウン実装する際の実装方法
を示す概略断面図である。図9、10、11及び12に
おいて、1は端子電極、2は回路基板、4は半導体装
置、6は封止樹脂、7はパッド電極、8は封止樹脂中の
フィラー、13は突起電極(半田)である。A method of mounting a semiconductor device by conventional face-down mounting will be described below. The face-down mounting is a mounting method of mounting the protruding electrodes of the semiconductor device downward on the circuit board. The state in which the semiconductor device is actually mounted on the circuit board by the conventional face-down mounting. Shown in FIGS. 9, 10, 11 and 12
It is. Conventionally, soldering has often been used for mounting a semiconductor device on a circuit board, but in recent years, with the miniaturization of the package of the semiconductor device and the increase in the number of connection terminals, the interval between the connection terminals has been narrowed, and the conventional soldering has been performed. It has become increasingly difficult to deal with mounting techniques. Therefore, recently, a method has been devised in which a bare semiconductor device is directly mounted on a circuit board to reduce the mounting area and use the device efficiently. Among them, the most effective method is that when connecting a semiconductor device to a circuit board, an adhesion metal or a diffusion-prevention metal vapor deposition film is formed on the electrode pads of the semiconductor device in advance, and further thereon. A solder layer is formed by plating,
This is a mounting method in which a semiconductor device having such an electrode structure is turned downward and heated to a high temperature to fuse solder to terminal electrodes of a circuit board. According to this mounting method, the mechanical strength after connection is strong, and connection can be performed collectively. (For example, Industrial Research Council, published on January 15, 1980, Japan Microelectronics Association, "IC mounting technology") A semiconductor device having a solder bump electrode is mounted on a terminal electrode of a circuit board with reference to the drawings below. A specific example of the above-described conventional mounting method will be described. As a conventional example, FIGS. 9, 10, 11 and 12 are schematic cross-sectional views showing a mounting method when a semiconductor device having a solder bump electrode is mounted on a circuit board by face-down mounting. 9, 10, 11 and 12, 1 is a terminal electrode, 2 is a circuit board, 4 is a semiconductor device, 6 is a sealing resin, 7 is a pad electrode, 8 is a filler in the sealing resin, and 13 is a projection electrode ( Solder).
【0004】以上のように構成された従来の半田突起電
極を有する半導体装置の実装方法について、図9、1
0、11及び12を用いて、以下その概略を説明する。
図9のように半導体装置4のパッド電極7上に半田突起
電極13を形成し、その半田突起電極13が図10のよ
うに、回路基板2上に形成された端子電極1の所定の位
置と重なり合うようにフェースダウンで半導体装置4を
載置する。その後、図11のように、200〜300℃
の高温に加熱することにより半田突起電極13を溶融さ
せて端子電極1に融着したのち、図12のように、半導
体装置4と回路基板2との間を、封止樹脂6で封止し、
硬化させることで半導体装置の実装体が得られる。A method of mounting a conventional semiconductor device having solder bump electrodes configured as described above will be described with reference to FIGS.
The outline will be described below with reference to 0, 11, and 12.
A solder bump 13 is formed on the pad electrode 7 of the semiconductor device 4 as shown in FIG. 9, and the solder bump 13 is positioned at a predetermined position on the terminal electrode 1 formed on the circuit board 2 as shown in FIG. The semiconductor device 4 is placed face down so as to overlap. Thereafter, as shown in FIG.
After the solder protruding electrode 13 is melted by heating to a high temperature to be fused to the terminal electrode 1, the space between the semiconductor device 4 and the circuit board 2 is sealed with a sealing resin 6 as shown in FIG. ,
By curing, a package of the semiconductor device is obtained.
【0005】[0005]
【発明が解決しようとする課題】しかしながら上記のよ
うな半導体装置の実装方法においては、以下のような課
題を有している。 1.高温に加熱して半田を溶融して回路基板の端子電極
と接続する際に、熱膨張係数の大きな回路基板を用いる
と、接合部に応力が発生し、品質の劣化を招く。 2.半導体装置に欠陥が発生した場合に、回路基板から
半導体装置を取り外すために、かなりの高温加熱が必要
であり、容易に取り外すことができない。However, the above-described method for mounting a semiconductor device has the following problems. 1. When a circuit board having a large coefficient of thermal expansion is used when the solder is melted by heating to a high temperature and connected to a terminal electrode of the circuit board, stress is generated at a joint portion, and quality is deteriorated. 2. When a defect occurs in a semiconductor device, considerable high-temperature heating is required to remove the semiconductor device from the circuit board, and the semiconductor device cannot be easily removed.
【0006】上記従来の課題を解決する半導体の実装方
法として、突起電極を2段突起形状又は実質的に凸状に
した上で、その突起電極に導電性及び熱可塑性を有する
樹脂接着剤を付着させ、その導電性樹脂接着剤を硬化さ
せることにより、半導体装置の突起電極と回路基板の端
子電極とを接続する方法がある。しかしながら、この方
法によれば、半田を接続に用いるために起こる上記課題
は解決されるものの、導電性樹脂接着剤を接続に用いる
ために、半導体装置の突起電極と回路基板の端子電極と
の接続部分の機械的強度が弱く、そのために接続状態検
査時等において接続部分がゆがむ等の弊害が生じてい
た。As a semiconductor mounting method for solving the above-mentioned conventional problems, a projecting electrode is formed into a two-step projecting shape or a substantially projecting shape, and a conductive and thermoplastic resin adhesive is attached to the projecting electrode. Then, there is a method of connecting the protruding electrode of the semiconductor device and the terminal electrode of the circuit board by curing the conductive resin adhesive. However, according to this method, although the above-mentioned problem caused by using solder for connection is solved, since the conductive resin adhesive is used for connection, the connection between the projecting electrode of the semiconductor device and the terminal electrode of the circuit board is performed. The mechanical strength of the portion is weak, which causes a problem such as distortion of the connection portion during a connection state inspection or the like.
【0007】本発明は上記課題を解決するものであり、
半導体装置と回路基板との接続後の機械的強度を強く
し、半導体装置と回路基板との接続及び回路基板からの
半導体装置の取り外しを容易にし、且つその品質を向上
させる半導体装置の実装方法を提供することを目的とす
るものである。The present invention has been made to solve the above problems, and
A method of mounting a semiconductor device that enhances mechanical strength after connection between a semiconductor device and a circuit board, facilitates connection between the semiconductor device and the circuit board, and removal of the semiconductor device from the circuit board, and improves quality thereof. It is intended to provide.
【0008】[0008]
【課題を解決するための手段】上述の課題を解決するた
めに、本発明にかかる半導体装置の実装方法は、半導体
装置の突起電極に導電性樹脂接着剤を付着させる接着剤
付着工程と、前記半導体装置の突起電極以外の一部及び
/又は回路基板の端子電極以外の一部に第1の絶縁性樹
脂を付着させる第1絶縁性樹脂付着工程と、前記半導体
装置及び/又は前記回路基板に付着された前記第1の絶
縁性樹脂及び前記導電性樹脂接着剤を介して、前記半導
体装置の突起電極部と前記回路基板の端子電極とが重な
るように、前記半導体装置と前記回路基板とを接合する
接合工程と、前記第1の絶縁性樹脂を硬化させる第1絶
縁性樹脂硬化工程と、前記導電性樹脂接着剤を硬化させ
る接着剤硬化工程とを備え、これらを組み合わせて行う
構成としたものである。In order to solve the above-mentioned problems, a method of mounting a semiconductor device according to the present invention comprises the steps of: adhering a conductive resin adhesive to a protruding electrode of a semiconductor device; A first insulating resin attaching step of attaching a first insulating resin to a part other than the protruding electrodes of the semiconductor device and / or a part other than the terminal electrodes of the circuit board, and to the semiconductor device and / or the circuit board. The semiconductor device and the circuit board are overlapped with each other via the attached first insulating resin and the conductive resin adhesive such that the protruding electrode portion of the semiconductor device and the terminal electrode of the circuit board overlap. A joining step of joining, a first insulating resin curing step of curing the first insulating resin, and an adhesive curing step of curing the conductive resin adhesive, which are performed in combination. In things That.
【0009】又、前記半導体装置及び/又は前記回路基
板の隙間の残部に封止樹脂として第2の絶縁性樹脂を充
填し、その第2の絶縁性樹脂を硬化させる封止硬化工程
を有するとしてもよい。Further, it is assumed that the semiconductor device and / or the remaining portion of the gap between the circuit boards have a sealing and curing step of filling a second insulating resin as a sealing resin and curing the second insulating resin. Is also good.
【0010】又、前記導電性樹脂接着剤は、溶剤型の熱
可塑性樹脂を含むとしてもよい。The conductive resin adhesive may contain a solvent type thermoplastic resin.
【0011】又、前記第1の絶縁性樹脂は、複数の海綿
状の孔を有するとしてもよい。Further, the first insulating resin may have a plurality of spongy holes.
【0012】又、前記第1の絶縁性樹脂は、溶剤型の熱
可塑性樹脂であるとしもよい。Further, the first insulating resin may be a solvent type thermoplastic resin.
【0013】又、前記第1の絶縁性樹脂は、その第1の
絶縁性樹脂中の溶剤が抜ける際に硬化収縮するとしても
よい。Further, the first insulating resin may be cured and shrunk when a solvent in the first insulating resin is removed.
【0014】又、前記第1の絶縁性樹脂を硬化する際
に、回路基板又は半導体装置の少なくとも一方を加熱す
るとしてもよい。Further, at the time of curing the first insulating resin, at least one of the circuit board and the semiconductor device may be heated.
【0015】又、突起電極及び前記端子電極は、それぞ
れ前記半導体装置及び前記回路基板の外周部に設けられ
ており、前記第1の絶縁性樹脂は前記半導体装置の複数
の前記突起電極及び/又は前記回路基板の複数の前記端
子電極の内側に付着されるとしてもよい。[0015] The projection electrode and the terminal electrode are provided on the outer periphery of the semiconductor device and the circuit board, respectively, and the first insulating resin is formed of a plurality of the projection electrodes and / or the semiconductor device. The circuit board may be attached inside the plurality of terminal electrodes.
【0016】又、半導体装置と回路基板との間を封止す
る際に、第2の絶縁性樹脂が、前記第1の絶縁性樹脂の
複数の海綿状の孔にしみ込み、充填されるとしてもよ
い。Also, when sealing between the semiconductor device and the circuit board, it is assumed that the second insulating resin penetrates and fills the plurality of spongy holes of the first insulating resin. Is also good.
【0017】又、前記第1の絶縁性樹脂は溶剤型の熱可
塑性樹脂であり、前記導電性樹脂接着剤は溶剤型の熱可
塑性樹脂であり、前記第1の絶縁性樹脂に含まれる溶剤
の沸点は、前記導電性樹脂接着剤に含まれる溶剤の沸点
よりも低いとしてもよい。Further, the first insulating resin is a solvent-type thermoplastic resin, the conductive resin adhesive is a solvent-type thermoplastic resin, and the solvent contained in the first insulating resin is The boiling point may be lower than the boiling point of the solvent contained in the conductive resin adhesive.
【0018】又、前記第1の絶縁性樹脂の軟化点は、前
記導電性樹脂接着剤に含まれる熱可塑性樹脂の軟化点よ
りも高く、前記第2の絶縁性樹脂の軟化点よりも低いと
してもよい。The softening point of the first insulating resin is higher than the softening point of the thermoplastic resin contained in the conductive resin adhesive, and lower than the softening point of the second insulating resin. Is also good.
【0019】又、前記第2の絶縁性樹脂は充填剤を含
み、その充填剤の粒径は前記海綿状の孔径よりも大きい
としてもよい。Further, the second insulating resin may include a filler, and the particle diameter of the filler may be larger than the spongy pore diameter.
【0020】又、前記第1の絶縁性樹脂は、前記第1の
絶縁性樹脂の硬化後の熱膨張係数が前記封止樹脂の硬化
後の熱膨張係数と実質的に等しくなるような充填剤を更
に含むとしてもよい。[0020] The first insulating resin is a filler such that the thermal expansion coefficient of the first insulating resin after curing is substantially equal to the thermal expansion coefficient of the sealing resin after curing. May be further included.
【0021】又、前記第2の絶縁性樹脂には、前記第1
の絶縁性樹脂の硬化用の触媒が充填されているとしても
よい。The second insulating resin has the first insulating resin.
May be filled with a catalyst for curing the insulating resin.
【0022】又、前記触媒は、固形又は液体であるとし
てもよい。Further, the catalyst may be a solid or a liquid.
【0023】又、前記固形の触媒の粒径は、前記海綿状
の孔径よりも小さいとしてもよい。The solid catalyst may have a particle size smaller than the spongy pore size.
【0024】又、前記第2の絶縁性樹脂には、前記第1
の絶縁性樹脂の硬化用の硬化剤が充填されているとして
もよい。The second insulating resin has the first insulating resin.
It may be filled with a curing agent for curing the insulating resin.
【0025】又、前記半導体装置の前記突起電極は、2
段突起形状又は実質的に凸状であるとしてもよい。Further, the protruding electrode of the semiconductor device has 2
It may have a stepped shape or a substantially convex shape.
【0026】又、前記第1の絶縁性樹脂が前記第1絶縁
性樹脂硬化工程により硬化された形状は、つづみ型又は
太鼓型であるとしてもよい。Further, the shape obtained by curing the first insulating resin in the first insulating resin curing step may be a continuous type or a drum type.
【0027】[0027]
【発明の実施の形態】以下、本発明の実施の形態を図面
を参照しながら説明する。 (実施の形態1)以下、本発明の第1の実施の形態であ
る半導体装置の実装方法を実施するための構成について
説明する。図1、2、3、4及び5は、本実施の形態で
ある半導体装置の実装方法を実施するための構成に関す
る概略断面図である。図1、2、3、4及び5に示すよ
うに、1は端子電極、2は回路基板、3は接合層、4は
半導体装置、5は突起電極、6は封止樹脂、7はパッド
電極、8は封止樹脂中のフィラー、9は補強層、10は
補強層中のフィラー、11は海綿状の孔、12は封止樹
脂の樹脂成分,14は導電性接着剤の転写膜である。Embodiments of the present invention will be described below with reference to the drawings. (Embodiment 1) Hereinafter, a configuration for implementing a semiconductor device mounting method according to a first embodiment of the present invention will be described. FIGS. 1, 2, 3, 4, and 5 are schematic cross-sectional views related to a configuration for implementing the semiconductor device mounting method according to the present embodiment. As shown in FIGS. 1, 2, 3, 4 and 5, 1 is a terminal electrode, 2 is a circuit board, 3 is a bonding layer, 4 is a semiconductor device, 5 is a protruding electrode, 6 is a sealing resin, and 7 is a pad electrode. Reference numeral 8 denotes a filler in the sealing resin, 9 denotes a reinforcing layer, 10 denotes a filler in the reinforcing layer, 11 denotes a spongy hole, 12 denotes a resin component of the sealing resin, and 14 denotes a conductive adhesive transfer film. .
【0028】以上のように構成された半導体装置の実装
方法について説明する。図1のように、半導体装置4の
複数のパッド電極7の各々に突起電極5を形成する。図
1のように2段突起形状の突起電極を使用することによ
り、図2のように接合層として導電性接着剤を用いる際
において、接合層の横方向への広がりを抑制することが
できるため、実装密度の大幅な向上を図ることができ
る。A method of mounting the semiconductor device configured as described above will be described. As shown in FIG. 1, the protruding electrode 5 is formed on each of the plurality of pad electrodes 7 of the semiconductor device 4. By using the two-step projection electrode as shown in FIG. 1, when the conductive adhesive is used as the bonding layer as shown in FIG. 2, the spreading of the bonding layer in the lateral direction can be suppressed. Thus, the mounting density can be greatly improved.
【0029】次に、図2のように、半導体装置4の突起
電極5の形成側を下方に向けた状態で、接合層3として
導電性接着剤の転写膜に下降させ、突起電極5を導電性
接着剤中に浸漬した後、半導体装置4を上方に引き上
げ、各突起電極5の先端付近に接合層3である導電性接
着剤を一括して転写形成する。Next, as shown in FIG. 2, with the formation side of the protruding electrode 5 of the semiconductor device 4 facing downward, the semiconductor device 4 is lowered to a transfer film of a conductive adhesive as the bonding layer 3, and the protruding electrode 5 is made conductive. After being immersed in the conductive adhesive, the semiconductor device 4 is lifted upward, and the conductive adhesive as the bonding layer 3 is collectively transferred to the vicinity of the tip of each protruding electrode 5.
【0030】次に、図3のように、半導体装置4の中心
付近に熱可塑性を有する第1の絶縁性樹脂を用いて補強
層9を形成する。Next, as shown in FIG. 3, a reinforcing layer 9 is formed near the center of the semiconductor device 4 using a first insulating resin having thermoplasticity.
【0031】次に、図4のように、接合層3によって半
導体装置4の突起電極5と回路基板2の端子電極1とが
電気的に接続されるように、即ち半導体装置4の突起電
極5が回路基板2の端子電極1の所定の位置と重なり合
うようにフェースダウンで載置した後、補強層9の硬化
温度で加熱して補強層9を硬化させ、半導体装置4と回
路基板2とを機械的に補強する。この補強層9は、加熱
されることにより溶剤が抜ける際に、硬化収縮し、半導
体装置4と回路基板2とをより一層、機械的に補強す
る。更に、硬化する際に、補強層9内には海綿状の孔1
1が形成される。この状態において半導体装置4の接続
状態の検査を行い、電気的な接続状態が不良であれば、
半導体装置4の交換を行うことができる。半導体装置4
の交換は、補強層9の強度が小さい時は、常温で行うこ
とができ、強度が大きい時は、数十度〜百数十度で加熱
した後、軟化させて取り外すことができる。Next, as shown in FIG. 4, the projecting electrode 5 of the semiconductor device 4 is electrically connected to the terminal electrode 1 of the circuit board 2 by the bonding layer 3, that is, the projecting electrode 5 of the semiconductor device 4 is formed. Is placed face-down so as to overlap a predetermined position of the terminal electrode 1 of the circuit board 2, and then heated at the curing temperature of the reinforcing layer 9 to cure the reinforcing layer 9, and the semiconductor device 4 and the circuit board 2 are separated from each other. Reinforce mechanically. When the solvent is removed by heating, the reinforcing layer 9 cures and contracts, thereby further mechanically reinforcing the semiconductor device 4 and the circuit board 2. Further, when hardened, spongy holes 1 are formed in the reinforcing layer 9.
1 is formed. In this state, the connection state of the semiconductor device 4 is inspected, and if the electric connection state is poor,
The semiconductor device 4 can be replaced. Semiconductor device 4
When the strength of the reinforcing layer 9 is low, the replacement can be performed at room temperature. When the strength is high, the reinforcing layer 9 can be heated at several tens to hundreds of tens of degrees, then softened and removed.
【0032】又、補強層9を硬化させた後に、さらに接
合層3の硬化温度で加熱して、半導体装置4の突起電極
5と回路基板2の端子電極1との電気的な接続を向上さ
せた後に半導体装置4の接続状態の検査を行ってもよ
い。After the reinforcing layer 9 is cured, the bonding layer 3 is further heated at the curing temperature to improve the electrical connection between the protruding electrodes 5 of the semiconductor device 4 and the terminal electrodes 1 of the circuit board 2. After that, the connection state of the semiconductor device 4 may be inspected.
【0033】次に、図5のように、半導体装置4と回路
基板2との間の残部を第2の絶縁性樹脂からなる封止樹
脂6で充填する。このとき、封止樹脂6の樹脂成分12
が海綿状の孔11に充填される。次に封止樹脂6及び海
綿状の孔11にしみ込んだ封止樹脂6の樹脂成分12を
加熱し硬化させる。この時、半導体装置4の最終の接続
状態の検査を行ってもよい。Next, as shown in FIG. 5, the remaining portion between the semiconductor device 4 and the circuit board 2 is filled with a sealing resin 6 made of a second insulating resin. At this time, the resin component 12 of the sealing resin 6
Is filled in the spongy hole 11. Next, the sealing resin 6 and the resin component 12 of the sealing resin 6 penetrating into the spongy holes 11 are heated and cured. At this time, the final connection state of the semiconductor device 4 may be inspected.
【0034】以上のように、半導体装置4と回路基板2
とを接合層3、補強層9及び封止樹脂6により機械的に
接合することで半導体装置の実装体を得られる。As described above, the semiconductor device 4 and the circuit board 2
Are mechanically joined to each other by the bonding layer 3, the reinforcing layer 9, and the sealing resin 6, thereby obtaining a semiconductor device package.
【0035】以上から明らかなように、本実施の形態に
よれば、第1の絶縁性樹脂を用いた補強層9を設けるこ
とにより、半導体装置の突起電極と回路基板の端子電極
との電気的な接続を機械的に補強することができ、又、
封止する前の検査時に半導体装置を容易に交換すること
ができ、更にその検査によって接続部近傍がゆがむとい
った弊害もなくなる。又、第1の絶縁性樹脂の海綿状の
孔に絶縁性の封止樹脂が充填されることによって最終的
な構造は従来の封止樹脂のみで封止したものと同等の特
性を得ることができる。As is apparent from the above, according to the present embodiment, by providing the reinforcing layer 9 using the first insulating resin, the electrical connection between the protruding electrodes of the semiconductor device and the terminal electrodes of the circuit board is achieved. Connection can be mechanically reinforced,
The semiconductor device can be easily replaced at the time of the inspection before the sealing, and the adverse effect that the vicinity of the connection portion is distorted by the inspection is also eliminated. Also, by filling the spongy holes of the first insulating resin with the insulating sealing resin, the final structure can obtain the same characteristics as those obtained by sealing with the conventional sealing resin alone. it can.
【0036】尚、図1において、突起電極5の形状は2
段突起形状又は凸状をしていることが望ましい。突起電
極5の材質は金が望ましいが、他の金属により形成して
もよい。例えば半田や銅などでもよい。又、この突起電
極5は金ワイヤーを用いてワイヤーボンディング法によ
って或いはメッキ法によって形成することができる。In FIG. 1, the shape of the projecting electrode 5 is 2
It is desirable to have a stepped or convex shape. The material of the protruding electrode 5 is preferably gold, but may be formed of another metal. For example, solder or copper may be used. The protruding electrode 5 can be formed by a wire bonding method using a gold wire or a plating method.
【0037】又、図2において、接合層3である導電性
接着剤の材質はエポキシ系、ポリアリルエーテル系、ポ
リアミド系、ポリエステル系、ポリイミド系等、熱可塑
性を有するものであれば材質は問わない。又、導電性接
着剤に含まれる導電粉の材質としては、一般に用いられ
ているものであれば何でも良く、例えば、銀、金、パラ
ジウム等の貴金属粉、ニッケル、銅等の卑金属、はん
だ、銀パラジウム等の合金粉、銀メッキ銅粉等のような
複合粉、さらにカーボンのような導電性を有する非金属
粉等が使用できる。これらの導電粉は単独でも2種類以
上の混合でも使用可能である。又、これら導電粉はその
粒径、形状は特に限定されるものではない。In FIG. 2, the material of the conductive adhesive as the bonding layer 3 is not limited as long as it has thermoplasticity, such as epoxy, polyallyl ether, polyamide, polyester, and polyimide. Absent. Further, as the material of the conductive powder contained in the conductive adhesive, any material may be used as long as it is generally used. An alloy powder such as palladium, a composite powder such as silver-plated copper powder, and a non-metallic powder having conductivity such as carbon can be used. These conductive powders can be used alone or in combination of two or more. The particle size and shape of these conductive powders are not particularly limited.
【0038】又、図3において、補強層9はシリンジノ
ズル等ポッティング供給可能なものであればよい。補強
層9の材質は、エポキシ系、ポリアリルエーテル系、ポ
リアミド系、ポリエステル系、ポリイミド系等、熱可塑
性を有するものであればよい。又、補強層9に含まれる
充填剤はヒューズドシリカ(溶融シリカ)等の絶縁性で
低熱膨張なものが望ましい。粒径は、50μm以下の粉
体であれば特に構わない。充填量は封止樹脂の熱膨張係
数を考慮して決められる。In FIG. 3, the reinforcing layer 9 may be a syringe nozzle or the like that can supply potting. The material of the reinforcing layer 9 may be any material having thermoplasticity, such as epoxy, polyallyl ether, polyamide, polyester, and polyimide. The filler contained in the reinforcing layer 9 is desirably an insulating and low thermal expansion material such as fused silica (fused silica). The particle size is not particularly limited as long as the powder is 50 μm or less. The filling amount is determined in consideration of the thermal expansion coefficient of the sealing resin.
【0039】又、図4において、補強層9の硬化温度は
接合層3の硬化温度より低いことが望ましい。In FIG. 4, the curing temperature of the reinforcing layer 9 is desirably lower than the curing temperature of the bonding layer 3.
【0040】又、図5において、封止樹脂6は、室温程
度の低温でも半導体装置4と回路基板2との間隙への注
入が速やかに行われるため、低粘度で低チクソトロピー
指数のものが望ましい。封止樹脂6の材質は、一般に用
いられているものであれば何でも良く、例えば、クレゾ
ールノボラック型エポキシ樹脂とノボラック型フェノー
ル樹脂等と充填剤を混合したものや、ポリエポキシド
(通常エポキシ樹脂又はエポキシ化合物)と酸無水物樹
脂(メチルテトラハイドロフタル酸無水物、メチルヘキ
サハイドロフタル酸無水物等の環状脂肪族系)と充填剤
を混合したものからなるものがある。又、封止樹脂6中
の充填剤は粒径が50μm以下の粉体であれば構わない
が、シリカ、アルミナ等の酸化化合物や窒化アルミ等の
窒化化合物、炭化珪素等の炭化化合物、硅化化合物等、
熱的に安定で低熱膨張率のものが望ましい。 (実施の形態2)以下、本発明の第2の実施の形態であ
る半導体装置の実装方法を実施するための構成について
説明する。図1、2、4、5及び6は、本実施の形態で
ある半導体装置の実装方法を実施するための構成に関す
る概略断面図である。図1、2、4、5及び6に示すよ
うに、1は端子電極、2は回路基板、3は接合層、4は
半導体装置、5は突起電極、6は封止樹脂、7はパッド
電極、8は封止樹脂中のフィラー、9は補強層、10は
補強層中のフィラー、11は海綿状の孔、12は封止樹
脂の樹脂成分である。In FIG. 5, since the sealing resin 6 is quickly injected into the gap between the semiconductor device 4 and the circuit board 2 even at a low temperature of about room temperature, it is desirable that the sealing resin 6 has a low viscosity and a low thixotropy index. . The material of the sealing resin 6 may be any material as long as it is generally used. For example, a material obtained by mixing a filler with a cresol novolak type epoxy resin and a novolak type phenol resin, or a polyepoxide (usually an epoxy resin or an epoxy compound ), An acid anhydride resin (cyclic aliphatic system such as methyltetrahydrophthalic anhydride, methylhexahydrophthalic anhydride, etc.) and a filler. The filler in the sealing resin 6 may be a powder having a particle size of 50 μm or less, but may be an oxide compound such as silica or alumina, a nitride compound such as aluminum nitride, a carbide compound such as silicon carbide, or a silicide compound. etc,
It is desirable that the material be thermally stable and have a low coefficient of thermal expansion. (Embodiment 2) Hereinafter, a configuration for implementing a semiconductor device mounting method according to a second embodiment of the present invention will be described. 1, 2, 4, 5, and 6 are schematic cross-sectional views related to a configuration for implementing the semiconductor device mounting method according to the present embodiment. As shown in FIGS. 1, 2, 4, 5, and 6, 1 is a terminal electrode, 2 is a circuit board, 3 is a bonding layer, 4 is a semiconductor device, 5 is a protruding electrode, 6 is a sealing resin, and 7 is a pad electrode. , 8 is a filler in the sealing resin, 9 is a reinforcing layer, 10 is a filler in the reinforcing layer, 11 is a spongy hole, and 12 is a resin component of the sealing resin.
【0041】以上のように構成された半導体装置の実装
方法の上記実施の形態1と異なる箇所について説明す
る。補強層9を形成するもう一つの方法として、図6の
ように、半導体装置4の中心と対応する回路基板2の中
心付近に第1の絶縁性樹脂を付着させて補強層9を形成
する。この補強層9はシリンジノズル等ポッティング供
給可能なものであればよい。他は上記実施の形態1と同
様の条件で、半導体装置4を回路基板2に実装する。A description will be given of a part of the method for mounting the semiconductor device configured as described above, which is different from the first embodiment. As another method of forming the reinforcing layer 9, as shown in FIG. 6, a first insulating resin is attached near the center of the circuit board 2 corresponding to the center of the semiconductor device 4 to form the reinforcing layer 9. The reinforcing layer 9 may be any one that can supply potting, such as a syringe nozzle. Otherwise, the semiconductor device 4 is mounted on the circuit board 2 under the same conditions as in the first embodiment.
【0042】以上のように、本実施の形態によれば、第
1の絶縁性樹脂を半導体装置4の中心ではなくその中心
と対応する位置にある回路基板2上の部分に付着させて
補強層9を形成し、上記実施の形態1と同様の効果が得
られる。 (実施の形態3)以下、本発明の第3の実施の形態であ
る半導体装置の実装方法を実施するための構成について
説明する。図7及び8は、本実施の形態である半導体装
置の実装方法を実施するための構成に関する概略断面図
である。図1及び2に示すように、1は端子電極、2は
回路基板、3は接合層、4は半導体装置、5は突起電
極、6は封止樹脂、8は封止樹脂中のフィラー、9は補
強層、10は補強層中のフィラー、11は海綿状の孔、
12は封止樹脂の樹脂成分である。As described above, according to the present embodiment, the first insulating resin is attached not to the center of the semiconductor device 4 but to the portion on the circuit board 2 corresponding to the center of the semiconductor device 4, thereby forming the reinforcing layer. 9, the same effect as in the first embodiment can be obtained. (Embodiment 3) Hereinafter, a configuration for implementing a semiconductor device mounting method according to a third embodiment of the present invention will be described. 7 and 8 are schematic cross-sectional views related to a configuration for implementing the semiconductor device mounting method according to the present embodiment. As shown in FIGS. 1 and 2, 1 is a terminal electrode, 2 is a circuit board, 3 is a bonding layer, 4 is a semiconductor device, 5 is a protruding electrode, 6 is a sealing resin, 8 is a filler in the sealing resin, 9 Is a reinforcing layer, 10 is a filler in the reinforcing layer, 11 is a spongy hole,
Reference numeral 12 denotes a resin component of the sealing resin.
【0043】以上のように構成された半導体装置の実装
方法について説明する。実施の形態1又は実施の形態2
の図4及び5において、接合層3によって半導体装置4
の突起電極5と回路基板2の端子電極1とを電気的に接
続するように、すなわち半導体装置4の突起電極5を、
回路基板2上の端子電極1の所定の位置に位置合わせを
行って、フェースダウンで載置した後、補強層9の硬化
温度で加熱して、半導体装置4と回路基板2とを機械的
に補強する。このとき補強層9の形状がつづみ型ではな
く、太鼓型になってから硬化される。他は上記実施の形
態1と同様の条件で、半導体装置4を回路基板2に実装
する。A method of mounting the semiconductor device configured as described above will be described. Embodiment 1 or Embodiment 2
4 and 5 of FIG.
So that the projecting electrode 5 of the semiconductor device 4 is electrically connected to the terminal electrode 1 of the circuit board 2.
After positioning the terminal electrode 1 on the circuit board 2 at a predetermined position and mounting the terminal face down, the semiconductor device 4 and the circuit board 2 are mechanically heated by heating at the curing temperature of the reinforcing layer 9. Reinforce. At this time, the reinforcing layer 9 is hardened after the shape becomes a drum shape instead of a continuous shape. Otherwise, the semiconductor device 4 is mounted on the circuit board 2 under the same conditions as in the first embodiment.
【0044】以上のように、本実施の形態によれば、補
強層9をその形状が太鼓型になってから硬化することに
より、上記実施の形態1と同様の効果が得られる。As described above, according to the present embodiment, the same effect as in the first embodiment can be obtained by hardening the reinforcing layer 9 after the shape thereof becomes a drum shape.
【0045】尚、接合層3は、本発明の導電性樹脂接着
剤を用いて形成される部分である。The bonding layer 3 is a portion formed by using the conductive resin adhesive of the present invention.
【0046】又、導電性接着剤は、本発明の導電性樹脂
接着剤の実施の一例である。The conductive adhesive is an example of the embodiment of the conductive resin adhesive of the present invention.
【0047】又、補強層9は、本発明の第1の絶縁性樹
脂を用いて形成される部分である。The reinforcing layer 9 is a portion formed by using the first insulating resin of the present invention.
【0048】又、補強層9の第1の絶縁性樹脂中の溶剤
の沸点は、導電性の接合層3中の溶剤の沸点よりも低く
してもよい。The boiling point of the solvent in the first insulating resin of the reinforcing layer 9 may be lower than the boiling point of the solvent in the conductive bonding layer 3.
【0049】又、補強層9の第1の絶縁性樹脂の軟化点
を、導電性の接合層3の軟化点よりも高くし、封止樹脂
6の軟化点よりも低くしてもよい。The softening point of the first insulating resin of the reinforcing layer 9 may be higher than the softening point of the conductive bonding layer 3 and lower than the softening point of the sealing resin 6.
【0050】又、補強層9の海綿状の孔11の径を、封
止樹脂中のフィラー8の粒径よりも小さくしてもよい。The diameter of the spongy holes 11 of the reinforcing layer 9 may be smaller than the particle diameter of the filler 8 in the sealing resin.
【0051】又、補強層9の第1の絶縁性樹脂を封止樹
脂6と同時に硬化させるために、封止樹脂6中に補強層
9の硬化用の触媒を混入させてもよく、又、その硬化用
触媒は、固体又は液体であるとしてもよい。更に、触媒
は固体であり、その触媒の粒径は前記海綿状の孔径より
も小さいとしてもよい。In order to cure the first insulating resin of the reinforcing layer 9 at the same time as the sealing resin 6, a catalyst for curing the reinforcing layer 9 may be mixed into the sealing resin 6. The curing catalyst may be solid or liquid. Further, the catalyst may be solid and the particle size of the catalyst may be smaller than the spongy pore size.
【0052】更に、補強層9の第1の絶縁性樹脂を封止
樹脂6と同時に硬化させるために、封止樹脂6中に補強
層9の硬化用の硬化剤を混入させてもよい。Further, in order to cure the first insulating resin of the reinforcing layer 9 simultaneously with the sealing resin 6, a curing agent for curing the reinforcing layer 9 may be mixed into the sealing resin 6.
【0053】又、第1の絶縁性樹脂は、その第1の絶縁
性樹脂と第2の絶縁性樹脂が硬化された後それぞれの熱
膨張係数が実質的に等しくなるよう充填剤を含んでいる
としてもよい。Further, the first insulating resin contains a filler so that after the first insulating resin and the second insulating resin are cured, their respective thermal expansion coefficients become substantially equal. It may be.
【0054】又、第1の絶縁性樹脂は、前記半導体装置
及び/又は回路基板を加熱することにより硬化させると
してもよい。Further, the first insulating resin may be cured by heating the semiconductor device and / or the circuit board.
【0055】又、封止樹脂中のフィラー8及び補強層中
のフィラー10は、本発明の充填剤の実施の一例であ
る。The filler 8 in the sealing resin and the filler 10 in the reinforcing layer are one example of the embodiment of the filler of the present invention.
【0056】又、第2の絶縁性樹脂は、充填剤を含み、
その充填剤の粒径は前記海綿状の孔の孔径よりも大きい
としてもよい。Also, the second insulating resin contains a filler,
The particle size of the filler may be larger than the pore size of the spongy pores.
【0057】又、第1の絶縁性樹脂を用いて補強層9を
形成するのは、回路基板2の中心付近や半導体装置4の
中心付近に限らずともよい。The formation of the reinforcing layer 9 using the first insulating resin is not limited to the vicinity of the center of the circuit board 2 or the center of the semiconductor device 4.
【0058】又、前記突起電極及び前記端子電極は、そ
れぞれ前記半導体装置及び前記回路基板の外周部に設け
られており、前記第1の絶縁性樹脂は前記半導体装置の
複数の前記突起電極及び/又は前記回路基板の複数の前
記端子電極の内側に付着されるとしてもよい。Further, the protruding electrodes and the terminal electrodes are provided on outer peripheral portions of the semiconductor device and the circuit board, respectively, and the first insulating resin is provided on the semiconductor device and the plurality of protruding electrodes of the semiconductor device. Alternatively, it may be attached to the inside of the plurality of terminal electrodes of the circuit board.
【0059】又、第1の絶縁性樹脂が前記第1絶縁性樹
脂硬化工程により硬化された形状は、つづみ型又は太鼓
型であるとしてもよい。The shape obtained by curing the first insulating resin in the first insulating resin curing step may be a continuous type or a drum type.
【0060】[0060]
【発明の効果】以上より明らかなように、本発明によ
り、半導体装置の突起電極と回路基板の端子電極との導
電性樹脂接着剤による電気的な接続を機械的に補強する
ことができる。又、封止する前の検査時に、半導体装置
を容易に交換することができ、更にその検査によって接
続部近傍がゆがむといった弊害もなくなる。又、第1の
絶縁性樹脂の海綿状の孔に絶縁性の封止樹脂が充填され
ることによって最終的な構造は従来の封止樹脂のみで封
止したのと同等の特性を得ることができる。この結果、
コストの削減及び品質の向上が得られる。As is clear from the above, according to the present invention, the electrical connection between the projecting electrode of the semiconductor device and the terminal electrode of the circuit board by the conductive resin adhesive can be mechanically reinforced. Further, at the time of inspection before sealing, the semiconductor device can be easily replaced, and furthermore, there is no adverse effect that the vicinity of the connection portion is distorted by the inspection. Also, by filling the spongy holes of the first insulating resin with the insulating sealing resin, the final structure can obtain the same characteristics as those obtained by sealing with the conventional sealing resin alone. it can. As a result,
Cost reduction and quality improvement are obtained.
【図1】本発明の第1及び2の実施形態に係る、突起電
極が二段突起形状である半導体装置を示す概略断面図。FIG. 1 is a schematic cross-sectional view showing a semiconductor device according to first and second embodiments of the present invention, in which a projection electrode has a two-step projection shape.
【図2】本発明の第1及び2の実施形態に係る、半導体
装置の突起電極に導電性接着剤を転写する様子を示す、
半導体装置及び導電性接着剤転写膜の概略断面図。FIG. 2 is a diagram illustrating a state in which a conductive adhesive is transferred to a bump electrode of a semiconductor device according to the first and second embodiments of the present invention.
FIG. 2 is a schematic cross-sectional view of a semiconductor device and a conductive adhesive transfer film.
【図3】本発明の第1の実施形態に係る、補強層を転写
した半導体装置を示す概略断面図。FIG. 3 is a schematic sectional view showing a semiconductor device according to the first embodiment of the present invention, on which a reinforcing layer is transferred.
【図4】本発明の第1及び2の実施形態に係る、半導体
装置と回路基板とを接合した様子を示す概略断面図。FIG. 4 is a schematic cross-sectional view showing a state where a semiconductor device and a circuit board are joined according to the first and second embodiments of the present invention.
【図5】本発明の第1及び2の実施形態に係る、半導体
装置と回路基板とを接合し、その半導体装置と回路基板
との間の残部を封止樹脂により封止した様子を示す概略
断面図。FIG. 5 is a schematic diagram showing a state in which a semiconductor device and a circuit board according to the first and second embodiments of the present invention are joined, and the remaining portion between the semiconductor device and the circuit board is sealed with a sealing resin. Sectional view.
【図6】本発明の第2の実施形態に係る、補強層を転写
した回路基板を示す概略断面図。FIG. 6 is a schematic cross-sectional view showing a circuit board to which a reinforcing layer is transferred according to a second embodiment of the present invention.
【図7】本発明の第3の実施形態に係る、補強層が太鼓
型になってから硬化した半導体装置、及び、回路基板を
示す概略断面図。FIG. 7 is a schematic cross-sectional view showing a semiconductor device and a circuit board according to a third embodiment of the present invention, in which a reinforcing layer has become a drum shape and has been hardened.
【図8】本発明の第3の実施形態に係る、補強層が太鼓
型になってから硬化した半導体装置、及び、回路基板の
間の残部を封止樹脂により封止した様子を示す概略断面
図。FIG. 8 is a schematic cross-sectional view illustrating a semiconductor device according to a third embodiment of the present invention, in which a reinforcing layer has become a drum shape and has been hardened, and a state in which a remaining portion between circuit boards is sealed with a sealing resin. FIG.
【図9】従来例の突起電極が半田である半導体装置の概
略断面図。FIG. 9 is a schematic cross-sectional view of a conventional semiconductor device in which bump electrodes are solder.
【図10】従来例の端子電極を有する回路基板に突起電
極が半田である半導体装置を載置した様子を示す概略断
面図。FIG. 10 is a schematic cross-sectional view showing a state in which a semiconductor device in which projecting electrodes are solder is mounted on a conventional circuit board having terminal electrodes.
【図11】従来例の端子電極を有する回路基板に突起電
極が半田である半導体装置を載置した後、半田を溶融し
融着させた様子を示す概略断面図。FIG. 11 is a schematic cross-sectional view showing a state in which a semiconductor device having bumps made of solder is mounted on a circuit board having terminal electrodes according to a conventional example, and then the solder is melted and fused.
【図12】従来例の端子電極を有する回路基板に突起電
極が半田である半導体装置を実装し封止樹脂により封止
した様子を示す概略断面図。FIG. 12 is a schematic cross-sectional view showing a state in which a semiconductor device having a projection electrode made of solder is mounted on a circuit board having terminal electrodes according to a conventional example and sealed with a sealing resin.
1 端子電極 2 回路基板 3 接合層 4 半導体装置 5 突起電極 6 封止樹脂 7 パッド電極 8 封止樹脂中のフィラー 9 補強層 10 補強層中のフィラー 11 海綿状の孔 12 封止樹脂の樹脂成分 13 突起電極(半田) 14 導電性接着剤転写膜 DESCRIPTION OF SYMBOLS 1 Terminal electrode 2 Circuit board 3 Bonding layer 4 Semiconductor device 5 Projection electrode 6 Sealing resin 7 Pad electrode 8 Filler in sealing resin 9 Reinforcement layer 10 Filler in reinforcing layer 11 Spongy hole 12 Resin component of sealing resin 13 Projection electrode (solder) 14 Conductive adhesive transfer film
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 21/60 311 ──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 21/60 311
Claims (14)
剤を付着させる接着剤付着工程と、前記半導体装置の突
起電極以外の一部及び/又は回路基板の端子電極以外の
一部に溶剤型の熱可塑性樹脂からなる第1の絶縁性樹脂
を付着させる第1絶縁性樹脂付着工程と、前記半導体装
置及び/又は前記回路基板に付着された前記第1の絶縁
性樹脂及び前記導電性樹脂接着剤を介して、前記半導体
装置の突起電極部と前記回路基板の端子電極とが重なる
ように、前記半導体装置と前記回路基板とを接合する接
合工程と、前記第1の絶縁性樹脂を硬化させて溶剤を抜
いた後その内部に海綿状の複数の孔が生じる第1絶縁性
樹脂硬化工程と、前記導電性樹脂接着剤を硬化させる接
着剤硬化工程と、前記半導体装置と前記回路基板の隙間
の残部に封止樹脂として第2の絶縁性樹脂を充填し、前
記第2の絶縁性樹脂の樹脂成分が前記第1の絶縁性樹脂
内部の孔内にも混入し、前記第2の絶縁性樹脂を硬化さ
せる封止硬化工程を備え、これらを組み合わせて行うこ
とを特徴とする半導体装置の実装方法。An adhesive bonding step of bonding a conductive resin adhesive to a protruding electrode of the semiconductor device; and a solvent type process for a part of the semiconductor device other than the protruding electrode and / or a part of the circuit board other than the terminal electrode. A first insulating resin attaching step of attaching a first insulating resin made of a thermoplastic resin, and bonding the first insulating resin and the conductive resin attached to the semiconductor device and / or the circuit board. A bonding step of bonding the semiconductor device and the circuit board so that the protruding electrode portion of the semiconductor device and the terminal electrode of the circuit board overlap with each other via an agent, and curing the first insulating resin. To remove the solvent
A first insulating resin curing step in which a plurality of spongy holes are formed therein, an adhesive curing step of curing the conductive resin adhesive, and a gap between the semiconductor device and the circuit board.
Is filled with a second insulating resin as a sealing resin.
The resin component of the second insulating resin is the first insulating resin.
The second insulating resin is hardened by mixing into the internal holes.
A method for mounting a semiconductor device, comprising a sealing and hardening step of performing a combination thereof.
樹脂である請求項1記載の半導体装置の実装方法。2. The method according to claim 1, wherein the conductive resin adhesive is a solvent-type thermoplastic resin.
の充填剤の粒径は前記海綿状の孔の孔径よりも大きいこ
とを特徴とする請求項1または2に記載の半導体装置の
実装方法。3. A second insulating resin includes a filler, a semiconductor device according to claim 1 or 2, the particle size of the filler may be greater than the diameter of the spongy holes How to implement.
脂と同時に硬化するように前記第1絶縁性樹脂の硬化用
触媒を含んでいることを特徴とする請求項1または2に
記載の半導体装置の実装方法。4. A second insulating resin, to claim 1 or 2, characterized in that it contains a curing catalyst of the first insulating resin so as to simultaneously cure the first insulating resin <br/> A mounting method of the semiconductor device described in the above.
を特徴とする請求項4記載の半導体装置の実装方法。5. The method according to claim 4 , wherein the curing catalyst is a solid or a liquid.
記海綿状の孔径よりも小さいことを特徴とする請求項5
記載の半導体装置の実装方法。6. The catalyst according to claim 5, wherein the catalyst is solid and the particle size of the catalyst is smaller than the spongy pore size.
A mounting method of the semiconductor device described in the above.
樹脂と同時に硬化するように前記第1の絶縁性樹脂の硬
化用硬化剤を含んでいることを特徴とする請求項1また
は2に記載の半導体装置の実装方法。7. The second insulating resin, according to claim, characterized in that it contains the first curing curing agent for the insulating resin so as to simultaneously cure the first insulating resin 1 Also
3. The method for mounting a semiconductor device according to item 2 .
樹脂と第2の絶縁性樹脂が硬化された後それぞれの熱膨
張係数が実質的に等しくなるよう充填剤を含んでいるこ
とを特徴とする請求項1または2に記載の半導体装置の
実装方法。8. The first insulating resin contains a filler such that the first insulating resin and the second insulating resin have substantially the same coefficient of thermal expansion after being cured. The method of mounting a semiconductor device according to claim 1 , wherein:
は、前記導電性樹脂接着剤に含まれる溶剤の沸点より低
いことを特徴とする請求項2記載の半導体装置の実装方
法。9. boiling point of the solvent contained in the first insulating resin, mounting method of a semiconductor device according to claim 2, wherein a lower than the boiling point of the solvent contained in the conductive resin adhesive.
電性樹脂接着剤の軟化点より高く、前記第2の絶縁性樹
脂の軟化点より低いことを特徴とする請求項2記載の半
導体装置の実装方法。10. A softening point of the first insulating resin is higher than the softening point of the conductive resin bonding agent, according to claim 2, wherein a lower than the softening point of the second insulating resin A method for mounting a semiconductor device.
導体装置及び/又は回路基板を加熱して行うことを特徴
とする請求項1ないし10記載いずれかの半導体装置の
実装方法。11. The first insulating resin-curing step, the mounting method of a semiconductor device and / or the claims 1, characterized in that carried out by heating the circuit board 10 according to any one of the semiconductor device.
れ前記半導体装置及び前記回路基板の外周部に設けられ
ており、前記第1の絶縁性樹脂は前記半導体装置の複数
の前記突起電極及び/又は前記回路基板の複数の前記端
子電極の内側に付着されることを特徴とする請求項1な
いし11記載いずれかの半導体装置の実装方法。12. The projection electrode and the terminal electrode are provided on outer peripheral portions of the semiconductor device and the circuit board, respectively, and the first insulating resin is provided on the plurality of projection electrodes and / or the semiconductor device. The method for mounting a semiconductor device according to any one of claims 1 to 11 , wherein the semiconductor device is attached to inside of the plurality of terminal electrodes of the circuit board.
起形状又は実質的に凸状であることを特徴とする請求項
1ないし12記載いずれかの半導体装置の実装方法。The protruding electrode 13. The semiconductor device includes a two-stage projection shape or a substantially implementation of any of the semiconductor device claims 1 to 12, wherein the convex.
脂硬化工程により硬化された形状は、つづみ型又は太鼓
型であることを特徴とする請求項1ないし13記載いず
れかの半導体装置の実装方法。14. shape first insulating resin is cured by the first insulating resin curing step claims 1 to either 13 wherein the semiconductor, characterized in that a clutch-type or drum-type How to mount the device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8234886A JP2966354B2 (en) | 1996-09-05 | 1996-09-05 | Semiconductor device mounting method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8234886A JP2966354B2 (en) | 1996-09-05 | 1996-09-05 | Semiconductor device mounting method |
Publications (2)
Publication Number | Publication Date |
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JPH1079571A JPH1079571A (en) | 1998-03-24 |
JP2966354B2 true JP2966354B2 (en) | 1999-10-25 |
Family
ID=16977870
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JP8234886A Expired - Fee Related JP2966354B2 (en) | 1996-09-05 | 1996-09-05 | Semiconductor device mounting method |
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JP (1) | JP2966354B2 (en) |
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1996
- 1996-09-05 JP JP8234886A patent/JP2966354B2/en not_active Expired - Fee Related
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