JP2752618B2 - Signal transmission method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a line switching system, and more particularly, to a line transmission signal transmission system for a digital radio line. [Prior Art] A radio communication system having a plurality of co-located digital radio lines usually uses at least one of the lines as a protection line and the other lines as working lines. The main data transmitted on the working line is switched to the protection line to prevent line disconnection. Since the deterioration of line quality is mostly caused by fading of the radio propagation path, the deterioration of line quality is detected in a short period of time at the beginning of fading, and line switching is performed before fading progresses and line disconnection occurs. Complete to prevent instantaneous interruption of the line,
It is important to prevent bits from being dropped from the main data transmitted due to a momentary interruption. In such a conventional line switching system, a parity check bit is inserted into a main data to be transmitted at a transmission end of a line, a parity check is performed at a reception end of the line, line quality is monitored, and a bit error rate (BER) is monitored. ), When the line quality deteriorates to about 10 ^-6 to 10 ^-7 , the line is switched. Meanwhile, a digital radio line is usually provided with a digital service channel (Digital Service Channel) so that the parity check bit and other line monitoring / control data can be inserted into main data to be transmitted and transmitted.
DSC), and a frame synchronization bit indicating the insertion position of the DSC is inserted at the transmission end of the line. When a line is relayed by a relay device, each relay device detects a frame insertion bit by detecting a frame synchronization bit and performing frame synchronization, and extracts and inserts necessary DSC data. At the receiving end of the line, similarly, the insertion position of the DSC is detected,
Extract necessary DSC data. In addition, digital radio lines use error correction coding and error correction decoding of data to be transmitted.
ard Error Correction; FEC). Normally when a line is relayed by a relay device and includes multiple relay sections
FEC is performed for each relay section. The FEC decoder internally generates an error correction pulse every time a bit error is detected, and it is extremely easy to output this error correction pulse to the outside. [Problems to be Solved by the Invention] As described above, the conventional line switching system detects line quality deterioration by parity check and performs line switching. There are 10
Since the time required to detect a BER of about ^-6 to ^10-7 by the parity check is long, there is a disadvantage that the line switching time becomes long. An object of the present invention is to provide a method of processing a signal of switching information in a line switching system in which a line switching time is short in a digital wireless line relayed by a relay device by performing FEC. [Means for Solving the Problems] The signal transmission system of the present invention provides an error correction code in each of a plurality of relay sections, each of which is relayed by at least one relay apparatus capable of inserting additional bits into data to be relayed. The switching is performed based on a line alarm obtained by monitoring the frequency of occurrence of the error correction in the relay section at each receiving end of the relay section of a plurality of digital wireless lines for performing error correction by decoding and error correction decoding. In the line switching device, the output of the determination means for detecting the line quality at the receiving end of the relay section is converted into a digital signal, and the digital signal is transferred to the receiving end of the digital radio line using an empty time slot of the main signal.
After taking the logical sum of the result and each of the relay section alarms based on the determination result of the last relay section of the digital radio circuit, the majority decision is made by detecting the relay section alarm of a majority of the number of bits of the empty time slot. Determining and outputting the line alarm. EXAMPLES Hereinafter, the present invention will be described in detail with reference to the drawings showing examples. FIG. 1 is a block diagram showing one embodiment of the signal transmission system of the present invention. 1 is a transmission line switching device that performs line switching at the transmission end of the line,
Reference numeral 2 denotes a transmitter at the transmitting end of one line, 4 denotes a receiver at the receiving end of this line, and 5 denotes a receiving line switching device for performing line switching at the receiving end of the line. Reference numeral 3 denotes a relay device, which includes a transmitter 2 and a receiver 4
To relay between. Since this one line includes one relay device, the number of the relay sections is two. Relay device 3
Is a receiver 31, an FEC decoder 32, a frame synchronization circuit 34, an FEC encoder 35, a transmitter 36, which are sequentially connected, and inputs an error correction pulse P from the FEC decoder 32 and outputs a relay section alarm A to the frame synchronization circuit. Judgment circuit to output to 34 and DC conversion circuit 33
And Assuming that there are N lines that are respectively relayed by one relay device between the transmission line switching device 1 and the reception line switching device 5, a set of devices including a transmitter 2, a relay device 3, and a receiver 4 Another set of equivalent devices (N
-1) There are pairs, but these are omitted in FIG. The transmission line switching apparatus 1 speed-converts main data to be transmitted on each working line at a high speed, creates a time slot for inserting a frame synchronization bit and DSC data, and inserts a frame synchronization bit and required DSC data. Then F
The signal is EC-coded and output to the transmitter at the transmitting end of one working line, for example, the transmitter 2. The transmitter 2 sends out a modulated wave digitally modulated with the input data. The modulated wave transmitted by the transmitter 2 is demodulated by the receiver 31 in the relay device 3. The FEC decoder 32 corrects a bit error by performing FEC decoding on the demodulated data output from the receiver 31, and outputs an error correction pulse P every time a bit error is detected. The judgment circuit and the digital signal conversion circuit 33 count the number of error correction pulses P inputted at regular intervals, monitor the frequency of occurrence of error correction by the FEC decoder 32, and when the count exceeds the threshold value, determine whether the relay section Alarm A
Is output as a high-level or low-level digital signal. This threshold value is set to a line quality at which line switching is to be performed, for example, an average count value at a BER of 10 ⁻⁶ to 10 ⁻⁷ . With this setting, if the line quality degrades from 10 ^-6 to 10 ^{-7 in the} BER in the relay section before the relay apparatus 3, the relay section alarm A is output as a digital signal. The frame synchronization circuit 34 performs frame synchronization with the data error-corrected by the FEC decoder 32, extracts and inserts the required DSC data D, and, if the relay section alarm A is output, also outputs the main data. Inserted in a part of the time slot for A time slot for main data is pre-allocated for inserting the relay section alarm A. This alarm A is converted into a digital signal, so that it can be inserted into the main signal time slot having a different speed by the DSC. The data from which the data has been extracted / inserted and the relay section alarm A has been inserted are FEC encoded by the FEC encoder 35 and input to the transmitter 36. The transmitter 36 sends out a modulated wave digitally modulated with the input data. The receiver 4 demodulates the modulated wave transmitted from the transmitter 36 in the relay device 3 and outputs the demodulated data to the reception line switching device 5. The receiving line switching device 5 corrects a bit error by performing FEC decoding of demodulated data input from the receiver 4 and the receiver at the receiving end of the other lines. In the same way as outputting the relay section alarm A based on the BER, the line quality of the relay section after the relay device 3 and the relay section after the relay device of the other lines are 10 ^-6 to BER. If it is lower than 10 ^-7 , a relay section alarm is generated. Further, the receiving line switching device 5 extracts necessary DSC data in frame synchronization with the error-corrected data, and removes frame synchronization bits and DSC data by performing speed conversion at a low speed to restore main data. Output to the outside. The relay section alarm A, which is inserted into a part of the main data time slot and transferred and extracted from the relay apparatus 3 and other relay apparatuses, is provided for each line in the relay section after the relay apparatus 3 and other relay sections. And a logical sum (specifically, OR the OR of each relay section alarm of the respective relay section alarms) of the relay section in the relay section after the relay apparatus is obtained from the line switching apparatus 5 for each line. A1 to AN are output. These line alarms A1 to AN have M relay sections in which the number of alarm bits in the relay section alarm time slot inserted in a part of the main data time slot to prevent erroneous determination due to an error in the propagation path is M. When (M + 1) / 2 (M is an odd number of 3 or more) or more is detected in a time slot for use, a line alarm is determined and a majority decision is made and output. That is, for example, when even one of the plurality of relay section alarms is at the high level at the logical level and the logical sum output is at the high level at the logical level, it is determined that the line has a propagation path error. The line switching control device (not shown) includes line alarms A1 to
Monitors the occurrence of AN to detect lines with deteriorated line quality,
The transmission line switching device 1 and the reception line switching device 5 are controlled to switch the detected line to the protection line. For example,
The line quality of the relay section from the transmitter 2 to the relay apparatus 3 or the relay section from the relay apparatus 3 to the receiver 4 is 10 ^{-6 in} BER.
If it is degraded from 10 ^-7, a line alarm corresponding to the line from the transmitter 2 to the receiver 4 is output, and the transmission line switching device 1 transmits the data output to the transmitter 2 to the transmission end of the protection line. In addition, the receiving line switching device 5 restores the demodulated data of the receiver 4 and outputs the main data to the outside from the demodulated data of the receiver at the receiving end of the protection line to the restored main data. Output. [Effects of the Invention] As described in detail above, the line switching signal transmission method of the present invention detects line quality degradation in each relay section from the frequency of occurrence of error correction by FEC, and detects it in each relay section. using part of the speed main data time slot by converting the channel quality degradation information to the digital signal can be transferred to the line reception terminal, ^10-6 is the state of the line quality to perform line switching ^The time that can detect BER of about ^-7 from the frequency of error correction by FEC is shorter than the time that can be detected by parity check, and FEC is used because majority decision is made to prevent erroneous judgment due to transmission line error line switching. There is an effect that a device can be configured.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of a line switching system according to the present invention. 1 ... transmission line switching device, 2, 36 ... transmitter, 3 ... relay device, 4, 31 ... receiver, 5 ... reception line switching device, 32 ...
... FEC decoder, 33 ... decision circuit and digital signal conversion circuit, 34 ... frame synchronization circuit, 35 ... FEC encoder.

Claims (1)

(57) [Claims] A plurality of digital radio lines each of which is relayed by at least one relay device capable of inserting an additional bit into data to be relayed and which performs error correction by error correction coding and error correction decoding in each of a plurality of relay sections. In a line switching device that performs switching based on a line alarm obtained by monitoring the frequency of occurrence of the error correction in the relay section at each receiving end of the relay section, determining whether line quality is detected at the receiving end of the relay section The output of the means is converted into a digital signal and transferred to the receiving end of the digital radio line using the empty time slot of the main signal, and each relay is determined based on the result and the final determination result of the relay section of the digital radio line. After taking the logical sum of the section alarms, the relay section alarm of the majority of the number of bits of the empty time slot is A line switching device, wherein the line switching device outputs a line alarm by making a majority decision upon detection.