JP2617484B2 - Successive approximation type AD converter - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a successive approximation A / D converter, and more particularly to a successive approximation A / D converter capable of detecting an overflow.

[Conventional technology]

FIG. 3 is a block diagram showing an example of a conventional successive approximation A / D converter and an overflow detection method thereof.

In FIG. 3, first, when an analog input signal A to be converted into a digital signal is input to the range switching unit 6b, it is first input as it is to the comparator 1 of the successive approximation type AD converter 7b.

In the state of all the contents of the digital signal register 2 0, the reference signal generator 3b shall be added to only the switching circuits S ₁ at the position of the most significant digit in a conductive state, the reference signal V on the weighted resistor R ₁ by reference to the weighted resistor R ₁ signal V / 2 ¹
Outputs, switching circuit S _2, outputting ......... S _N-1, S since _N and all T are non-conductive the other _{R 2, ......... R N-1} , each R _N 0 I do.

For this reason, the comparator 1 uses the analog input signal A and the adder 4
Through comparing the reference signal V / 2 ¹ applied.

As a result, the output of the comparator 1 becomes "negative", that is, A <V / 2 ¹
Then, the most significant digit D ₁ of the digital signal register 2 is set to 0, and if the output of the comparator 1 is “positive”, that is, A ≧ V / 2 ¹ ,
Set D ₁ to 1.

Then, the reference signal generator 3b is to only switch circuit S ₂ to a conductive state, by applying a reference signal V on the weighted resistor R _2, weighted resistors R ₂ outputs the reference signal V / 2 ² At the same time, only when D ₁ is 1, the switch circuit T to which D ₁ is connected becomes conductive, and by adding the reference signal V to the weighting resistor R ₁ , the weighting resistor R ₁ causes the reference signal V / 2 ¹ Output.

Therefore, the adder 4 outputs V / 2 ² when D ₁ is 0, and outputs V / 2 ¹ + V / 2 ² when D ₁ is 1. Therefore, the comparator 1 When D ₁ is 0, the analog input signal A is compared with V / 2 ^2, and when D ₁ is 1, the analog input signal A is compared with V / 2 ¹
Compare with + V / 2 ² .

As a result, if the output of the comparator 1 is "negative", the next digit D ₂ of the digital signal register 2 to 0, the output of the comparator 1 if "positive", the D ₂ to 1.

By performing such an operation N times one after another, S ₁ , S
_2, the conduction state in the order of _{......... S N-1, S N} , R 1, R 2, ......... R
_N-1, R _N output things there is an input V respectively ^{V / 2 1, V / 2} 2, ...
Since delivering ^{...... V / 2 N-1,} V / 2 N, digital signals of N digits into a digital signal register 2 at N times D _1, D _2, .........
D _N−1 and D _N are obtained.

As a result, the full-scale detector 8b
Only when D ₁ , D ₂ ,..., D _N−1 and D _N are all 1, a signal indicating this is sent to the control unit 9b. Control is performed to reduce the range to 1/2.

The range switching unit 6b sends a signal that is half of the analog input signal A to the comparator 1 of the successive approximation type A / D converter 7b, and sends the signal to the successive approximation type A / D converter 7b for A / D conversion. Will be implemented.

The result of this A-D converter, the full-scale detector 8b again by obtaining the output of the digital signal Regis for two, the most significant digit D ₁ detects an overflow in case of 1.

[Problems to be solved by the invention]

The conventional successive approximation type A / D converter described above does not have an overflow detection circuit, so that it is necessary to add a range switching unit, a full scale detector, and a control unit and connect them to each other, which is troublesome. In short, for the analog input signal A and the signal ア ナ ロ グ of the analog input signal A, the A / D conversion is performed twice for all the digits of the digital signal, and the digital output signal for the second time is completed until all of them are completed. Is not output to the outside, there is a problem that the overflow cannot be detected until that time.

The range switching unit to be added is the analog input signal A
Must be accurately generated with the precision of the minimum resolution of the successive approximation type A / D converter.
There is a problem that expensive and high-precision parts having the same accuracy as the weighting resistor of the largest digit of the D converter must be used.

An object of the present invention is to provide an overflow detection circuit using inexpensive components that do not require very high accuracy, and to detect an overflow quickly without the need to add an additional circuit for overflow detection. An object of the present invention is to provide a successive approximation type A / D converter.

[Means for solving the problem]

A successive approximation A / D converter of the present invention compares a digitized digital signal to be output based on a comparison result of a comparator for comparing an input analog input signal with a reference signal and a comparator. A digital signal register and a first analog signal having a value corresponding to a value of each digit of the digital signal output from the digital signal register are generated. A reference signal generator for generating a second analog signal having a value larger than a value corresponding to a case where all the digits are 1, by selecting all the weighting resistors corresponding to each digit and the added weighting resistors. Means for supplying the first analog signal or the second analog signal generated from the reference signal generator to the comparator as a reference signal; The second as a signal
And an overflow detection circuit for generating an overflow signal based on a comparison result between the analog signal and the analog input signal.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of a successive approximation A / D converter according to the present invention.

In FIG. 1, first, an analog input signal A to be converted into a digital signal is supplied to a comparator 1 of a successive approximation type AD converter.
Is input to

In the state of all the contents of the digital signal register 2 0, the reference signal generator 3 is in the conducting state by the switch circuits S ₁ at the position of the most significant digit, the weighted resistor reference signal V
By adding the R _1, and outputs a reference signal V / 2 ¹ a weighted resistor R _1, the switch circuit _{S 2, ......... S N-1} , S N, and non-conductive S _O and all T Since there are other R ₂ , ……… R _N-1 , R _N , R _O
Are output as 0.

For this reason, the comparator 1 uses the analog input signal A and the adder 4
Through comparing the reference signal V / 2 ¹ applied.

As a result, the output of the comparator 1 becomes "negative", that is, A <V / 2 ¹
Then, the most significant digit D ₁ of the digital signal register 2 is set to 0, and if the output of the comparator 1 is “positive”, that is, A ≧ V / 2 ¹ ,
Set D ₁ to 1.

Then, the reference signal generator 3, and only the switching circuit S ₂ to a conductive state, by applying a reference signal V on the weighted resistor R _2, weighted resistors R ₂ outputs the reference signal V / 2 ² At the same time, only when D ₁ is 1, the switch circuit T to which D ₁ is connected becomes conductive, and by adding the reference signal V to the weighting resistor R ₁ , the weighting resistor R ₁ causes the reference signal V / 2 ¹ Output.

Therefore, the adder 4 outputs V / 2 ² when D ₁ is 0, and outputs V / 2 ¹ + V / 2 ² when D ₁ is 1. Therefore, the comparator 1 When D ₁ is 0, the analog input signal A is compared with V / 2 ^2, and when D ₁ is 1, the analog input signal A is compared with V / 2 ¹
Compare with + V / 2 ² .

As a result, if the output of the comparator 1 is "negative", the next digit D ₂ of the digital signal register 2 to 0, the output of the comparator 1 if "positive", the D ₂ to 1.

By performing such an operation N times one after another, S ₁ , S
_2, the conduction state in the order of _{......... S N-1, S N} , R 1, R 2, ......... R
_N-1, R _N each thing that there is an input V respectively output V /
^{2 1, V / 2 2,} ...... V / 2 so transmits the ^{N-1, V / 2 N} , digital signal D ₁ of the N digit digital signal register 2 by N times, D _2, ...
... _DN-1 and _DN are obtained.

Finally, the reference signal generator 3 turns on only the switch circuit S _O and applies the reference signal V to the weighting resistor R _O , whereby the weighting resistor R _O outputs the reference signal V / ^2N . At the same time, the switch circuits T connected to ones having D ₁ , D ₂ ,..., D _N−1 , D _N become conductive, and the weighted resistors R ₁ , R ₂ ,. .., R _N-1 and _RN have outputs, respectively, so that the adder 4 outputs a reference signal value obtained by adding up to N + 1 of these outputs.
Is compared with the analog input signal A.
Generates a "positive" signal if is larger.

In this state, the overflow detection circuit 5 outputs the N-digit digital signals D ₁ , D
_2, when ......... D _N-1, D _N are all 1, moreover comparator 1
Generates an overflow signal O as an overflow because A ≧ V when a signal is generated “positively” as compared with the analog input signal A.

Incidentally, the weighted resistor R _O is for the purpose of outputting a reference signal V / 2 ^N, as compared with the weighted resistor R ₁ in order to output a reference signal ^{V / 2 1, 1/2} N- ¹ ) Inexpensive parts with high precision can be used.

Thus, the successive approximation A / D converter of the present embodiment is
Inexpensive components are used for overflow detection, and the overflow can be detected quickly by N + 1 digit operation without the need to add an additional circuit for overflow detection.

FIG. 2 is a block diagram showing a second embodiment of the successive approximation A / D converter according to the present invention.

In FIG. 2, a reference signal generator 3a is a switch circuit.
S _a1 , S _a2 ,..., S _aN-1 and S _aN .

Also in the first embodiment, the switch circuits S ₁ , S ₂ ,..., S _N−1 , S _N
And S _O can be made conductive, but the switch circuits S _a1 , S _a2 ,... S _aN-1 , S _aN and S _aO of the second embodiment are transmitted from the overflow detection circuit 5a. The circuit has a function of turning on the entire circuit in response to a detection instruction signal P for overflow detection.

Therefore, the detection instruction signal P is sent from the overflow detection circuit 5a at any time while the analog input signal A to be converted into a digital signal is being input to the comparator 1, so that the R ₁ , R ₂ ,..., R _N−1 , R _N and R _O output outputs V / 2 ¹ , V / 2 ² ,..., V / 2 ^N−1 , V / 2 ^N and V / 2 ^N , respectively. Therefore, the adder 4 calculates the sum V
To the comparator 1.

As a result, when the comparator 1 is generating a "positive" signal, the overflow detection circuit 5a generates an overflow signal O as an overflow.

Thus, the successive approximation A / D converter of the present embodiment is
Inexpensive components are used for overflow detection, and the overflow can be quickly detected at any time without the need to add an additional circuit for overflow detection.

〔The invention's effect〕

As described above, the successive approximation type A / D converter of the present invention is provided with a weighting resistor and a switch circuit having the same accuracy as the minimum digit, which has a precision of 1/2 ^N-1 of the maximum digit, for detecting an overflow. As a result, there is an effect that the overflow can be detected promptly without the trouble of adding an additional circuit for detecting the overflow.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of a successive approximation A / D converter of the present invention, and FIG. 2 is a successive approximation A / D converter of the present invention.
FIG. 3 is a block diagram showing a second embodiment of the D converter, and FIG. 3 is a block diagram showing an example of a conventional successive approximation A / D converter and an overflow detection method thereof. 1 ... Comparator, 2 ... Digital signal register, 3,3a, 3
b: Reference signal generator, 4: Adder, 5, 5a: Overflow detection circuit, 6b: Range switching unit, 7b: Successive approximation type A / D converter, 8b: Full scale detector, 9b ...... controller, A ...... analog input signal, D ...... digital output _{signal, D 1, D 2, ~D} N-1, D N ...... digital signal, O ...... overflow signal, P ...... detection instruction Signal, R ₁ , R ₂ , ~ R _N-1 , R
_N , R _O ...... weighted resistor, S ₁ , S ₂ , ~ S _N-1 , S _N , S _O , S _a1 , S _a2 , ~ S
_aN-1 , S _aN , S _aO , T: switch circuit, V: reference signal.

Claims (1)

(57) [Claims] A comparator for comparing an input analog input signal with a reference signal; a digital signal register for changing a value of each digit of a digital signal to be output based on a comparison result by the comparator; A first analog signal having a value corresponding to the value of each digit of the digital signal output from the signal register is generated, and at the time of overflow detection, each digit is output regardless of the value of each digit of the digital signal. A reference signal generator for generating a second analog signal having a value larger than a value corresponding to a case where all digits are 1 by selecting all the corresponding weighting resistors and further added weighting resistors; Means for supplying a first analog signal or a second analog signal generated from a generator as the reference signal to the comparator; A successive approximation type A / D converter, comprising: an overflow detection circuit for generating an overflow signal based on a comparison result between the second analog signal as the reference signal and the analog input signal.