JP2613939B2 - Semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a junction capacitance capacitor and a MOS capacitor.

[Prior Art] FIG. 2 shows a conventional semiconductor device of this kind. This device is manufactured as follows. That is, an N-type buried layer 11 and P-type buried layers 12, 12a are provided on a P-type semiconductor substrate 10,
An epitaxial layer 17 is formed, and N-type diffusion regions 15, 15a and P-type diffusion regions 16, 16a are formed in the epitaxial layer. After an insulating film 18 is provided on the epitaxial layer 17 and necessary contact holes are formed, electrodes 19 to 22 are formed. Electrodes 19 and 20 constitute the electrodes of the MOS capacitor, and electrode 2
Reference numerals 1 and 22 form extraction electrodes of the junction capacitance capacitor by the buried layers 11 and 12. The two capacitors are isolated from each other and from each other by a P-type buried layer 12a and a P-type diffusion layer 16a.

[Problems to be Solved by the Invention] In the above-described conventional semiconductor device, since the MOS capacitor and the junction capacitor are formed in different element regions, there is a disadvantage that the area is increased.

[Means for Solving the Problems] A semiconductor device of the present invention is formed in a P-conductivity-type semiconductor substrate, an N-conductivity-type epitaxial layer formed on the semiconductor substrate, and a boundary region between the semiconductor substrate and the epitaxial layer. N-type first buried layer and a P-type second buried layer formed in a boundary region between the first buried layer and the epitaxial layer.
A first diffusion region of P conductivity type formed so as to be in contact with the second buried layer, and an N conductivity type formed so as to be surrounded by the first diffusion region. And a metal layer formed on the second diffusion region via an insulating film. The first and second buried layers constitute a junction capacitance capacitor, and the second diffusion region, an insulating film and a metal layer constitute a MOS capacitor.

Example Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view showing one embodiment of the present invention. P
An N-type buried layer 11 is provided on the surface of the type semiconductor substrate 10, and a P-type buried layer 12 is further provided thereon. Also, P
An N-type epitaxial layer 17 is formed on a type semiconductor substrate 10, and a P-type buried layer 12 is formed in the epitaxial layer.
A P-type diffusion region 13 is formed in contact with, and an N-type diffusion region 14 and an N-type diffusion region 15 having a high impurity concentration are further formed in this diffusion region 13. In the epitaxial layer 17, an N-type diffusion region 15a, which is an electrode extraction region of the N-type buried layer 11, is formed. These regions are surrounded by the P-type buried layer 12a and the P-type diffusion region 16a and are separated from other regions. An insulating film (oxide film) 18 is formed on the epitaxial layer 17, and an electrode in contact with the N-type diffusion regions 15, 15 a via the contact hole formed in the insulating film 18 is formed on the insulating film. 20, 22,
An electrode 21 that contacts the P-type diffusion region 13 is formed. The thickness of the insulating film 18 is reduced on the N-type diffusion region 15, and an electrode 19 is formed thereon.

MOS by N-type diffusion region 15, insulating film 18, electrodes 19 and 20
A capacitor is formed, and the buried layers 11 and 12, the P-type diffusion region 13, the epitaxial layer 17, the N-type diffusion region 15a, and the electrodes 21 and 22 form a junction capacitance capacitor. Due to the N-type diffusion region 14, the capacitive coupling between the P-type diffusion region 13 and the N-type diffusion region 15 is reduced.

As described above, according to the present invention, two capacitors can be formed with an area approximately half that of the conventional example.

[Effects of the Invention] As described above, according to the present invention, a plurality of capacitors can be formed with a small area by forming a junction capacitance immediately below a MOS capacitor, and a high density of a semiconductor device is realized. It becomes possible to do.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG.
It is sectional drawing which shows a prior art example. 10: P-type semiconductor substrate, 11: N-type buried layer, 12, 12a
... P-type buried layer, 13 ... P-type diffusion region, 14 ... N-type diffusion region, 15, 15a ... N-type diffusion region, 16, 16a ... P-type diffusion region, 17 ... epitaxial layer, 18 ... insulating film (oxide film), 19-22 ... electrodes.

Claims (1)

(57) [Claims] A first buried layer of opposite conductivity type formed on the surface of a semiconductor substrate of one conductivity type, and together with the first buried layer formed on the surface of the first buried layer, constitute a junction capacitor. A second buried layer of one conductivity type, an opposite conductivity type epitaxial layer formed on the semiconductor substrate,
A diffusion region of one conductivity type formed in contact with the second buried layer in the epitaxial layer; a low impurity concentration diffusion region of the opposite conductivity type formed in a surface region of the diffusion region of one conductivity type; An opposite conductivity type high impurity concentration diffusion region formed in the surface region of the opposite conductivity type low impurity concentration diffusion region; an insulating film formed on the opposite conductivity type high impurity concentration diffusion region; A semiconductor device comprising: a MOS capacitor metal layer formed on a conductive high impurity concentration diffusion region via the insulating film.