JP2582816B2 - Data transfer device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for transferring data between, for example, a plurality of in-vehicle digital signal processing apparatuses.

2. Description of the Related Art Conventionally, a plurality of digital signal processing devices (DSPs), digital / analog converters, and analog / digital converters (hereinafter, D / A converters) A / D converters are abbreviated).

FIG. 4 is a block diagram showing a configuration example of such a conventional technique. The prior art will be described with reference to FIG. This conventional technique includes a digital signal processing device (hereinafter abbreviated as a processing device) 1 on the transmission side and a processing device 2 on the reception side. The processing devices 1 and 2 are provided with control circuits 3 and 4 realized by, for example, a microprocessor or the like, and the synchronization signal SY and the clock signal CL commonly input are provided.
Transfer of parallel data via a parallel transfer line is performed based on K.

The processing device 2 transfers serial data to the D / A converter 6 via the serial transfer line 7, for example. The D / A converter 6 converts the serial data into an analog signal such as an audio signal, for example, and outputs the analog signal through low-pass filters 8 to 11.
For example, front left and right speakers 1 installed in a vehicle
Sound signals are output to the left and right speakers 2 and 13 and the rear left and right speakers 14 and 15, respectively.

In the prior art described above, the processing devices 1 and 2 generally perform processing on floating-point data, and
The A converter 6 performs processing on the fixed-point data. Therefore, the processing device 2 and the D / A converter 6 handle different types of data, and the processing device 2 cannot directly transfer floating-point data to the D / A converter 6. Therefore, the processing device 2 converts the input floating-point data into fixed-point data, and then transfers the data to the D / A converter 6 using the serial transfer line 7.

Problems to be Solved by the Invention In the above-described conventional technology, when a large amount of data is to be continuously transferred from the processing device 2 to the D / A converter 6, for example, the data format conversion process in the processing device 2 is performed. For example, the software processing at the time of data transfer becomes complicated and enormous, so that the programs to be prepared are enormous, and the processing time is long. There is also a problem that a configuration for performing such data conversion processing and the like must be separately provided.

SUMMARY OF THE INVENTION An object of the present invention is to provide a data transfer device which solves the above-mentioned problems, simplifies the configuration, and improves various processing speeds accompanying data transfer.

Means for Solving the Problems The present invention relates to a data transfer device for transferring serial data between a plurality of data processing devices, wherein at least serial data processed by a transmission side data processing device includes a mantissa part and an exponent part. A data transfer device wherein the mantissa data is shifted and transferred in a manner corresponding to the exponent data when transferring the serial data.

The data transfer device according to the present invention is used for transferring serial data between a plurality of data processing devices. At this time, at least the serial data processed by the transmission-side data processing device is composed of a mantissa part and an exponent part. In transferring such serial data, a desired shift process is performed on the mantissa data in a manner corresponding to the exponent data, and the data is transferred.

Thus, when serial data composed of a mantissa part and an exponent part is converted into single serial data, a conversion process including a shift operation can be performed in parallel with the transfer process. As a result, there is no need to separately prepare a configuration or software for performing such a shift operation on the transmission side or the reception side, and the configuration can be significantly simplified. Further, since the shift operation processing can be performed in parallel with the transfer operation, the processing speed is remarkably improved.

Embodiment FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. This embodiment will be described with reference to FIG. This embodiment is advantageously implemented, for example, in a configuration for processing an acoustic signal of a vehicle-mounted acoustic device. This embodiment includes processing devices 21 and 22, and the processing device 21 is provided with an arithmetic transfer control circuit 23 realized by, for example, a microprocessor unit. The data from the internal data bus 24 is stored in buffer registers 25 and 26. In general, the processing units (DSPs) 21 and 22 process floating-point data and, therefore, buffer registers 25 and 26.
Stores an exponent part and a mantissa part.

The data in the buffer registers 25 and 26 is transferred to the transfer registers 27 and
28, and transferred to the processing device 22 by the arithmetic transfer control circuit 23. The processing unit 22 is provided with transfer registers 29 and 30 for individually storing the mantissa part and the exponent part of the floating-point data, and the stored contents of the transfer registers 29 and 30 are buffer registers 31 and 32. Via the internal data bus 33.

FIG. 2 is a time chart for explaining the operation of the embodiment of FIG. The operation of this embodiment will be described with reference to FIG. 1 and FIG. Transfer register in processing unit 21
When data A and B are stored in 27 and 28, when this floating-point data is converted to fixed-point data C, C = B × 2 ^A (1) (A; integer, B; decimal) If the data A is 0, the transfer register 28
The data transfer of the mantissa data B (generally n-bit data) starts immediately from the transfer start time t1 as shown in FIG. 2 (3).

On the other hand, when the data A is a negative integer (for example, -2) in the above-described first formula, the fixed-point data C has a configuration in which the mantissa data B is shifted to the right by the absolute value bit of A. The shifted data is transferred to the processing device 22. The shift operation and the transfer operation are shown in FIG. 2 (4). That is, the data transfer may be started at a time t2 two clocks after the transfer start time t1 in FIG. In this way, the shift operation and the transfer processing can be performed in the same time as the transfer time T shown in FIG.

In the above-mentioned first formula, if the data A is, for example, plus 3, the basic data shown in FIG.
The operation of shifting to the left by bits is performed. In other words, the transfer operation involving such a 3-bit left shift process can be performed by transferring the data to be transferred from the third bit as shown in FIG. 2 (5). Even in such a case, the transfer operation involving the shift operation can be executed in the transfer time T described above.

FIG. 3 is a block diagram showing the configuration of another embodiment of the present invention. This embodiment will be described with reference to FIG. This embodiment is similar to the previous embodiment, and corresponding parts are denoted by the same reference numerals. It should be noted that the receiving side of the configuration in which the processing device 21 is the transmitting side is, for example, a digital / analog converter (hereinafter abbreviated as D / A converter) 34. This D / A converter 34 has a transfer register 3
5 is included.

The receiving side of the data transfer in this embodiment is a D / A converter 34.
Therefore, even if the transfer data is received, there is no function of changing the data format from floating-point data to fixed-point data by performing, for example, a shift operation on the transfer data. However, the same effect as that of the above-described embodiment can be realized by performing the transfer process including the shift process as described with reference to FIG. 2 also in the configuration of the present embodiment. .

According to each of the above embodiments, when it is necessary to perform various shift operations on serial data to be transferred in advance, the shift operation may be performed to a data shift operation for realizing the transfer of serial data. Thus, the configuration for converting the data format from the floating-point type data to the fixed-point type data and the configuration of the software are not required, so that the configuration is significantly simplified. Also, as mentioned above,
Changing the format can be performed at high speed, and the processing speed is significantly improved.

Effects As described above, according to the present invention, when serial data composed of a mantissa part and an exponent part is converted into single serial data, conversion processing including a shift operation is performed in parallel with transfer processing. You can do it. As a result, there is no need to separately prepare a configuration or software for performing such a shift operation on the transmission side or the reception side, and the configuration can be significantly simplified. Further, since the shift operation processing can be performed in parallel with the transfer operation, the processing speed is remarkably improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention, FIG. 2 is a time chart for explaining the operation of this embodiment, and FIG.
FIG. 11 is a block diagram showing the configuration of another embodiment of the present invention.
The figure is a typical prior art block diagram. 21,22 processing unit, 23 arithmetic transfer control circuit, 25,26,3
1,32… buffer register, 27-35… transfer register,
34 ... D / A converter

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Masaaki Nagami 1-2-28 Goshodori, Hyogo-ku, Kobe City, Hyogo Prefecture Inside Fujitsu Ten Co., Ltd. (72) Inventor Shoji Fujimoto 1-chome, Goshodori, Hyogo-ku, Kobe City, Hyogo Prefecture No. 28 in Fujitsu Ten Limited

Claims (1)

(57) [Claims] 1. A data transfer device for transferring serial data between a plurality of data processing devices, wherein at least serial data processed by a transmission-side data processing device is constituted by a mantissa part and an exponent part, A data transfer device, wherein, when transferring the serial data, the mantissa data is shifted and transferred in a manner corresponding to the exponent data.