JP2565112B2 - Method for forming laminated structure of semiconductor and method for forming semiconductor device using the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a semiconductor laminated structure and a method for forming a semiconductor device manufactured by using the laminated structure.

[0002]

2. Description of the Related Art Conventionally, in order to form a semiconductor laminated structure, a substrate is cleaned and a surface layer is etched as a pretreatment for the purpose of removing contaminants on the semiconductor surface which becomes a substrate. After that, usually, a protective film such as an oxide film is formed, and the protective film is removed before the laminated structure is formed. When the oxide film is used as the protective film, the oxide film is decomposed by the heat treatment. Therefore, by performing the heat treatment in vacuum, a clean semiconductor surface can be obtained and a semiconductor laminated structure with good crystallinity can be formed. Are known. But,
When Si is used as a substrate, the decomposition temperature of silicon oxide is about 1200 ° C, so it is usually 1100 ° C, and even if a well-controlled thin oxide film of several tens of liters is used, the temperature is about 800 ° C for about 15 minutes. Heat treatment is required. In addition, as a thing related to this, for example, a journal
Of Electrochemical Society, 133 (198
6) 666 to 671 (J. Electrochem. Soc. 133 (198
6) pp666 to 671.

[0003]

The above-mentioned conventional technique cannot be used for a semiconductor substrate covered with a pattern such as a processing mask which is difficult to adopt high temperature heat treatment, or a semiconductor substrate to which impurities that easily diffuse are added. was there.

An object of the present invention is to provide a method of cleaning the surface of a semiconductor substrate covered with a pattern such as a processing mask or a semiconductor substrate having impurities diffused, and forming a laminated structure thereon. Another object of the present invention is to provide a method for forming a semiconductor device manufactured by using the laminated structure.

[0005]

In order to achieve the above object, a method for forming a laminated structure of a semiconductor according to the present invention is such that a substrate made of a first semiconductor is dipped in an aqueous solution of hydrofluoric acid, washed with water, and heated in vacuum. The step of performing the treatment and the step of laminating a second semiconductor made of a material different from that of the first semiconductor on this substrate are performed.

The above heat treatment is preferably carried out at a temperature in the range of 350 ° C. to 550 ° C., and 400 ° C. to 50 ° C.
More preferably, it is carried out at a temperature in the range of 0 ° C. Also,
The hydrofluoric acid aqueous solution is preferably in the range of 0.5% to 10%, more preferably in the range of 1% to 10%. If the concentration is higher than 10%, the surface of the cleaned first semiconductor substrate tends to be rough, and if the concentration is low, the treatment time is long. Further, the substrate made of the first semiconductor may have a laminated structure formed on the substrate made of the third semiconductor.

The first semiconductor is preferably Si, and the second semiconductor is preferably a III-V group compound semiconductor. III-V group compound semiconductors include GaAs and Al
As, InAs, GaP, GaSb, InP or the like or a mixed crystal thereof such as AlGaAs or InGaAs can be used.

Furthermore, in order to achieve the above-mentioned other objects,
A semiconductor device manufacturing method of the present invention is to form a semiconductor laminated structure by the above-described method for forming a semiconductor laminated structure, and form a semiconductor element in at least a second semiconductor laminated structure.

[0009]

By exposing the surface of the semiconductor substrate to an aqueous solution of hydrofluoric acid, the semiconductor oxide film formed on the surface can be removed, and contaminants attached to the oxide film can be removed at the same time. Further, the hydrogen in the hydrofluoric acid aqueous solution is attached or bonded to the surface atoms, so that the semiconductor surface is inactivated. Heat treatment in vacuum does not decompose oxides,
Since hydrogen is released, the semiconductor clean surface can be exposed at a low temperature.

When the semiconductor substrate is Si having a (100) plane orientation, a (2 × 1) surface structure is formed at around 500 ° C. by the above treatment. GaAs on this
When a polar compound semiconductor film, such as, is grown, an anti-phase domain in which two types of atoms exist is not formed in the same layer, and it is possible to form a single-phase domain semiconductor layer with good crystallinity. .

[0011]

The present invention will be described below with reference to examples. Example 1 FIG. 1 is a schematic sectional view of a photoelectric conversion device for explaining an example of the present invention. This device comprises a p-type Si substrate 1, a high-concentration n-type Si layer 2, and a high-concentration p-type Si layer 3, a photoelectric conversion element having a Si pn structure, a high-concentration p-type GaAs layer 4, and a p-type GaAs. This is a tandem type photoelectric conversion device including a layer 5 and an n-type GaAs layer 6 and formed of a photoelectric conversion element having a pn structure of GaAs.

In this photoelectric conversion device, the light incident from the upper part of the figure is absorbed in the GaAs photoelectric conversion element, and a current is generated at the pn junction 12. The generated current flows into the p-type electrode 10 through the Si photoelectric conversion element. Also, GaA
s Light in the wavelength range not absorbed in the photoelectric conversion element is S
It is absorbed in the i photoelectric conversion element and generates a current at the pn junction 11. At this time, p-type GaAs layer 5, n-type GaAs
The interface 13 between GaAs and Si needs to be in electrical contact with each other in order for the current generated in the GaAs photoelectric conversion portion formed of the layer 6 to reach the electrode. Further, if the Si photoelectric conversion element portion is formed before the GaAs photoelectric conversion element is formed, the number of element manufacturing steps can be reduced, and deterioration during the steps is eliminated.

According to the present invention, the Si substrate can be cleaned at a low temperature before the GaAs laminated structure is formed.
Since the p-type and n-type impurities in the i substrate are not diffused into the crystal layer to impair the structure and characteristics of the Si photoelectric conversion element, the crystallinity of GaAs can be further improved.
A photoelectric conversion device having a good electrical connection with i can be manufactured.

A method of manufacturing this photoelectric conversion device will be described below. In addition, in the present specification, as a formula representing a crystal plane or an orientation, as illustrated in Table 1, a minus sign is not described above a number but described before.

[0015]

[Table 1]

P-type Si substrate (resistivity 0.3 to 1 Ωcm,
P (phosphorus) is diffused at a temperature of 900 ° C. to form a high-concentration n-type Si layer 2 having a thickness of 0.3 to 0.5 μm. After that, the high concentration n-type layer on the back surface is etched,
By depositing Al to form the p-type electrode 10 and heat-treating at 750 ° C., a high concentration p of 0.3 to 0.5 μm is obtained.
The type Si layer 3 is formed. At this time, the Si substrate is (100)
It has a plane orientation and is tilted 2 ° off in the <110> direction. The Si substrate manufactured as described above is washed with an organic solvent, washed with water, immersed in a 5% aqueous solution of hydrofluoric acid for 30 seconds to remove the natural oxide film on the surface, and then washed with water for 10 seconds to immediately grow a molecular beam crystal. Introduce into the vacuum chamber of the device.

At this time, the pattern (hereinafter referred to as RHEED pattern) by the reflection high energy electron diffraction method is
The (1x1) pattern showing having the same period as a bulk structure is shown. This indicates that the surface Si atoms are bonded to hydrogen atoms, and therefore the rearrangement of the surface atoms is not placed. After that, when heated to 500 ° C., the RHEED pattern changes into a (2 × 1) rearrangement structure pattern. If this heating is performed in a temperature range of about 350 ° C. to 550 ° C., similar results can be obtained.

After confirming the (2 × 1) pattern, the high-concentration p-type GaAs layer (1 × 10 ¹⁹ cm ⁻³ ) 4 is set to 100 Å, p
Type GaAs layer (8 × 10 ¹⁶ cm ⁻³ ) 5 is 2.5 μm, and high concentration n-type GaAs layer (3 × 10 ¹⁸ cm ⁻³ ) 6 is 0.5 μm.
m are sequentially laminated. Furthermore, an n-type Al _0.7 Ga _0.3 As layer (3 × 10 ¹⁸ cm ⁻³ ) 7 as a window layer is further formed thereon.
Å High concentration n-type GaAs layer (5 × 10
¹⁸ cm ⁻³ ) 8 is laminated by 1000Å. After that, the high-concentration n-type GaAs layer 8 is etched leaving only the n-type electrode portion to form the n-type electrode 9 and the p-type electrode 10 in a predetermined pattern.

The p-type Si substrate 1 is an n-type, the high-concentration n-type Si layer 2 is a high-concentration p-type, the high-concentration p-type Si layer 3 is a high-concentration n-type, and the high-concentration p-type GaAs layer. 4 is a high-concentration n-type, p-type GaAs layer 5 is an n-type, and n-type GaAs layer 6 is a p-type.
The n-type Al _0.7 Ga _0.3 As layer 7 into the p-type and the high concentration n
Type GaAs layer 8 of high concentration p-type, n-type electrode 9 of p-type,
Even if the p-type electrode 10 is an n-type, the same effect can be obtained.

Further, GaAs was used as the second semiconductor formed on the p-type Si substrate, but instead of this, Al is used.
_0.3 Ga _0.7 As, In _0.5 Ga _0.5 As, GaP or Ga
Similar results were obtained using Sb. However, In
_{When 0.5} Ga _0.5 As was used, it was necessary to reverse the incident direction of light.

Embodiment 2 FIG. 2 is a schematic sectional view of a photoelectric conversion device for explaining another embodiment of the present invention. This device has a structure in which a photoelectric conversion element having a pn structure of GaAs is provided on an n-type Si substrate 21. A GaAs pn junction composed of an n-type GaAs layer 23 ′ and a p-type GaAs layer 24 is formed on a pyramidal n-type GaAs layer 23 formed by covering the n-type Si substrate 21 with a processing mask (not shown). Is formed, the light incident from the upper part of the figure can be multiple-reflected in the pyramid. As a result, the current generated at the pn junction is doubled, and the photoelectric conversion efficiency can be increased. According to the present invention, since the Si substrate can be cleaned at a low temperature before forming the GaAs laminated structure, it is possible to reduce the contamination from the processing mask and further improve the crystallinity of GaAs. , A photoelectric conversion device having good electrical connection with Si can be manufactured.

A method of manufacturing this photoelectric conversion device will be described below. As shown in FIG. 3, it has a (001) plane orientation and <1
On the n-type Si substrate 21 (specific resistance 0.5 to ₂ Ωcm) which is turned off by 2 ° in the 10> direction, the SiO ₂ film 22 is formed by thermal oxidation.
Is formed by 3000 liters, and <1
10> A square opening having a side of <-100> is formed. The length of the openings and the interval between the openings can be changed according to the amount of incident light or the specific resistance of the electrode (electrode 27 in FIG. 2) formed by removing the SiO ₂ film region. Here, the length of the openings is 50 μm in both length and width, and the distance between the openings is 10 μm.

An n-type S having a processing mask formed by the above method
The i-substrate 21 is washed with an organic solvent, washed with water, immersed in a 5% hydrofluoric acid aqueous solution for 30 seconds, then washed with water for 10 seconds, and immediately introduced into an organometallic vapor phase crystal growth apparatus. At this time, S
When the RHEED pattern on i is observed, a (1 × 1) pattern is observed as in Example 1. Then 500
After confirming that (2 × 1) is observed after heating to ℃, n-type GaAs layer 2 with a doping amount of 2 × 10 ¹⁷ cm ^-3
Grow 3 As shown in FIG. 3, the n-type GaAs layer 2
3 does not grow on the SiO ₂ film 22 but grows only on Si (opening) and is formed in a pyramid shape. After that, the SiO ₂ film 22 is removed. The same result can be obtained if the heating is performed in a temperature range of 350 ° C to 550 ° C.

The description will be made again with reference to FIG. After the above treatment, the n-type GaAs layer (2 × 10 ¹⁷ cm ⁻³ ) 23 ′ is 50
0Å, p-type GaAs layer (4 × 10 ¹⁸ cm ⁻³ ) 24 50
00Å, p-type Al _0.7 Ga _0.3 As layer (3 × 10 ¹⁸ c
m ^-3 ) 25 300 Å, high concentration p-type G as electrode connection
An as layer (2 × 10 ¹⁹ cm ⁻³ ) 26 of 1000 Å is sequentially laminated. Furthermore, high-concentration p-type GaAs in the pyramid part
After the layer 26 is selectively etched, a p-type electrode 27 and an n-type electrode 28 are formed on the back surface of the substrate. In addition, n-type G
Before the formation of the aAs layer 23 ', the same treatment as the Si substrate surface cleaning treatment described above (immersing in a hydrofluoric acid aqueous solution and then washing with water) may be performed.

In the present embodiment, the n-type Si substrate 21 is replaced with p
The n-type GaAs layers 23 and 23 'to the p-type and the p-type Ga
The As layer 24 is an n-type, the p-type Al _0.7 Ga _0.3 As layer 25 is an n-type, and the high-concentration p-type GaAs layer 26 is a high-concentration n-type.
Even if the mold electrode 27 is of n-type and the n-type electrode 28 is of p-type, the same effect can be obtained. Further, when the above-mentioned processing mask was changed to a SiO ₂ film and silicon nitride, amorphous silicon, aluminum oxide or aluminum nitride was formed by a chemical vapor deposition method and the same operation was performed, the same effect was recognized. .

Further, GaAs was used as the second semiconductor formed on the n-type Si substrate, but instead of this, Al is used.
_0.3 Ga _0.7 As, In _0.5 Ga _0.5 As, GaP or Ga
Similar results were obtained using Sb.

[0027]

According to the present invention, the semiconductor substrate surface can be cleaned at a low temperature of 350 to 550 ° C. Further, when the Si substrate has a (001) plane orientation, it has a (2 × 1) structure in a cleaned state, and therefore, a polar compound semiconductor such as GaAs formed on the Si substrate has the same structure. Single-phase domain growth in which only the same atoms exist in one layer has become possible, and crystallinity has improved. By lowering the temperature of the substrate surface cleaning process and turning the GaAs film into a single-phase domain, we were able to form a GaAs laminated structure using a Si substrate with an impurity diffusion layer in the substrate or a Si substrate with a processing mask formed on top. . Therefore, Si-pn
A tandem type photoelectric conversion device in which the structure and the GaAs-pn structure are electrically and crystallically connected to each other could be manufactured. The efficiency of this photoelectric conversion device is improved by 1.5 to 2 times as compared with the conventional type. Moreover, a GaAs photoelectric conversion device having a pyramid structure could be manufactured by covering the surface of the Si substrate with a processing mask. Since this photoelectric conversion device has a long optical path length due to multiple reflection of light, the efficiency is improved by 20 to 30%.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of a photoelectric conversion device for explaining an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view of a photoelectric conversion device for explaining another embodiment of the present invention.

3A and 3B are schematic cross-sectional views showing the steps of forming the photoelectric conversion device shown in FIG.

[Explanation of symbols]

1 ... p-type Si substrate, 2 ... high-concentration n-type Si layer, 3 ... high-concentration p-type Si layer, 4 ... high-concentration p-type GaAs layer, 5 ... p-type GaAs layer, 6 ... n-type GaAs layer, 7 ... n-type Al _0.7 Ga _0.3 As layer, 8 ... High-concentration n-type GaAs layer, 9, 28 ... N-type electrode, 10, 27 ... P-type electrode, 11, 12 ... Pn junction, 13 ... Interface, 21 ... N-type Si substrate, 22 ... SiO ₂ film, 23, 23 '... n-type GaAs layer, 24 ... p-type GaAs layer, 25 ... p-type Al _0.7 Ga _0.3 As layer, 26 ... high-concentration p-type GaAs layer.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location H01L 31/10 H01L 31/10 A (56) Reference JP-A-4-338642 (JP, A) JP-A-2-258979 (JP, A) JP-A-3-187213 (JP, A) JP-A-2-83983 (JP, A) JP-A-1-150328 (JP, A) JP-A-5-175182 (JP, A) JP 5-267260 (JP, A) JP 5-217982 (JP, A)

Claims (4)

(57) [Claims] 1. A substrate made of Si is immersed in an aqueous solution of hydrofluoric acid,
Wash with water and heat in vacuum at a temperature in the range of 350 ° C to 550 ° C.
Of heat treatment at a certain temperature and GaAs, Al on the substrate
Made of GaAs, InGaAs, GaP or GaSb
And a step of laminating compound semiconductor layers according to claim 1. 2. The method for forming a laminated structure of semiconductors according to claim 1, wherein the substrate is made of silicon oxide or silicon nitride in advance.
Con, amorphous silicon, aluminum oxide or
A method for forming a laminated structure of a semiconductor, wherein a processing mask made of aluminum nitride is formed. 3. A method for manufacturing a semiconductor device, comprising forming a semiconductor laminated structure by the method for forming a semiconductor laminated structure according to claim 1 or 2 , and forming a semiconductor element on at least the compound semiconductor layer. . 4. A method according to claim 3, wherein the upper Symbol semiconductor device, a method of manufacturing a semiconductor device which is a photoelectric conversion element.