JP2020134396A - Substrate for electric inspection - Google Patents

Abstract

To increase the intensity of a substrate for an electric inspection.SOLUTION: The substrate for an electric inspection of the present disclosure includes: a ceramic substrate on which a plurality of ceramic layers are deposited; and an electrode formed on at least one of the front surface and the back surface of the ceramic substrate. The plurality of ceramic layers include a plane ceramic layer forming at least one of the front surface and the back surface of the ceramic substrate and an inside ceramic layer in the ceramic substrate. The plane ceramic layer is thinner than the inside ceramic layer, the inside ceramic layer contains Ag, and the plane ceramic layer does not contain Ag.SELECTED DRAWING: Figure 2

Description

The present disclosure relates to an electrical inspection substrate including a ceramic substrate.

Patent Document 1 includes an electrical inspection substrate including a ceramic substrate in which a plurality of ceramic layers formed of low-temperature fired glass ceramic obtained by firing a mixture of a glass component and a ceramic component at a low temperature of about 800 to 1050 ° C. are laminated. Is described.

Japanese Unexamined Patent Publication No. 2010-271296

However, in the electrical inspection substrate described in Patent Document 1, the ceramic substrate may be cracked and damaged due to the stress generated due to the formation of the resin layer or the stud on the surface of the ceramic substrate. It was.

An object of the present disclosure is to improve the strength of an electrical inspection substrate.

One aspect of the present disclosure is an electrical inspection substrate comprising a ceramic substrate on which a plurality of ceramic layers are laminated and electrodes formed on at least one of a front surface and a back surface of the ceramic substrate.

In the electrical inspection substrate of the present disclosure, the plurality of ceramic layers include at least a surface ceramic layer forming at least one of the front surface and the back surface of the ceramic substrate and an internal ceramic layer arranged inside the ceramic substrate. .. Further, the surface ceramic layer is thinner than the inner ceramic layer, the inner ceramic layer contains Ag, and the surface ceramic layer does not contain Ag.

In the electrical inspection substrate of the present disclosure configured as described above, the content of Ag in the internal ceramic layer is higher than the content of Ag in the surface ceramic layer. Therefore, in the electrical inspection substrate of the present disclosure, the thermal expansion of the internal ceramic layer is larger than the thermal expansion of the surface ceramic layer, and the internal ceramic layer compresses the surface ceramic layer. As a result, in the electrical inspection substrate of the present disclosure, compressive stress is generated in the surface ceramic layer, and the surface strength of the electrical inspection substrate can be improved. As described above, in the electrical inspection substrate of the present disclosure, the surface strength of the electrical inspection substrate can be improved without increasing the coefficient of thermal expansion by generating compressive stress due to the difference in firing shrinkage behavior.

In one aspect of the present disclosure, the surface ceramic layers are arranged on both the front and back surfaces of the ceramic substrate, and the thickness of the surface ceramic layers arranged on the front surface is equal to the thickness of the surface ceramic layers arranged on the back surface. You may do so. As a result, the electrical inspection substrate of the present disclosure can suppress deformation of the electrical inspection substrate.

In one aspect of the present disclosure, a resin layer may be laminated on at least one of the front surface and the back surface of the ceramic substrate, or studs may be installed.

It is a figure which shows the usage method of the electric inspection jig. It is sectional drawing of the substrate for electrical inspection. It is sectional drawing of the ceramic substrate and the resin layer which shows the installation position of a probe and a stud. It is a flowchart which shows the manufacturing method of the substrate for electrical inspection. It is sectional drawing of the laminated body and the laminated sintered body. It is a chart which shows the result of the evaluation test.

The embodiments of the present disclosure will be described below together with the drawings.
As shown in FIG. 1, the electric inspection jig 100 of the present embodiment includes an electric inspection substrate 1 and a plurality of conductive probes 2.

The electrical inspection jig 100 corresponds to, for example, a silicon wafer SW having a diameter of 300 mm, and a plurality of devices formed on the silicon wafer SW by bringing the probe 2 into contact with a plurality of terminals TM formed on the silicon wafer SW. Inspect.

As shown in FIG. 2, the electrical inspection substrate 1 includes a ceramic substrate 3 and electrodes 4 and 5 formed on the front surface and the back surface of the ceramic substrate 3.
The ceramic substrate 3 is formed in a rectangular parallelepiped shape having a thickness of 5 mm, a length of 300 mm, and a width of 300 mm, for example. The ceramic substrate 3 includes, for example, four ceramic layers 11, 12, 13, 14 and three wiring layers 21, 22, 23.

The ceramic layers 11 to 14 and the wiring layers 21 to 23 are alternately laminated along the stacking direction SD. As a result, the wiring layer 21 is arranged between the ceramic layer 11 and the ceramic layer 12, the wiring layer 22 is arranged between the ceramic layer 12 and the ceramic layer 13, and the wiring layer 23 is arranged between the ceramic layer 13 and the ceramic layer 14. It is placed between and.

Further, via conductors 31, 32, 33, 34 extending in the stacking direction SD and penetrating the ceramic layers 11, 12, 13, 14 are formed in the ceramic layers 11, 12, 13, 14, respectively. As a result, the electrodes 5 formed on both sides of the ceramic layer 11 with the ceramic layer 11 interposed therebetween and the wiring layer 21 are electrically connected. Further, the wiring layer 21 and the wiring layer 22 formed on both sides of the ceramic layer 12 with the ceramic layer 12 interposed therebetween are electrically connected. Further, the wiring layer 22 and the wiring layer 23 formed on both sides of the ceramic layer 13 with the ceramic layer 13 interposed therebetween are electrically connected. Further, the wiring layer 23 formed on both sides of the ceramic layer 14 with the ceramic layer 14 interposed therebetween and the electrode 4 are electrically connected.

The ceramic layers 11 to 14 are formed of glass ceramic obtained by firing a mixture of a glass component and a ceramic component. The thickness of the ceramic layer 11 is smaller than the sum of the thickness of the ceramic layer 12 and the thickness of the ceramic layer 13. Similarly, the thickness of the ceramic layer 14 is smaller than the sum of the thickness of the ceramic layer 12 and the thickness of the ceramic layer 13. Further, the ceramic layers 11 and 14 contain Ag, and the ceramic layers 12 and 13 do not contain Ag. Further, the thickness of the ceramic layer 11 is equal to the thickness of the ceramic layer 14. In the present embodiment, the thickness of the ceramic layers 11 and 14 is, for example, 0.3 mm.

The wiring layers 21 to 23 and the via conductors 31 to 34 are formed of, for example, conductors such as Ag, Ag / Pt alloy, Ag / Pd alloy, Cu, and Cu alloy.
The electrodes 4 and 5 are formed of at least one conductor of Ti, Cr, Mo, Cu, Ni and Au.

As shown in FIG. 3, a resin layer 6 and a resin layer 7 are formed on the front surface and the back surface of the ceramic substrate 3, respectively. A plurality of studs 8 are installed on the resin layer 6, and a plurality of probes 2 are installed on the resin layer 7. The stud 8 is a member that protrudes from the electrical inspection substrate 1 in order to fix the electrical inspection substrate 1 to the electrical inspection jig 100.

Next, a method of manufacturing the electrical inspection substrate 1 will be described.
In order to manufacture the electrical inspection substrate 1, first, as shown in FIG. 4, a green sheet for an inner layer is prepared in S10. Specifically, first, as a raw material powder for producing the ceramic layers 12 and 13, borosilicate glass containing SiO ₂ , Al ₂ O ₃ , and B ₂ O ₃ having an average particle size of 3.0 μm as main components. A powder and a mullite powder having an average particle size of 2.0 μm are prepared. In addition, acrylic binder as a binder component, di-ochicle phthalate (hereinafter, DOP) as a plasticizer component that gives appropriate flexibility to the green sheet after molding, and appropriate slurry viscosity and sheet strength are provided. Methyl ethyl ketone (hereinafter referred to as MEK) as a solvent is prepared. In addition, Ag is prepared as an additive.

Then, the above-mentioned borosilicate glass powder and mullite powder are weighed in a predetermined amount and placed in an alumina pot. In the present embodiment, the mixing ratio of the borosilicate glass powder and the mullite powder is 50:50 by mass, and the total amount of the borosilicate glass powder and the mullite powder is 1000 g. Further, for example, 0.5% by volume of Ag is put into the above pot by externally covering the borosilicate glass powder and the mullite powder in the pot. Further, the binder, DOP and MEK are placed in the above pot and mixed for 5 hours to obtain a ceramic slurry. Then, by the doctor blade method, the obtained ceramic slurry is formed into a sheet on a carrier film made of, for example, polyethylene terephthalate, and a green sheet for an inner layer having a thickness of, for example, 0.25 mm is produced.

Next, in S20, a surface layer green sheet is prepared. Specifically, first, as a raw material powder for producing the ceramic layers 11 and 14, borosilicate glass containing SiO ₂ , Al ₂ O ₃ , and B ₂ O ₃ having an average particle size of 3.0 μm as main components. A powder and a mullite powder having an average particle size of 2.0 μm are prepared. In addition, an acrylic binder, DOP, and MEK are prepared.

Then, the above-mentioned borosilicate glass powder and mullite powder are weighed in a predetermined amount and placed in an alumina pot. In the present embodiment, the mixing ratio of the borosilicate glass powder and the mullite powder is 50:50 by mass, and the total amount of the crystallized glass powder and the mullite powder is 1000 g. Further, the binder, DOP and MEK are placed in the above pot and mixed for 5 hours to obtain a ceramic slurry. Then, by the doctor blade method, the obtained ceramic slurry is formed into a sheet on the carrier film to prepare a green sheet for a surface layer having a thickness of, for example, 0.25 mm.

Next, in S30, a restraint sheet is prepared. Specifically, first, as a raw material powder, an alumina powder having an average particle size of 2.0 μm is prepared. In addition, an acrylic binder, DOP, and MEK are prepared. Then, the above alumina powder is weighed in a predetermined amount and placed in an alumina pot. In this embodiment, the total amount of alumina powder is 1000 g. Further, the binder, DOP and MEK are placed in the above pot and mixed for 3 hours to obtain a ceramic slurry. Then, by the doctor blade method, the obtained ceramic slurry is made into a sheet on the carrier film to prepare a restraint sheet having a thickness of, for example, 0.50 mm.

Next, in S40, a via hole having a diameter of, for example, 0.12 mm is formed in the inner layer green sheet prepared in S10 and the surface layer green sheet prepared in S20 by punching.

Next, in S50, the inside of the via holes formed in the inner layer green sheet and the surface layer green sheet is filled with the conductive paste. The conductive paste is made by adding ethyl cellulose resin to 100 parts by weight of silver powder and 2 parts by weight of borosilicate glass powder having a softening point of 700 ° C., and adding tarpineol as a solvent to a 3-roll mill. It is made by kneading in.

Next, in S60, a wiring pattern to be the wiring layers 21 to 23 is formed by printing at necessary positions on the surfaces of the inner layer green sheet and the surface layer green sheet using the conductive paste.

Next, in S70, the inner layer green sheet, the surface layer green sheet, and the restraint sheet are laminated to prepare a green sheet laminate. Specifically, as shown in the laminated body SB1 of FIG. 5, first, the green sheet laminated body GB1 is produced by laminating the inner layer green sheet GS1 and the inner layer green sheet GS2. Further, the green sheet laminate GB2 is produced by laminating the surface layer green sheet GS3 and the surface layer green sheet GS4 on the front surface and the back surface of the green sheet laminate GB1 respectively. Then, the restraint sheet BS1 and the restraint sheet BS2 are laminated on the front surface and the back surface of the green sheet laminate GB2, respectively, to prepare the laminate SB1.

Then, when the step of S70 is completed, as shown in FIG. 4, in S80, the pressure of the laminated body SB1 is 0.2 MPa with the laminated body SB1 sandwiched from both sides of the laminated body SB1 in the laminated body SB1 by a press machine (not shown). The laminated body SB1 is fired at 850 ° C. for 30 minutes (that is, degreasing fired) while pressurizing with the above to prepare the laminated sintered body SB2 shown in FIG.

Then, when the step of S80 is completed, as shown in FIG. 4, in S90, the unsintered restraint sheets BS1 and BS2 remaining on the front surface and the back surface of the laminated sintered body SB2 are super-used with water as a medium. It is removed by a ultrasonic cleaner to prepare the laminated sintered body SB3 shown in FIG.

Then, when the step of S90 is completed, as shown in FIG. 4, the front surface and the back surface of the laminated sintered body SB3 are polished by lap polishing using alumina abrasive grains in S100.
Next, in S110, for example, a Ti thin film is formed at positions corresponding to the via conductors 31 and 34 on the front surface and the back surface of the polished laminated sintered body SB3 (that is, the ceramic substrate 3) by a sputtering method, and then Cu plating is performed in sequence. Ni plating and Au plating are applied to form electrodes 4 and 5, and the production of the electrical inspection substrate 1 is completed.

Next, an evaluation test carried out for evaluating the strength of the electrical inspection substrate 1 and the test results will be described.
In this evaluation test, the fracture toughness of the electrical inspection substrate 1 was evaluated by changing the presence or absence of Ag in the ceramic layers 11 and 14 and the presence or absence of Ag in the ceramic layers 12 and 13. Hereinafter, the ceramic layers 11 and 14 are referred to as surface ceramic layers, and the ceramic layers 12 and 13 are referred to as internal ceramic layers.

In this evaluation test, as shown in FIG. 6, the substrates for electrical inspection of Example 1 and Comparative Examples 1 to 3 were prepared.
In the electrical inspection substrate of Example 1, the surface ceramic layer does not contain Ag, and the internal ceramic layer contains Ag. In the electrical inspection substrate of Comparative Example 1, Ag is not contained in the surface ceramic layer and the internal ceramic layer. In the electrical inspection substrate of Comparative Example 2, Ag is contained in the surface ceramic layer and the internal ceramic layer. In the electrical inspection substrate of Comparative Example 3, the surface ceramic layer contains Ag and the internal ceramic layer does not contain Ag.

In this evaluation test, the surface of the substrate for electrical inspection was polished, various measurements (for example, Young's modulus, specific gravity, and Vickers hardness) were performed, and the fracture toughness was measured. In this evaluation test, the evaluation result of the fracture toughness was "OK" when the fracture toughness was improved based on Comparative Example 1, and "NG" when the fracture toughness was not improved.

As shown in FIG. 6, Example 1 was "OK" in fracture toughness. On the other hand, Comparative Examples 2 and 3 were "NG" in fracture toughness.
The electrical inspection substrate 1 configured in this manner includes a ceramic substrate 3 in which a plurality of ceramic layers 11 to 14 are laminated, and electrodes 4 and 5 formed on the front surface and the back surface of the ceramic substrate 3.

In the electrical inspection substrate 1, the ceramic layers 11 and 14 constitute the front surface and the back surface of the ceramic substrate 3. The ceramic layers 12 and 13 are arranged inside the ceramic substrate 3. Further, the ceramic layers 11 and 14 are thinner than the ceramic layers 12 and 13, the ceramic layers 12 and 13 contain Ag, and the ceramic layers 11 and 14 do not contain Ag.

As described above, in the electrical inspection substrate 1, the Ag content in the ceramic layers 12 and 13 is higher than the Ag content in the ceramic layers 11 and 14. Therefore, in the electrical inspection substrate 1, the thermal expansion of the ceramic layers 12 and 13 is larger than the thermal expansion of the ceramic layers 11 and 14, and the ceramic layers 12 and 13 compress the ceramic layers 11 and 14. As a result, in the electrical inspection substrate 1, compressive stress is generated in the ceramic layers 11 and 14, and the surface strength of the electrical inspection substrate 1 can be improved. As described above, in the electrical inspection substrate 1, the surface strength of the electrical inspection substrate 1 can be improved without increasing the coefficient of thermal expansion by generating compressive stress due to the difference in firing shrinkage behavior.

Further, the ceramic layers 11 and 14 are arranged on both the front surface and the back surface of the ceramic substrate 3, and the thickness of the ceramic layer 11 arranged on the front surface is equal to the thickness of the ceramic layer 14 arranged on the back surface. As a result, the electrical inspection substrate 1 can suppress the deformation of the electrical inspection substrate 1.

In the embodiments described above, the ceramic layers 11 and 14 correspond to the surface ceramic layers, and the ceramic layers 12 and 13 correspond to the internal ceramic layers.
Although one embodiment of the present disclosure has been described above, the present disclosure is not limited to the above embodiment, and can be implemented in various modifications.

For example, in the above embodiment, the electrodes 4 and 5 are formed on the front surface and the back surface of the ceramic substrate 3, but the electrodes are formed on either the front surface or the back surface of the ceramic substrate 3. May be good.

Further, in the above embodiment, the ceramic layers 11 and 14 show a form in which Ag is not contained, but one of the ceramic layers 11 and 14 may not contain Ag.

Further, in the above embodiment, the thicknesses of the ceramic layers 11 and 14 are equal to each other, but the thicknesses of the ceramic layers 11 and 14 may be different from each other.
Further, the function of one component in the above embodiment may be shared by a plurality of components, or the function of the plurality of components may be exerted by one component. Further, a part of the configuration of the above embodiment may be omitted. Further, at least a part of the configuration of the above embodiment may be added or replaced with the configuration of the other embodiment.

1 ... Electrical inspection substrate, 3 ... Ceramic substrate, 4, 5 ... Electrode, 11-14 ... Ceramic layer

Claims (4)

A substrate for electrical inspection including a ceramic substrate on which a plurality of ceramic layers are laminated and electrodes formed on at least one of the front surface and the back surface of the ceramic substrate.
The plurality of ceramic layers include at least a surface ceramic layer constituting at least one of the front surface and the back surface of the ceramic substrate, and an internal ceramic layer arranged inside the ceramic substrate.
The surface ceramic layer is thinner than the internal ceramic layer,
The internal ceramic layer contains Ag and
The surface ceramic layer is a substrate for electrical inspection that does not contain Ag. The electrical inspection substrate according to claim 1.
The surface ceramic layer is arranged on both the front surface and the back surface of the ceramic substrate.
A substrate for electrical inspection in which the thickness of the surface ceramic layer arranged on the front surface is equal to the thickness of the surface ceramic layer arranged on the back surface. The electrical inspection substrate according to claim 1 or 2.
An electrical inspection substrate on which a resin layer is laminated on at least one of the front surface and the back surface of the ceramic substrate. The substrate for electrical inspection according to any one of claims 1 to 3.
An electrical inspection substrate on which studs are installed on at least one of the front surface and the back surface of the ceramic substrate.

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