JP2019159052A - Liquid crystal display device - Google Patents

Abstract

To provide a liquid crystal display device which suppresses lowering of the quality of display when the corner part of a display region is formed in the shape of a circular arc by a light blocking layer.SOLUTION: The liquid crystal display device according to an embodiment is a display panel including a display region having a plurality of pixels and a non-display region around the display region. The display panel includes: a first substrate having a first electrode formed over a plurality of pixels and a second electrode facing the first electrode; a second substrate facing the first substrate, the second substrate having a light blocking layer containing open regions for the pixels, respectively; a sealing member for connecting the first substrate and the second substrate to each other; and a liquid crystal layer between the first substrate and the second substrate, the liquid crystal layer being sealed by the sealing member. The distance between the end of the second substrate in the corner of the display region and the outermost open region is larger than the distance between the corner part and the end of the second substrate in the corner part and the outermost open region.SELECTED DRAWING: Figure 8

Description

  Embodiments described herein relate generally to a liquid crystal display device.

  Recent liquid crystal display devices have been proposed in which the corners of the display area of a rectangular display panel have an arc shape.

Japanese Patent Laid-Open No. 2006-148775 International Publication No. 2009/057342

  When the corners of the display area as described above are arc-shaped, the corners of the display panel itself are arc-shaped, or the display panel remains rectangular and is formed in a non-display area surrounding the display area. By using the light shielding layer, the corners of the display area are formed in an arc shape by forming the corners of the display area in an arc shape. However, when the corners of the display area are formed in an arc shape by using the light shielding layer, the distance between the array substrate and the counter substrate in the display area is different due to the difference in the laminated structure in the display panel in the non-display area and the display area. There is a problem in that a display defect occurs due to a difference in the distance between the array substrate and the counter substrate in the non-display area.

  Therefore, in view of the above problems, the embodiment of the present invention provides an interval between the counter substrate and the array substrate in the display region and the non-display region when the light shielding layer is used to form the corners of the display region in an arc shape. An object of the present invention is to provide a liquid crystal display device in which no difference occurs between the two.

  An embodiment of the present invention is a display panel having a display area provided with a plurality of pixels and a non-display area positioned around the display area, the display panel extending over the plurality of pixels. And a first substrate having a first electrode formed opposite to the first electrode, the first substrate facing the first substrate, and corresponding to each of the plurality of pixels. A second substrate having a light-shielding layer in which an opening region is formed; a seal member that bonds the first substrate to the second substrate; and the seal between the first substrate and the second substrate. A liquid crystal layer sealed by a member, and a distance from an end of the second substrate to the opening region located on the outermost periphery at a corner of the display region is between the corner and the corner From the end of the second substrate to the opening region located on the outermost periphery Greater than away, it is a liquid crystal display device.

1 is a schematic plan view of a display panel of a liquid crystal display device according to an embodiment of the present invention. It is the top view which showed roughly about the structure by the side of the array substrate of a pixel. FIG. 3 is a plan view schematically showing a structure on a counter substrate side of a pixel corresponding to FIG. 2. It is sectional drawing along the II line in FIG. It is sectional drawing along the II-II line in FIG. FIG. 2 is an enlarged plan view of a part of a portion E1 in FIG. FIG. 7 is an enlarged plan view of a part of a part E1 further enlarged from FIG. FIG. 8 is an enlarged plan view schematically showing a structure on the array substrate side corresponding to FIG. 7. It is sectional drawing along the IV-IV line in FIG. It is sectional drawing along the VI-VI line in FIG. It is sectional drawing along the VV line in FIG.

  A liquid crystal display device according to an embodiment of the present invention will be described with reference to the drawings. It should be noted that the disclosure in the embodiment is merely an example, and those skilled in the art can easily conceive of appropriate changes while maintaining the spirit of the invention are naturally included in the scope of the present invention. In addition, the drawings may be schematically represented with respect to the width, thickness, shape, and the like of each part in comparison with actual correspondence in order to make the description clearer, but are merely examples, and the interpretation of the present invention is not limited. It is not limited. In addition, in the present specification and each drawing, the same elements and the same reference numerals as those described above with reference to the previous drawings are attached, and the detailed description may be omitted as appropriate.

  In the specific example, the liquid crystal display device of the present embodiment discloses a lateral electric field method called an IPS (In-Plane Switching) method or an FFS (Fringe Field Switching) method using a fringe electric field. The vertical electric field type may be used.

  The liquid crystal display device of this embodiment will be described with reference to FIGS.

(1) Overall Configuration of Display Panel 1 The overall configuration of the display panel 1 will be described using a schematic plan view of the display panel 1 according to an embodiment of the present invention shown in FIG. FIG. 1 is a plan view in an XY plane defined by a first direction X and a second direction Y perpendicular to the first direction X. FIG. Note that the first direction X and the second direction Y may intersect at an angle other than 90 degrees.
The display panel 1 includes an array substrate 2 and a counter substrate 3 arranged to face the array substrate 2. In the illustrated example, the array substrate 2 is larger in size than the counter substrate 3, and the array substrate 2 and the counter substrate 3 are aligned by a seal member 5 with three sides aligned. In the display panel 1 in the example of FIG. 1, part of the corners of the array substrate 2 and the counter substrate 3 are formed in an arc shape.

  The display panel 1 has a display area 8 in which pixels 6 for image display are formed and a non-display area 9 around the display area 8 in an area where the array substrate 2 and the counter substrate 3 overlap. Further, the display panel 1 has a terminal region 11 in which the array substrate 2 and the counter substrate 3 do not overlap with each other and only the array substrate 2 is present.

  In the display area 8, the array substrate 2 extends along the first direction X and is arranged in the second direction Y. The array substrate 2 extends along the second direction Y and extends in the first direction X. And a plurality of source lines 15 arranged side by side. In the illustrated example, the pixel 6 is partitioned by two adjacent gate lines and two adjacent source lines.

  In each pixel 6, the array substrate 2 includes a switching element 7 electrically connected to the gate line 16 and the source line 15, and a pixel electrode 14 electrically connected to the switching element 7. The pixel electrode 14 forms an electric field with the common electrode 13 provided in common over the plurality of pixels 6. By this electric field, the orientation of the liquid crystal molecules in the liquid crystal layer 4 sealed between the array substrate 2 and the counter substrate 3 is controlled. The array substrate corresponds to the first substrate, and the counter substrate corresponds to the second substrate.

(2) Circuit Configuration of Display Panel 1 The circuit configuration of the display panel 1 will be described with reference to FIG. The array substrate 2 includes a gate driver 50 electrically connected to each gate line 16 and a source driver 52 electrically connected to each source line 15. In the illustrated example, the gate driver 50 is provided in the non-display area 9 so as to sandwich the display area 8 along the side along the second direction Y of the display panel 1. The source driver 52 is provided in the non-display area 9 between the display area 8 and the terminal area 11 along the side along the first direction X of the display panel 1. In the illustrated example, the gate driver 50 is provided so as to sandwich the display area 8, but may be provided only on one side. The source driver 52 may also be provided on the array substrate 2 in another manner. Furthermore, the gate driver 50 and the source driver 52 may be provided outside the array substrate 2.

  A driver IC 19 that functions as a display driver is mounted in the terminal area 11. The driver IC 19 is electrically connected to the gate driver 50 and the source driver 52 via a plurality of connection wirings 25. For example, the source driver 52 outputs an image signal to the source line 15 based on a signal from the driver IC 19.

(3) Configuration of Pixel 6 The structure of the pixel 6 will be described with reference to FIGS. FIG. 2 is a plan view schematically showing the structure of each pixel 6 on the array substrate 2 side. FIG. 3 schematically shows the structure of each pixel 6 on the counter substrate 3 side corresponding to FIG. It is a top view.
In the illustrated example, the pixel 6 is formed in a rectangular shape having a long side along the source line 15 and a short side along the gate line 16. The pixel electrode 14 is provided in each pixel 6 and has a plurality of slits 14 b formed along the source line 15. Although not shown, the common electrode 13 is provided in common across the plurality of pixels 6. The pixel electrode 14 and the common electrode 13 are formed of a transparent conductive material, for example, indium tin oxide (ITO).

  The switching element 7 is, for example, a thin film transistor (TFT). In the illustrated example, a double-gate TFT is shown, but a single-gate TFT may be used. The switching element 7 is provided in each pixel 6 and is electrically connected to the pixel electrode 14 at a connection portion 14 a of the pixel electrode 14. An image signal is supplied to the pixel electrode 14 through the switching element 7, and an electric field is formed between the slit 14b and the common electrode 13, thereby controlling the alignment of liquid crystal molecules.

In the example shown in FIG. 3, a color filter 104 made of R (red), G (green), and B (blue) extends along the second direction Y on the counter substrate 3 at a position corresponding to each pixel 6. It is provided in a band shape. The boundary of each color filter 104 is provided so as to overlap the light shielding layer 102.
Further, in FIG. 3, the light shielding layer 102 is enlarged and formed corresponding to the position where the spacer 120 that maintains the distance between the array substrate 2 and the counter substrate 3 is disposed. This is to prevent the orientation of the liquid crystal molecules from being easily disturbed around the spacer 120 and causing display defects such as light leakage due to the alignment.

(4) Cross-sectional Configuration of Display Panel 1 FIG. 4 is a cross-sectional view taken along the line II of FIG. FIG. 4 is a cross-sectional view defined by a third direction Z perpendicular to the first direction X and the second direction Y. The first direction X, the second direction Y, and the third direction Z may intersect at an angle other than 90 degrees. In the present embodiment, the direction toward the tip of the arrow in the third direction Z is defined as up, and the direction opposite to the direction toward the tip of the arrow in the third direction Z is defined as down. Further, when “the second member above the first member” and “the second member below the first member” are used, the second member may be in contact with the first member or separated from the first member. May be. In the latter case, a third member may be interposed between the first member and the second member.

  The array substrate 2 includes a first insulating substrate 10 such as a glass substrate. The first insulating substrate 10 has a first main surface 10A on the counter substrate 3 side and a second main surface 10B on the opposite side of the first main surface 10A. Further, an undercoat layer 21 is formed on the first main surface 10 </ b> A side of the first insulating substrate 10.

  On the undercoat layer 21, the first insulating film 22, the second insulating film 23, the third insulating film 12, the fourth insulating film 24, the switching element 7, the pixel electrode 14, the common electrode 13, and the first alignment film 18. It has. In the illustrated example, a top gate type and a double gate type are shown, but a bottom gate type or a single gate type may be used.

The undercoat layer 21 covers the first main surface 10 </ b> A of the first insulating substrate 10. The switching element 7 includes a semiconductor layer 17 such as polysilicon, a gate electrode 26, a source electrode 27, and a drain electrode 28. The semiconductor layer 17 is disposed on the undercoat layer 21.
The undercoat layer 21 and the semiconductor layer 17 are covered with a first insulating film 22 made of a silicon oxide film, a silicon nitride film, or the like. The gate electrode 26 of the switching element 7 is formed on the first insulating film 22 and faces the semiconductor layer 17.

  A gate line (first metal line) 16 made of a molybdenum alloy or the like is formed on the first insulating film 22. The gate electrode 26 of the switching element 7 is electrically connected to the gate line 16. Note that the gate electrode 26 may be formed integrally with the gate line 16.

  The gate electrode 26, the gate line 16, and the first insulating film 22 are covered with a second insulating film 23 made of a silicon oxide film, a silicon nitride film, or the like. The source electrode 27 and the drain electrode 28 of the switching element 7 are formed on the second insulating film 23. In the illustrated example, the source electrode 27 is electrically connected to the source line. The source electrode 27 and the drain electrode 28 are connected to the semiconductor layer 17 through contact holes that penetrate the first insulating film 22 and the second insulating film 23, respectively.

  A source line 15 (second metal line) made of aluminum, an alloy thereof, or the like (for example, TAT (Ti / Al / Ti)) is formed on the second insulating film 23. The source electrode 27 of the switching element 7 is electrically connected to the source line 15. The source electrode 27 may be formed integrally with the source line 15.

  On the source electrode 27, the drain electrode 28, and the source line 15, the third insulating film 12 made of a transparent organic resin material or the like is formed. The third insulating film 12 relaxes unevenness caused by the source electrode 27 and the drain electrode 28 of the switching element 7. For example, the third insulating film 12 is the thickest layer among the elements formed on the first main surface 10 </ b> A side of the first insulating substrate 10.

  A first transparent electrode is formed on the third insulating film 12. In the present embodiment, the first transparent electrode is the common electrode 13. On the common electrode 13, in order to reduce the resistance of the common electrode 13, a metal line 20 (third metal line) made of, for example, MAM (Mo / Al / Mo) may be formed. When the third metal line 20 is formed, the opening area of the pixel 6 is not affected by being formed at a position overlapping the source line 15.

A fourth insulating film 24 made of a silicon oxide film, a silicon nitride film, or the like is formed on the common electrode 13.
A second transparent electrode is formed on the fourth insulating film 24. In the present embodiment, the second transparent electrode is the pixel electrode 14 and faces the common electrode 13 that is the first transparent electrode. The pixel electrode 14 is electrically connected to the drain electrode 28 of the switching element 7 through a contact hole that penetrates the third insulating film 12 and the fourth insulating film 24. In the illustrated example, the pixel electrode 14 has a slit 14 b formed along the source line 15. In the present embodiment, the first electrode is a common electrode and the second electrode is a pixel electrode. However, the first electrode may be a pixel electrode and the second electrode may be a common electrode. In that case, the pixel electrode is formed in an island shape in each pixel, and the common electrode has a slit corresponding to each pixel.

  A first alignment film 18 is formed on the fourth insulating film 24 and the pixel electrode 14. The first alignment film 18 is in contact with the liquid crystal layer 4 and aligns the liquid crystal molecules in the liquid crystal layer 4. The first alignment film 18 is subjected to an alignment process by a rubbing process or an optical alignment process.

  The counter substrate 3 includes a second insulating substrate 100 such as a glass substrate. The second insulating substrate 100 has a first main surface 100A on the array substrate 2 side and a second main surface 100B on the opposite side of the first main surface 100A. Further, in the counter substrate 3, a light shielding layer 102, a color filter 104, an overcoat 105, and a second alignment film 110 are formed on the first main surface 100 A side of the second insulating substrate 100.

  The light shielding layer 102 divides each pixel 6 in the display region 8 to form an opening region 30, and faces the source line 15, the gate line 16, and the switching element 7 provided on the array substrate 2 side. ing. That is, it has the 1st part 102a extended along the source line 15, and the 2nd part 102b extended along the gate line 16 (refer FIG. 3).

  The color filter 104 is formed so as to cover the opening region 30 and extends also on the light shielding layer 102. The color filter 104 is formed of, for example, a color resist colored in a color corresponding to the pixel 6. In the illustrated example, the color filter 104 has three colors of R (red), G (green), and B (blue) (see FIG. 3). In addition to the three colors R, G, and B, a W (white) color filter may be provided.

  The color filter 104 is covered with an overcoat 105 made of resin, for example. The overcoat 105 reduces unevenness on the surface of the light shielding layer 102 and the color filter 104. A second alignment film 110 is formed on the overcoat 105. Similar to the first alignment film 18, the second alignment film 110 is in contact with the liquid crystal layer 4 and aligns the liquid crystal molecules in the liquid crystal layer 4. Further, like the first alignment film 18, the alignment process is performed by a rubbing process or a photo-alignment process.

(5) Spacer 120
The spacer 120 will be described with reference to FIG. FIG. 5 is a cross-sectional view taken along the line II-II in FIG.
A spacer 120 is provided between the array substrate 2 and the counter substrate 3. The spacer 120 maintains a distance between the array substrate 2 and the counter substrate 3. In the illustrated example, the spacer 120 has two types of spacers, a first spacer (main spacer) 121 and a second spacer (sub-spacer) 122. These spacers 120 are circular in a plan view and protrude from the counter substrate 3 toward the array substrate 2 side. The spacer 120 may have a shape other than a circle, and may protrude from the array substrate 2 to the counter substrate 3 side. In addition, although the spacer 120 is arrange | positioned by the fixed space | interval and is arrange | positioned for every three pixels in the example shown in figure, it is not limited to this.

  As shown in FIG. 3, the first spacer 121 is formed at the intersection of the first portion 102a and the second portion 102b of the light shielding layer 102 in the counter substrate 3, and is provided at a position where the light shielding layer 102 is enlarged. Yes. In the example shown in FIG. 5, the first spacer 121 is formed in a shape that tapers from the counter substrate 3 side toward the array substrate 2 side. When this tapered side is the top 121 t of the first spacer 121, the top 121 t is in contact with the array substrate 2. That is, the first spacer 121 is formed so as to always keep the distance (gap) between the array substrate 2 and the counter substrate 3 constant.

  As shown in FIG. 3, the second spacer 122 is formed at the intersection of the first portion 102 a and the second portion 102 b of the light shielding layer 102 in the counter substrate 3, and is provided at a position where the light shielding layer 102 is enlarged. Yes. In the example shown in FIG. 5, like the first spacer 121, the second spacer 122 is formed in a shape that tapers from the counter substrate 3 side toward the array substrate 2 side. When this tapered side is the top 122 t of the second spacer 122, the top 122 t is not in contact with the array substrate 2. That is, in the no-load state, a gap is opened between the second spacer 122 and the array substrate 2. However, the second spacer 122 contacts the array substrate 2 when the array substrate 2 and the counter substrate 3 approach each other because the array substrate 2 or the counter substrate 3 is bent. As a result, the minimum distance between the array substrate 2 and the counter substrate 3 is maintained, and a pressure resistance effect is exhibited. In the illustrated example, the second alignment film 110 is formed so as to cover the spacer 120.

(6) Part E1 and part E2 of the display panel 1
Next, the part E1 and the part E2 (refer FIG. 1) of the display panel 1 are demonstrated with reference to FIGS. In addition, since the part E1 and the part E2 are left-right symmetric structures, it demonstrates below paying attention to the part E1. 6 to 8 are schematic enlarged plan views of the portion E1 of FIG. 6 to 8, only the configuration necessary for the description is shown, and the illustration is omitted for the other parts. In FIG. 9, the laminated structure of the array substrate 2 is the same as that in FIGS. 4 and 5, so that only the insulating films are shown and the electrodes and the like are omitted.

  As shown in FIG. 1, the display panel 1 is rectangular at the positions of the parts E <b> 1 and E <b> 2, and the corners of the display area 8 are formed in an arc shape using a light shielding layer 102. FIG. 6 illustrates the structure on the counter substrate 3 side.

  As shown in FIG. 6, the opening region 30 formed in the light shielding layer 102 is gradually formed along the second direction Y in order to make the corners of the display region 8 have an arc shape by using the light shielding layer 102. It is formed in a staircase shape so as to decrease. Specifically, it is formed in a staircase shape so as to be smoothly arc-shaped to the extent that it can be seen by human eyes in plan view. A color filter 104 (not shown) is formed around the display area 8 to form a boundary line 124. That is, one color filter 104 is formed continuously from the display area 8 so as to surround the display area 8. This is provided in order to suppress deterioration in display quality due to a rapid change in the laminated structure of the display area 8 and the non-display area 9. Note that the corners of the display area 8 need only have a circular arc shape that is visible to the human eye in a plan view, and the opening area is not limited to a stepped shape. For example, the size of the opening area may be changed stepwise to form an arc shape that is smooth enough to be seen by human eyes, or the light shielding layer may be formed in an arc shape that matches the arc shape of the display area. May be.

  On the other hand, the light shielding layer 102 is formed on the entire surface from the display region 8 to the end of the counter substrate 3 beyond the boundary line 124. The non-display area 9 is formed by forming the light shielding layer 102 on the entire surface. The seal member 5 (not shown) is formed near the end of the counter substrate 3 rather than the portion E1 (see FIG. 1). That is, in the part E1 and the part E2, the liquid crystal layer 4 which does not contribute to a display is provided, and the space | interval from the display area 8 to the sealing member 5 is large compared with another part. Therefore, if the layer structure from the display region 8 to the seal member 5 is the same in the part E1, the part E2, and the other part, the distance between the array substrate 2 and the counter substrate 3 is constant in the part E1 and the part E2. It will be difficult to keep.

  Therefore, in the present embodiment, as illustrated in FIG. 6, in the region from the boundary line 124 to the seal member 5, the color filter 104 corresponds to the island-shaped portion 126 and the island-shaped portion 126. The spacer 120 formed in this way is provided. The height is adjusted by the island-shaped portion 126, and the spacer 120 is formed on the island-shaped portion 126, thereby matching the height in the display region 8. Therefore, also in the part E1 and the part E2, the space | interval of the array substrate 2 and the opposing board | substrate 3 can be kept constant similarly to another part.

  In FIG. 6, island portions 126 are formed at intervals from the display region 8 and the boundary line 124. This will be described with reference to FIG. In FIG. 7, the opening region 30 corresponding to the pixel 6 contributing to display and the spacer 120 positioned in the display region 8 are indicated by solid lines, the virtual opening region 30 ′ corresponding to the pixel 6 not contributing to display, and the display The virtual spacer 120 ′ when it is also arranged in the non-display area 9 at the same interval as in the area 8 is indicated by a dotted line. Note that the virtual opening region 30 ′ and the virtual spacer 120 ′ are not actually formed.

  As described with reference to FIG. 5, the spacer 120 according to the present embodiment is formed on the counter substrate 3 side and is located on the light shielding layer 102, the color filter 104, and the overcoat 105. In addition, the spacer 120 is formed at a position where it overlaps the boundary between the color filters 104 of different colors, for example, the boundary between the red color filter and the blue color filter (see FIG. 5). Although the unevenness of the color filter 104 and the like is reduced by the overcoat 105 because it is located at the boundary of the color filter 104, the formation of the spacer 120 may be affected by the unevenness when the spacer 120 is formed. There is sex. If the spacer is poorly formed, the alignment film may be damaged, the alignment of the liquid crystal molecules may be disturbed, and the display quality may be deteriorated. Therefore, as shown in FIG. 7, the spacer 120 is formed at a position where the layer structure of the pixels 6 around the spacer 120 is the same, and is not formed at a position where the layer structure of the pixels 6 around the spacer 120 is different.

  For example, when the spacer 120 is formed at the position of the virtual spacer 120 ′, the virtual opening region 30 ′ has a different layer structure in the surrounding pixels 6. That is, in the virtual opening region 30 ′, since the opening region is not actually formed, the light shielding layer 102 is formed in a solid shape, and the color filter 104 is formed thereon in a solid shape. That is, the layers formed in a solid shape overlap each other. Since all the layers are made of resin, there is a possibility that the thickness of the layer structure of the virtual opening region 30 ′ becomes thinner than the thickness of the layer structure of the other opening region 30 due to the smoothing of the surface. Then, the unevenness becomes severer than the boundary of the color filter 104, and even if the unevenness is reduced by the overcoat 105, the spacer 120 is likely to cause a formation failure. Therefore, in the present embodiment, as shown in FIG. 6, a region where the spacer 120 is not formed is provided at a distance from the display region 8 to the vicinity of the boundary line 124. Since the region where the spacer 120 is not formed is smaller than the region from the boundary line 124 to the seal member 5, the display is not affected even if the spacer 120 is not formed.

FIG. 8 illustrates the structure on the array substrate 2 side at a position corresponding to FIG. Further, as a structure on the counter substrate 3 side, a boundary line 124 is indicated by a dotted line, a spacer 120 provided in the display region 8 is indicated by a one-dot chain line, and an opening region 30 provided in the light shielding layer 102 is indicated by a two-dot chain line.
In the present embodiment, as shown in FIG. 6, the light shielding layer 102 is used to form the corners of the display area 8 in an arc shape in the light shielding layer 102 along the second direction Y. The opening region 30 is formed in a stepped shape so as to gradually decrease. On the other hand, the structure on the array substrate 2 side is the same as that of the display region 8 in the portions E1 and E2. That is, also in the portions E1 and E2, the undercoat layer 21, the first insulating film 22, the second insulating film 23, the third insulating film 12, the fourth insulating film 24, the switching element 7, A pixel electrode 14, a common electrode 13, and a first alignment film 18 are provided. Therefore, the alignment of the liquid crystal molecules is controlled at the position where the opening region 30 is not formed, as in the display region 8.

  9 is a cross-sectional view taken along line IV-IV in FIG. In the portions E1 and E2, as shown in FIG. 9, a color filter 104 is formed under the light shielding layer 102 formed on the entire surface. In the display area 8, the color filters 104 are formed in the order of R, G, and B. As shown in FIG. 6, the color filters 104 of the same color (for example, B) are formed around the display area 8. Is formed.

  As shown in FIGS. 6 to 9, in the portions E <b> 1 and E <b> 2, the island portion 126 of the light shielding layer 102 is formed between the seal member 5 and the boundary line 124 with a space from the display region 8 and the boundary line 124. It is regularly formed below. This formed position corresponds to the arrangement of the spacers 120 in the display area 8. The island portion 126 is formed by the color filter 104 (for example, the color filter 104B) having the same color as the color filter 104 positioned around the display area 8.

  As shown in FIG. 9, a first spacer 121 and a second spacer 122 are formed under the island-shaped portion 126, respectively. The portions E1 and E2 are also regularly formed with the same period as the display region 8. Therefore, this forming process can be performed simultaneously with the process of forming the first spacer 121 and the second spacer 122 in the display region 8.

(7) Structure of the edge part of the display panel 1 Next, the structure of the edge part of the display panel 1 is demonstrated with reference to FIG.10 and FIG.11. 10 is a cross-sectional view taken along line VI-VI in FIG. 1, and FIG. 11 is a cross-sectional view taken along line V-V in FIG. 10 shows the structure of the end portion of the display panel 1 in the portions E1 and E2, and FIG. 11 shows the structure of the end portion of the display panel 1 other than the portions E1 and E2. Further, the structure of the end portion of the display panel 1 other than the portions E1 and E2 is formed in substantially the same structure as the structure illustrated in FIG.

  10 is a cross-sectional view taken along line VI-VI in FIG. As shown in FIG. 10, an undercoat layer 21, a first insulating film 22, a second insulating film 23, and a gate driver 50 are formed on the upper surface of the first insulating substrate 10 of the array substrate 2. A third insulating film 12 is formed thereon. In the third insulating film 12, a groove 140 is formed at a position overlapping the seal member 5 to prevent moisture from being transmitted. The groove 140 exposes an insulating film formed below the third insulating film 12. On the third insulating film 12, a fourth insulating film 24, a pixel electrode 14, and the like are stacked, and a first alignment film 18 is formed thereon. In the illustrated example, the first alignment film 18 is formed so as to cover all the grooves 140, but may be interrupted in the middle of the grooves 140.

  As shown in FIG. 10, a light shielding layer 102 is formed on the second insulating substrate 100 of the counter substrate 3. As in the third insulating film 12, moisture is transmitted to the light shielding layer 102. A slit 144 is formed for prevention. In the illustrated example, the slit 144 provided in the light shielding layer 102 is formed so as to face the groove 140 provided in the array substrate 2. Note that the slit 144 and the groove 140 may be formed so as not to face each other, for example, a blue color filter may be formed at a position corresponding to the slit 144, and a light shielding layer is provided on the array substrate 2. May be.

  As shown in FIG. 10, a convex portion 146 is formed at the end of the counter substrate 3. The convex portion 146 is formed of the same material as the spacer 120. The convex portion 146 is formed to face the third insulating film 12 located at the end of the array substrate 2. In this case, when the display panel 1 is cut into a single piece, if there is a seal member 5 at the cutting position, there is a possibility that the display panel 1 is difficult to cut. Therefore, it arrange | positions in order to make it easy to cut a single piece. The third insulating film 12 positioned at the convex portion 146 or the end portion may not be formed.

  As shown in FIG. 10, the array substrate 2 and the counter substrate 3 are bonded together by a seal member 5. The third insulating film 12 has a small thickness at a position overlapping the seal member 5. This is to increase the bonding area of the seal member 5. Note that the third insulating film 12 may be formed with the same thickness up to the trench 140. In FIG. 10, the island-like portions 126 are omitted, and in actuality, the number is larger than the number shown.

  11 is a cross-sectional view taken along the line V-V in FIG. Similar to FIG. 10, the undercoat layer 21, the first insulating film 22, the second insulating film 23, the gate driver 50, the third insulating film 12, and the fourth insulating layer are formed on the upper surface of the first insulating substrate 10 of the array substrate 2. The film 24, the pixel electrode 14, the first alignment film 18 and the like are stacked. As in FIG. 10, the third insulating film 12 is formed with a groove 140 for preventing moisture from being transmitted at a position overlapping the seal member 5, and is formed below the third insulating film 12. Is exposed. In the illustrated example, the first alignment film 18 is formed so as to cover all the grooves 140, but may be interrupted in the middle of the grooves 140.

  Similarly to FIG. 10, as shown in FIG. 11, a light shielding layer 102 is formed on the second insulating substrate 100 of the counter substrate 3, and similarly to the third insulating film 12, moisture is prevented from being transmitted. A slit 144 is formed. In the illustrated example, the slit 144 provided in the light shielding layer 102 is formed so as to face the groove 140 provided in the array substrate 2. The slit 144 and the groove 140 may be formed so as not to face each other, or a light shielding layer may be provided on the array substrate 2 at a position corresponding to the slit 144.

  Similar to FIG. 10, as shown in FIG. 11, a convex portion 146 is formed at the end of the counter substrate 3. The convex portion 146 is formed of the same material as the spacer 120. The convex portion 146 is formed to face the third insulating film 12 located at the end of the array substrate 2. In this case, when the display panel 1 is cut into a single piece, if there is a seal member 5 at the cutting position, there is a possibility that the display panel 1 is difficult to cut. Therefore, it arrange | positions in order to make it easy to cut a single piece. The third insulating film 12 positioned at the convex portion 146 or the end portion may not be formed.

  Similar to FIG. 10, as shown in FIG. 11, the array substrate 2 and the counter substrate 3 are bonded together by a seal member 5. The third insulating film 12 has a small thickness at a position overlapping the seal member 5. This is to increase the bonding area of the seal member 5. Note that the third insulating film 12 may be formed with the same thickness up to the trench 140.

  As shown in FIG. 10, in the portions E1 and E2, the distance L1 from the end 100E of the second insulating substrate 100 of the counter substrate 3 to the opening region 30 located on the outermost periphery is other than the portions E1 and E2, that is, The distance L2 is larger than the distance L2 from the end 100E of the second insulating substrate 100 of the counter substrate 3 other than the corners to the opening region 30 located on the outermost periphery. This is because the portions E1 and E2 are located at the corners of the display area 8, and the corners are formed in an arc shape by the light shielding layer 102. Therefore, if the structure as shown in FIG. 11 is used in the portions E1 and E2, a region where the spacer 120 is not formed becomes large, and it becomes difficult to keep the distance between the array substrate 2 and the counter substrate 3 constant. 2 and the counter substrate 3 may be uneven, which may reduce display quality. The end portion 5E corresponds to a portion closest to the display region 8, and in the illustrated example, corresponds to a vertex portion that is convex toward the display region side. Further, the position on the outermost periphery corresponds to the position closest to the end of the display panel.

  According to the present embodiment, even when the corners of the display area are formed in an arc shape using the light shielding layer, the spacers are arranged at the same positions as in the display area at the arc-shaped positions. The distance between the array substrate 2 and the counter substrate 3 can be kept constant, and the deterioration of display quality can be suppressed.

  Further, according to the present embodiment, the spacer is formed only at a position where the laminated structure between the spacer and the substrate is the same around the spacer. As a result, poor formation of spacers can be suppressed, and deterioration in display quality can be suppressed.

  Based on the embodiments of the present invention, all embodiments that can be implemented by those skilled in the art with appropriate design changes are also within the scope of the present invention as long as they include the gist of the present invention.

  Further, within the scope of the idea of the present invention, those skilled in the art can conceive various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. . For example, those in which the person skilled in the art appropriately added, deleted, or changed the design of the above-described embodiment, or those in which a process was added, omitted, or changed conditions also include the gist of the present invention. As long as it falls within the scope of the present invention.

  For example, a touch panel may be provided integrally with the display panel 1 of the above embodiment. In this case, the common electrode 13 in the second direction on the array substrate 2 of the above embodiment serves as both the common electrode of the liquid crystal display device and the first sensor electrode (TX electrode) of the touch sensor. Further, the second sensor electrode (RX electrode) may be formed on the counter substrate 3 at predetermined intervals so as to extend in the first direction (X-axis direction).

  In addition, other functions and effects brought about by the correspondence described in the present embodiment are apparent from the description of the present specification, or can be conceived by those skilled in the art from time to time. .

DESCRIPTION OF SYMBOLS 1 ... Display panel, 2 ... Array substrate, 13 ... Common electrode, 14 ... Pixel electrode, 15 ... Source line, 16 ... Gate line, 18 ... 1st alignment film 50 ... Gate driver, 52 ... Source driver, 102 ... Light-shielding layer, 104 ... Color filter, 105 ... Overcoat, 110 ... Second alignment film, 121 ... First 1 spacer, 122 ... second spacer, 124 ... boundary line, 126 ... island-shaped part

Claims (7)

A display panel having a display area provided with a plurality of pixels, and a non-display area located around the display area,
The display panel is
A first substrate having a first electrode formed across the plurality of pixels and a second electrode formed to face the first electrode;
A second substrate having a light shielding layer facing the first substrate and having an opening region corresponding to each of the plurality of pixels;
A sealing member for bonding the first substrate and the second substrate;
A liquid crystal layer sandwiched between the first substrate and the second substrate and sealed by the sealing member,
The distance from the end of the second substrate at the corner of the display region to the opening region located at the outermost periphery is located at the outermost periphery from the end of the second substrate between the corners. A liquid crystal display device having a larger distance than the opening region. In plan view, the corner portion has the opening region formed in a step shape.
The liquid crystal display device according to claim 1. Furthermore, the second substrate includes a color filter formed to cover the light shielding layer,
The color filter is formed in a band shape in the display region, and is formed in an island shape in the non-display region corresponding to the corner portion.
The liquid crystal display device according to claim 1. And a spacer positioned between the first substrate and the second substrate,
4. The liquid crystal display device according to claim 1, wherein the spacers are arranged at regular intervals in the display area and the non-display area corresponding to the corner portion. 5.   5. The liquid crystal display device according to claim 4, wherein in the non-display region, the island-shaped portion where the color filter is formed in an island shape is provided corresponding to a position where the spacer is formed.   The liquid crystal display device according to claim 4, wherein the spacer is not disposed at a position where the opening region is formed in the stepped shape. The liquid crystal display device according to claim 1, wherein a corner portion of the display panel corresponding to the corner portion is a rectangle.

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