JP2019071458A - Chip resistor - Google Patents

Abstract

A chip resistor having a wide and flat terminal electrode on the surface and high connection reliability between a surface electrode and a terminal electrode is provided. A chip resistor of the present invention is provided between a rectangular parallelepiped insulating substrate 1, a pair of front electrodes 2 provided at both longitudinal ends of the surface of the insulating substrate 1, and both the front electrodes 2. A resistor 3, an insulating protective layer 4 that covers the entire surface of both surface electrodes 2 and the resistor 3, a pair of terminal electrodes 5 provided on both end surfaces in the longitudinal direction of the insulating substrate 1, and the pair of terminal electrodes A surface electrode 2 sandwiched between the insulating substrate 1 and the protective layer 4 is exposed from the end surfaces on the short side and the long side of the insulating substrate 1, respectively. The terminal electrode 5 is connected to the exposed portion of the surface electrode 2 by wrapping around both end surfaces of the insulating substrate 1 in the short direction. [Selection] Figure 1

Description

  The present invention relates to a chip resistor suitable for use as a substrate inner layer type component.

  In general, the chip resistor comprises a rectangular parallelepiped insulating substrate, a pair of front electrodes provided at both ends in the longitudinal direction of the surface of the insulating substrate, a resistor provided between the two front electrodes, and a resistor. Mainly composed of an insulating protective layer to cover, a pair of back electrodes provided at both ends in the longitudinal direction on the back surface of the insulating substrate, and a pair of terminal electrodes for electrically connecting the front electrode and the back electrode. The body is trimmed for resistance adjustment.

  In recent years, along with the reduction in size and weight of electronic devices and the complication of circuit configuration, such chip resistors are not only surface-mounted on circuit boards and used, but also inside resin layers such as laminated circuit boards and the like. There is a case where it is embedded and used as an inner layer type chip resistor. In that case, since the wiring pattern on the surface of the resin layer and the chip resistor inside are connected via the via, it is desirable that the surface of the terminal electrode connected to the via be wide and flat, and a configuration corresponding to such a demand As an example, a chip resistor is known which has a wide and flat terminal electrode on its surface (see, for example, Patent Document 1).

  In the chip resistor disclosed in Patent Document 1, the terminal electrode is formed so as to form a wide and flat surface by extending the terminal electrode from the front electrode to a position reaching the upper surface of the protective layer. Is formed so as to cover the overlapping portion (convex shape) of the front electrode and the resistor, the surface of the terminal electrode is not necessarily flat, and there may be gentle unevenness.

  Therefore, conventionally, as described in Patent Document 2, the protective layer is formed so as to cover the entire surface of the front electrode and the resistor, and the terminal electrode is formed so as to extend around the planarized upper surface of the protective layer. By doing this, a chip resistor is proposed in which the surface of the terminal electrode is made flat.

JP, 2011-91140, A JP, 2005-268302, A

  However, when the terminal electrode is formed on the upper surface of the planarized protective layer as in the chip resistor described in Patent Document 2, the thickness equivalent of the surface electrode exposed between the insulating substrate and the protective layer, that is, the surface electrode Since the terminal electrode can only be connected to the exposed end face of the electrode, there arises a problem that the connection reliability between the front electrode and the terminal electrode is lowered. In particular, as the external dimensions of the chip resistor are reduced in size, it is necessary to form the thickness of the front electrode very thin, and the connection reliability between the front electrode and the terminal electrode is extremely deteriorated.

  The present invention has been made in view of the above-described situation of the prior art, and its object is to provide a chip resistor having a wide and flat terminal electrode on the surface and high connection reliability between the front electrode and the terminal electrode. To provide.

  In order to achieve the above object, the chip resistor of the present invention is provided between a rectangular parallelepiped insulating substrate, a pair of front electrodes provided at both ends in the longitudinal direction of the surface of the insulating substrate, and both front electrodes. The resistor, an insulating protective layer covering the entire surface of the resistor and the two front electrodes, a pair of terminal electrodes provided on both end surfaces in the longitudinal direction of the insulating substrate, and the pair of terminal electrodes And an external electrode, wherein the front electrode is exposed to each end face from between the insulating substrate and the protective layer on the short side and the long side of the insulating substrate, and the terminal electrode is on the insulating substrate It is configured to be connected to the exposed portion of the front electrode by going around to both end surfaces in the short direction of the.

  In the chip resistor configured in this manner, the front electrode covered by the protective layer is exposed from each of the end faces on the short side and the long side of the insulating substrate, and the terminal electrode is the end face in the longitudinal direction of the insulating substrate In addition, since it is connected to the exposed part of the front electrode by turning around both end surfaces in the short direction, a wide and flat terminal electrode is formed on the upper surface of the protective layer, and connection reliability between the front electrode and the terminal electrode is obtained. Can be enhanced.

  In the above configuration, the front electrode may have a film thickness portion formed partially thick, and the terminal electrode may be connected to the end face of this film thickness portion, in which case, the front electrode and the terminal The connection reliability with the electrodes can be further enhanced.

  In this case, it is possible to adopt a configuration in which only a part of the front electrode is made to have a laminated structure, and the front electrode of this laminated portion is made to be a film thickness portion. Alternatively, a concave portion connected to at least one of the longitudinal end face and the latitudinal end face is formed on the surface of the insulating substrate, and the surface electrode of the portion formed in the concave portion is a film thickness portion. Is also possible.

  According to the present invention, the front electrode covered by the protective layer is exposed from each end face of the short side and the long side of the insulating substrate, and the terminal electrode is not only the end face in the longitudinal direction of the insulating substrate but also the short direction A chip resistor having a wide and flat terminal electrode on the surface and having high connection reliability between the front electrode and the terminal electrode since it wraps to both end surfaces and is connected to the exposed portion of the front electrode. it can.

It is a top view of the chip resistor concerning a 1st example of an embodiment of the present invention. It is a side view of this chip resistor. It is sectional drawing in alignment with the III-III line of FIG. It is a top view which shows the manufacturing process of this chip resistor. It is a side view which shows the manufacturing process of this chip resistor. It is sectional drawing which shows the manufacturing process of this chip resistor. It is a top view of the chip resistor concerning a 2nd embodiment of the present invention. It is sectional drawing in alignment with the VIII-VIII line of FIG. It is a top view of the chip resistor concerning a 3rd embodiment of the present invention. It is sectional drawing in alignment with XX of FIG. The modification of an insulating substrate is shown, the figure (a) is a top view, and the figure (b) is a side view. The other modification of an insulated substrate is shown, the figure (a) is a top view, and the figure (b) is sectional drawing.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. The chip resistor according to the first embodiment of the present invention is a substrate inner layer type component used by being embedded inside a resin layer of a laminated circuit substrate (not shown), as shown in FIGS. A rectangular parallelepiped insulating substrate 1, a pair of front electrodes 2 provided at both ends in the longitudinal direction on the surface of the insulating substrate 1, a rectangular resistor 3 provided to be connected to the front electrodes 2, and both An insulating protective layer 4 covering the entire surface of the front electrode 2 and the resistor 3 and a pair of terminal electrodes 5 provided at both ends in the longitudinal direction of the insulating substrate 1 are mainly formed.

  The insulating substrate 1 is made of ceramics or the like, and the insulating substrate 1 is obtained by dividing a large-sized substrate, which will be described later, along primary and secondary division grooves extending in the vertical and horizontal directions.

  The pair of front electrodes 2 is formed by screen printing of an Ag-based paste, dried and fired, and the front electrodes 2 on the left side of the figure are defined by the short side on the left side of the insulating substrate 1 and both long sides adjacent thereto. The front electrode 2 on the right side of the figure is formed in a rectangular area defined by the short side on the right side of the insulating substrate 1 and the two long sides adjacent thereto.

  The resistor 3 is obtained by screen-printing a resistor paste such as ruthenium oxide, dried and fired, and both ends in the longitudinal direction of the resistor 3 overlap the front electrode 2 respectively. Although not shown, a trimming groove for adjusting the resistance value is formed in the resistor 3.

  The protective layer 4 is formed so as to cover the entire surfaces of the two front electrodes 2 and the resistor 3, so the total of three end surfaces of the left end surface and the upper and lower end surfaces of the front electrode 2 located on the left side in FIG. The three end faces, i.e., the right end face and the upper and lower end faces of the front electrode 2 located on the right side, are exposed from between the insulating substrate 1 and the protective layer 4.

  The pair of terminal electrodes 5 is formed by dipping, drying and baking Ag paste or Cu paste, and these terminal electrodes 5 wrap around from the both longitudinal end surfaces of the insulating substrate 1 to predetermined positions on both lateral end surfaces. It is formed. Thereby, the terminal electrode 5 located on the left side in FIG. 1 is connected to the three end faces (left end face and upper and lower end faces) of the left front surface electrode 2 exposed from between the insulating substrate 1 and the protective layer 4 The electrode 5 is connected to three end faces (right end face and upper and lower end faces) of the right front electrode 2 exposed from between the insulating substrate 1 and the protective layer 4. Although not shown, the surface of the terminal electrode 5 is plated with Ni, Cu, or the like (external electrode).

  Next, a method of manufacturing the chip resistor configured as described above will be described with reference to FIGS.

  First, a large-sized substrate 1A in which a large number of insulating substrates 1 are taken is prepared. In this large-sized substrate 1A, primary divisional grooves and secondary divisional grooves (both not shown) are provided in advance in a grid shape, and each one of the squares divided by both divisional grooves forms one chip It becomes an area. Although the chip formation area for one chip is shown representatively in FIGS. 4 to 6, in actuality, each process described below is collectively performed on the large substrate 1A corresponding to a large number of chip formation areas. To be done.

  That is, as shown in FIGS. 4 (a), 5 (a) and 6 (a), a resistor paste such as ruthenium oxide is screen-printed on the surface of the large substrate 1A, and then dried and fired. As a result, the rectangular resistor 3 is formed in the center of the surface of the large substrate 1A.

  Next, an Ag-based paste is printed on the surface of the large-sized substrate 1A, dried, and fired to form the surface of the large-sized substrate 1A as shown in FIGS. 4 (b), 5 (b) and 6 (b). A pair of front electrodes 2 overlapping with both longitudinal ends of the resistor 3 are formed. At that time, one front electrode 2 is formed in a rectangular area surrounded by the left short side of the insulating substrate 1 and both long sides adjacent thereto, and the other front electrode 2 is adjacent to the right short side of the insulating substrate 1 It is formed in a rectangular area surrounded by both long sides. The order of forming the front electrode 2 and the resistor 3 may be reverse to the above, and specifically, after the pair of front electrodes 2 are formed, both end portions in the longitudinal direction overlap the front electrodes 2. The resistor 3 may be formed.

  Next, in order to reduce the damage to the resistor at the time of forming the trimming groove, a glass paste (not shown) is screen-printed, dried and fired to form an undercoat layer covering the resistor 3, and then this is formed. A trimming groove is formed on the resistor 3 from above the undercoat layer to adjust the resistance value. Thereafter, an epoxy resin paste is screen-printed so as to cover the undercoat layer and cured by heating, as shown in FIG. 4 (c), FIG. 5 (c) and FIG. 6 (c). A protective layer 4 covering the entire surface of the resistor 2 and the resistor 3 is formed.

  The process up to this point is batch processing of the large-sized substrate 1A, but in the next step, the same size as the chip resistor can be obtained by dividing the large-sized substrate 1A along the primary and secondary dividing grooves by dicing. The chip single chip (piece) is obtained. As described above, each chip formation region of the large substrate 1A is the insulating substrate 1 for one piece.

  Then, by dipping Ag paste or Cu paste at both longitudinal end portions of each chip alone, and drying and baking it, as shown in FIGS. 4 (d), 5 (d) and 6 (d), insulation is achieved. A pair of terminal electrodes 5 is formed on both ends of the substrate 1 in the longitudinal direction. Finally, by applying Ni plating, Cu plating or the like (external electrode) to these terminal electrodes 5, a chip resistor as shown in FIGS. 1 to 3 is completed. At this time, the pair of terminal electrodes 5 is formed to extend from both end surfaces of the insulating substrate 1 in the longitudinal direction to predetermined positions on both end surfaces in the lateral direction. Therefore, one terminal electrode 5 is formed between the insulating substrate 1 and the protective layer 4 Three end faces (right end surface) of the front electrode 2 shown in the drawing that are connected to the three end surfaces (left end surface and upper and lower end surfaces) of the left front surface electrode 2 exposed and exposed from between the insulating substrate 1 and the protective layer 4 It is connected with the right end face and the upper and lower end faces). Therefore, after forming the wide and flat terminal electrode 5 on the planarized upper surface of the protective layer 4, the connection reliability between the terminal electrode 5 and the front electrode 2 can be significantly improved.

  FIG. 7 is a plan view of a chip resistor according to a second embodiment of the present invention, FIG. 8 is a sectional view taken along the line VIII-VIII in FIG. 7, and the parts corresponding to FIGS. Is attached.

  The difference between the chip resistor according to the second embodiment and the chip resistor according to the first embodiment is that the edge portion of the front electrode 2 is thicker than the other portion and the film thickness portion 6 of the two-layer structure is None, the terminal electrode 5 is connected to the end face of the film thickness portion 6, and the other configuration is basically the same.

  That is, as shown in FIG. 7 and FIG. 8, after forming a pair of front electrodes 2 connected to the resistor 3, Ag-based paste is screen printed on the end portions of these front electrodes 2 and dried and fired. The auxiliary electrode 2a is formed only at the edge portion of the front electrode 2, and the front electrode 2 of this portion is a film thickness portion 6 of the two-layer structure. The protective layer 4 is formed to cover the entire surface of the front electrode 2 including the auxiliary electrode 2a and the resistor 3. Therefore, the left end surface and the upper and lower ends of the film thickness portion 6 of the front electrode 2 positioned on the left side in FIG. A total of three end faces of the surface are exposed from between the insulating substrate 1 and the protective layer 4 and a total of three end faces of the right end face and the upper and lower end faces of the film thickness portion 6 of the front electrode 2 located on the right side are between the insulating substrate 1 and the protective layer 4 It will be in the state exposed from. Therefore, the connection reliability between the front electrode 2 and the terminal electrode 5 can be further enhanced by connecting the terminal electrode 5 to the film thickness portion 6 of the front electrode 2 whose exposed area is thus increased.

  FIG. 9 is a plan view of a chip resistor according to a third embodiment of the present invention, FIG. 10 is a cross-sectional view taken along the line X-X in FIG. 9, and the portions corresponding to FIGS. Is attached.

  The chip resistor according to the third embodiment differs from the chip resistor according to the first embodiment in that stepped recesses 1 a are formed at both ends in the longitudinal direction of the insulating substrate 1, and A part is formed in the concave portion 1a to be a film thickness portion, and the other configuration is basically the same.

  That is, as shown in FIGS. 9 and 10, a recess 1a is formed at an end in the longitudinal direction on the surface of insulating substrate 1, and this recess 1a is on the short side of insulating substrate 1 and both long sides adjacent thereto. It is connected. The front electrode 2 is formed on both ends in the longitudinal direction of the insulating substrate 1 including the recess 1a, so the film thickness of the front electrode 2 is not uniform, and the portion formed in the recess 1a is thicker than the other portions. It becomes a film thickness part. That is, in the second embodiment described above, the front electrode 2 is protruded upward by the auxiliary electrode 2a to form a film thickness portion, but in the third embodiment, the front electrode 2 is lowered by the concave portion 1a of the insulating substrate 1 It is made to protrude to the side and is made into the film thickness part.

  The resistor 3 is formed on the surface of the insulating substrate 1 so that both longitudinal ends overlap the front electrode 2, and the protective layer 4 is formed to cover the entire surface of the front electrode 2 and the resistor 3. In FIG. 9, a total of three end faces of the left end face and upper and lower end faces of the film thickness part of the front electrode 2 located in the recess 1a on the left side are exposed from between the insulating substrate 1 and the protective layer 4 and located in the recess 1a on the right A total of three end faces of the right end face and the upper and lower end faces of the film thickness part of the front electrode 2 are exposed from between the insulating substrate 1 and the protective layer 4. Therefore, by connecting the terminal electrode 5 to the film thickness portion of the front electrode 2 whose exposed area is increased by the concave portion 1a, the connection reliability between the front electrode 2 and the terminal electrode 5 as in the second embodiment. Can be further enhanced.

  In the third embodiment described above, the stepped recess 1a is formed at the end in the longitudinal direction of the surface of the insulating substrate 1. However, as in the modification shown in FIG. It is also possible to form a V-groove-shaped recess 1 b extending in parallel along the short side on the surface of the insulating substrate 1. In this case, as is apparent from the side view of FIG. 11B, the recess 1b is connected to both end surfaces of the insulating substrate 1 in the short direction, and the front electrode is provided on both ends of the insulating substrate 1 including the recess 1b. Since 2 is formed, the film thickness portion of the front electrode 2 formed in the recess 1 b is not exposed from both end surfaces in the longitudinal direction of the insulating substrate 1, but the film of the front electrode 2 from both end surfaces in the lateral direction of the insulating substrate 1 The thick part will be exposed. Therefore, as compared with the case where the surface of insulating substrate 1 is made flat as in the first embodiment, the exposed area of front electrode 2 can be increased by an amount corresponding to the cross sectional shape of recess 1b. The connection reliability between the electrode 2 and the terminal electrode 5 can be enhanced.

  Alternatively, as in the other modification shown in FIG. 12, a plurality of recesses 1c extending inward from the short side are formed in the surface of insulating substrate 1, and front electrode 2 formed in these recesses 1c is used. It is also possible to use a film thickness portion. In this case, the recess 1c is connected to both end surfaces of the insulating substrate 1 in the longitudinal direction, and the front electrodes 2 are formed at both ends of the insulating substrate 1 including the recess 1c in the longitudinal direction. Although the film thickness portion 2 is not exposed from both end surfaces in the width direction of the insulating substrate 1, the film thickness portions of the front electrode 2 are exposed from both end surfaces in the longitudinal direction of the insulating substrate 1. Therefore, as compared with the case where the surface of insulating substrate 1 is made flat as in the first embodiment, the exposed area of front electrode 2 can be increased by an amount corresponding to the cross sectional shape of recess 1c. The connection reliability between the electrode 2 and the terminal electrode 5 can be enhanced.

  In each of the embodiments described above, the chip resistor having no electrode on the back surface of the insulating substrate has been described. However, a pair of back electrodes is formed on the end in the longitudinal direction on the back surface of the insulating substrate. It may be connected to both the electrode and the back electrode. In this case, when the chip resistor is formed in the resin layer of the laminated circuit board, it becomes possible to connect not only the wiring pattern on the surface side of the resin layer but also the wiring pattern on the back side.

1 Insulating Substrate 1A Large-size Substrate 1a, 1b, 1c Recess 2 Front Electrode 2a Auxiliary Electrode 3 Resistor 4 Protective Layer 5 Terminal Electrode 6 Film Thickness Section

Claims (1)

  A rectangular parallelepiped insulating substrate, a pair of front electrodes provided on both ends of the surface of the insulating substrate in the longitudinal direction, a resistor provided between the two front electrodes, the entire surface of the resistor and the two front electrodes And an external electrode covering the pair of terminal electrodes, wherein the front electrode is the short side of the insulating substrate. The terminal electrode is exposed to each end face from between the insulating substrate and the protective layer on the side and the long side, and the terminal electrode extends to both end surfaces in the short direction of the insulating substrate to expose the exposed portion of the front electrode Chip resistor characterized in that it is connected to.