JP2017055465A - Dc power supply device and air conditioner with the same mounted therein - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a DC power supply device which reduces the number of components and improves circuit efficiency for a DC power supply for obtaining a high DC voltage of a DC output power source by improving a power factor of an AC power source, and an efficient air conditioner.SOLUTION: The DC power supply device comprises: a bridge rectification circuit including first and second MOSFET (Q1 and Q2) and first and second diodes D1 and D2; a reactor 12; a smoothing capacitor 13; and a control circuit 16 which repeats a turning-on/turning-off operation multiple times in such a manner that any one of the MOSFET is electrified. The MOSFET has a super junction structure in which a p-type semiconductor layer and an n-type semiconductor layer are alternately disposed in a drift region of a semiconductor and has such a property that a reverse recovery time in the case where a gate signal is being kept in an OFF signal is shorter than a reverse recovery time in the case where the gate signal is switched from an ON signal to the OFF signal when switching an application voltage from a backward voltage to a forward voltage.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a DC power supply device that converts an AC voltage of an AC power supply into a DC voltage and outputs the same, and an air conditioner equipped with the DC power supply device.

Predetermined control using a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) instead of a diode on the side where the reactor of the bridge rectifier circuit consisting of four diodes is connected to the AC power supply. There is a method called synchronous rectification in which the efficiency of the rectifier circuit is improved.
In addition, there is a method using a parasitic diode of a MOSFET connected in parallel to the MOSFET (Patent Document 1).

Japanese Patent No. 4984751

However, although the synchronous rectification circuit disclosed in Patent Document 1 can improve the circuit efficiency because the MOSFET is connected in parallel to the diode, the number of circuit components is reduced because the components are configured in parallel. There is a problem that it cannot be reduced in size.
In addition, it is controlled by a method of performing ON / OFF operation of the MOSFET once during a half cycle of the AC power supply, and the output voltage range that can be boosted is limited and a rectifier circuit that obtains a high output voltage of the DC output power supply cannot be realized There is a problem.
Moreover, since the harmonic current component contained in the AC power supply current is high, there is a problem that the power factor of the input power supply is low.
In addition, although a method using a parasitic diode of a MOSFET as a diode connected in parallel to the MOSFET is also shown, since the switching speed of the parasitic diode is generally slow, when performing a switching operation for turning on / off each MOSFET, There is a problem in that an overcurrent that flows when a MOSFET is short-circuited with a DC output power supply occurs.
For this reason, when the switching operation is performed a plurality of times during a half cycle of the AC power supply or when the switching operation is repeated at an audio frequency exceeding 15 kHz, for example, 15 kHz or more, the switching loss increases and the circuit efficiency of the rectifier circuit decreases. There is a problem of doing.
Furthermore, when a switching operation is performed a plurality of times during a half cycle of the AC power supply, a current flows through one of the two MOSFETs, compared to a method in which a diode is connected in parallel. There exists a subject that the emitted-heat amount of MOSFET is large.
In addition, when channel current is applied by applying a gate signal while current is flowing through a parasitic diode, the point of loss of the diode function is not considered, and a diode connected in parallel to the MOSFET is connected. Compared to the case, the reverse recovery time is increased, the short-circuit current for short-circuiting the DC power supply is increased, and there is a problem that the short-circuit time is increased and the element may be damaged.

  The present invention was devised in view of the above-described problems, and a DC power supply that improves the power factor by suppressing the harmonic current component of the AC power supply and obtains a DC voltage of a high DC output power supply has a small number of parts. An object of the present invention is to provide a DC power supply device with high circuit efficiency. Moreover, it aims at providing the efficient air conditioner carrying the said DC power supply device.

In order to solve the above-described problems and achieve the object of the present invention, the present invention is configured as follows.
That is, the DC power supply device of the present invention includes the first and second MOSFETs connected in series between the positive electrode terminal and the negative electrode terminal of the DC output power supply and the first connected in series between the positive electrode terminal and the negative electrode terminal. A bridge rectifier circuit having a second diode, a reactor connected between one end of an AC power source and a series connection point of the first and second MOSFETs, and a positive terminal and a negative terminal of the DC output power source A smoothing capacitor connected between the first and second MOSFETs in a half cycle of the AC power supply so that the current flowing through the reactor is passed through the first and second MOSFETs a plurality of times. A control circuit for turning on / off a second MOSFET, and the other end of the AC power supply is connected to a series connection point of the first and second diodes, and the first and second MOSFETs are connected to each other. , Having a super junction structure in which p-type semiconductor layers and n-type semiconductor layers are alternately arranged in the drift region of the semiconductor, and the gate signal is turned on when the applied voltage is switched from the reverse voltage to the forward voltage. Compared with the reverse recovery time when switching from the OFF signal to the OFF signal, the reverse recovery time when the gate signal is kept at the OFF signal is short.

  Moreover, the air conditioner of this invention is equipped with the said DC power supply device, It is characterized by the above-mentioned.

  Other means will be described in the embodiment for carrying out the invention.

  ADVANTAGE OF THE INVENTION According to this invention, the direct current power supply which improves the power factor by suppressing the harmonic current component of alternating current power supply, and obtains the direct current voltage of a high direct current output power supply can provide a direct current power supply device with high circuit efficiency with a small number of parts. . In addition, an efficient air conditioner equipped with the DC power supply device can be provided.

It is a figure which shows the structural example of the direct-current power supply device which concerns on 1st Embodiment of this invention, (a) shows the structure of a direct-current power supply device, and the connection relation of alternating current power supply and load, (b) is MOSFET and parasitic The relationship of the diode is shown. It is a figure which shows the structural example of the cross section of MOSFET used in FIG. 1, (a) shows the cross-sectional structure of MOSFET, (b) has expanded and shown the structure of the source | sauce and gate vicinity of MOSFET. It is a figure which shows the measurement circuit which measures the reverse recovery time at the time of the gate voltage application of MOSFET concerning 1st Embodiment of this invention, (a) shows the circuit example which measures the reverse recovery time at the time of gate signal simultaneous switching , (B) show the Gate signals 1 and 2 and the reverse current waveform during the reverse recovery time measurement. It is a figure which shows the measurement circuit which measures the reverse recovery time when the gate voltage of MOSFET which concerns on 1st Embodiment of this invention is OFF, (a) shows the circuit which measures the reverse recovery time when the gate signal of Q1 is OFF , (B) show the Gate signals 1 and 2 and the reverse current waveform during the reverse recovery time measurement. It is a figure which shows the voltage of the direct-current power supply device shown in FIG. 1, a current waveform, and a control signal. It is a figure which shows the electric current conduction path | route for every operation mode which concerns on 1st embodiment of this invention, (a) shows the electric current path | route in case the side where the voltage of AC power supply is connected to a reactor is higher, (b) Indicates a current path when both MOSFETs are off, (c) indicates a current path when the MOSFET is turned off from on, and (d) indicates a current path when Q2 is on with Q1 off. Is shown. It is a figure which shows the structural example of the DC power supply device which concerns on 2nd Embodiment of this invention, (a) shows the structure of a DC power supply device, and the connection relation of AC power supply and load, (b) is control of MOSFET Each signal associated with a signal is shown. It is a figure which shows the structural example of the air conditioner which concerns on 3rd Embodiment of this invention.

  Hereinafter, modes for carrying out the present invention (hereinafter referred to as “embodiments”) will be described with reference to the drawings as appropriate.

<< First Embodiment >>
A DC power supply device according to a first embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram illustrating a configuration example of a DC power supply device according to the first embodiment of the present invention. FIG. 1A illustrates a configuration of a DC power supply device and a connection relationship between an AC power supply and a load. Indicates the relationship between MOSFETs (Q1, Q2) and parasitic diodes.

<Configuration and operation of DC power supply: Part 1>
In FIG. 1A, a DC power supply device 100 includes an n-type MOSFET (Q1: first MOSFET), an n-type MOSFET (Q2: second MOSFET), a diode D1 (first diode), and a diode. D2 (second diode), reactor 12, smoothing capacitor 13, AC power supply voltage detection circuit 11, DC output voltage detection circuit 15, current detection circuit 14, and control circuit 16 are included.
An outline of functions and operations of the DC power supply apparatus 100 is as follows.
The DC power supply device 100 rectifies AC voltage (electric power) into DC voltage (electric power) by the bridge rectifier circuit composed of the MOSFETs (Q1, Q2) and the diodes D1, D2, and smoothes and stabilizes by the smoothing capacitor 13. The converted DC voltage (electric power) is output.
Further, the MOSFET (Q1, Q2) is subjected to predetermined control by the control circuit 16 based on the voltage and current signals from the reactor 12, the AC power supply voltage detection circuit 11, the DC output voltage detection circuit 15 and the current detection circuit 14. Thus, the DC power supply device 100 performs a boosting operation and an operation for securing a predetermined power factor.

Next, the configuration and operation of each part of the DC power supply device 100 will be described in detail.
The source electrode of the MOSFET (Q1) and the drain electrode of the MOSFET (Q2) are connected, the drain electrode of the MOSFET (Q1) is connected to the positive terminal Ep of the DC output power supply, and the source electrode of the MOSFET (Q2) is the DC output It is connected to the negative terminal En of the power source.
The anode of the diode D1 and the cathode of the diode D2 are connected, the cathode of the diode D1 is connected to the positive terminal Ep, and the anode of the diode D2 is connected to the negative terminal En.
The positive electrode (or one end) of the smoothing capacitor 13 is connected to the positive electrode terminal Ep, and the negative electrode (or the other end) is connected to the negative electrode terminal En.
The drain electrode of the MOSFET (Q1) and the source electrode of the MOSFET (Q2) are connected to one end of the AC power supply 110 via the reactor 12.
The anode of the diode D1 and the cathode of the diode D2 are connected to the other end of the AC power supply 110.

As described above, since the bridge rectifier circuit is configured by the MOSFETs (Q1, Q2) and the diodes D1, D2 that are subjected to predetermined control, the AC voltage (power) of the AC power supply 110 is the bridge rectifier circuit. The DC voltage (power) is rectified and accumulated in the smoothing capacitor 13.
Further, the positive terminal Ep and the negative terminal En are terminals of the DC output power supply of the DC power supply device 100.
Further, both terminals of the smoothing capacitor 13, that is, the positive terminal Ep and the negative terminal En are connected to the load 120 and supply a DC voltage (electric power) to the load 120.

<Parasitic diode: Part 1>
As shown in FIG. 1B, the MOSFET (Q1, Q2) necessarily includes a parasitic diode Dp between the source and the drain due to the structure of the MOSFET.
The charge stored in the depletion layer formed on the pn junction surface of the parasitic diode Dp causes the reverse recovery current described above or described later.
The parasitic diode Dp is not shown in FIG.
The specific configuration of the parasitic diode Dp will be described later.

<Configuration and operation of DC power supply: Part 2>
Again, FIG. 1A will be described.
The control circuit 16 detects the AC voltage of the AC power supply 110, the AC power supply voltage detection circuit 11, the DC output voltage detection circuit 15 that detects the DC output voltage across the smoothing capacitor 13, and the current that charges the smoothing capacitor 13. It has a function of outputting drive signals for the MOSFETs (Q1, Q2) by performing arithmetic processing on the input signals from the current detection circuit.

In the bridge rectifier circuit (Q1, Q2, D1, D2), when the MOSFETs (Q1, Q2) are both off, the terminal voltage on the side connected to the reactor 12 of the AC power supply 110 is higher than the other terminal voltages. In some cases, the current flowing out from the AC power supply 110 flows through the pn junction (parasitic diode Dp) between the source and drain of the semiconductor element inside the reactor 12 and the MOSFET (Q1). Then, charge is supplied to the positive electrode of the smoothing capacitor 13.
Further, the current flowing out from the negative electrode of the smoothing capacitor 13 returns to the AC power source 110 through the diode D2. That is, a full-wave rectifier circuit is configured.
At this time, if an ON signal is given to the gate of the MOSFET (Q1) flowing through the pn junction, a channel (n) as a MOSFET is formed in the pn junction layer and the source to the drain, that is, the MOSFET The reverse current of (Q1) can be passed.
Note that “reverse current” is indicated because an n-type MOSFET normally flows current from the drain to the source, and flowing from the source to the drain corresponds to the reverse direction.

Further, when the voltage instantaneous value of the AC power supply 110 is lower than the DC voltage of the smoothing capacitor 13, the following boosting operation is performed.
When the voltage on the side connected to the reactor 12 of the AC power supply 110 is high, the MOSFET (Q2) is turned on, the AC power supply 110 is short-circuited through the reactor 12, the MOSFET (Q2), and the diode D2, and the reactor 12 stores energy.
Then, after a predetermined time has elapsed, the MOSFET (Q2) is turned off (OFF), and through the MOSFET (Q1) (the parasitic diode of Q1 is conductive), the return current is supplied to the smoothing capacitor 13 (the energy of the reactor 12 is released). A step-up operation for charging the charge is performed.
When an ON signal is given to the MOSFET (Q1) in which the reverse current flows, a channel (n) as a MOSFET is formed in the pn junction layer of the MOSFET (Q1), and the direction from the source to the drain, that is, the MOSFET (Q1 ), The reflux current can be efficiently passed in the opposite direction.

Generally, the voltage drop caused by the on-resistance when a voltage is applied to the gate and a current flows is lower than the voltage drop (forward voltage drop) generated in the pn junction layer, so that the loss generated in the MOSFET (Q1) can be reduced. .
However, when the on / off (ON / OFF) operation of the MOSFET (Q1) and the MOSFET (Q2) is complementarily repeated a plurality of times within a half cycle of the AC power supply 110, for example, the conventional technique as in Patent Document 1 is used. Then, when the next switching operation (Q1 is turned off and Q2 is turned on) is performed in a state where a reverse current flows by applying an ON signal to the MOSFET (Q1), the charge stored in the smoothing capacitor 13 is reduced to the MOSFET. There arises a problem that an excessive current (reverse recovery current) is short-circuited through (Q1) and the MOSFET (Q2) and flows during the reverse recovery time, causing Q1 or Q2 to be destroyed or efficiency to be reduced.
Therefore, in the present embodiment, the configuration and structure described below are adopted.

In the present (first) embodiment, as will be described later, in the MOSFET semiconductor drift region of the MOSFET (Q1, Q2), the p-type semiconductor layer and the n-type are perpendicular to the direction of the drain / source current path. It has a structure in which semiconductor layers are arranged alternately (super junction structure), and the voltage applied to the MOSFET is switched from the reverse voltage to the forward voltage, and at the same time the gate signal of the MOSFET is changed from the on signal to the off signal. A MOSFET having a characteristic that the reverse recovery time generated when the gate signal of the MOSFET is turned off is shorter than the reverse recovery time generated when switching is provided.
Further, the MOSFET on the side where the reverse current flows is turned off a predetermined time before the MOSFET on the side where the power supply is short-circuited by the reactor 12 is turned on. With this configuration, an excessive amount is generated when the MOSFET (Q1) is turned off, the MOSFET (Q2) is turned on, or the MOSFET (Q2) is turned off and the MOSFET (Q1) is turned on multiple times in a half cycle of the AC power supply. It is possible to suppress the current.

<MOSFET structure: Part 1>
The structure of the MOSFET according to the first embodiment of the present invention will be described with reference to the cross-sectional view of the MOSFET element shown in FIG.
FIG. 2 is a diagram showing a cross-sectional structure example of the MOSFETs (Q1, Q2) used in FIG. 1, (a) shows the cross-sectional structure of the MOSFET, and (b) shows the structure near the source and gate of the MOSFET. It is shown enlarged.
The MOSFET shown in FIG. 2 is a MOSFET having a vertical structure. Hereinafter, a MOSFET having a vertical structure is simply referred to as a MOSFET.
2A and 2B, a MOSFET 200 includes a source electrode 211 and a gate electrode 212 on one surface (upper portion of the paper) of the MOSFET, and a drain electrode 213 on the other surface (lower portion of the paper). ing.

The source electrode 211 is connected to the p ⁺ type semiconductor layer 27 and the n ⁺ type semiconductor layer 26 through the metal electrode 21S.
The gate electrode 212 is connected to the gate electrode 21G that is a metal electrode. The n ⁺ type semiconductor layer 26, the p type semiconductor layer 25, and the n type semiconductor layer 22 form n type MOSFETs directly below the gate electrode 21 G (downward in the drawing) via an insulating film (insulating layer) 28. It is structured.
That is, when the gate electrode 21G exceeds the threshold and becomes a high potential (H level), electrons are induced in the p-type semiconductor layer 25, surpassing the influence of the impurity atoms forming the p-type, and the p-type semiconductor layer 25 Is inverted to n-type. That is, a channel (n) is formed. Therefore, the n ⁺ type semiconductor layer 26, the n-type inversion layer (25), and the n-type semiconductor layer 22 are all arranged in the n-type, so that they become conductive (ON, ON).
Further, as described above, the n ⁺ type semiconductor layer 26 is connected to the source electrode 211 via the metal electrode 21S, and the n type semiconductor layer 22 is connected to the drain electrode 213 via the n ⁺ type semiconductor layer 24. It is connected.
Note that the p ⁺ -type semiconductor layer 27 has a higher concentration of trivalent impurity elements that are p-type than the p-type semiconductor layer 25. In addition, the n ⁺ type semiconductor layer 26 has a higher concentration of the n-type pentavalent impurity element than the n-type semiconductor layer 22.

Further, when the gate electrode 21G becomes a high potential (H level), the n-type inversion occurs not only in the p-type semiconductor layer 25 near the gate electrode 21G but also in the p-type semiconductor layer 23. By intensifying (becomes a higher potential), the inversion layer extends to a deep layer (downward on the page).
That is, as the gate electrode 21G becomes a high potential, a region where the p-type semiconductor layer 25 and the p-type semiconductor layer 23 are inverted to the n-type spreads, and the region inverted between the n-type and the n-type semiconductor layer 22 As the contact area increases, the on-resistance of the MOSFET decreases and conducts well.

<Parasitic diode: Part 2>
The source electrode 211 is connected to the ^{p +} -type semiconductor layer 27 through the metal electrodes 21S, ^{p +} -type semiconductor layer 27 is in contact with the p-type semiconductor layer 25, p-type semiconductor layer 25 in the p-type semiconductor layer 23 Touching.
The drain electrode 213 is connected to the ^{n +} -type semiconductor layer 24, ^{n +} -type semiconductor layer 24 is in contact with the n-type semiconductor layer 22.
The p-type semiconductor layer 23 and the p-type semiconductor layer 25 are in contact with the n-type semiconductor layer 22.
From the above configuration, the structure of the source electrode 211-metal electrode 21S-p ⁺ type semiconductor layer 27-p type semiconductor layer 25-p type semiconductor layer 23-n type semiconductor layer 22-n ⁺ type semiconductor layer 24-drain electrode 213 Thus, the parasitic diode Dp existing between the source electrode 211 and the drain electrode 213 is formed.
In addition, the contact surface between p and n in the p-type semiconductor layer 23 -n-type semiconductor layer 22 is a source of the parasitic diode Dp existing between the source electrode 211 and the drain electrode 213.
The p-type semiconductor layer 25 and the p-type semiconductor layer 23 are different in manufacturing process, but the impurity concentration of p diffusion is substantially equal.

<MOSFET structure: Part 2>
The n-type MOSFET 200 shown in FIG. 2 has a manufacturing process based on a conductive substrate (wafer) made of a material in a region indicated as an n-type semiconductor layer 22 (drift region).
This MOSFET semiconductor drift region has a structure (superjunction structure) in which p-type semiconductor layers 23 and n-type semiconductor layers 22 are alternately arranged in the horizontal direction of the paper (perpendicular to the drain / source direction). ing.
When a forward voltage is applied between the drain electrode 213 and the source electrode 211 of the MOSFET 200 having the above-described structure, the depletion layer extending in the n-type semiconductor layer 22 has a uniform electric field strength in the vertical direction on the paper surface, resulting in a high breakdown voltage. .
Note that the distance between the p-type semiconductor layer 23 and the n ⁺ -type semiconductor layer 24 is ensured such that the breakdown voltage does not decrease.
In addition, since the carrier concentration of the n-type semiconductor layer 22 in the drift region can be lowered, a MOSFET with low on-resistance can be realized.
Further, as described above, the p-type semiconductor layer 23 and the n-type semiconductor layer 22 are alternately arranged, and the opposing area between the drain and the source as the MOSFET 200 is widened, so that the on-resistance is small. A MOSFET can be realized.

If the super junction structure is adopted, the area of the pn junction formed between the source and the drain is increased as compared with a vertical MOSFET not provided with the p-type semiconductor layer 23. Therefore, reverse recovery of the pn junction is performed. Time increases.
However, the reverse recovery time of the pn junction is shortened by diffusing heavy metal into the p-type semiconductor layer 23 or irradiating a particle beam such as heavy particles. This is because if a heavy metal or heavy particles are present in the p-type semiconductor layer 23, a new energy level is provided in the p-type semiconductor layer 23, and electrons and holes move quickly.

  With the structure of this embodiment, a MOSFET having a high breakdown voltage, a low on-resistance, and a short reverse recovery time can be configured. In the present embodiment, since the MOSFET having the above-described structure is provided, a diode conventionally connected in parallel to the MOSFET is not necessary, and an economical DC power supply circuit can be configured by reducing the number of parts of the rectifier circuit. There is an effect that can be done.

<Reverse recovery time of MOSFET>
Next, the reverse recovery time of the MOSFET will be described.
In the following description, the case of an n-type MOSFET will be described. However, in the case of a p-type MOSFET, the same can be considered just by reversing the current flowing through the source and drain.

In an n-type MOSFET, a case where the drain potential is high with reference to the source potential is referred to as a forward voltage, and conversely, a case where the source potential is higher than the drain potential is referred to as a reverse voltage.
Further, a case where the gate voltage is equal to or lower than the threshold value is referred to as an off state, and an on state where the gate voltage is equal to or higher than the threshold value is referred to.
Further, the n-type MOSFET has a pn junction (parasitic diode Dp) in the direction from the source to the drain as described above. If the MOSFET is in the off state when a reverse voltage is applied, the n-type MOSFET is changed from the source to the drain. A current flows, and this current is called a reverse current.
When a forward voltage is applied to the MOSFET while a reverse current is flowing, the current flowing from the drain to the source by discharging the charge of the pn junction is referred to as a reverse recovery current. The time during which current flows is called reverse recovery time.

When synchronous rectification is performed by the MOSFETs (Q1, Q2), a high-potential gate voltage is applied to turn on the MOSFET when a reverse current flows from the source to the drain of the MOSFET (Q1, Q2). And
In addition, when a forward voltage is applied to the MOSFET, the gate voltage is set to a threshold value or less to turn it off.
In addition, when a forward voltage is applied to the MOSFETs (Q1, Q2) while a reverse current is flowing, the direction of current flow changes from the reverse current to the forward current, but the gate voltage is set to a threshold value or less. As a result, the current is cut off.
However, since a time delay occurs until the current is cut off, a current flows in the direction from the drain to the source. This current is referred to as a reverse recovery current, and the current flowing time is referred to as a reverse recovery time.

<Method for testing reverse recovery time of MOSFET>
In the configuration of the DC power supply device of the present (first) embodiment, the reverse recovery time of the MOSFET greatly affects the circuit efficiency.
In order to realize a high-efficiency DC power supply device, the reverse recovery time when the MOSFET to which no gate voltage is applied is in the OFF state, and the MOSFET gate signal at the same time when the reverse voltage is switched to the forward voltage. It is effective to compare the reverse recovery time that occurs when the signal is switched from the on signal to the off signal.

<< Measurement method of reverse recovery time when Q1 and Q2 gate signals are switched simultaneously >>
FIG. 3 is a diagram showing a measurement circuit for measuring the reverse recovery time when the gate voltage is applied to the MOSFET according to the first embodiment of the present invention. FIG. 3A shows the reverse recovery time when the gate signal is simultaneously switched. A circuit example is shown, and (b) shows the waveforms of the gate signal 1 and the gate signal 2 and the reverse current during the reverse recovery time measurement.
In FIG. 3A, the measurement circuit applies a reverse voltage to the n-type MOSFET (Q1), which is a specimen for measuring the reverse recovery time at both poles of the DC power supply 31, and the MOSFET (Q1). A MOSFET 12 (Q2) is connected in series, and the reactor 12 is configured to pass current through the MOSFET (Q1).

  In FIG. 3B, the signal generation timing of the Gate signal 1 applied to the MOSFET (Q1) and the Gate signal 2 applied to the MOSFET (Q2) at the time of measuring the reverse recovery time, and the MOSFET (Q1) which is the sample product 5 shows the waveform of the reverse current Isd flowing from the source to the drain.

In measuring the reverse recovery time, first, the voltage of the Gate signal 2 is raised to turn on the MOSFET (Q2) to short-circuit the DC power source 31 through the reactor 12 (not shown in FIG. 3B).
When the current of the reactor 12 rises to a predetermined reverse current, the MOSFET (Q2) is turned off and a reflux current is passed through the MOSFET (Q1) as the test sample (the initial state in FIG. 3B).
Thereafter, as shown in FIG. 3B, a signal for lowering the voltage of the Gate signal 1 is added to the MOSFET (Q1), and a signal for raising the voltage of the Gate signal 2 is added to the MOSFET (Q2). (Q1) is turned off and MOSFET (Q2) is turned on.
When the MOSFET (Q2) is turned on, the drain electrode of the MOSFET (Q2) and the source electrode of the MOSFET (Q1) become low potential, and the voltage between the source and drain of the MOSFET (Q1) changes from the reverse voltage to the forward voltage. Switch.
At this time, the reverse current Isd flowing through the MOSFET (Q1) has the waveform shown in FIG. 3B, and the reverse current Isd has a negative direction, that is, a period during which the forward current flowing from the drain to the source flows. The reverse recovery time td1.

<< Measurement Method of Reverse Recovery Time when Q1 Gate Signal is Off >>
FIG. 4 is a diagram showing a measurement circuit for measuring the reverse recovery time when the gate signal of the MOSFET according to the first embodiment of the present invention is maintained, and (a) shows the gate of the MOSFET (Q1) of the test sample. A circuit for measuring the reverse recovery time at the time of holding the signal off state is shown, and (b) shows waveforms of the gate signal 1 and the gate signal 2 and the reverse current at the time of measuring the reverse recovery time.
4A, the measurement circuit is short-circuited between the gate and the source of the MOSFET (Q1) of the test sample with a low resistance as compared with the circuit shown in FIG. 3A. 3B is the same as FIG. 3A except that the gate signal is kept in the OFF state when the reverse recovery time is measured in FIG. The reason why the low resistance is provided between the gate and the source is to reduce the influence of noise during measurement.

4 (a) and 4 (b), when the current of the reactor 12 rises to a predetermined reverse current, the MOSFET (Q2) is turned off, and a reflux current is passed through the pn junction of the MOSFET (Q1) of the sample.
Thereafter, as shown in FIG. 4B, the voltage of the Gate signal 2 is lowered, but the voltage of the Gate signal 1 is not raised.
At this time, the MOSFET (Q2) is turned on, but the MOSFET (Q1) remains off.
At this time, the reverse current Isd flowing in the MOSFET (Q1) of the test sample has the waveform shown in the figure, and the reverse current Isd is in the negative direction, that is, the period in which the forward current flowing from the drain to the source flows reversely. It is time td2.

As described above, when the reverse recovery time td1 in FIG. 3 is compared with the reverse recovery time td2 in FIG. 4, it can be seen that td1> td2.
The difference between the reverse recovery time td1 and the reverse recovery time td2 is that in FIG. 3B, the Gate signal 1 was at the H level until the Gate signal 2 changed from the L level to the H level. This means that the MOSFET (Q1) has been turned on until just before.
On the other hand, in FIG. 4B, the Gate signal 1 is kept at the L level before and after the Gate signal 2 is changed from the L level (low potential) to the H level (high potential).

<Reverse recovery time of MOSFET constituting this embodiment>
The direct-current power supply device 100 of the present (first) embodiment applies a voltage to the gate by applying a voltage to the gate rather than a voltage drop that occurs in the pn junction layer when no reverse current flows through the MOSFET. This utilizes the fact that the voltage drop due to the on-resistance when flowing is low.
Therefore, when one of the two MOSFETs (Q1, Q2) is energized with a reverse current multiple times during the half cycle of the AC power supply 110, the reverse occurs when the other MOSFET (Q1, Q2) is turned on. The generation of recovery current cannot be avoided.
Therefore, in the present embodiment, the MOSFET is turned off compared to the reverse recovery time that occurs when the voltage applied to the MOSFET is switched from the reverse voltage to the forward voltage simultaneously with the switching of the MOSFET on signal to the off signal. A MOSFET having a short reverse recovery time characteristic.

By using the MOSFET having this characteristic, if the gate signal of the MOSFET on the reverse current side is turned off a predetermined time before the MOSFET on the non-energized side is turned on, the reverse operation is performed when performing the switching operation. The pn junction having a short reverse recovery time described above of the semiconductor of the MOSFET on the side where the directional current is energized flows and the time during which the short-circuit current flows can be shortened.
With this configuration and method, the circuit loss of the DC power supply device 100 can be reduced. Further, the operation of turning on / off the current of the reactor 12 continuously flowing in the half cycle of the AC power supply 110 so as to energize one of the two MOSFETs can be repeated a plurality of times.

<Operation of DC power supply>
The operation of the DC power supply device 100 (FIG. 1) of the first embodiment will be described with reference to FIG.
FIG. 5 is a diagram showing voltage, current waveforms and control signals of the DC power supply device shown in FIG.
5, in order from the top of the drawing, “AC power waveform” of AC power source 110 (FIG. 1), “Reactor current waveform” of reactor 12 (FIG. 1), and various signals of control circuit 16 (FIG. 1) The control signals “power supply synchronization signal”, “boost signal”, “delay signal”, “forward signal”, “Gate signal 1”, and “Gate signal 2” are shown. The horizontal axis is time (time transition).
The AC power supply waveform 511 in FIG. 5 describes one cycle. The operation of turning on / off the Gate signal 1 and the Gate signal 2 for driving the MOSFETs (Q1, Q2) is performed three times (a plurality of times) in the half cycle of the positive period of the AC power supply waveform 511.
By the on / off operation of the MOSFETs (Q1, Q2), the reactor current waveform 513A (513B) of the reactor 12 (FIG. 1) has a sawtooth shape.

<Period during which the AC power supply waveform is positive>
The generation of each signal of a half cycle in which the AC power supply waveform is positive will be described.
In FIG. 5, the power supply synchronization signal A is generated from the phase information of the AC power source obtained from the output of the AC power source voltage detection circuit 11 that detects the voltage of the AC power source.
The boost signals B1, B2, B3 (B4, B5, B6) are generated from information of a DC output voltage detection circuit 15 that detects a DC output voltage and a current detection circuit 14 that detects a charging current in the smoothing capacitor 13.
With the boost signals B1, B2, and B3, the AC power supply 110 generates the Gate signal 2 (C1, C2, and C3) that drives the MOSFET (Q2) that is short-circuited through the reactor 12 as the H level.

Delay signals G1, G2, and G3 are generated such that a predetermined delay time elapses after boost signals B1, B2, and B3 are turned off.
The forward signals E2 and E3 are generated a predetermined time before the boost signals B2 and B3 are turned on.
The Gate signal 1 (F1, F2, F3) that drives the MOSFET (Q1) on the side that supplies current to the smoothing capacitor 13 (FIG. 1) has the Gate signal 2 (C1, C2, C3) at the L level (Low potential, In the interval of the low potential, the delay signals (G1, G2, G3) and the forward signals E2, E3 are generated to be at the H level in the interval where the delayed signals E2, E3 are not at the H level (that is, the L level interval).

The Gate signal 1 (F1, F2, F3) is delayed by a predetermined delay time of the delay signals G1, G2, G3 after the Gate signal 2 (C1, C2, C3) becomes L level. The H level is to avoid the influence (reverse recovery time td1) that the Gate signal 2 (C1, C2, C3) is at the H level.
In addition, the Gate signal 2 (C2, C3) is set to the H level after the gate signal 1 (F1, F2) has been delayed by a predetermined amount of time after the gate signal 1 (F1, F2) becomes the L level. This is to avoid the influence (reverse recovery time td1) that the Gate signal 1 (F1, F2) is at the H level.
In this way, by providing a predetermined time between the Gate signal 1 (F1, F2, F3) and the Gate signal 2 (C1, C2, C3) being at the H level, the reverse recovery time is set to td2. The reverse recovery time can be shortened (td2 <td1).
The time widths of the delayed signals (G1, G2, G3) and the forward signals (E2, E3) are substantially equal.

  Further, in a period in which the AC power supply waveform is positive, the MOSFET (Q2) corresponds to the MOSFET on the side where the AC power supply 110 is short-circuited through the reactor 12 and the diode D2. Further, the MOSFET (Q1) corresponds to the MOSFET on the side that flows through the smoothing capacitor 13.

<Period when AC power supply waveform is negative>
The generation of each signal in a half cycle in which the AC power supply waveform is negative will be described with reference to FIG. In addition, the description which overlaps with the half cycle of a positive period is abbreviate | omitted suitably.
In the half cycle in which the AC power supply waveform shown in FIG. 5 is negative, the power supply synchronization signal A is at the L level. In this section, the gate signals 1 (F4, F5, F6) for driving the MOSFET (Q1) are generated at the H level by the boost signals B4, B5, B6.

Delay signals G4, G5, and G6 are generated so that a predetermined delay time elapses after boost signals B4, B5, and B6 are turned off.
The forward signals E5 and E6 are generated before a predetermined time when the boost signals B5 and B6 are turned on.
The Gate signal 2 (C4, C5, C6) for driving the MOSFET (Q2) has a delay signal (G4, G5, G6) and a forward signal E5 when the Gate signal 1 (F4, F5, F6) is at the L level. , E6 are generated so as to be at the H level in a section where the E6 is not at the H level (that is, a section at the L level).

The Gate signal 2 (C4, C5, C6) is delayed by a predetermined delay time of the delay signals G4, G5, G6 after the Gate signal 1 (F4, F5, F6) becomes L level. The H level is set to avoid the influence (reverse recovery time td1) that the Gate signal 1 ((F4, F5, F6) is at the H level.
Further, the gate signal 1 (F5, F6) is set to the H level after the gate signal 2 (C4, C5) has been delayed by a predetermined time period after the gate signal 2 (C4, C5) becomes the L level. This is to avoid the influence (reverse recovery time td1) that the Gate signal 2 (C4, C5) is at the H level.
In this way, by providing a predetermined time between the Gate signal 1 (F4, F5, F6) and the Gate signal 2 (C4, C5, C6) that are at the H level, the reverse recovery time is set to td2. The reverse recovery time can be shortened (td2 <td1).
The time widths of the delayed signals (G4, G5, G6) and the forward signal (E5, E6) are substantially equal.

  Further, in the period in which the AC power supply waveform is negative, the MOSFET (Q1) corresponds to the MOSFET on the side that short-circuits the AC power supply 110 through the diode 12 and diode D1. Further, the MOSFET (Q2) corresponds to the MOSFET on the side that flows through the smoothing capacitor 13.

<< Reverse recovery time of diodes D1 and D2 >>
The diodes D1 and D2 also have reverse recovery times, but the operation of the DC power supply device 100 (FIG. 1) is longer than the reverse recovery times td1 (FIG. 3) and td2 (FIG. 4) of the first and second MOSFETs. There is no hindrance and efficiency is not reduced. Therefore, a relatively inexpensive diode can be used as the diodes D1 and D2.

《Pressure and power factor correction operation waveforms and timing creation method》
In addition, in the method of creating the timing for turning off the Gate signal by the forward signal, when the boost signal is turned on by digital calculation, if the time corresponding to the forward signal is subtracted by digital calculation, A Gate signal that changes at an earlier time can be created.
Further, in the case of an analog method in which the boost signal is turned on by comparing the modulated wave and the modulated wave, a predetermined offset amount may be added to or subtracted from any one of the modulated signals.

Further, in FIG. 5, for easy understanding of the operation, waveforms are shown when the on / off switching operation is performed three times within a half cycle period of the AC power supply.
The waveforms when the three-time on / off switching operation (three shots) is performed are the reactor current waveforms 513A and 513B. In this case, the power factor in the voltage and current in the reactor 12 is about 85%.
Note that the number of times of switching is not limited to three.
This configuration can also be realized when the operation is repeated a plurality of times more than three times, or when switching is performed at a frequency that exceeds the audible frequency, for example, 15 kHz or more.
By increasing the number of times of switching (the number of shots), the current of the AC power source flowing through the reactor 12 can be made closer to a sine wave, so that the harmonic current can be suppressed and the power factor can be improved. When the number of times of switching (number of shots) is 4, the power factor reaches about 95%.
Further, if switching is performed at a frequency of 15 kHz or higher, the power factor approaches 100%, the reactor current waveforms 513A and 513B approach an infinitely sine waveform, and the DC power supply device 100 (FIG. 1) is generated by this switching operation. Since the noise to be transmitted is 15 kHz or more exceeding the audible frequency, it becomes noise in a region that cannot be perceived by humans.

Furthermore, even when the gate signal of the MOSFET (Q1, Q2) on the side where the reverse current is energized is applied or not applied, the reverse current continuously flows to the MOSFET (Q1, Q2). The pulse width of the boost signal for driving the MOSFETs (Q1, Q2) on the side where the AC power supply is short-circuited by the reactor 12 is maintained.
Therefore, since the waveform of the current flowing through the reactor 12 is not distorted by the above-described operation, it is not affected by the switching operation on the reverse current side, and the current distortion of the AC power supply due to this is not generated.
If the control circuit 16 is provided with the control described above, of the two MOSFETs (Q1, Q2), the MOSFET (Q1, Q2) on the side that shorts the AC power supply 110 through the reactor 12 and the diode D1 or the diode D2. The MOSFET (Q1, Q2) on the side that flows to the smoothing capacitor 13 of the DC output power supply is turned on after a predetermined time has elapsed after turning OFF, and the MOSFET (Q1, Q2) on which the reactor 12 short-circuits the AC power supply through the diode D1 or the diode D2 The operation of turning off the MOSFETs (Q1, Q2) flowing through the smoothing capacitor 13 a predetermined time before turning on Q2) can be repeated a plurality of times within a half cycle period of the AC power supply 110.

<Current flow path during switching operation>
next. A current path during a switching operation in which the MOSFET used in the first embodiment performs an on / off operation will be described.

  FIG. 6 is a diagram showing a current energization path for each operation mode according to the first embodiment of the present invention. FIG. 6A is a current path when the voltage of the AC power supply 110 is higher on the side connected to the reactor 12. (B) shows the current path when the MOSFETs (Q1, Q2) are both off, (c) shows the current path when the MOSFET (Q1) is turned off from on, and (d) shows the MOSFET The current path when the MOSFET (Q2) is turned on with (Q1) turned off is shown.

6A, when the potential of the side where the voltage of the AC power supply 110 is connected to the reactor 12 is higher, the MOSFET (Q2) is turned on, and a power supply short-circuit current flows through a path through the diode D2.
In other words, MOSFET (Q2) short-circuits AC power supply 110 through reactor 12 and diode D2. At this time, the MOSFET (Q1) becomes a MOSFET on the side of passing a current through the smoothing capacitor 13.

  Further, in FIG. 6B, when the MOSFET (Q2) is turned off, the MOSFET (Q1) is in the off state, so that the current flowing through the reactor 12 is smoothed through the pn junction inside the semiconductor element of the MOSFET (Q1). A charging current is supplied to the capacitor 13.

  In FIG. 6C, after a predetermined time corresponding to the delay time elapses from FIG. 6B, a Gate signal is given to the MOSFET Q1, and a reverse current is passed to the MOSFET Q1 through the internal semiconductor channel. To reduce the loss of the element. Then, before the MOSFET (Q2) is turned on, the Gate signal of the MOSFET (Q1) is turned off a predetermined time corresponding to the forward signal to close the semiconductor channel inside the MOSFET (Q1), and a reverse current is applied to the pn junction. Let it flow.

  Further, in FIG. 6D, when the AC power supply 110 is short-circuited again via the reactor 12, the operation of turning on the MOSFET (Q2) is performed with the MOSFET (Q1) turned off.

Thereafter, the operations shown in FIGS. 6A, 6B, 6C, and 6D are repeated a plurality of times over a half cycle of the AC power supply.
When another half cycle, that is, the side where the voltage of the AC power supply 110 is connected to the reactor 12 is lower in potential, the MOSFET (Q1) short-circuits the AC power supply 110 through the reactor 12 and the diode D1. . At this time, the MOSFET (Q2) becomes a MOSFET on the side of passing a current through the smoothing capacitor 13.

In the present (first) embodiment, the MOSFET is turned off in comparison with the reverse recovery time that occurs when the voltage applied to the MOSFET is switched from the reverse voltage to the forward voltage simultaneously with the switching of the MOSFET on signal to the off signal. The MOSFET has a characteristic that the reverse recovery time is short when it is in operation. Therefore, there is an effect that it is possible to shorten the time during which the short-circuit current of the DC power source that flows when short-circuiting through the reactor 12 of the power source shown in (d) of FIG. There is also.
Further, during the half cycle of the AC power supply, the diode D1 or D2 is in an energized state, and a sudden voltage change due to switching does not occur. Therefore, the reverse recovery time may be a general rectifier diode that is slower than the MOSFET.
In the present embodiment, the diode is characterized in that the reverse recovery time of the diode is longer than the reverse recovery time when the MOSFET is turned off. For this reason, there exists an effect which can provide the cheaper DC power supply device 100 (FIG. 1).

<< Second Embodiment >>
A DC power supply device according to a second embodiment of the present invention will be described with reference to the drawings.
FIG. 7 is a diagram showing a configuration example of a DC power supply device 100B according to the second embodiment of the present invention. FIG. 7A shows the configuration of the DC power supply device and the connection relationship between the AC power supply and the load. ) Indicates each signal related to the control signal of the MOSFET (Q1, Q2, Q3, Q4).

7A differs from FIG. 1A in that MOSFET (Q3: third MOSFET) MOSFET (Q4: fourth MOSFET) is replaced by diode D1 and diode D2 in FIG. Instead of.
The MOSFETs (Q3, Q4) are controlled by the control circuit 16.
The other configuration of FIG. 7A is the same as the configuration of FIG.
7B is different from FIG. 5 in that the Gate signal 3 and the Gate signal 4 are shown. Further, the reactor current waveforms 513A, 513B, and 512 in FIG. 5 are not shown in FIG. 7B.
The other description in FIG. 7B is the same as the description in FIG.

In FIG. 7A, a synchronous rectifier circuit is constituted by MOSFETs (Q1, Q2, Q3, Q4). The control signal for the gate of the MOSFET (Q3) is at the L level in the half cycle of the positive period of the AC power supply waveform 511, as shown by the Gate signal 3 in FIG. 7B, and the AC power supply waveform 511 is negative. It is at the H level in the half cycle of the period.
Further, the control signal of the gate of the MOSFET (Q4) is at the H level in the half cycle of the positive period, as indicated by the Gate signal 4 in FIG. Is at the L level in the half cycle of the negative period.
Further, the MOSFET (Q1) and the MOSFET (Q2) are controlled in the same manner as in FIG. 5 by the Gate signal 1 and the Gate signal 2, respectively, as shown in FIG. 7B.

With the above configuration, as described above, the MOSFET (Q1, Q2, Q3, Q4) constitutes a synchronous rectifier circuit using MOSFETs.
The MOSFET (Q3) and the MOSFET (Q4) respectively controlled by the Gate signal 3 and the Gate signal 4 in FIG. 7A correspond to the diode D1 and the diode D2 in FIG. The MOSFETs (Q3, Q4) have nothing equivalent to the forward voltage drop of the diodes D1, D2, and the resistance value can be lowered, so that there is an effect that the circuit efficiency is high as a rectifier circuit. .
Further, since the MOSFETs (Q3, Q4) do not perform the switching operation for boosting like the MOSFETs (Q1, Q2), the influence of the long reverse recovery time due to the parasitic diode is small. Therefore, the MOSFET (Q3, Q4) can use a MOSFET having a lower cost than the MOSFETs (Q1, Q2).

«Third embodiment»
An air conditioner according to a third embodiment of the present invention will be described. The third embodiment is an air conditioner equipped with the DC power supply device of the first embodiment.

<Air conditioner with DC power supply>
FIG. 8 is a diagram illustrating a configuration example of an air conditioner 300 according to the third embodiment of the present invention.
In FIG. 8, an air conditioner 300 includes an inverter circuit 81, a compressor 82, heat exchangers 83 and 85, and a decompressor 84 in the DC power supply device 100 (FIG. 1) of the first embodiment. .
The inverter circuit 81 is connected to the output unit of the smoothing capacitor 13 of the DC power supply device 100 (FIG. 1), and generates a three-phase AC voltage (power) from the DC voltage (power).
The compressor 82 provided with an electric motor (not shown) operates on the three-phase AC voltage (electric power) output from the inverter circuit 81.
The compressor 82, the heat exchanger 83, the decompressor 84, and the heat exchanger 85 constitute a refrigeration cycle.

The air conditioner 300 has a function of cooling or heating a room. When there is a difference between the set temperature and the room temperature, the power supplied from the DC power supply device 100 (FIG. 1) is large.
Therefore, there is a mode that requires electric power up to the limit of the power breaker capacity. At that time, the higher power factor on the AC side can extract the maximum electric power.
In addition, since the DC power supply device 100 can reduce the current when the DC output voltage is higher, the compressor can be rotated at a higher speed and the maximum refrigeration capacity of the air conditioner 300 can be extracted.
In the present (third) embodiment, the DC power supply 100 can be realized with high power factor and high output voltage, and the air conditioner 300 equipped with this DC power supply 100 has the effect of drawing out the maximum refrigeration capacity. There is an effect of realizing an air conditioner with low power consumption.

DESCRIPTION OF SYMBOLS 11 AC power supply voltage detection circuit 12 Reactor 13 Smoothing capacitor 14 Current detection circuit 15 DC output voltage detection circuit 16 Control circuit 100,100B DC power supply device 110 AC power supply 120 Load 22 N-type semiconductor layer 23, 25 p-type semiconductor layer 24, 26 n ⁺ type semiconductor layer 27 p ⁺ type semiconductor layer 28 Insulating film (insulating layer)
200, Q1, Q2, Q3, Q4 MOSFET
21S, 21G Metal electrode 211 Source electrode 212 Gate electrode 213 Drain electrode 31 DC power supply 300 Air conditioner 81 Inverter circuit 82 Compressor 83, 85 Heat exchanger 84 Decompressor D1, D2, Dp diode

Claims (8)

Bridge rectifier circuit having first and second MOSFETs connected in series between a positive electrode terminal and a negative electrode terminal of a DC output power source and first and second diodes connected in series between the positive electrode terminal and the negative electrode terminal When,
A reactor connected between one end of an AC power source and a series connection point of the first and second MOSFETs;
A smoothing capacitor connected between a positive electrode terminal and a negative electrode terminal of the DC output power source;
The first and second MOSFETs are turned on / off so that the operation of energizing one of the first and second MOSFETs with a current flowing through the reactor is repeated a plurality of times within a half cycle of the AC power supply. A control circuit;
With
The other end of the AC power supply is connected to a series connection point of the first and second diodes;
Each of the first and second MOSFETs has a super junction structure in which p-type semiconductor layers and n-type semiconductor layers are alternately arranged in a semiconductor drift region, and an applied voltage is changed from a reverse voltage to a forward voltage. Compared with the reverse recovery time when the gate signal is switched from the ON signal to the OFF signal when switching to the ON signal, the reverse recovery time when the gate signal is kept at the OFF signal is short.
A direct current power supply device. In claim 1,
The control circuit turns off the MOSFET that short-circuits the AC power supply through the reactor and the diode of the first and second MOSFETs, and further passes the current to the smoothing capacitor after a predetermined time has elapsed. The operation of turning off the MOSFET on the side passing through the smoothing capacitor before turning on the MOSFET on the side where the reactor short-circuits the AC power supply through the diode is turned on within a half cycle of the AC power supply. Repeated several times,
A direct current power supply device. In claim 2,
The pulse width of the driving signal of the MOSFET on the side that short-circuits the AC power supply through the reactor and the diode is modulated so that the power factor of the current and voltage flowing through the reactor is 85% or more.
A direct current power supply device. In claim 2,
The driving signal of the MOSFET on the side that short-circuits the AC power supply through the reactor and the diode is 3 shots or more,
A direct current power supply device. In any one of Claims 1 thru | or 4,
The reverse recovery time of the first and second diodes is longer than the reverse recovery time when the gate signals of the first and second MOSFETs are switched from the on signal to the off signal,
A direct current power supply device. A bridge rectifier circuit including first and second MOSFETs connected in series between a positive electrode terminal and a negative electrode terminal of a DC output power source, and third and fourth MOSFETs connected in series between the positive electrode terminal and the negative electrode terminal; ,
A reactor connected between one end of an AC power source and a series connection point of the first and second MOSFETs;
A smoothing capacitor connected between a positive electrode terminal and a negative electrode terminal of the DC output power source;
The first and second MOSFETs are turned on so as to repeat the operation of energizing either one of the first or second MOSFETs with a current that continuously flows through the reactor within a half cycle of the AC power supply. A control circuit that alternately turns on / off the third and fourth MOSFETs every half cycle of the AC power supply,
With
The other end of the AC power supply is connected to a series connection point of the third and fourth MOSFETs,
Each of the first and second MOSFETs has a super junction structure in which p-type semiconductor layers and n-type semiconductor layers are alternately arranged in a semiconductor drift region, and the applied voltage is changed from a reverse voltage to a forward voltage. Compared to the reverse recovery time when the gate signal is switched from the on signal to the off signal when switching, the reverse recovery time when the gate signal is kept at the off signal has a short characteristic,
A direct current power supply device. In claim 1 or claim 6,
The p-type semiconductor layer in the super junction structure of the first and second MOSFETs is diffused with heavy metal or irradiated with heavy particle beam.
A direct current power supply device.   An air conditioner comprising the DC power supply device according to any one of claims 1 to 7.

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