JP2013237604A - Method for manufacturing glass substrate for display, glass substrate, and panel for display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a glass substrate for display hardly generating electrostatic charge upon removal, when removing the glass substrate from a mounting table from a state where the mounting table and the glass substrate are in contact with each other, and to provide the glass substrate and a panel for display.SOLUTION: A method for manufacturing a glass substrate for display has a step of manufacturing the glass substrate, and a step of forming surface unevenness by applying surface treatment onto a glass surface on one side between main surfaces of the glass substrate. On the surface-treated glass surface, protrusions having the height of ≥1 nm from the surface roughness center surface of the surface unevenness are provided dispersedly, and the surface treatment is performed so that the area ratio occupying in the area on the glass surface of the protrusions becomes 0.5-10%. A semiconductor element is formed on the main surface of the glass substrate on the opposite side to the glass surface by using the glass substrate. Hereby, a panel for display is manufactured.

Description

  The present invention relates to a method for producing a glass substrate for a display used for a flat panel display such as a liquid crystal display, a plasma display, and an organic EL display, a glass substrate, and a display panel.

  Conventionally, in the manufacture of a flat panel display using a liquid crystal display panel, a plasma display panel, an organic EL display panel or the like used as a display panel, a fine thin film pattern is formed on a glass substrate by photolithography using an exposure apparatus. It is formed.

  Display panels used for these flat panel displays are manufactured through a process such as transport, film formation, photolithography, etching, doping, or wiring after putting a glass substrate into a production line. In each process, due to various factors, the panel including the glass substrate is placed in an easily charged environment. For example, when putting a glass substrate into a production line, the interleaving paper is peeled and removed from a plurality of glass substrates stacked with the interleaving paper interposed therebetween, and the glass substrates are taken out one by one. At this time, the glass substrate is easily charged when the interleaf is removed. In addition, when a semiconductor manufacturing apparatus is used for film formation or the like, film formation is performed by placing a glass substrate on a mounting table. At this time, the glass substrate is likely to be charged by airflow, contact charging, or peeling charging. Peeling charging is charging that occurs when a glass substrate that is in close contact with the mounting table is removed from the mounting table.

  Since such charging causes various problems, it is preferable not to charge as much as possible. For example, when a TFT (Thin Film Transistor) and a wiring pattern are formed on a glass substrate, the wiring pattern may be lost or peeled off due to foreign matter such as dust or dust adhering to the glass substrate or wiring pattern due to charging. is there. Further, the TFT may be destroyed due to the discharge of the accumulated charge. Further, the glass substrate may stick to the mounting table due to the charging, and the glass substrate may break when removed from the mounting table.

Under such circumstances, there is known a method of removing electricity from a charged glass substrate using an ionizer (Patent Document 1). In addition, an exposure apparatus in which the surface of a stage on which a processing substrate (glass substrate) is placed has a surface roughness of 1 to 100 μm is also known (Patent Document 2).
On the other hand, a glass substrate for display that can suppress the charge generated when the glass substrate is peeled from the contact state is known (Patent Document 3). Specifically, the glass substrate is a glass substrate for display having a plate thickness of 0.3 to 6 mm, and has a measurement length of 200 mm and a cut-off value of 0.8 to 25 mm. The average value of W _CA (filtered centerline waviness) measured with a stylus type surface roughness measuring instrument using a slab is 0.03 to 0.5 μm. The glass substrate is said to reduce the contact area with the mounting table and to suppress charging.
Furthermore, it is also known that the glass surface is chemically treated so that the arithmetic average roughness Ra becomes 0.3 to 1.5 nm (Patent Document 4). Specifically, by setting the arithmetic average roughness Ra of the glass substrate to 0.3 to 1.5 nm, the contact area between the glass substrate and the mounting table can be reduced. Can be reduced.

JP 2009-64950 A JP 2007-322630 A Japanese Patent Laid-Open No. 2002-72922 JP 2010-275167 A

However, in order to form surface irregularities on the glass surface of the glass substrate, even if the average value of the W _CA (filtered center line waviness) is 0.03 to 0.5 μm, the arithmetic average roughness Ra is 0.00. Even if the glass surface is chemically treated so as to have a thickness of 3 to 1.5 nm, the antistatic effect may not be sufficiently obtained. Especially for high-definition and high-resolution displays used with wiring patterns with narrow line widths and pitches, for example, glass substrates on which oxide semiconductors and low-temperature polysilicon semiconductors are formed, in the management using the above-mentioned parameters, It was not enough to meet the quality requirements for glass substrates for high-definition and high-resolution displays. For example, a glass substrate for a high-definition / high-resolution display is unsuitable as a display because a minute defect is generated in the formed wiring pattern. In addition, when the line width of the wiring pattern and the pitch interval of the wiring pattern are narrow, there is a problem that electrostatic breakdown of the semiconductor element is likely to occur even if the discharge is caused by charging even at a low level.

  Therefore, the present invention can suppress charging during movement and conveyance of the glass substrate, and when removing the glass substrate from the mounting table from the state in which the mounting table and the glass substrate are in contact in the semiconductor manufacturing apparatus, It is an object of the present invention to provide a method for producing a glass substrate for display and a glass substrate, which can make it difficult to be charged upon removal, and a display panel using the glass substrate.

One embodiment of the present invention is a method for manufacturing a glass substrate for display on which a semiconductor element is formed. The manufacturing method is
Producing a glass substrate;
Forming a surface irregularity by performing a surface treatment on one of the main surfaces of the glass substrate.
In the surface-treated glass surface, convex portions having a height of 1 nm or more from the surface roughness center surface of the surface irregularities are provided in a dispersed manner, and the area ratio of the convex portion to the area of the glass surface is The surface treatment is performed so as to be 0.5 to 10%.

At that time, Rz (Rz is the maximum height of the surface unevenness measured by an atomic force microscope) in the surface unevenness is preferably 2 (nm) or more. More preferably, it is 3 nm or more.
Moreover, it is preferable that the said area ratio is 0.75-7.0%, and it is more preferable that it is 1.2-4.0%.
The surface treatment is preferably a dry etching treatment using plasma.
Moreover, it is preferable that the said glass substrate is a glass substrate for semiconductor element formation. In particular, the main surface of the glass substrate for forming a semiconductor element opposite to the glass surface is preferably a surface on which a low-temperature polysilicon semiconductor or an oxide semiconductor is formed.

  One embodiment of the present invention is a glass substrate. On one glass surface of the main surface of the glass substrate, convex portions having a height of 1 nm or more from the surface roughness center surface of the surface irregularities are provided in a dispersed manner. The area ratio which occupies for the area of the said glass surface of the said convex part is 0.5 to 10%, and the other glass surface on the opposite side to said one glass surface among the main surfaces of the said glass substrate is used as a device surface. .

  The glass substrate preferably has a semiconductor element formed on the other glass surface. In that case, it is preferable that the other glass surface is a surface on which a low-temperature polysilicon semiconductor or an oxide semiconductor is formed. In the glass substrate, a thin film transistor including a gate insulating film having a thickness of less than 20 μm is formed on the other glass surface.

One embodiment of the present invention is a display panel in which a semiconductor element is formed over a glass substrate. The glass substrate of the display panel has a first main surface and a second main surface.
The first main surface is a glass surface in which convex portions having a height of 1 nm or more from the surface roughness center plane of the surface irregularities are dispersed and occupies the area of the glass surface of the convex portions. The glass surface has an area ratio of 0.5 to 10%.
The second main surface is opposite to the first main surface, and a semiconductor element is formed.

  According to the method for manufacturing a glass substrate for display, the glass substrate, and the display panel of the above-described aspect, charging during movement and conveyance of the glass substrate can be suppressed. Further, in the semiconductor manufacturing apparatus, when the glass substrate is removed from the mounting table in a state where the mounting table and the glass substrate are in contact with each other, charging can be made difficult to occur during the removal. In addition, electrostatic breakdown of semiconductor elements formed on the display panel can be suppressed.

It is sectional drawing of the glass substrate of this embodiment. (A) is a figure explaining the area | region of the convex part which has a height of 1 nm or more from the surface roughness center plane of the glass surface, (b) is a figure explaining Rz. It is a figure which shows an example of the surface profile shape of the glass substrate measured using the atomic force microscope, and the histogram of the surface asperity. In the distribution shown in FIG. 3A, it is a diagram showing a distribution of convex portions having a height of 0 nm or more and a histogram. In the distribution shown in FIG. 3A, it is a diagram showing a distribution of convex portions having a height of 1 nm or more and a histogram. In the distribution shown in FIG. 3A, it is a diagram showing a distribution of convex portions having a height of 1.5 nm or more and a histogram. (A), (b) is a figure which shows the example of the surface unevenness | corrugation of the glass surface. It is a figure which shows the flow of the method of manufacturing the glass substrate of this embodiment. It is a figure explaining an example of the etching apparatus used with the method shown in FIG. It is a figure explaining the other example of the etching apparatus used with the method shown in FIG. It is a figure explaining the charging experiment performed in an experiment example.

Hereinafter, the manufacturing method of the glass substrate for a display of this invention, a glass substrate, and the panel for a display are demonstrated in detail based on this embodiment.
The surface irregularities on the glass surface in the present invention are those measured with an atomic force microscope (ParkSystems, model XE-100) in a non-contact mode with appropriate calibration. In the measurement, the atomic force microscope is adjusted in order to measure a surface having a small surface roughness such that the arithmetic average roughness Ra is less than 1 nm.
As measurement conditions,
・ The scan area is 1μm square.
・ The scan rate is 0.8Hz.
・ Servo gain is 1.5,
・ Sampling is 256 points x 256 points,
-Setpoint is automatic setting (may be manual setting).

FIG. 1 is a cross-sectional view of a glass substrate 10 manufactured by the display glass substrate manufacturing method of the present embodiment.
The glass substrate 10 is used for flat panel displays such as a liquid crystal display panel, a plasma display panel, and an organic EL display panel. The glass substrate 10 can also be used as a glass substrate of a solar cell panel. For example, a glass substrate having a thickness of 0.1 to 0.8 mm and a size of 550 mm × 650 mm to 2200 mm × 2500 mm. In the glass substrate, a semiconductor element is formed on the main surface of the glass substrate after the glass substrate is manufactured. One glass surface 12 of the glass substrate 10 is a surface on which a semiconductor element such as a TFT is formed (semiconductor element formation surface), and forms a plurality of thin films such as a low-temperature polysilicon thin film or an ITO (Indium Thin Oxide) thin film. It is a semiconductor element formation surface (surface on which a low-temperature polysilicon semiconductor or oxide semiconductor is formed). The TFT includes, for example, one having a gate insulating film with a film thickness of less than 20 μm. In a display panel for high definition and high resolution, the gate insulating film is formed to be 5 μm or more and less than 20 μm, for example. In addition, in a TFT including a gate insulating film having such a thickness, in addition to the gate insulating film, the thickness of each layer forming the semiconductor element has been reduced. Therefore, on the glass surface 12, Ra (arithmetic mean roughness: JIS B 0601: 2001) is suppressed to 0.2 (nm) or less, and is an extremely smooth surface.
On the other hand, the glass surface 14 facing the glass surface 12 on the side opposite to the glass surface 12 is a roughened surface by etching. Specifically, convex portions having a height of 1 nm or more from the surface roughness center plane of the surface irregularities of the glass surface 14 are provided in a dispersed manner, and the area ratio of the convex portions to the total area of the glass surface 14 Is 0.5 to 10%. In this embodiment, the surface irregularities are formed by the etching process, but the present invention is not limited to the etching process. Any surface treatment that can form surface irregularities may be used. For surface treatment, in addition to etching treatment, tape polishing, brush polishing, abrasive polishing, CMP (Chemical Mechanical Polishing)
) Etc. are included.

FIG. 2A is a diagram for explaining, in a one-dimensional display, a region of a convex portion formed on the glass surface 14 having a height of 1 nm or more from the surface roughness center plane of the glass surface 14. FIG. ) Is a diagram for explaining Rz in a one-dimensional display. 2A and 2B, the surface profile shape is represented by a one-dimensional display, and the surface roughness center plane is indicated by an average reference line m.
In FIG. 2A, the region of the convex portion (hatched region) having a height of 1 nm or more from the surface roughness center plane of the glass surface (corresponding to the average reference line m in the drawing) is indicated by a region Z. . Here, the surface roughness center plane of the glass surface is the height at each position of the surface profile shape (two-dimensional surface profile shape) based on this center plane (positive if high, negative if low). ) Is a plane located at a height where the total value (integrated value) becomes 0 when the total (or integrated) is obtained.
In addition, Rz defines the maximum peak height with respect to the surface roughness center plane (average reference line m in the figure) of the surface irregularity of the glass surface 14 as Rp and the maximum valley depth as Rv in the surface profile shape. When determined, it means the total value of Rp and Rv, that is, Rp + Rv. Rz is defined in JIS B 0601: 2001.

A method for measuring the area ratio will be described with reference to FIGS.
FIG. 3A is a diagram showing an example of a surface profile shape having a size of 1 μm × 1 μm (256 points × 256 points) measured using the atomic force microscope and a histogram of the surface unevenness. The position of 0 nm in height is the position of the surface roughness center plane of the glass surface. 3B to 3D show distributions and histograms of convex portions having heights of 0 nm or more, 1 nm or more, and 1.5 nm or more from the surface roughness center plane of the glass surface, respectively. In FIG. 3B to FIG. 3D, each of a convex portion having a height of 0 nm or more, a convex portion having a height of 1.0 nm or more, and a convex portion having a height of 1.5 nm or more is shown in white. The area where the height of the convex part is 0 nm, 1 nm, 1.5 nm or more is sliced at a height of 0 nm, 1 nm, 1.5 nm from the calculated histogram, and in an image of 0 nm, 1 nm, 1.5 nm or more The area of each convex portion is obtained by counting the number of pixels.
In the glass substrate of the present embodiment, the area ratio of the convex portions included in the entire region of the glass surface 14 having a height of 1 nm or more represented by the white region illustrated in FIG. It is in the range of 5 to 10%. In FIG. 3D, it can be seen that the white area is less than 0.5%, and the area of the convex portion having a height of 1.5 nm or more is small.

As described above, the area ratio of the convex portion having a height of 1 nm or more to the area of the glass surface 14 is set to 0.5 to 10% for the following reason. Charge movement is said to occur when the distance between objects, for example, the distance between a glass substrate and a support such as a mounting table is a certain amount or less, for example, 1 nm or less, or about 0.2 to 0.8 nm. ing.
For this reason, this inventor has paid attention to the convex part which has a height of 1 nm or more from the surface roughness center plane of the surface unevenness of the glass surface 14. At this time, it was found that an area ratio of the convex portion having a height of 1 nm or more to the area of the glass surface 14 being 0.5% or more is effective in terms of preventing charging. When the area ratio is less than 0.5%, when the glass substrate is placed on the placement table, or when the glass substrate is sucked by being placed, the portion around the convex portion of the surface unevenness of the glass substrate It is considered that the convex portion cannot support the glass substrate between the surface of the mounting table and the surface of the mounting table, and the distance between the glass substrate and the surface of the mounting table cannot be sufficiently maintained, resulting in charging. . On the other hand, when the area ratio exceeds 10%, the maximum charge amount increases because the area of the contact portion between the convex portion and the mounting table increases. Further, when etching is performed so that the area ratio exceeds 10%, it is difficult to adjust the surface irregularities of the glass surface 14 as intended, the surface quality cannot be ensured, and scratch defects are easily formed on the glass surface 14. For example, potential fine scratches may be amplified by the surface treatment and become scratch defects. Therefore, the area ratio is 0.5 to 10%, the area ratio is preferably 0.75 to 7.0%, and more preferably 1.2 to 4.0%.
On the other hand, Rz is preferably 2 nm or more from the viewpoint of suppressing charging. Rz is more preferably 3 nm or more from the viewpoint of suppressing charging. However, when Rz exceeds a predetermined value, the surface strength of the glass substrate is greatly reduced, the surface irregularities are further increased, and the scratch defect is likely to occur.

In the conventional glass substrate, Ra is set to 0.3 to 1.5 nm in order to suppress peeling electrification. However, even if Ra is set to 0.3 to 1.5 nm, the surface of the glass of the convex portion in the present embodiment is not affected. The area ratio in the area is not 0.5 to 10%. Further, even if the area ratio is 0.5 to 10%, Ra is not necessarily 0.3 to 1.5 nm. That is, Ra and the area ratio are parameters that are independent of each other.
In the present embodiment, for example, in order to suppress the charging of the glass substrate 10 or the amount of charge, the area ratio of the convex portion having a height of 1 nm or more on the glass surface 14 is set to 0.5 to 10%. For this reason, a large number of surface irregularities are formed on the glass surface 14 by a roughening treatment. Therefore, when suppressing the charging or the charge amount of the glass substrate 10, it is considered that the Ra of the glass surface 14 is generally increased by the roughening treatment. However, this Ra varies greatly depending on the distribution of convex portions of the surface irregularities formed on the glass surface 14. For example, two examples shown in FIGS. 4A and 4B are assumed in which the maximum height in the convex portion (the maximum protruding height from the peripheral concave portion) is the same. In the example shown in FIG. 4A, among the plurality of convex portions, the height of most of the convex portions is substantially uniform at a low height, and the height of a very small portion of the convex portions is equal to the surrounding convex portions. It is an example that protrudes in comparison. The example shown in FIG. 4B is an example in which almost all the heights of the plurality of convex portions are substantially aligned. At this time, the arithmetic average roughness Ra is Ra ₂ > Ra ₁ . The area shown in FIG. 4A is smaller in the area where the convex portion comes into contact with the mounting table than in the example shown in FIG. 4B. Therefore, the example shown in FIG. Greatly suppresses the charging or charging amount of the glass substrate 10. For this reason, according to the examples shown in FIGS. 4A and 4B, it is better that the Ra of the glass surface 14 is smaller in order to suppress the charging or the charge amount. This point contradicts the general idea of increasing the Ra of the glass surface 14 in order to suppress the above-described charging or charge amount.
Thus, Ra is not sufficient as an index for suppressing the charging of the glass substrate 10 or the charge amount. In the present embodiment, in consideration of this point, the glass surface 14 is roughened so that the area ratio of convex portions having a height of 1 nm or more on the glass surface 14 is 0.5 to 10%.
In the glass substrate 10 of the present embodiment, since the charging of the glass substrate or the amount of charge is suppressed, the glass substrate 10 can be suitably used for a glass substrate that performs processing such as film formation using a semiconductor manufacturing apparatus. It can also be suitably used for a glass substrate for forming a color filter where it is desirable that dust and dust do not adhere.

  Moreover, the glass substrate 10 of this embodiment is used suitably as a glass substrate in which TFT provided with the gate insulating film whose film thickness is less than 20 micrometers is formed in the above-mentioned glass surface 12. In recent high-definition and high-resolution display panels, the thickness of each layer included in a semiconductor element mainly using an insulating film has been reduced. As a background to this, there is a demand for a thinner gate insulating film in order to meet demands for narrowing the pixel pitch and speeding up display switching. In addition, the thickness of the gate insulating film has been reduced from the viewpoint of reducing the gate voltage in order to save power in the display panel. As an example of such thinning in a high-definition / high-resolution panel, the thickness of the gate insulating film is reduced to less than 20 nm. The film thickness of the gate insulating film is conventionally about 70 to 100 nm, but in recent years it has become 50 nm and further 20 nm. The gate insulating film can be thinned in this way because the film quality of the gate insulating film has been improved, and the film thickness can be reduced according to the above requirements. This is because. However, on the other hand, there has been a problem of electrostatic breakdown of the semiconductor element, such as discharge of the gate insulating film due to charging of the glass substrate and damage to the gate insulating film. Therefore, it is particularly effective to use a glass substrate that is charged or whose charge amount is suppressed as described above as a glass substrate used for a display panel on which a TFT having a gate insulating film of less than 20 μm is formed. is there.

(Display panel)
A semiconductor element is formed on the main surface of such a glass substrate 10 to produce a display panel.
Specifically, the glass substrate 10 of the display panel has a first main surface and a second main surface.
The first main surface is the glass surface 14 in which convex portions having a height of 1 nm or more from the surface roughness center plane of the surface irregularities are provided, and the area of the glass surface 14 of the convex portions. The area ratio occupied by is 0.5 to 10%.
The second main surface is a surface opposite to the first main surface (glass surface 14), and the second main surface is the glass surface 12 to form a semiconductor element. For example, patterned conductor thin films and semiconductor elements such as electrodes and wiring patterns are formed on the second main surface. That is, on the second main surface, in addition to the formation of the electrode conductive thin film and the semiconductor thin film, a display panel is formed through a photolithography process such as resist film formation, etching, and resist stripping. In such a display panel, since the charging or charging amount of the glass substrate 10 is suppressed during the panel manufacturing process, electrostatic breakdown of the semiconductor element can be suppressed.
In particular, when a low-temperature polysilicon semiconductor or an oxide semiconductor is formed on the glass substrate 10, the thickness of the semiconductor element is smaller than that of a conventionally formed amorphous silicon semiconductor, and the wiring connected to the semiconductor element is also reduced. The width and the pitch interval are narrow, and the pitch interval is narrowed, for example, from 5 μm to about 1.5 to 3 μm. For this reason, the request | requirement of the damage prevention by electrification is higher than before. For this reason, when a low-temperature polysilicon semiconductor or an oxide semiconductor is formed on the glass substrate 10, the effect of the glass substrate 10 that can suppress charging and the amount of charge is great.
Moreover, the glass substrate 10 is suitably used for a display panel in which a TFT including a gate insulating film having a film thickness of less than 20 μm is formed. Such a gate insulating film having a small film thickness is liable to cause electric discharge and is easily damaged. However, the use of the glass substrate 10 suppresses charging of the glass substrate and the amount of charge, and thus electrostatic breakdown of such TFTs. Is effectively suppressed. Therefore, it is possible to obtain a high-definition and high-resolution display panel that can suppress problems due to charging while reducing the thickness of the gate insulating film or the like.

(Glass composition)
Examples of the glass composition of the glass substrate 10 include glass containing the following components.
(A) SiO ₂ : 50 to 70% by mass,
(B) B ₂ O ₃ : 5 to 18% by mass,
(C) Al ₂ O ₃ : 10 to 25% by mass,
(D) MgO: 0 to 10% by mass,
(E) CaO: 0 to 20% by mass,
(F) SrO: 0 to 20% by mass,
(O) BaO: 0 to 10% by mass,
(P) RO: 5 to 20% by mass (wherein R is at least one selected from Mg, Ca, Sr and Ba),
(Q) R ′ ₂ O: 0 to 2.0% by mass (wherein R ′ is at least one selected from Li, Na and K),
(R) 0.05 to 1.5 mass% in total of at least one metal oxide selected from tin oxide, iron oxide, and cerium oxide.

  Such a glass substrate 10 is manufactured using a downdraw method, a float method, or the like. In the following description, a manufacturing method using the downdraw method will be described. FIG. 5 is a diagram illustrating an example of the flow of the method for manufacturing the glass substrate 10 of the present embodiment. The manufacturing method of the glass substrate for display includes a melting step (step S10), a clarification step (step S20), a stirring step (step S30), a forming step (step S40), a slow cooling step (step S50), It mainly has a plate-making process (step S60), a cutting process (step S70), a roughening treatment process (step S80), and an end face processing process (step S90). The melting step (step S10), the refining step (step S20), the stirring step (step S30), the forming step (step S40), the slow cooling step (step S50), and the plate-drawing step (step S60). By the cutting process (step S70), the glass substrate 10 having a surface on which the semiconductor element is formed is manufactured. Surface roughening is formed on the glass surface 14 on the opposite side of the main surface of the glass substrate 10 from the surface on which the semiconductor elements are formed, by a roughening treatment step performed thereafter.

The melting step (step S10) is performed in a melting furnace. In a melting furnace, a glass raw material is put into a liquid surface of molten glass stored in a melting furnace and heated to make molten glass. Furthermore, molten glass is flowed toward the downstream process from the outlet provided in one bottom part of the inner side wall of the melting furnace.
In addition to the method in which electricity flows through the molten glass itself and heats itself by heating, the glass raw material can be melted by supplementing a flame with a burner. A clarifier is added to the glass raw material. As clarifying agents, SnO ₂ , As ₂ O ₃ , Sb ₂ O ₃
Etc. are known, but not particularly limited. However, it is preferable to use SnO ₂ (tin oxide) as a clarifying agent from the viewpoint of reducing environmental burden.

The clarification step (step S20) is performed at least in the clarification tube. In the clarification process, when the molten glass in the clarification tube is heated, the bubbles containing O ₂ , CO ₂ or SO ₂ contained in the molten glass absorb O ₂ produced by the reductive reaction of the clarifier. The bubbles rise to the surface of the molten glass and are released. Furthermore, in the clarification step, the reducing substance obtained by the reduction reaction of the clarifier undergoes an oxidation reaction by lowering the temperature of the molten glass. Thereby, gas components such as O ₂ in the foam remaining in the molten glass are reabsorbed in the molten glass, and the foam disappears. The oxidation reaction and reduction reaction by the fining agent are performed by controlling the temperature of the molten glass. In the clarification step, a reduced pressure defoaming method can be used in which a space in a reduced pressure atmosphere is formed in a clarified tube, and bubbles existing in the molten glass are grown in a reduced pressure atmosphere and defoamed.

  Next, a stirring process is performed (step S30). In the stirring step, the molten glass is passed through a stirring tank (not shown) oriented vertically in order to maintain the chemical and thermal uniformity of the glass. While the molten glass is being stirred by the stirrer provided in the stirring tank, the molten glass moves to the bottom in the vertical downward direction, and is led to a subsequent process. Thereby, nonuniformity of the glass such as striae can be suppressed.

  Next, a molding process is performed (step S40). In the molding process, a downdraw method is used. The downdraw method is a known method using, for example, Japanese Patent Application Laid-Open No. 2010-189220 and Japanese Patent No. 3586142. Thereby, a sheet glass having a predetermined thickness and width is formed. As a molding method, an overflow downdraw is most preferable among the downdraw methods, but a slot downdraw may be used.

Next, a slow cooling process is performed (step S50). Specifically, the formed sheet glass is cooled to below the annealing point in an annealing furnace (not shown) by controlling the cooling rate so that distortion and warpage do not occur.
Next, a plate-making process is performed (step S60). Specifically, the sheet glass produced | generated continuously is sampled for every fixed length, and a glass substrate is obtained. Thereafter, in the cutting step (step S70), the glass substrate is cut into a predetermined size.

Next, a roughening process is performed (step S80). Specifically, a surface cleaning process is performed on the glass substrate, and then an etching process is performed.
In the surface cleaning process, for example, an atmospheric pressure plasma cleaning apparatus (not shown) is used, and in the etching process, an etching apparatus using atmospheric pressure plasma is used.

The atmospheric pressure plasma cleaning processing apparatus, for example, applies a gas in a plasma state using N ₂ and O ₂ to the glass surface 14 (surface in contact with the transport roller) of the glass substrate 10 transported by the transport roller. Spray from a slit-like nozzle that extends in the width direction.
The atmospheric pressure plasma cleaning apparatus has a supply path for N ₂ and O ₂ , a pair of counter electrodes provided on both sides of the supply path, and a dielectric covering the surfaces of the pair of counter electrodes. The end of the supply path is a plasma irradiation port and faces the glass substrate 10.
By blowing a gas (radical) activated by such plasma onto the glass surface 14, the thin film made of unnecessary organic substances adhering to the glass surface 14 is oxidized and removed. The reason why the organic thin film is removed is to prevent the organic thin film from functioning as a mask in an etching process described later.
Therefore, the glass surface 14 cleaned with plasma exhibits hydrophilicity by removing organic substances. At this time, the contact angle of water on the glass surface 14 is preferably 10 degrees or less, and more preferably 5 degrees or less. Such a preferable form can be achieved by adjusting the cleaning time with the activated gas or the flow rate of the gas. That is, as a surface cleaning condition, it is preferable to adjust the cleaning time and the flow rate of the activated gas so that the contact angle of water is 10 degrees or less.

  Note that the organic thin film can be removed by spraying ozone gas or irradiating ultraviolet rays instead of cleaning using atmospheric pressure plasma. It is sufficient that at least the organic substance can be oxidized or the organic thin film can be modified and removed. Moreover, you may wash | clean by application | coating of the washing | cleaning liquid which can remove organic substance, or a dipping process. However, in order to efficiently perform dry etching described later, it is preferable to perform cleaning by spraying ozone gas or irradiating with ultraviolet rays.

FIG. 6 is a diagram showing an example of an etching apparatus using atmospheric pressure plasma.
The etching apparatus 30 using atmospheric pressure plasma has an etching head 34 and a gas exhaust unit (not shown). The etching apparatus 30 has a slit-like shape in which an etching gas is extended to the full width direction of the glass substrate of the etching head 34 on one glass surface 14 (a surface in contact with the conveyance roller 32) of the glass substrate conveyed by the conveyance roller 32. Spray the glass surface from the nozzle. The etching gas is a gas having an activated HF component that is generated by bringing a mixed gas of CF ₄ and H ₂ O into a plasma state. Thereby, the glass surface is roughened by the etching gas.
The glass surface 14 of the glass substrate 10 is provided with convex portions having a height of 1 nm or more from the center surface of the surface roughness of the surface irregularities after the etching process. The etching process is performed so that the area ratio of the convex portion to the total area of the glass surface 14 is 0.5 to 10%. Specifically, conditions for surface roughening (surface cleaning conditions and etching conditions) are set. For example, under the etching conditions, the etching processing time is adjusted by adjusting the conveyance speed of the glass substrate 10, or the flow rate, type and concentration of the etching gas sprayed on the glass surface 14 are adjusted.

Note that the etching method for the roughening treatment is not limited to dry etching using an etching gas, and wet etching in which an etching solution is applied to the glass surface to be roughened may be used. FIG. 7 is a diagram showing a method of roughening the glass surface using the etching solution MS.
The etching liquid MS is stored in the container 28. A conveyance roller 22 and a conveyance application roller 24 are provided between the glass substrate 10 and the container 28 so that the glass surface 14 is conveyed in contact with the etching liquid MS. The outer peripheral surface of the conveyance application roller 24 is made of a sponge material. Further, a part of the outer peripheral surface of the transport application roller 24 is immersed in the etching liquid MS. Therefore, the etching liquid MS is absorbed on the surface of the transport application roller 24. The etching solution MS absorbed by the transport application roller 24 comes into contact with the glass surface 14 of the glass substrate 10 and the etching solution MS is applied to the glass surface 14. At that time, in order to adjust the coating amount of the etching liquid MS applied to the glass substrate 10, a part of the etching liquid MS absorbed by the transport application roller 24 is squeezed by pressing of the rotating contact roller 26. That is, the apparatus is provided with a contact roller 26 that presses the surface of the conveyance application roller 24. In the roughening treatment using the etching liquid MS, in addition to the adjustment of the coating amount, the concentration of hydrofluoric acid used in the etching liquid MS and the etching time may be adjusted. For example, after using a relatively high concentration hydrofluoric acid of 4000 ppm to 5000 ppm, the coating amount and etching time can be adjusted to roughen the surface to a desired shape.
In the apparatus shown in FIG. 7, the application amount of the etching liquid MS applied to the glass surface 14 can be adjusted by adjusting the degree to which the contact roller 26 presses the surface of the transport application roller 24. That is, on the glass surface 14 after the etching treatment, convex portions having a height of 1 nm or more from the surface roughness center surface of the surface irregularities are provided in a distributed manner and occupy the area of the glass surface of the convex portions. Etching conditions are adjusted so that the area ratio is 0.5 to 10%. The glass substrate 10 that has been etched by applying the etching solution MS is rinsed with water or the like.
Thus, the roughening process is performed by dry etching or wet etching. Physical polishing such as tape polishing, brush polishing, abrasive polishing, or CMP (Chemical Mechanical Polishing) may be performed by dry etching or instead of wet etching.

Thereafter, an end face processing step is performed (step S90). In the end face processing step, the glass surface and the end face are ground and polished. For example, a diamond wheel or a resin wheel is used for the end face processing.
Although the manufacturing method of the glass substrate for a display has a washing | cleaning process and an inspection process other than this, description of these processes is abbreviate | omitted.

  The glass substrate 10 thus obtained is transported to a panel manufacturer, and in addition to the formation of a conductive thin film for electrodes and the formation of a semiconductor thin film on the main surface forming the glass surface 12 of the glass substrate 10 in the panel manufacturer, a resist film Through a photolithography process such as formation, etching, and resist removal, electrodes, wirings, semiconductor elements, and the like are formed, and a display panel is manufactured. Note that a color filter including a black matrix or an RGB pattern may be formed on the glass surface 12 of the glass substrate 10 by a photolithography process instead of forming a semiconductor element or the like.

As described above, the glass substrate 10 is provided with the convex portions having a height of 1 nm or more from the surface roughness central surface of the surface irregularities of the etched glass surface 14, and the glass surface of the convex portions. The etching treatment is performed so that the area ratio in the area is 0.5 to 10%, preferably 0.75 to 7.0%, more preferably 1.2% to 4.0%. Is called. Thereby, even when the glass substrate is removed after the mounting table such as a semiconductor manufacturing apparatus is in contact with the glass substrate, charging is not easily caused during the contact and removal.
In particular, Rz (Rz is the maximum height of the surface unevenness measured with an atomic force microscope) in the surface unevenness is preferably 2 (nm) or more from the viewpoint of preventing charging.

[Experimental example]
In order to investigate the effect of this embodiment, a glass substrate for a liquid crystal display device using boroaluminosilicate glass was produced.

(Roughening treatment)
The atmospheric pressure plasma cleaning described above was performed on the produced glass substrate. That is, a mixed gas of N ₂ and O _{2 in} a plasma state was flowed at a predetermined amount every minute to the full width of the glass substrate to clean the glass surface of the glass substrate.

Further, etching was performed using an etching apparatus 30 shown in FIG. Etching is performed by flowing a radicalized etching gas HF obtained by passing a mixed gas of CF ₄ and H ₂ O through plasma generated using a rare gas or the like in the etching apparatus 30 to the full width of the glass substrate. Went.
Samples 1 to 8 shown in Table 1 below vary the supply amount of CF ₄ and H ₂ O, and further the type of carrier gas (N ₂ or Ar gas) added to the mixed gas of CF ₄ and H ₂ O. This is an example in which the shape of the surface irregularities formed by the roughening treatment is variously changed. Sample 0 is an example in which dry etching is not performed at all.

[Surface unevenness]
The surface unevenness of the glass surface 14 of the glass substrate 10 was obtained by cutting out a sample (length 50 mm, width 50 mm) from the produced glass substrate 10 and using each of these samples using an atomic force microscope (ParkSystems, model XE-100). And measured in non-contact mode. Prior to measurement, the apparatus was adjusted to measure surface irregularities with small surface roughness such that the arithmetic average roughness Ra was less than 1 nm. At the time of measurement, the scan area was 1 μm × 1 μm (sampling number was 256 points × 256 points), and the scan rate was 0.8 Hz. The servo gain in the non-contact mode of the atomic force microscope was set to 1.5. The set point was set automatically. By this measurement, a two-dimensional surface profile shape related to the surface irregularities was obtained. From this surface profile shape, a histogram of surface irregularities is obtained, sliced at a height of 1 nm from the surface center of the surface roughness, and the number of pixels in the image having a height of 1 nm or more is counted to determine the convex portion By determining the area, the area ratio (%) of the protrusions was determined. At the same time, Rz (nm) was determined.

[Electrical evaluation]
For the evaluation of the charging of the glass substrate, a glass substrate 10 having a size of 730 mm × 920 mm and a thickness of 0.5 mm was used. As shown in FIG. 8, from the state where the glass substrate 10 is placed on the substrate table 40 and supported by the lifting pins 42, the lifting pins 42 are lowered with respect to the mounting surface of the substrate table 40 to lower the glass substrate 10. And placed on the substrate table 40. The substrate table has a surface obtained by anodizing an aluminum table.
Further, the glass substrate 10 was sucked at 50 kPa from a suction port provided on the mounting surface of the substrate table 40 by a suction device (not shown), and then the suction was finished and the elevating pins 42 were raised. Thus, the descent, suction, suction end, and rise of the glass substrate 10 were taken as one cycle, and a plurality of cycles were repeated until the charge amount was saturated. One cycle was 10 seconds. In addition, the charge amount was measured for each cycle. The charge amount was measured by measuring the potential of the glass surface at the center of the glass. For the measurement, a surface electrometer (ZJ-SD manufactured by OMRON Corporation) was used. The installation height of the surface electrometer was 10 mm. The charging measurement environment was 23.5 ° C. and 74 to 75% as measured by a thermohygrometer. From this measurement result, the maximum potential and charging speed representing the maximum charge amount were obtained. In the measurement, the potential of the surface of the glass substrate opposite to the substrate table was measured.
The maximum potential is a potential when the above-mentioned cycle is repeated a plurality of times until the amount of charge of the glass substrate 10 is saturated and saturated. The charging speed is the number of cycles until the absolute value of the potential exceeds 100V. In addition, the potential of the measured glass substrate surface was negative. Table 1 shows absolute values.

  Table 1 below shows the area ratio and Rz of the convex portion having a height of 1 nm or more (height from the surface roughness center plane of the surface irregularities) formed in the etching process in the total area of the glass surface 14. The evaluation results of the charging speed and the maximum potential when changing is shown.

The arithmetic average roughness Ra in Samples 1 and 2 was 0.3 to 1.5 nm, but as shown in Table 1, the area ratio was not in the range of 0.5 to 10%.
As can be seen from the evaluation results in Table 1, a sample having a charging rate (number of times) exceeding 10 times (a charging rate being low and acceptable) and having an absolute value of a maximum potential of less than 17 kV is shown in Sample 3 The area ratio was 0.5 to 10% in all cases.
Further, it can be seen that when the area ratio is 0.75 to 7.0%, the maximum potential is lower than 16.2 kV (conditions in which the charge amount is in an allowable range), and the problem of charging hardly occurs. The maximum potential of the samples 5 to 7 included in the area ratio of 1.2 to 4.0% is lower than 16 kV, and the charging rate is more preferable. That is, the area ratio of the convex portions is more preferably 1.2 to 4.0%.

As mentioned above, although the manufacturing method of the glass substrate for display of this invention, the glass substrate, and the panel for display were demonstrated in detail, this invention is not limited to the said embodiment, In the range which does not deviate from the main point of this invention, various improvement Of course, you may make changes.
In particular, management using conventional parameters for glass substrates for forming high-definition and high-resolution, for example, oxide semiconductors and low-temperature polysilicon semiconductor elements, used with wiring patterns with narrow line widths and pitches, The quality requirements for glass substrates could not be fully met. ADVANTAGE OF THE INVENTION According to this invention, the line width of the wiring electrode formed on a glass substrate can be suppressed in the glass substrate for high-definition / high-resolution displays in which the line | wire width of a wiring electrode is narrow and a small defect is not permitted.
Moreover, not only the problem due to electric discharge is solved, but also the yield of Cu-based electrode wiring with low adhesion to glass can be increased by reducing the amount of foreign matter adhering to the glass substrate due to static electricity. That is, by using the glass substrate of the present invention, it is possible to use wiring / electrode materials having low adhesion to glass even if the line width is narrow. For example, it is possible to use a Cu-based electrode material such as a Ti—Cu alloy, which has low adhesion compared to an Al-based electrode, Cr, Mo electrode, etc., but has a low resistance. Thus, by expanding the selection range of the electrode material, the problem of RC delay (wiring delay), which is likely to be a problem in a large panel for a TV or the like, can be solved. In addition, it is possible to provide a glass substrate that can solve the problem of RC delay that may occur in a small panel for a portable terminal, which is expected to have higher definition in the future.
In the above description, the problem of charging has been described using a glass substrate on which a semiconductor element is provided as a device. However, the present invention also provides a countermeasure against charging in a glass substrate for a display in which a color filter or the like is formed as a device. It is valid. For example, in the color filter (CF) panel, the thinning of the black matrix (BM) is progressing. According to the present invention, the BM line width in the liquid crystal display CF panel is 20 μm or less, for example, 5 to 10 μm. Even in the thinned liquid crystal panel, no BM peeling due to foreign matters occurred.

DESCRIPTION OF SYMBOLS 10 Glass substrate 12 and 14 Glass surface 22 Conveyance roller 24 Conveyance roller 26 Contact roller 28 Container 30 Etching apparatus 34 Etching head 40 Substrate table 42 Lifting pin

The glass substrate preferably has a semiconductor element formed on the other glass surface. In that case, it is preferable that the other glass surface is a surface on which a low-temperature polysilicon semiconductor or an oxide semiconductor is formed. In addition, a thin film transistor provided with a gate insulating film having a thickness of less than 20 nm is formed on the other glass surface of the glass substrate.

FIG. 1 is a cross-sectional view of a glass substrate 10 manufactured by the display glass substrate manufacturing method of the present embodiment.
The glass substrate 10 is used for flat panel displays such as a liquid crystal display panel, a plasma display panel, and an organic EL display panel. The glass substrate 10 can also be used as a glass substrate of a solar cell panel. For example, a glass substrate having a thickness of 0.1 to 0.8 mm and a size of 550 mm × 650 mm to 2200 mm × 2500 mm. In the glass substrate, a semiconductor element is formed on the main surface of the glass substrate after the glass substrate is manufactured. One glass surface 12 of the glass substrate 10 is a surface on which a semiconductor element such as a TFT is formed (semiconductor element formation surface), and forms a plurality of thin films such as a low-temperature polysilicon thin film or an ITO (Indium Thin Oxide) thin film. It is a semiconductor element formation surface (surface on which a low-temperature polysilicon semiconductor or oxide semiconductor is formed). The TFT includes, for example, one having a gate insulating film having a thickness of less than 20 nm . In a display panel for high definition and high resolution, the gate insulating film is formed to be, for example, 5 nm or more and less than 20 nm . In addition, in a TFT including a gate insulating film having such a thickness, in addition to the gate insulating film, the thickness of each layer forming the semiconductor element has been reduced. Therefore, on the glass surface 12, Ra (arithmetic mean roughness: JIS B 0601: 2001) is suppressed to 0.2 (nm) or less, and is an extremely smooth surface.
On the other hand, the glass surface 14 facing the glass surface 12 on the side opposite to the glass surface 12 is a roughened surface by etching. Specifically, convex portions having a height of 1 nm or more from the surface roughness center plane of the surface irregularities of the glass surface 14 are provided in a dispersed manner, and the area ratio of the convex portions to the total area of the glass surface 14 Is 0.5 to 10%. In this embodiment, the surface irregularities are formed by the etching process, but the present invention is not limited to the etching process. Any surface treatment that can form surface irregularities may be used. For surface treatment, in addition to etching treatment, tape polishing, brush polishing, abrasive polishing, CMP (Chemical Mechanical Polishing)
) Etc. are included.

Moreover, the glass substrate 10 of this embodiment is used suitably as a glass substrate in which TFT provided with the gate insulating film whose film thickness is less than 20 nm is formed on the above-mentioned glass surface 12. In recent high-definition and high-resolution display panels, the thickness of each layer included in a semiconductor element mainly using an insulating film has been reduced. As a background to this, there is a demand for a thinner gate insulating film in order to meet demands for narrowing the pixel pitch and speeding up display switching. In addition, the thickness of the gate insulating film has been reduced from the viewpoint of reducing the gate voltage in order to save power in the display panel. As an example of such thinning in a high-definition / high-resolution panel, the thickness of the gate insulating film is reduced to less than 20 nm. The film thickness of the gate insulating film is conventionally about 70 to 100 nm, but in recent years it has become 50 nm and further 20 nm. The gate insulating film can be thinned in this way because the film quality of the gate insulating film has been improved, and the film thickness can be reduced according to the above requirements. This is because. However, on the other hand, there has been a problem of electrostatic breakdown of the semiconductor element, such as discharge of the gate insulating film due to charging of the glass substrate and damage to the gate insulating film. Therefore, it is particularly effective to use a glass substrate that is charged or whose charge amount is suppressed as described above as a glass substrate used for a display panel on which a TFT having a gate insulating film of less than 20 nm is formed. It is.

(Display panel)
A semiconductor element is formed on the main surface of such a glass substrate 10 to produce a display panel.
Specifically, the glass substrate 10 of the display panel has a first main surface and a second main surface.
The first main surface is the glass surface 14 in which convex portions having a height of 1 nm or more from the surface roughness center plane of the surface irregularities are provided, and the area of the glass surface 14 of the convex portions. The area ratio occupied by is 0.5 to 10%.
The second main surface is a surface opposite to the first main surface (glass surface 14), and the second main surface is the glass surface 12 to form a semiconductor element. For example, patterned conductor thin films and semiconductor elements such as electrodes and wiring patterns are formed on the second main surface. That is, on the second main surface, in addition to the formation of the electrode conductive thin film and the semiconductor thin film, a display panel is formed through a photolithography process such as resist film formation, etching, and resist stripping. In such a display panel, since the charging or charging amount of the glass substrate 10 is suppressed during the panel manufacturing process, electrostatic breakdown of the semiconductor element can be suppressed.
In particular, when a low-temperature polysilicon semiconductor or an oxide semiconductor is formed on the glass substrate 10, the thickness of the semiconductor element is smaller than that of a conventionally formed amorphous silicon semiconductor, and the wiring connected to the semiconductor element is also reduced. The width and the pitch interval are narrow, and the pitch interval is narrowed, for example, from 5 μm to about 1.5 to 3 μm. For this reason, the request | requirement of the damage prevention by electrification is higher than before. For this reason, when a low-temperature polysilicon semiconductor or an oxide semiconductor is formed on the glass substrate 10, the effect of the glass substrate 10 that can suppress charging and the amount of charge is great.
Moreover, the glass substrate 10 is suitably used for a display panel in which a TFT including a gate insulating film having a thickness of less than 20 nm is formed. Such a gate insulating film having a small film thickness is liable to cause electric discharge and is easily damaged. However, the use of the glass substrate 10 suppresses charging of the glass substrate and the amount of charge, and thus electrostatic breakdown of such TFTs. Is effectively suppressed. Therefore, it is possible to obtain a high-definition and high-resolution display panel that can suppress problems due to charging while reducing the thickness of the gate insulating film or the like.

Claims (11)

A method for producing a glass substrate for a display, comprising:
Producing a glass substrate;
A surface treatment is performed on one glass surface of the main surface of the glass substrate to form surface irregularities, and
In the surface-treated glass surface, convex portions having a height of 1 nm or more from the surface roughness center surface of the surface irregularities are provided in a dispersed manner, and the area ratio of the convex portion to the area of the glass surface is The said surface treatment is performed so that it may become 0.5 to 10%, The manufacturing method of the glass substrate for displays characterized by the above-mentioned.   2. The method for producing a glass substrate for display according to claim 1, wherein Rz (Rz is a maximum height of surface irregularities measured by an atomic force microscope) in the surface irregularities is 2 (nm) or more.   The manufacturing method of the glass substrate for a display of Claim 1 or 2 whose said area ratio is 0.75-7.0%.   The said surface treatment is a manufacturing method of the glass substrate for displays of any one of Claims 1-3 which is the dry etching process using plasma.   The said glass substrate is a manufacturing method of the glass substrate for displays of any one of Claims 1-4 which is a glass substrate for semiconductor element formation.   The method for producing a glass substrate for a display according to claim 5, wherein a main surface of the glass substrate for forming a semiconductor element opposite to the glass surface is a surface on which a low-temperature polysilicon semiconductor or an oxide semiconductor is formed. A glass substrate,
One glass surface among the main surfaces of the glass substrate is provided with a convex portion having a height of 1 nm or more from the surface roughness center surface of the surface irregularities, and is provided on the area of the glass surface of the convex portion. The area ratio occupied is 0.5 to 10%,
The glass substrate, wherein the other glass surface opposite to the one glass surface among the main surfaces of the glass substrate is used as a device surface.   The glass substrate according to claim 7, wherein a semiconductor element is formed on the other glass surface.   The glass substrate according to claim 8, wherein the other glass surface is a surface on which a low-temperature polysilicon semiconductor or an oxide semiconductor is formed.   The glass substrate according to claim 7 or 8, wherein a thin film transistor including a gate insulating film having a thickness of less than 20 µm is formed on the other glass surface. A display panel in which a semiconductor element is formed on a glass substrate,
The glass surface is provided with a convex portion having a height of 1 nm or more from the surface roughness center plane of the surface irregularities, and the area ratio of the convex portion to the area of the glass surface is 0.5 to 10 A first major surface of the glass substrate having a glass surface that is%,
A display panel, comprising: a second main surface of the glass substrate on a side opposite to the first main surface, on which a semiconductor element is formed.

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