JP2013150033A - Voltage controlled oscillator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a voltage controlled oscillator which can be made to start oscillating easily by controlling the voltage applied to a voltage variable capacitive element and which operates stably without having to increase its circuit area.SOLUTION: The voltage controlled oscillator includes an oscillation inverter 1, a crystal vibrator 2, capacitors 3 and 4, an output terminal 31, a control voltage application terminal 12, voltage variable capacitive elements 7 and 8, and bias resistors 5 and 6. At a midpoint of the bias resistor 6 between the control voltage application terminal 12 and the capacitor 4/voltage variable capacitive element 8 is connected a PMOS transistor 15 which constitutes a boot signal generation circuit. This transistor 15 is on/off controlled as a control voltage (VC) is applied to the capacitive element, whereby its capacitance value is reduced. The transistor 15 can be controlled by an oscillation detection circuit 20 between the output terminal of the inverter 1 and the gate of the transistor 15.

Description

  The present invention relates to a voltage controlled oscillator that is easy to start oscillation and that operates stably without increasing the circuit area.

Conventional voltage controlled crystal oscillator (VCXO)
An example of the oscillator is shown in FIG.
One terminal of the first DC cut capacitor 104 is connected to the input terminal 113 of the oscillation inverter 101, one terminal of the second DC cut capacitor 103 is connected to the output terminal 112 of the oscillation inverter 101, and the first DC cut capacitor 104 is connected. The other terminal of the cut capacitor 104 is connected to the first terminal 111 of the crystal resonator 102, and the other terminal of the second DC cut capacitor 103 is connected to the second terminal 110 of the crystal resonator 102. One terminal of the first voltage variable capacitance element (varicap diode) 108 is connected to the first terminal 111 of the crystal unit 102. One terminal of the second voltage variable capacitance element (varicap diode) 107 is connected to the second terminal 110 of the crystal unit 102.

The other terminals of the first voltage variable capacitor 108 and the second voltage variable capacitor 107 are connected to the ground potential (VSS). The oscillation inverter 101 has a feedback resistor 109 connected in parallel between its input and output terminals.
The frequency control voltage is input between the first terminal 111 of the crystal resonator 2 and one terminal of the first voltage control variable capacitance element 108 via the first bias resistor 106, and the second bias The voltage is input between the second terminal 110 of the crystal resonator 102 and one terminal of the second voltage variable capacitance element 107 via the resistor 105.

Patent Document 1 discloses a voltage controlled oscillator having a large variable range of oscillation frequency while ensuring oscillation startability. The detection circuit detects that the oscillation signal has a predetermined amplitude value and the oscillation operation has shifted from the initial state to the steady state, and turns on the P-channel MOS transistor Tr to turn on the crystal resonator XL and the varicap diode CV. A capacitor CA is connected in series to the series circuit formed. In the initial state, the negative resistance necessary for reducing the load capacitance and canceling the decrease in the conductance gm of the oscillation amplifier to cope with the low-amplitude operation of the crystal resonator and maintaining good oscillation startability In a steady state, the effect of the varicap diode CV can be increased to increase the variation range of the oscillation frequency.

  Patent Document 2 discloses a crystal oscillator that can significantly shorten the startup time and that is suitable for intermittent operation without particularly increasing the power consumption during startup. This oscillator has a varicap diode that changes the load capacity of the crystal resonator, and is configured to apply a voltage higher than that in a steady state to the varicap diode immediately after power-on.

JP 2002-344242 A

JP 2001-24435 A

Conventional voltage-controlled oscillators use a transistor switch to connect and disconnect the CG and CD capacitance values of the oscillator. However, in order to reduce the on-resistance of the switch, it is necessary to increase the size of the transistor. In Patent Document 1, the varicap diode and the load capacity control mechanism used separately exist, and the load capacity control mechanism controls the oscillator when starting oscillation. Capacitance settings at startup using the oscillation detection circuit are also described.
Patent Document 2 describes that the voltage applied to the varicap diode is controlled.

However, the crystal oscillator of Patent Document 2 uses an adder circuit, and as a result, has the following effects. When the noise of the amplifier affects the varicap diode, it appears as phase noise. After the application range is narrow and the oscillation is stabilized, the voltage applied to the varicap diode is restricted by the saturation output voltage of the operational amplifier, and the output voltage range becomes narrow.
The present invention has been made under such circumstances, and controls the voltage applied to the voltage variable capacitance element to easily start oscillation and stably operate without increasing the circuit area. An oscillator is provided.

  The voltage controlled oscillator according to the present invention includes an oscillation inverter, a crystal resonator, one terminal connected to the input terminal of the oscillation inverter, and the other terminal connected to the first terminal of the crystal resonator. 1 DC cut capacitor, one terminal connected to the output terminal of the oscillation inverter, the other terminal connected to the second terminal of the crystal resonator, and a control voltage input terminal A first voltage variable capacitance element having one terminal connected to the first terminal and the other terminal connected to a ground potential; one terminal connected to the second terminal; and the other terminal Is connected to the ground potential, one end is connected between the first terminal and one terminal of the first voltage variable capacitor, and the other end is connected to the control voltage. A first bias resistor connected to the input terminal; A second bias resistor having one end connected between the second terminal and one terminal of the second voltage variable capacitance element and the other end connected to the control voltage input terminal; A transistor constituting a boot signal generation circuit is connected to an intermediate point of the first bias resistor or the second bias resistor to reduce the capacitance of the voltage variable capacitance element. The transistor may be a bipolar transistor or a MOS transistor. A PMOS transistor is used as the transistor when the voltage variable capacitor is a device whose capacitance is reduced when a voltage is applied, and an NMOS is used as the transistor when the voltage variable capacitor is a device whose capacity is increased when a voltage is applied. A transistor may be used.

  The voltage controlled oscillator according to the present invention is easy to start oscillating and can operate stably without increasing the circuit area.

1 is a circuit block diagram of a voltage controlled oscillator according to Embodiment 1. FIG. FIG. 6 is a circuit block diagram of a voltage controlled oscillator according to a second embodiment. FIG. 3 is a circuit diagram of an oscillation detection circuit incorporated in the voltage controlled oscillator described in FIG. 2. The signal waveform diagram of each part (AD) of the voltage controlled oscillator which concerns on FIG. The circuit diagram of the conventional voltage control type | mold oscillator.

Voltage controlled oscillators generally use voltage variable capacitance elements such as varicap diodes as CG and CD capacities as load capacities, and are connected to CG and CD capacities by terminals and resistors for applying voltage from the outside. It has a structure. In the voltage controlled oscillator according to the present invention, in such a structure, a transistor having a minimum CG and CD capacitance can be applied by adding a transistor to the middle point of the resistor.
Hereinafter, embodiments of the invention will be described with reference to examples.

Embodiment 1 will be described with reference to FIG.
The voltage controlled oscillator shown in FIG. 1 includes an oscillation inverter 1, a crystal resonator 2, one terminal connected to the input terminal of the oscillation inverter 1, and the other terminal being a first terminal of the crystal resonator 2. The first DC cut capacitor 4 connected to (XIN) 11, one terminal connected to the output terminal of the oscillation inverter 1, and the other terminal connected to the second terminal (XOUT) 10 of the crystal resonator 2. The second DC cut capacitor 3, the control voltage application terminal 12, the first voltage variable capacitance element 8 having one terminal connected to the first terminal 11 and the other terminal connected to the ground potential. , One terminal of the second voltage variable capacitance element 7 having one terminal connected to the second terminal 10 and the other terminal connected to the ground potential, one of the first terminal 11 and the first voltage variable capacitance element 8. And the other end of the control voltage application terminal 12. One end is connected between the first bias resistor 6 connected to, the second terminal 10 and one terminal of the second voltage variable capacitance element 7, and the other end is connected to the control voltage application terminal 12. A second bias resistor 5 and an output terminal 31 are provided, and a transistor 15 constituting a boot signal generating circuit is connected to the first bias resistor 6 or the intermediate point of the second bias resistor 5. As this transistor, a bipolar transistor or a MOS transistor can be used. In this embodiment, a PMOS transistor is used.

The oscillation inverter 1 is composed of a CMOS inverter and constitutes an oscillation amplification unit. A feedback resistor (Rf) 9 is connected between the input terminal and the output terminal. The first voltage variable capacitance element 8 becomes a load capacitance on the input terminal side of the oscillation inverter 1, and the second voltage variable capacitance element 7 becomes a load capacitance on the output terminal side. A resistor (RD) 17 is connected between the output terminal of the oscillation inverter 1 and the connection point between the feedback resistor 9 and the second DC cut capacitor 3. The resistor 17 is provided to suppress the crystal current and adjust it to an optimum value. Thereby, the frequency adjustment range can be increased while maintaining the oscillation condition.
An output signal from the oscillation inverter 1 is input to a level shift circuit (level shifter) 18 via a resistor 17 to raise the signal level. The output signal of the level shift circuit 18 is input to the frequency divider 19 and is divided to a predetermined frequency. The frequency-divided output signal is output from the output terminal 31 via the buffer circuit 30.

In such a voltage controlled oscillator, it is necessary to reduce the load capacitance (CG, CD) in order to stably start the crystal resonator.
In this embodiment, a voltage variable capacitance element (varicap diode) is used as a load capacitance (CG, CD), a transistor constituting a boot signal generation circuit is connected to an intermediate point of a bias resistor, and this transistor starts oscillation. It is sometimes turned on so that a voltage that minimizes the load capacitance (CG) can be applied. With such a configuration, the load capacity (CG) is minimized at the time of oscillation start, and the oscillation startability can be improved.

Voltage controlled oscillators generally use voltage variable capacitance elements such as varicap diodes as CG and CD capacities as load capacities, and are connected to CG and CD capacities by terminals and resistors for applying voltage from the outside. It has a structure. The voltage controlled oscillator of this embodiment is characterized in that a voltage that minimizes the CG and CD capacitances can be applied by adding a transistor to the middle point of the bias resistor.
The boot signal generation circuit includes a PMOS transistor 15 connected to the midpoint of the first bias resistor 6 (6a, 6b). A gate terminal 16 to which a voltage is applied is connected to the gate electrode of the PMOS transistor 15, one end of the current path of the PMOS transistor 15 is connected to the power supply voltage (VDD), and the other end is an intermediate point (6a and 6a) of the bias resistor 6. 6b). A desired control voltage is applied to the gate terminal 16, the PMOS transistor 15 is turned on at the time of oscillation start-up, and a power supply voltage (VDD) is applied to one end of the first voltage variable capacitance element 8 to minimize the CG capacitance. It is comprised so that it may become. The timing for applying the control voltage to the gate terminal 16 is determined by judging the oscillation state. A control voltage for turning on the PMOS transistor 15 is applied at the same time as the power supply is turned on, and control can be performed so as to switch to the control voltage for turning off the PMOS transistor 15 after the oscillation signal is stabilized. In this case, the oscillation state is included in the voltage controlled oscillator. The control voltage is switched by introducing a detecting means for detecting.

The transistor to be added and the connection position vary depending on the characteristics of the voltage variable capacitance element. That is, in the case of a voltage variable capacitance element whose capacitance decreases when a voltage is applied, a PMOS transistor is used as in this embodiment, and one end of the current path of the PMOS transistor is connected to the power supply (VDD) side, The other electrode is connected to the middle point of the bias resistor. Further, the PMOS transistor can be replaced with an NMOS transistor by inverting the logic of the voltage applied to the gate terminal of the transistor. Further, one end of the current path of the PMOS transistor may be about 0.5 VDD instead of the power source (VDD), and this voltage may be higher than the control voltage (VC) applied to the control voltage application terminal 12.
On the other hand, in the case of a voltage variable capacitance element whose capacity increases when a voltage is applied, for example, an NMOS transistor is used, and one end of the current path of the NMOS transistor is connected to the ground (low potential power supply VSS) side, The electrode is connected to the middle point of the bias resistor. For example, when an H level voltage is applied to the gate of the NMOS transistor, one end of the voltage variable capacitance element is connected to the low potential power source VSS, and the capacitance is reduced. Further, the NMOS transistor can be replaced with a PMOS transistor by inverting the logic of the voltage applied to the gate terminal of the transistor. In addition, a bipolar transistor can be used.
In this embodiment, the bias resistor is configured such that a transistor (boot signal generation circuit) is connected only to the intermediate point of the first bias resistor 6 on the input end side of the oscillation inverter 1 to lower the capacitance value of the voltage variable capacitance element when starting oscillation. However, instead of this, it may be connected to an intermediate point of the second bias resistor 5 on the output end side. A transistor (boot signal generation circuit) may be connected to both the input end side and the output end side.

As described above, in this embodiment, by controlling the voltage applied to the voltage variable capacitance element, an adjustment capacitor separately provided for switching between oscillation start-up and steady state becomes unnecessary. Further, by connecting to the middle point of the resistor, there is a feature that the start-up characteristic is not affected even if a voltage is applied to the voltage application terminal. In addition, since the resistor and the capacitor function as a filter after the boot is released, it is difficult to cause an abnormal operation in the oscillator. In addition, since the transistor is connected at the middle point of the bias resistor, the control voltage (VC) is applied to the control voltage application terminal during the start-up of the oscillation connected to the power supply (VDD) by the transistor (boot signal generation circuit). This does not affect the starting characteristics of the oscillator.

Next, Embodiment 2 will be described with reference to FIGS. This embodiment is characterized by controlling the oscillation operation of the voltage controlled oscillator shown in FIG. 1 using an oscillation detection circuit.
As shown in FIG. 2, in this embodiment, an oscillation detection circuit 20 is added. The oscillation detection circuit 20 has an input side connected to the output terminal of the oscillation inverter 1 via a resistor (RD) 17 and an output side connected to the gate terminal 16 of the PMOS transistor 15.

FIG. 3 shows details of the oscillation detection circuit 20 used in the voltage-controlled oscillator shown in FIG. The oscillation detection circuit 20 includes PMOS transistors 21 and 22, CMOS inverters 23 and 24, capacitive elements 25 and 26, and resistors 27, 28, and 29. The capacitive element 25 is connected to the output terminal of the oscillation inverter 1 via the resistor 17. The PMOS transistors 21 and 22 constitute a current mirror circuit, and the gate electrodes are connected to each other via a resistor 28. One electrode of the PMOS transistors 21 and 22 is connected to a power supply (VDD). The electrode of the PMOS transistor 21 is connected to the other electrode. The other electrodes of the PMOS transistors 21 and 22 are grounded (low potential side power supply VSS) via resistors 27 and 29, respectively.

The input end of the inverter 23 is connected to a connection point between the other electrode of the PMOS transistor 22 and the other end opposite to the ground end of the resistor 29, and the other end opposite to the ground end (VSS) of the capacitor 26. Is connected between the input terminal of the inverter 23 and the connection point. The output terminal of the inverter 23 is connected to the input terminal of the inverter 24.
The oscillation detection circuit receives an oscillation output Vosc (point A) of the oscillation circuit constituting the voltage-controlled oscillator, is turned on / off in accordance with the oscillation output, and passes a predetermined current during the on period. The capacitive element 26 that charges or discharges according to the output (point B) of the oscillation detection unit, detects the desired oscillation state based on the potential change of the capacitive element 26, and outputs the result as Vout (point C) It comprises an amplitude detection circuit.

Next, the operation of the oscillation detection circuit 20 will be described with reference to FIG. 2, FIG. 3, and FIG. 4A and 4B are waveform diagrams showing changes in voltage at each node. FIG. 4A shows the state of the VDD power supply, FIG. 4B shows point A, FIG. 4C shows point B, and FIG. ) Shows the state of the point C, and FIG. 4E shows the state of the point D.
When oscillation starts in the oscillation circuit, the amplitude (voltage level) of the oscillation waveform at point A (= Vout) gradually increases, and the amplitude reaches the set threshold level (Vref) as a predetermined time elapses. When the voltage exceeds the lower level, the PMOS transistor 22 is turned on while the voltage is exceeded, and the potential at the point B is increased (see FIG. 4C). That is, since the detection end (point B) is connected to the low potential side power source (VSS) via the resistance element 26, the potential of the capacitive element 26 in the discharged state is caused to flow through the PMOS transistor 22. To charge. This is repeated each time the oscillation amplitude exceeds the threshold level (Vref) and becomes a low voltage.

When the holding potential of the capacitive element 26 reaches the level (Vth-inv) of the inversion threshold value of the detection circuit (Schmitt inverter), the output (point C) of the detection circuit 20 that has been at a low level is changed to a high level. Change to (VDD). (Refer FIG.4 (d)). Thereby, the oscillation state is detected.
When the potential at the point C becomes high level, the transistor 15 that was turned on at the same time as the power is turned off is turned off. As a result, the point D is disconnected from the power supply (VDD) and input from the voltage application terminal 12. The voltage depends on the control voltage (VC).

  As described above, in this embodiment, since the oscillation detection circuit is used to detect the amplitude of the oscillation output and the transistor is turned on and off, an efficient set time is obtained. By connecting to the middle point of the resistor, even if a voltage is applied to the voltage application terminal, the starting characteristics are not affected. In addition, since the resistor and the capacitor function as a filter after the boot is released, it is difficult to cause an abnormal operation in the oscillator. Further, since the transistors are connected at the middle point of the resistor, even if a control voltage is applied to the voltage application terminal, the start-up characteristics of the oscillator are not affected.

DESCRIPTION OF SYMBOLS 1 ... Oscillation inverter 2 ... Crystal oscillator 3, 4 ... Capacitance 5, 6 ... Bias resistance 7, 8 ... Voltage variable capacity element 9 ... Feedback resistance 10, 11 ... Terminal (Crystal connection terminal)
12 ... Control voltage application terminals 15, 21, 22 ... PMOS transistor 16 ... Gate terminal 17 ... Resistance (RD)
18 ... Level shifter 19 ... Frequency divider 20 ... Oscillation detection circuit 23, 24 ... Inverter 25, 26 ... Capacitance elements 27, 28, 29 ... Resistor 30 ... Buffer 31 ..Output terminals

Claims (2)

An oscillation inverter, a crystal resonator, one terminal connected to the input terminal of the oscillation inverter, and the other terminal connected to the first terminal of the crystal resonator, A second DC cut capacitor having a terminal connected to the output terminal of the oscillation inverter and the other terminal connected to the second terminal of the crystal resonator, a control voltage input terminal, and one terminal being the first terminal A first voltage variable capacitor having a second terminal connected to the ground potential, a first terminal connected to the second terminal, and a second terminal connected to the ground potential. One of the first voltage variable capacitance element, the first terminal and one terminal of the first voltage variable capacitance element, and the other end connected to the control voltage input terminal. A bias resistor, the second terminal, and the second power source. And a second bias resistor having one end connected to one terminal of the variable capacitance element and the other end connected to the control voltage input terminal, and being intermediate between the first bias resistor or the second bias resistor. A voltage-controlled oscillator characterized in that a transistor constituting a boot signal generation circuit is connected to a point to reduce the capacitance of the voltage variable capacitance element. A PMOS transistor is used as the transistor when the voltage variable capacitor is a device whose capacitance is reduced when a voltage is applied, and an NMOS is used as the transistor when the voltage variable capacitor is a device whose capacity is increased when a voltage is applied. 2. The voltage controlled oscillator according to claim 1, wherein a transistor is used.

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