JP2012138378A - Light emitting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an element structure that can reduce average film resistance in an anode of a light emitting element in an active matrix type light emitting device.SOLUTION: By forming, by using a conductive film, an upper part 107b of a bank 107 formed so as to fill a clearance of a cathode 104, it is possible to reduce average film resistance in an anode 109, and obtain a light emitting device providing sharper image display.

Description

  The present invention relates to a film formation apparatus and a composition used for manufacturing a light-emitting element including a film containing an organic compound that can emit light by applying an electric field (hereinafter referred to as an “organic compound layer”), an anode, and a cathode. The present invention relates to a membrane method. In particular, the present invention relates to the manufacture of a light-emitting element that is less likely to deteriorate than the conventional one and has a long element lifetime.

  In recent years, research on a light-emitting device having an organic light-emitting element (light-emitting element) as a self-luminous element has been actively conducted, and in particular, a light-emitting device using an organic compound as a light-emitting material has attracted attention. This light emitting device is also called an organic EL display (OELD) or an organic light emitting diode (OLED).

  Note that the light-emitting element includes a layer containing an organic compound (hereinafter referred to as an organic compound layer) from which luminescence generated by applying an electric field is obtained, an anode, and a cathode. Luminescence in organic compounds includes light emission (fluorescence) when returning from the singlet excited state to the ground state and light emission (phosphorescence) when returning from the triplet excited state to the ground state. It is applicable to the case where either light emission is used.

  Unlike the liquid crystal display device, the light-emitting device is a self-luminous type and has a feature that there is no problem of viewing angle. That is, as a display used outdoors, it is more suitable than a liquid crystal display, and use in various forms has been proposed.

  The light-emitting element has a structure in which an organic compound layer is sandwiched between a pair of electrodes. The organic compound layer usually has a stacked structure. A typical example is a “hole transport layer / light emitting layer / electron transport layer” stacked structure proposed by Tang et al. Of Kodak Eastman Company. This structure has very high luminous efficiency, and most of the light emitting devices that are currently under research and development employ this structure.

  In addition, a hole injection layer / a hole transport layer / a light emitting layer / an electron transport layer, or a hole injection layer / a hole transport layer / a light emitting layer / an electron transport layer / an electron injection layer are sequentially laminated on the anode. Good structure. You may dope a fluorescent pigment | dye etc. with respect to a light emitting layer. These layers may all be formed using a low molecular weight material, or may be formed using a high molecular weight material.

  In this specification, all layers provided between the cathode and the anode are collectively referred to as an organic compound layer. Therefore, the above-described hole injection layer, hole transport layer, light emitting layer, electron transport layer, and electron injection layer are all included in the organic compound layer. An element formed of a cathode, an organic compound layer, and an anode is referred to as a light emitting element. In this method, an organic compound layer is formed between two types of stripe-shaped electrodes provided so as to be orthogonal to each other. There are two types: a simple matrix type and a method of forming an organic compound layer between a cathode and an anode connected to a TFT and arranged in a matrix (active matrix type).

  In particular, the active matrix type has been studied extensively because the current flowing in the light-emitting element provided in each pixel can be controlled by the TFT provided in the pixel, and high-definition display is possible. .

  Further, in an active matrix light emitting device so far, an electrode electrically connected to a TFT on a substrate is formed as an anode, an organic compound layer is formed on the anode, and a cathode is formed on the organic compound layer. It has a structure in which a light-emitting element is included and light generated in the organic compound layer is extracted from the anode, which is a transparent electrode, toward the TFT.

  However, in this structure, when the resolution is improved, there is a problem that the aperture ratio is limited by the arrangement of TFTs and wirings in the pixel portion.

  Therefore, in order to solve the above problem, in the present invention, an electrode on the TFT side electrically connected to the TFT on the substrate is formed as a cathode, an organic compound layer is formed on the cathode, and the transparent on the organic compound layer is formed. An active matrix light-emitting device having a light-emitting element having a structure in which an anode as an electrode is formed (hereinafter referred to as a top emission structure) is manufactured.

  However, in the case of manufacturing a light emitting element having a top emission structure, there arises a problem that the film resistance of the anode is increased. When the film resistance of the anode is increased, the in-plane potential distribution of the anode becomes non-uniform due to a voltage drop, resulting in a problem that the luminance of the light emitting element varies. Accordingly, an object of the present invention is to provide a light emitting device having a structure in which the film resistance of an anode in a light emitting element is reduced and a method for manufacturing the light emitting device. Then, it is an object to provide an electric appliance using such a light-emitting device as a display portion.

  The present invention provides a method for manufacturing a light emitting device in which an electrode electrically connected to a TFT formed on a substrate is a cathode, an organic compound layer is formed on the cathode, and an anode is formed on the organic compound layer. A conductive film is formed before forming the film to reduce the film resistance of the anode.

  Therefore, a light-emitting device and a manufacturing method thereof in the present invention will be described with reference to FIGS. In FIG. 1A, a TFT 101 is formed over a substrate 100. Note that the substrate 100 is an insulator, and is a substrate provided with an insulator on the surface, an insulating substrate, or an insulating film. The TFT 101 is a TFT (current control TFT) for controlling the current flowing through the light emitting element.

  In addition, a first insulating film 102 is formed so as to cover the TFT 101. As a material for forming the first insulating film 102, an organic material such as polyimide, polyamide, acrylic, or BCB (benzocyclobutene) is used in addition to an inorganic material containing silicon such as silicon oxide, silicon nitride, or silicon oxynitride. Is possible.

  The cathode 104 formed on the first insulating film 102 and the TFT 101 are electrically connected. Note that although the case where the cathode 104 is formed and the wiring with the TFT 101 is formed at the same time is described here, the cathode and the wiring can be separately formed using different materials.

  In the present invention, since the cathode 104 serves as a cathode, it is desirable to use an aluminum alloy such as Al having a low work function or Al: Li. In the case where the cathode 104 also serves as a wiring, it is desirable to use a metal having a low resistivity.

  Next, a second insulating film 105 is formed over the cathode 104 as illustrated in FIG. Note that as a material for forming the second insulating film 105, an organic material such as polyimide, polyamide, acrylic, or BCB (benzocyclobutene) is used in addition to an inorganic material containing silicon such as silicon oxide, silicon nitride, and silicon oxynitride. The film can be formed using a film formation method such as an evaporation method, a CVD method, a sputtering method, a spin coating method, an ink jet method, or a printing method. Note that the second insulating film 105 is desirably formed to a thickness of 0.1 to 3 μm.

  Further, a conductive film 106 is formed over the second insulating film 105. As the conductive film 106, a conductive material with low resistance such as aluminum, titanium, or tantalum may be used. Note that the conductive film is not necessarily formed over the cathode, and thus is not necessarily light-transmitting and may be light-shielding. The conductive film 106 formed here functions as a conductive film that lowers the film resistance of the anode in the contact portion 110 with the anode of the light emitting element to be formed later.

  Further, in this specification, the film resistance of the whole anode obtained by averaging the film resistance of the contact part and the film resistance of only the anode, that is, the film resistance of the whole part electrically connected to the anode is referred to as the average film of the anode. When referred to as resistance, by providing the conductive film 106 under the anode, the average film resistance at the anode can be lowered. Further, when the conductive film 106 is formed of a light shielding material, it also serves as a light shielding film.

  Note that as a method for forming the conductive film 106, a sputtering method or an evaporation method can be used.

  Next, as shown in FIG. 1C, the second insulating film 105 and the conductive film 106 formed over the cathode 104 are etched to form openings on the cathode. Note that in the present invention, either a dry etching method or a wet etching method can be used, and may be selected as appropriate depending on a material for forming the second insulating film 105 and the conductive film 106.

  Further, an organic compound layer 108 is formed in the opening on the cathode. The organic compound that forms the organic compound layer may be a low molecular weight material or a high molecular weight material, and is formed by using a known material and laminating a single layer or a combination of a plurality of these. can do.

  In the present invention, in order to form a plurality of organic compound layers exhibiting different light emission, a vapor deposition method, an ink jet method, a printing method, or the like that can be applied to each pixel using a metal mask can be used.

Note that before these organic compound layers 108 are formed, an insulating compound containing an alkali metal or an alkaline earth metal (hereinafter referred to as an alkali compound) can be formed on all the cathodes. Examples of the alkali compound include lithium fluoride (LiF), lithium oxide (Li ₂ O), barium fluoride (BaF ₂ ), barium oxide (BaO), calcium fluoride (CaF ₂ ), calcium oxide (CaO), and strontium oxide. (SrO) or cesium oxide (Cs ₂ O) can be used.

  Next, an anode 109 is formed over the organic compound layer 108 as shown in FIG. Note that a transparent conductive film is used for the anode 109, and a compound of indium oxide and tin oxide (called ITO), a compound of indium oxide and zinc oxide, tin oxide, zinc oxide, or the like is used as the transparent conductive film. Is possible.

  Note that the anode 109 is formed as an electrode common to a plurality of light-emitting elements included in the pixel portion, and has a structure in which the anode 109 and the conductive film are in contact with each other at a position where the anode 109 and the organic compound layer 108 do not overlap with each other. That is, at the contact portion 110, the film resistance of the transparent conductive film forming the anode is lowered.

  By implementing the present invention, a light-emitting device having a light-emitting element having a structure in which light generated in the organic compound layer 108 is extracted in the direction of the arrow can be formed, and further, the problem of low film resistance at the anode can be solved. .

  Note that here, a method of forming the upper part of the bank with a conductive film has been described. However, the present invention is not limited to this, and an opening is formed in the second insulating film formed of only an insulating material. Then, after forming the organic compound layer, a conductive film is formed on the second insulating film using a metal mask, and the film resistance of the anode is lowered by contacting with the anode formed thereafter. It is also possible to do.

  By carrying out the present invention, the average film resistance of the anode can be lowered by the conductive film provided so as to be in contact with the anode. Accordingly, the in-plane potential distribution in the anode can be made uniform, and the luminance of the light emitting element can be made uniform, so that a light emitting device with a clearer image display can be obtained. In addition, by using the light-emitting device of the present invention as a display portion, an electric appliance with high visibility can be obtained.

4A and 4B illustrate a light-emitting element of the present invention. 1 is a top block diagram of a light emitting device of the present invention. 4A and 4B each illustrate a pixel portion of a light-emitting device of the present invention. 3A and 3B illustrate a light-emitting device pixel portion of the present invention. 4A and 4B illustrate a manufacturing process of a light-emitting device of the present invention. 4A and 4B illustrate a manufacturing process of a light-emitting device of the present invention. 4A and 4B illustrate a manufacturing process of a light-emitting device of the present invention. 4A and 4B illustrate a manufacturing process of a light-emitting device of the present invention. 4A and 4B illustrate an element substrate of a light-emitting device of the present invention. 4A and 4B illustrate a sealing structure of a light-emitting device of the present invention. FIG. 6 is a top view of a pixel of a light-emitting device of the present invention. 4A and 4B illustrate a manufacturing process of a light-emitting device of the present invention. 4A and 4B illustrate a manufacturing process of a light-emitting device of the present invention. The figure of the electric appliance using the light-emitting device of this invention.

  The structure of the light emitting device of the present invention and the manufacturing method thereof will be described below.

  FIG. 2 shows an example of a block diagram of a light emitting device. 2 includes a pixel portion 201 by TFTs formed on a substrate, a source signal line driver circuit 202 arranged around the pixel portion, a writing gate signal line driver circuit (first gate signal line driver circuit). ) 203 and an erasing gate signal line driving circuit (second gate signal line driving circuit) 204. Note that in this embodiment mode, the light-emitting device has one source signal line driver circuit; however, in the present invention, there may be two source signal line driver circuits.

  In the present invention, the source signal side driver circuit 202, the writing gate signal side driver circuit 203, or the erasing gate signal line driver circuit 204 is provided on the substrate on which the pixel portion 201 is provided. Alternatively, a structure may be employed in which the pixel portion 201 is provided over the IC chip and connected to the pixel portion 201 via the FPC or TAB.

  The source signal line driver circuit 202 basically includes a shift register 202a, a latch (A) 202b, and a latch (B) 202c.

  In the source signal line driver circuit 202, a clock signal (CLK) and a start pulse (SP) are input to the shift register 202a. The shift register 202a sequentially generates timing signals based on the clock signal (CLK) and the start pulse (SP), and sequentially supplies the timing signals to subsequent circuits through a buffer or the like (not shown).

  The timing signal from the shift register 202a is buffered and amplified by a buffer or the like. Since many circuits or elements are connected to the wiring to which the timing signal is supplied, the load capacitance (parasitic capacitance) is large. This buffer is provided in order to prevent “blunting” of the rising edge or falling edge of the timing signal caused by the large load capacity.

  The timing signal buffered and amplified by the buffer is supplied to the latch (A) 202b. The latch (A) 202b has a plurality of stages of latches for processing digital data signals. When the timing signal is input, the latch (A) 202b sequentially captures and holds the digital data signals supplied from the time division gray scale data signal generation circuit 206.

  Note that when a digital data signal is taken into the latch (A) 202b, the digital data signal may be sequentially input to the latches of a plurality of stages included in the latch (A) 202b. However, the present invention is not limited to this configuration.

  The time until the writing of digital data signals to all the latches of the latch (A) 202b is completed is called a line period. That is, the time interval from the time when writing of the digital data signal to the latch of the leftmost stage in the latch (A) 202b is started to the time of completion of writing of the digital data signal to the latch of the rightmost stage. Is the line period. Actually, the line period may include a period in which a horizontal blanking period is added to the line period.

  When one line period ends, a latch signal (Latch Signal) is supplied to the latch (B) 202c. At this moment, the digital data signals written and held in the latch (A) 202b are sent all at once to the latch (B) 202c, and are written and held in the latches of all the stages of the latch (B) 202c.

  The latch (A) 202b that has finished sending the digital data signal to the latch (B) 202c receives the digital data signal supplied from the time-division gradation data signal generation circuit 206 again based on the timing signal from the shift register 202a. Writing is performed sequentially.

  During this second line period, the digital data signal written and held in the latch (B) 202b is input to the source signal line.

  On the other hand, each of the write gate signal line drive circuit 203 and the erase gate signal line drive circuit 204 includes a shift register and a buffer (both not shown). In some cases, the writing gate signal line driving circuit 203 and the erasing gate signal line driving circuit 204 may have a level shift in addition to the shift register and the buffer.

In the writing gate signal line driving circuit 203 and the erasing gate signal line driving circuit 204, a timing signal from a shift register (not shown) is supplied to a buffer (not shown), and the corresponding gate signal line (both scanning lines) is supplied. Supplied).
The gate signal line is connected to the gate electrode of the pixel TFT for one line, and all the pixel TFTs for one line must be turned on at the same time, so that the buffer can flow a large current. Used.

  In the time division gradation data signal generation circuit 206, an analog or digital video signal (a signal including image information) is converted into a digital data signal (Digital Data Signals) for performing time division gradation, and latch (A). 202b. The time-division gradation data signal generation circuit 206 is also a circuit that generates timing pulses and the like necessary for performing time-division gradation display.

  Although not shown here, the pixel portion 201 has a source signal line connected to the latch (B) 202c of the source signal line driver circuit 202 and a current supply connected to a power source outside the light emitting device via the FPC. A write gate signal line (first gate signal line) connected to the write gate signal line drive circuit 203, and an erase gate signal line (second gate) connected to the erase gate signal line drive circuit 204. Signal line) is provided in the pixel portion 201.

  Note that a region including the source signal line, the current supply line, the writing gate signal line, and the erasing gate signal line is the pixel 205. That is, a plurality of pixels 205 are arranged in a matrix in the pixel portion 201.

  In the light emitting device having the above-described configuration, the present invention is a method of forming a conductive film so as to be in contact with the anode when forming the plurality of pixels 205 in the pixel portion 201 and reducing the film resistance of the anode. It is about. Note that a plurality of pixels 205 included in the pixel portion 201 are formed in the region 206 in FIG. Note that a light-emitting element of the present invention and a manufacturing method thereof will be described with reference to FIGS. 3 and 4 which are enlarged views of a region 206. FIG.

  3A is a top view of the region 206, and FIG. 3B is a cross-sectional view of FIG. 3A taken along P-P ′.

  In FIG. 3A, a plurality of pixels are formed, and a cathode 301 serving as a cathode is formed on the top thereof. Reference numeral 302 indicated by a dotted line is a source signal line, which is connected to the source signal line driver circuit. Reference numeral 303 shown by a dotted line is a current supply line, which is connected to a power source outside the light emitting device via the FPC.

Note that since the cathode and the wiring can be formed at the same time in the present invention, the cathode and the wiring are formed using a material such as Al, Ti, W, Al—Si, or an alloy such as Al: Li, and formed on the substrate 300. The current control TFT 304 is electrically connected.
The current control TFT is formed in each pixel, and plays a role of supplying current from the current supply line to the light emitting element. Although not shown here, a switching TFT and an erasing TFT are also formed in each pixel.

  A bank 305 is formed so as to fill a gap between the cathodes 301. Note that the bank 305 has a stacked structure of a layer made of an insulating material and a layer made of a conductive material.

  As a method for manufacturing the bank 305, an insulating material is formed to a thickness of 0.5 to 5 μm on a substrate formed up to the cathode, and then a conductive material such as metal is formed to 10 to 300 nm (preferably 40 to The film thickness is desirably 80 nm.

  Note that as the insulating material, an inorganic material containing silicon such as silicon oxide, silicon nitride, and silicon oxynitride, or an organic material such as acrylic, polyimide, polyamide, or BCB (benzocyclobutene) can be used.

  In addition, as a method for forming an insulating material, in the case of an inorganic material, a sputtering method is desirable in addition to a vapor deposition method and a CVD method, but in the case of an organic material, a spin coating method, an ink jet method, or the like can be used. .

As the conductive material, a material having a low resistivity (also referred to as a specific resistance) is used.
Note that in this specification, the low resistivity material is a material having a sheet resistance value of 0.01 to 1Ω / □. Specifically, materials such as titanium (Ti), aluminum (Al), tantalum (Ta), tungsten (W), chromium (Cr), copper (Cu), or silver (Ag) can be used. Note that the material and film thickness of the conductive film are preferably selected as appropriate so that the film resistance of the conductive film is lower than the film resistance of the anode 309.

  Note that the conductive material is preferably formed by an evaporation method or a sputtering method.

  When the second interlayer insulating film 306 and the conductive film 307 are formed, an opening is formed at a position corresponding to the cathode 301 by etching the second interlayer insulating film 306 and the conductive film 307.

  Note that a dry etching method such as an ICP etching method or an RIE (reactive ion etching) method or a wet etching method can be used for the etching here.

Etching gas includes Ar gas, O ₂ gas, He gas, etc. in addition to fluorine gas and chlorine gas, and a mixture of these gases, and the flow rate ratio is adjusted. Etching is performed.

  The second insulating film 306 and the conductive film 307 left after the etching for forming the opening are referred to as a bank 305 in this specification.

  Next, organic compound layers 308 (308R, 308G, and 308B) are formed over the cathode 301 as illustrated in FIGS. Here, a state is shown in which organic compound layers exhibiting three types of light emission are formed in the vertical direction toward the paper surface. Note that FIG. 4B is a cross-sectional view of FIG. 4A taken along P-P ′.

  These organic compound layers are formed of known organic compounds such as an electron transporting organic compound, a blocking organic compound, a light emitting organic compound, a host material, a hole transporting organic compound, and a hole injecting organic compound. They can be used in any combination.

  In addition, although shown here about the case where the organic compound layer which shows three types of light emission is each formed in the vertical direction toward the paper surface, this invention is not limited to this, The organic compound layer which is different in the vertical direction It is also possible to form

  As a method for forming the organic compound layer 308, an evaporation method, an inkjet method, a printing method, or the like can be used.

  An anode 309 of the light-emitting element is formed over the substrate over which the organic compound layer 308 is formed. A cross-sectional view at this time is shown in FIG.

  As the anode 309, a transparent conductive film is formed with a film thickness of 80 to 120 nm. For example, an indium tin oxide (ITO) film or a transparent conductive film in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide can be used. As a film forming method, a film can be formed by an ion plating method in addition to a vapor deposition method or a sputtering method. However, since the anode is formed after the organic compound layer is formed, the vapor deposition method or the ion plate method is used. It is desirable to use the ting method.

  In this embodiment, a pixel portion and TFTs (n-channel TFT and p-channel TFT) of a driver circuit provided around the pixel portion are formed on the same substrate at the same time, and the TFT is electrically connected to the TFT in the pixel portion. A method for forming an element substrate by forming connected light-emitting elements will be described with reference to FIGS.

  First, in this embodiment, a substrate 600 made of glass such as barium borosilicate glass represented by Corning # 7059 glass or # 1737 glass or aluminoborosilicate glass is used. Note that the substrate 600 is not limited as long as it is a light-transmitting substrate, and a quartz substrate may be used. Further, a plastic substrate having heat resistance that can withstand the processing temperature of this embodiment may be used.

Next, a base film 601 formed of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed over the substrate 600. Although a two-layer structure is used as the base film 601 in this embodiment, a single-layer film of the insulating film or a structure in which two or more layers are stacked may be used. As the first layer of the base film 601, a silicon oxynitride film 601 a formed using SiH ₄ , NH ₃ , and N ₂ O as a reactive gas is formed by using a plasma CVD method to a thickness of 10 to 200 nm (preferably 50 to 100 nm). To do.

In this embodiment, a silicon oxynitride film 601a (composition ratio Si = 32%, O = 27%, N = 24%, H = 17%) having a thickness of 50 nm is formed. Next, as the second layer of the base film 601, a plasma CVD method is used, and a silicon oxynitride film 301b formed using SiH ₄ and N ₂ O as a reaction gas is formed to a thickness of 50 to 200 nm (preferably 100 to 150 nm). Stacked to a thickness. In this embodiment, a silicon oxynitride film 301b (composition ratio Si = 32%, O = 59%, N = 7%, H = 2%) having a thickness of 100 nm is formed.

Next, semiconductor layers 602 to 605 are formed over the base film. The semiconductor layers 602 to 605 are formed by forming a semiconductor film having an amorphous structure by a known means (a sputtering method, an LPCVD method, a plasma CVD method, or the like), and then a known crystallization process (laser crystallization method, A crystalline semiconductor film obtained by performing a crystallization method or a thermal crystallization method using a catalyst such as nickel) is formed by patterning into a desired shape. The semiconductor layers 602 to 605 are formed with a thickness of 25 to 80 nm (preferably 30 to 60 nm). There is no limitation on the material of the crystalline semiconductor film, but it is preferably formed of silicon (silicon) or a silicon germanium (Si _x Ge _1-x (X = 0.0001 to 0.02)) alloy.

  In this embodiment, a plasma CVD method is used to form a 55 nm amorphous silicon film, and then a solution containing nickel is held on the amorphous silicon film. This amorphous silicon film is dehydrogenated (500 ° C., 1 hour), then thermally crystallized (550 ° C., 4 hours), and further laser annealed to improve crystallization. To form a crystalline silicon film. Then, semiconductor layers 602 to 605 are formed by patterning the crystalline silicon film by photolithography.

  Further, a small amount of impurity element (boron or phosphorus) may be doped before or after the semiconductor layers 602 to 605 are formed in order to control the threshold value of the TFT.

When a crystalline semiconductor film is formed by a laser crystallization method, a pulse oscillation type or continuous emission type excimer laser, YAG laser, or YVO ₄ laser can be used. When these lasers are used, it is preferable to use a method in which laser light emitted from a laser oscillator is linearly collected by an optical system and irradiated onto a semiconductor film. Crystallization conditions are appropriately selected by the practitioner. When an excimer laser is used, the pulse oscillation frequency is 300 Hz, and the laser energy density is 100 to 400 mJ / cm 2 (typically 200 to 300 mJ / cm ² ). And When a YAG laser is used, the second harmonic is used and the pulse oscillation frequency is 30 to 300 Hz, and the laser energy density is 300 to 600 mJ / cm ² (typically 350 to 500 mJ / cm ² ). Then, when the laser beam condensed linearly with a width of 100 to 1000 μm, for example, 400 μm is irradiated over the entire surface of the substrate, the superposition ratio (overlap ratio) of the linear laser light at this time is 50 to 90%. Good.

  Next, a gate insulating film 607 covering the semiconductor layers 602 to 605 is formed. The gate insulating film 607 is formed of an insulating film containing silicon with a thickness of 40 to 150 nm by a plasma CVD method or a sputtering method. In this embodiment, a silicon oxynitride film (composition ratio Si = 32%, O = 59%, N = 7%, H = 2%) is formed to a thickness of 110 nm by plasma CVD. Needless to say, the gate insulating film is not limited to the silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.

When a silicon oxide film is used, TEOS (Tetraethyl Orthosilicate) and O ₂ are mixed by a plasma CVD method to a reaction pressure of 40 Pa, a substrate temperature of 300 to 400 ° C., and a high frequency (13.56 MHz) power density of 0. It can be formed by discharging at 5 to 0.8 W / cm ² . The silicon oxide film thus manufactured can obtain good characteristics as a gate insulating film by thermal annealing at 400 to 500 ° C. thereafter.

Next, as illustrated in FIG. 5A, a first conductive film 608 with a thickness of 20 to 100 nm and a second conductive film 609 with a thickness of 100 to 400 nm are stacked over the gate insulating film 607. In this embodiment, a first conductive film 608 made of a TaN film with a thickness of 30 nm and a second conductive film 609 made of a W film with a thickness of 370 nm are stacked.
The TaN film is formed by sputtering, and is sputtered in a nitrogen-containing atmosphere using a Ta target. The W film is formed by sputtering using a W target. In addition, it can be formed by a thermal CVD method using tungsten hexafluoride (WF6).

  In any case, in order to use as a gate electrode, it is necessary to reduce the resistance, and the resistivity of the W film is desirably 20 μΩcm or less. The resistivity of the W film can be reduced by increasing the crystal grains. However, when there are many impurity elements such as oxygen in the W film, the crystallization is hindered and the resistance is increased. Therefore, in this embodiment, a sputtering method using a target of high purity W (purity 99.9999%) is used, and the W film is formed with sufficient consideration so that impurities are not mixed in from the gas phase during film formation. By forming, a resistivity of 9 to 20 μΩcm can be realized.

  In this embodiment, the first conductive film 608 is TaN and the second conductive film 609 is W. However, there is no particular limitation, and all of them are Ta, W, Ti, Mo, Al, Cu, Cr, Nd. You may form with the element selected from these, or the alloy material or compound material which has the said element as a main component. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. Moreover, you may use the alloy which consists of Ag, Pd, and Cu.

  In addition, the first conductive film is formed using a tantalum (Ta) film, the second conductive film is formed using a W film, the first conductive film is formed using a titanium nitride (TiN) film, and the second conductive film is formed. The first conductive film is formed of a tantalum nitride (TaN) film, the second conductive film is formed of an Al film, and the first conductive film is formed of a tantalum nitride (TaN) film. The second conductive film is made of a Cu film, the first conductive film is formed of W, Mo, or a film made of W and Mo, and the second conductive film is made of Al and Si, Al and Ti, and Al. The third conductive film may be formed of Sc, or a film made of Al and Nd, and the third conductive film may be made of Ti, TiN, or a film made of Ti and TiN.

Next, as shown in FIG. 5B, resist masks 610 to 613 are formed by photolithography, and a first etching process for forming electrodes and wirings is performed. The first etching process is performed under the first and second etching conditions. In this embodiment, an ICP (Inductively Coupled Plasma) etching method is used as the first etching condition, CF ₄ , Cl ₂ and O ₂ are used as etching gases, and the respective gas flow ratios are 25. Etching is performed by generating plasma by applying 500 W RF (13.56 MHz) power to the coil-type electrode at a pressure of 1 Pa at a pressure of 1/25/10 (sccm). Here, a dry etching apparatus (Model E645- □ ICP) using ICP manufactured by Matsushita Electric Industrial Co., Ltd. is used. 150 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied.

  The W film is etched under this first etching condition so that the end portion of the first conductive layer is tapered. Under the first etching conditions, the etching rate with respect to W is 200.39 nm / min, the etching rate with respect to TaN is 80.32 nm / min, and the selection ratio of W with respect to TaN is about 2.5. Further, the taper angle of W is about 26 ° under this first etching condition.

After that, as shown in FIG. 5B, the masks 610 to 613 made of resist are not removed but the second etching conditions are changed, and CF ₄ and Cl ₂ are used as etching gases, and the respective gas flow ratios are changed. Is 30/30 (sccm), 500 W of RF (13.56 MHz) power is applied to the coil-type electrode at a pressure of 1 Pa, plasma is generated, and etching is performed for about 30 seconds. 20 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. Under the second etching condition in which CF ₄ and Cl ₂ are mixed, the W film and the TaN film are etched to the same extent.

  The etching rate for W under the second etching conditions is 58.97 nm / min, and the etching rate for TaN is 66.43 nm / min. Note that in order to perform etching without leaving a residue on the gate insulating film, it is preferable to increase the etching time at a rate of about 10 to 20%.

  In the first etching process, the shape of the mask made of resist is made suitable, and the end portions of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. It becomes. The angle of the tapered portion may be 15 to 45 °. Thus, the first shape conductive layers 615 to 618 (the first conductive layers 615 a to 618 a and the second conductive layers 615 b to 618 b) composed of the first conductive layer and the second conductive layer by the first etching treatment. Form. Reference numeral 620 denotes a gate insulating film, and a region not covered with the first shape conductive layers 615 to 618 is etched and thinned by about 20 to 50 nm.

Then, a first doping process is performed without removing the resist mask, and an impurity element imparting n-type conductivity is added to the semiconductor layer. (FIG. 5B) The doping process may be performed by an ion doping method or an ion implantation method. The conditions of the ion doping method are a dose amount of 1 × 10 ^{13 to} 5 × 10 ¹⁵ atoms / cm ² and an acceleration voltage of 60 to 100 keV. In this embodiment, the dose is set to 1.5 × 10 ¹⁵ atoms / cm ² and the acceleration voltage is set to 80 keV.

An element belonging to Group 15 as an impurity element imparting n-type, typically phosphorus (P)
Alternatively, arsenic (As) is used, but here phosphorus (P) is used. In this case, the conductive layers 615 to 618 serve as a mask for the impurity element imparting n-type, and the high concentration impurity regions 621 to 624 are formed in a self-aligning manner. An impurity element imparting n-type conductivity is added to the high-concentration impurity regions 621 to 624 in a concentration range of 1 × 10 ²⁰ to 1 × 10 ²¹ atoms / cm ³ .

Next, as shown in FIG. 5C, a second etching process is performed without removing the resist mask. The second etching process is performed under the third and fourth etching conditions. Here, as the third etching condition, CF ₄ and Cl ₂ are used as the etching gas, the respective gas flow ratios are set to 30/30 (sccm), and 500 W of RF ( 13.56 MHz) Apply power to generate plasma and perform etching for about 60 seconds. 20 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. Under the third etching condition in which CF ₄ and Cl ₂ are mixed, the W film and the TaN film are etched to the same extent.

  The etching rate for W under the third etching condition is 58.97 nm / min, and the etching rate for TaN is 66.43 nm / min. Note that in order to perform etching without leaving a residue on the gate insulating film, it is preferable to increase the etching time at a rate of about 10 to 20%.

Thereafter, as shown in FIG. 5C, the resist masks 610 to 613 are not removed and the fourth etching condition is changed, and CF ₄ , Cl ₂ and O ₂ are used as etching gases. The gas flow ratio is 20/20/20 (sccm), 500 W of RF (13.56 MHz) power is applied to the coil-type electrode at a pressure of 1 Pa, plasma is generated, and etching is performed for about 20 seconds. 20 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied.

  The etching rate for TaN in the fourth etching process is 14.83 nm / min. Therefore, the W film is selectively etched. By this fourth etching process, second conductive layers 626 to 629 (first conductive layers 626a to 629a and second conductive layers 626b to 629b) are formed.

Next, a second doping process is performed as shown in FIG. Doping is performed using the second conductive layers 626b to 629b as a mask for the impurity element so that the impurity element is added to the semiconductor layer below the tapered portion of the first conductive layer. In this embodiment, P (phosphorus) is used as an impurity element, and plasma doping is performed at a dose of 1.5 × 10 ¹⁴ , a current density of 0.5 μA, and an acceleration voltage of 90 keV.

In this manner, low concentration impurity regions 631a to 634a that overlap with the first conductive layer and low concentration impurity regions 631b to 634b that do not overlap with the first conductive layer are formed in a self-aligned manner. Note that the concentration of phosphorus (P) added to the low-concentration impurity regions 631 to 634 is 1 × 10 ^{17 to} 5 × 10 ¹⁸ atoms / cm ³ . Further, an impurity element is also added to the high concentration impurity regions 621 to 624 to form high concentration impurity regions 635 to 638.

  Next, as shown in FIG. 6B, a mask made of resist (639, 640) is formed, and a third doping process is performed. By this third doping treatment, an impurity region 641 in which an impurity element imparting a conductivity type (p-type) opposite to the one conductivity type (n-type) is added to the semiconductor layer that becomes the active layer of the p-channel TFT. , 642. The first conductive layer 627a and the second conductive layer 627b are used as masks for the impurity element, and an impurity element imparting p-type conductivity is added to form an impurity region in a self-aligning manner.

In this embodiment, the impurity regions 641 and 642 are formed by an ion doping method using diborane (B ₂ H ₆ ). By the first doping process and the second doping process, phosphorus is added to the impurity regions 641 and 642 at different concentrations, respectively, and the concentration of the impurity element imparting p-type in each of the regions is 2 ×. By performing the doping treatment so as to be 10 ^{20 to} 2 × 10 ²¹ atoms / cm ³ , no problem arises because it functions as the source region and drain region of the p-channel TFT.

  Next, the resist masks 639 and 640 are removed, and a first interlayer insulating film 643 is formed as shown in FIG. 6C. In this embodiment, a stacked film of a first insulating film 643 a containing silicon and a second insulating film 643 b made of an organic insulating material is formed as the first interlayer insulating film 643.

  First, the first insulating film 643a containing silicon is formed using an insulating film containing silicon with a thickness of 100 to 200 nm by using a plasma CVD method or a sputtering method. In this embodiment, a stacked film of a silicon oxynitride film having a thickness of 50 nm and a silicon nitride film having a thickness of 100 nm is formed by a plasma CVD method. Needless to say, the first insulating film 643a is not limited to the above-described stacked film, and another insulating film containing silicon may be used as a single layer or a stacked structure.

  Next, a step of activating the impurity element added to each semiconductor layer is performed. This activation process is performed by a thermal annealing method using a furnace annealing furnace. As the thermal annealing method, it may be performed at 400 to 700 ° C., typically 500 to 550 ° C. in a nitrogen atmosphere having an oxygen concentration of 1 ppm or less, preferably 0.1 ppm or less. The activation treatment was performed by heat treatment. In addition to the thermal annealing method, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied.

  In this embodiment, simultaneously with the activation treatment, nickel used as a catalyst during crystallization is gettered to impurity regions (635, 637, 638) containing high-concentration phosphorus, and mainly channel forming regions. The nickel concentration in the semiconductor layer is reduced. A TFT having a channel formation region manufactured in this manner has a low off-current value and good crystallinity, so that high field-effect mobility can be obtained and good characteristics can be achieved.

  Further, the activation treatment may be performed before the first insulating film is formed. However, when the wiring material used is weak against heat, it is activated after an interlayer insulating film (insulating film containing silicon as a main component, for example, a silicon nitride film) is formed to protect the wiring and the like as in this embodiment. It is preferable to perform the conversion treatment.

  In addition, the first insulating film may be formed by performing a doping process after the activation process.

  Furthermore, a heat treatment is performed at 300 to 550 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen to perform a step of hydrogenating the semiconductor layer. In this embodiment, heat treatment was performed at 410 ° C. for 1 hour in a nitrogen atmosphere containing about 3% hydrogen. This step is a step of terminating dangling bonds in the semiconductor layer with hydrogen contained in the interlayer insulating film. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.

  In the case where a laser annealing method is used as the activation treatment, it is desirable to irradiate a laser beam such as an excimer laser or a YAG laser after performing the hydrogenation.

  Next, a second insulating film 643b made of an organic insulating material is formed over the first insulating film 643a. In this embodiment, an acrylic resin film having a thickness of 1.0 μm is formed.

  As the second insulating film 643b, an organic resin such as polyimide, polyamide, or BCB (benzocyclobutene) can be used as the organic insulating material.

  As described above, the first interlayer insulating film including the first insulating film and the second insulating film can be formed.

  Next, patterning is performed to form contact holes that reach the impurity regions 635, 636, 637, and 638.

  In this embodiment, an insulating film containing silicon is formed as a first insulating film by a plasma CVD method, and an insulating film made of acrylic is formed as a second insulating film. Although dry etching or wet etching can be used, in this embodiment, dry etching using an RIE apparatus is performed.

First, the second insulating film is etched. At this time, CF ₄ , O ₂ and He are used for the etching gas, and the respective gas flow ratios are 5/95/40 (sccm).
And RF power of 500 W is applied to the electrode at a pressure of 66.5 Pa.

  Next, the first insulating film is etched. At this time, the same etching gas as that for the first insulating film is used, the flow rate ratio of each gas is changed to 60/40/35 (sccm), and the RF power of 400 W is applied to the electrode at a pressure of 66.5 Pa. Etching is performed by throwing.

  Then, wirings 640 to 646 and a cathode 649 that are electrically connected to the high-concentration impurity regions 635, 636, 637, and 638 are formed. In this embodiment, Al is used to form a film having a film thickness of 500 nm and then patterned to form a conductive material such as Ti or Al: Si, an alloy such as Al: Li, or a laminated film thereof. It may be used as a film.

  In this embodiment, since the cathode 649 is formed as a cathode, it is formed also as a wiring with the high concentration impurity region 638. However, the present invention is not limited to this, and the wiring and the cathode may be formed separately from different materials.

  Next, as shown in FIG. 7B, a second interlayer insulating film 650 is formed to a thickness of 1 μm, and a conductive film 651 made of a conductive material is formed to 10 to 10 nm (preferably 10 to 50 nm). ) To a thickness of

  In this embodiment, a film made of silicon oxide is used as the second interlayer insulating film. However, in some cases, in addition to an insulating film containing silicon such as silicon nitride and silicon oxynitride, polyimide, polyamide, acrylic An organic resin film such as BCB (benzocyclobutene) can also be used.

  As a material for forming the conductive film 651, a metal material with low resistivity (also referred to as specific resistance) is preferably used. Note that in this specification, the low resistivity material is a material having a sheet resistance value of 0.01 to 1Ω / □. Specifically, titanium (Ti), aluminum (Al), tantalum (Ta), tungsten (W), chromium (Cr), copper (Cu), silver (Ag), or the like can be used. Or it is desirable to form by sputtering method.

  When the second interlayer insulating film 650 and the conductive film 651 are formed, an opening is formed at a position corresponding to the cathode 649 by performing a third etching process, so that the second interlayer insulating film 652a and the conductive film are formed. A bank 652 made of 652b is formed (FIG. 8A).

  First, a resist mask is formed by photolithography, and a third etching process for forming a bank is performed. The third etching process is also performed using the ICP etching method under the fifth and sixth etching conditions.

In this embodiment, as the fifth etching condition, Cl ₂ and BCl ₃ are used as the etching gas, the respective gas flow ratios are set to 40/40 (sccm), and 450 W is applied to the coil-type electrode at a pressure of 1.2 Pa. RF (13.56MHz) power is applied to generate plasma, etching is performed, 100W RF (13.56MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. To do.

  A part of the Al film which is a conductive film can be etched under the fifth etching condition.

Thereafter, the etching conditions are changed to the sixth etching condition, CHF ₃ and Ar are used as etching gases, the respective gas flow ratios are set to 30/30 (sccm), and a 500 W RF ( 13.56MHz) Apply power to generate plasma and perform etching for about 30 seconds. 20 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. Thereby, a part of the second interlayer insulating film is etched.

  Thus, a bank 652 including the second interlayer insulating film 652a and the conductive film 652b is formed as illustrated in FIG.

  Next, as shown in FIG. 8B, an organic compound layer 654 is formed over the cathode 649 by an evaporation method. Here, in this embodiment, one of the organic compound layers formed by the organic compounds exhibiting three types of light emission of red, green, and blue is shown, but three types of organic compound layers are formed. The combination of organic compounds to be described will be described in detail below.

  First, an organic compound layer that emits red light is formed. The red light emitting organic compound layer in this example is composed of an electron transporting organic compound, a blocking organic compound, a light emitting organic compound, a host material, a hole transporting organic compound, and a hole injecting organic compound. It is formed.

Specifically, tris (8-quinolinolato) aluminum (hereinafter referred to as Alq ₃ ), which is an electron-transporting organic compound, is formed to a film thickness of 25 nm, and bathocuproine (hereinafter referred to as a blocking organic compound). , BCP) is formed to a thickness of 8 nm, and 2,3,7,8,12,13,17,18-octaethyl-21H, 23H-porphyrin-platinum (hereinafter referred to as luminescent organic compounds). And PtOEP) are co-deposited together with 4,4′-dicarbazole-biphenyl (hereinafter referred to as CBP) which is an organic compound (hereinafter referred to as host material) as a host to form a film with a thickness of 25 to 40 nm. 40 nm of 4,4′-bis [N- (1-naphthyl) -N-phenyl-amino] -biphenyl (hereinafter referred to as α-NPD) which is a hole transporting organic compound Deposited in a hole injecting organic compound, copper phthalocyanine (hereinafter, referred to as Cu-Pc) can form the organic compound layer emitting red light by depositing a film thickness of 15 nm.

  Here, the case where the organic compound layer of red light emission is formed using six kinds of organic compounds having different functions has been described, but the present invention is not limited to this, and is known as an organic compound exhibiting red light emission. These materials can be used.

  Next, an organic compound layer that emits green light is formed. The green light emitting organic compound layer in this example is composed of an electron transporting organic compound, a blocking organic compound, a light emitting organic compound, a host material, a hole transporting organic compound, and a hole injecting organic compound. It is formed.

Specifically, Alq ₃ which is an electron transporting organic compound is formed to a thickness of 40 nm, BCP which is a blocking organic compound is formed to a thickness of 10 nm, and a hole transporting property is formed. Using CBP as the host material, the film is deposited with a film thickness of 5 to 40 nm by co-evaporation with tris (2-phenylpyridine) iridium (Ir (ppy) ₃ ), which is a light-emitting organic compound, and has a hole transporting property. The organic compound, α-NPD, is formed to a thickness of 10 nm, the hole transporting organic compound, MTDATA, is formed to a thickness of 20 nm, and is a hole injecting organic compound. An organic compound emitting green light can be formed by depositing Cu-Pc with a thickness of 10 nm.

  Here, the case where the organic compound layer that emits green light is formed using seven kinds of organic compounds having different functions has been described, but the present invention is not limited to this, and is known as an organic compound that emits green light. These materials can be used.

  Next, an organic compound layer that emits blue light is formed. The blue light emitting organic compound layer in this embodiment is formed of an electron transporting organic compound, a blocking organic compound, a light emitting organic compound, and a hole injecting organic compound.

Specifically, Alq ₃ which is an electron transporting organic compound is formed with a film thickness of 40 nm, BCP which is a blocking organic compound is formed with a film thickness of 10 nm, and a light emitting organic compound is formed. Forming a blue light-emitting organic compound layer by forming α-NPD with a film thickness of 40 nm and forming a hole-injecting organic compound Cu-Pc with a thickness of 20 nm. Can do.

  Here, the case where the organic compound layer for blue light emission is formed using four types of organic compounds having different functions has been described, but the present invention is not limited to this, and is known as an organic compound exhibiting blue light emission. These materials can be used.

  By forming the organic compound described above on the cathode, an organic compound layer that exhibits red light emission, green light emission, and blue light emission can be formed in the pixel portion.

  Next, an anode 655 made of a transparent conductive film is formed so as to cover the organic compound layer 654 and the bank 652. In this embodiment, an indium tin oxide (ITO) film as a transparent electrode or a transparent conductive film in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide is formed to a thickness of 80 to 120 nm. Use. Note that in this embodiment, other known materials can be used as long as the anode 655 of the light-emitting element is a transparent conductive film.

  Note that the ITO film can be formed by vapor deposition. In this embodiment, the case of forming using an ion plating method will be described.

  The ion plating method is one of vapor phase surface treatment techniques classified as a vapor deposition method. A vapor deposition material evaporated by some method is ionized or excited by high-frequency plasma or vacuum discharge, and a negative potential is applied to a substrate to be vapor deposited. Is applied to accelerate the ions to adhere to the substrate.

  As specific conditions for forming the anode using the ion plating method, it is desirable to perform deposition while maintaining the substrate temperature at 100 to 300 ° C. in an inert gas atmosphere of 0.01 to 1 Pa. It is desirable to use ITO as an evaporation source having a sintered density of 70% or more. Note that the practitioner can appropriately select the optimum conditions for using the ion plating method.

  In addition, ionization or excitation of the deposition material using high-frequency plasma can increase the rate of ionization or excitation of the deposition material, and the ionized or excited deposition material is in a high energy state, so that it is fast. Bonding with oxygen can be sufficiently performed while maintaining the evaporation rate. For this reason, it is possible to form a high-quality film at a high speed.

  Note that the method for forming the anode 655 of this embodiment is not limited to the ion plating method described above. However, the film formed using the ion plating method has high adhesion, and an ITO film having high crystallinity can be formed even at a relatively low temperature, so that the resistance of ITO can be lowered. Furthermore, uniform film formation over a relatively large area is possible, which can be said to be suitable for increasing the size of the substrate.

  Thus, as shown in FIG. 8B, the cathode 649 electrically connected to the current control TFT 704, the bank 652 formed in the gap between the cathodes, and the organic compound formed on the bank 652 and the cathode 649 An element substrate of a light-emitting device including the layer 654, the organic compound layer 654, and an anode formed over the bank 652 can be formed. Note that in the manufacturing process of the light-emitting device in this embodiment, the source signal line is formed using the material forming the gate electrode and the source and drain electrodes are formed because of the circuit configuration and the process. Although the gate signal line is formed using the wiring material, it is possible to use different materials.

  In addition, a driver circuit 705 including an n-channel TFT 701 and a p-channel TFT 702, a pixel portion 706 including a switching TFT 703 and a current control TFT 704 can be formed over the same substrate.

  The n-channel TFT 701 in the driver circuit 705 has a channel formation region 501, a low concentration impurity region 631 (GOLD region) overlapping with the first conductive layer 626a which forms part of the gate electrode, and a high concentration functioning as a source region or a drain region. An impurity region 635 is provided. The p-channel TFT 702 includes a channel formation region 502 and impurity regions 641 and 642 functioning as a source region or a drain region.

  The switching TFT 703 of the pixel portion 706 includes a channel formation region 503, a low concentration impurity region 633a (LDD region) overlapping with the first conductive layer 628a forming the gate electrode, and a low concentration impurity region not overlapping with the first conductive layer 628a. 633b (LDD region) and a high concentration impurity region 637 which functions as a source region or a drain region.

  The current control TFT 704 of the pixel portion 706 includes a channel formation region 504, a low concentration impurity region 634a (LDD region) overlapping with the first conductive layer 629a forming the gate electrode, and a low concentration impurity not overlapping with the first conductive layer 628a. A region 634b (LDD region) and a high concentration impurity region 638 functioning as a source region or a drain region are provided.

  In this embodiment, although the erasing TFT is not shown, it is formed in the same manner as the current control TFT and has the same structure.

  In this embodiment, the driving voltage of the TFT is 1.2 to 10V, preferably 2.5 to 5.5V.

  Further, when the display of the pixel portion is in operation (in the case of moving image display), the background is displayed by the pixel emitting light, and the character display is performed by the pixel where the light emitting element does not emit light. It is good, but when the moving image display of the pixel portion is stationary for a certain period or longer (referred to as standby in this specification), the display method is switched (inverted) to save power. It is good to keep. Specifically, a character is displayed by a pixel from which the light emitting element emits light (also referred to as character display), and a background is displayed by a pixel from which the light emitting element does not emit light (also referred to as background display).

  FIG. 9 shows a top view of the element substrate in which the light emitting elements are formed on the substrate (element substrate) as described above.

  A state in which a pixel portion 706, a gate signal line driver circuit 901, a source signal line driver circuit 902, and a terminal 903 are formed over the substrate 600 is shown. The terminal 903 is connected to each drive circuit, the current supply line formed in the pixel portion, and the anode by a lead wiring 904.

  Further, an IC chip on which a CPU, a memory, and the like are formed may be mounted on the element substrate by a COG (Chip on Glass) method or the like as necessary.

  Note that the light-emitting element 656 is formed between the bank 652 including the second interlayer insulating film 650 and the conductive film 651. First, a cathode 649 is formed, and an organic compound layer 654 is formed thereon. An anode 655 is formed on the entire pixel portion so as to cover the plurality of organic compound layers 654 and the bank 652. At this time, the anode 655 is formed in contact with the conductive film 653.

  The lead wiring 904 is formed in the same layer as the gate signal line (not shown) and is not in direct contact with the conductive film 653. The lead wiring 904 and the anode 655 are in contact with each other at a portion where the anode 655 is formed on the lead wiring 904.

  Next, a method for completing the element substrate shown in FIG. 9 as a light-emitting device will be described with reference to FIG.

  10A is a top view illustrating the light-emitting device, and FIG. 10B is a cross-sectional view taken along line A-A ′ in FIG. 10A. Reference numeral 1001 indicated by a dotted line denotes a source signal line driver circuit, reference numeral 1002 denotes a pixel portion, and reference numeral 1003 denotes a gate signal line driver circuit. Further, 1004 is a cover material, 1005 is a sealing agent, and the inside surrounded by the sealing agent 1005 is a space.

  Reference numeral 1008 denotes a wiring for transmitting signals input to the source signal line driver circuit 1001 and the gate signal line driver circuit 1003. A video signal and a clock signal are received from an FPC (flexible printed circuit) 1009 serving as an external input terminal. receive. Although only the FPC is shown here, a printed wiring board (PWB) may be attached to the FPC. The light-emitting device in this specification includes not only a light-emitting device body but also a state in which an FPC or a PWB is attached thereto.

  Next, a cross-sectional structure is described with reference to FIG. Over the substrate 1010, a pixel portion 1002 and a source signal line driver circuit 1001 are formed. The pixel portion 1002 is formed by a plurality of pixels including a current control TFT 1011 and a cathode 1012 electrically connected to a drain thereof. The The source signal line driver circuit 1001 is formed using a CMOS circuit (see FIG. 8) in which an n-channel TFT 1013 and a p-channel TFT 1014 are combined.

  The cathode 1012 functions as a cathode of the light emitting element. Banks 1015 are formed on both ends of the cathode 1012, and an organic compound layer 1016 is formed on the cathode 1012. Note that in the present invention, the bank 1015 is formed by stacking an insulating film 1015a and a conductive film 1015b. Further, an anode 1017 of a light emitting element is formed on the bank 1015 and the organic compound layer 1016.

  The anode 1017 also functions as a wiring common to all pixels, and is electrically connected to the FPC 1009 through the wiring 1008.

  In addition, a cover material 1004 is bonded with a sealant 1005. Note that a spacer made of a resin film may be provided in order to ensure a space between the cover material 1004 and the light emitting element. A space 1007 inside the sealant 1005 is filled with an inert gas such as nitrogen. Note that an epoxy resin is preferably used as the sealant 1005. Further, the sealant 1005 is desirably a material that does not transmit moisture and oxygen as much as possible. Further, a substance having a hygroscopic effect or a substance having an effect of preventing oxidation may be contained in the space 1007.

  Further, in this embodiment, a plastic substrate made of FRP (Fiberglass-Reinforced Plastics), PVF (Polyvinyl Fluoride), Mylar, polyester, acrylic, or the like is used as a material constituting the cover material 1004 in addition to a glass substrate or a quartz substrate. Can do.

  In addition, after the cover material 1004 is bonded using the sealant 1005, the cover material 1004 can be further sealed with a sealant so as to cover the side surface (exposed surface).

  By encapsulating the light emitting element in the space 1007 as described above, the light emitting element can be completely blocked from the outside, and a substance that promotes deterioration of the organic compound layer such as moisture and oxygen can be prevented from entering from the outside. Can do. Therefore, a highly reliable light-emitting device can be obtained.

  The configuration of the present embodiment can be implemented by freely combining with any configuration of the first embodiment.

  Here, FIG. 11A shows a detailed top structure of the pixel, and FIG. 11B shows a circuit diagram. In FIG. 11, the switching TFT 1100 provided on the substrate is formed using the switching (n-channel) TFT 701 in FIG. Therefore, for the description of the structure, the description of the switching (n-channel type) TFT 701 may be referred to. A wiring denoted by 1102 is a gate wiring that electrically connects the gate electrodes 1101 (1101a and 1101b) of the switching TFT 1100.

  Note that although a double gate structure in which two channel formation regions are formed is used in this embodiment, a single gate structure in which one channel formation region is formed or a triple gate structure in which three channel formation regions are formed may be used.

  The source of the switching TFT 1100 is connected to the source wiring 1103, and the drain is connected to the drain wiring 1104. The drain wiring 1104 is electrically connected to the gate electrode 1106 of the current control TFT 1105. Note that the current control TFT 1105 is formed using the current control (n-channel) TFT 704 in FIG. Therefore, the description of the structure may be referred to the description of the current control (n-channel type) TFT 704. In this embodiment, a single gate structure is used, but a double gate structure or a triple gate structure may be used.

  The source of the current control TFT 1105 is electrically connected to the current supply line 1107, and the drain is electrically connected to the drain wiring 1108. Further, the drain wiring 1108 is electrically connected to a cathode 1109 indicated by a dotted line.

  A wiring denoted by 1110 is a gate wiring that is electrically connected to the gate electrode 1112 of the erasing TFT 1111. Note that the source of the erasing TFT 1111 is electrically connected to the current supply line 1107, and the drain is electrically connected to the drain wiring 1104.

Note that the erasing TFT 1111 is formed in the same manner as the current controlling (n-channel) TFT 704 in FIG. Therefore, the description of the structure is for current control (n-channel type)
The description of the TFT 704 may be referred to. In this embodiment, a single gate structure is used, but a double gate structure or a triple gate structure may be used.

  In addition, a storage capacitor (capacitor) is formed in a region indicated by 1113. The capacitor 1113 is formed between the semiconductor film 1114 electrically connected to the current supply line 1107, the insulating film (not shown) in the same layer as the gate insulating film, and the gate electrode 1106. A capacitor formed by the gate electrode 1106, the same layer (not shown) as the first interlayer insulating film, and the current supply line 1107 can also be used as the storage capacitor.

  Note that a light-emitting element 1115 shown in the circuit diagram of FIG. 11B includes a cathode 1109, an organic compound layer (not shown) formed over the cathode 1109, and an anode (not shown) formed over the organic compound layer. ). In the present invention, the cathode 1109 is connected to the source region or drain region of the current control TFT 1105.

A counter potential is applied to the anode of the light emitting element 1115. The current supply line V is supplied with a power supply potential. The potential difference between the counter potential and the power supply potential is always kept at such a potential difference that the light emitting element emits light when the power supply potential is applied to the cathode.
The power source potential and the counter potential are supplied to the light emitting device of the present invention by a power source provided by an external IC or the like. Note that a power source for applying a counter potential is particularly referred to as a counter power source 1116 in this specification.

  It should be noted that the configuration of this embodiment can be implemented in combination with any of the configurations of Embodiment 1 and Embodiment 2.

  In this example, a method for manufacturing a light-emitting element having a structure different from that described in Example 1 will be described with reference to FIGS. Note that the steps up to the manufacture of the cathode 649 in FIG.

  As shown in FIG. 12A, a second interlayer insulating film 1201 made of acrylic is formed on the cathode 649 to a thickness of 1 μm.

  In this embodiment, acrylic is used as the second interlayer insulating film 1201, but depending on the case, in addition to organic resins such as polyimide, polyamide, and BCB (benzocyclobutene), silicon oxide, silicon nitride, and oxide are used. An inorganic material containing silicon such as silicon nitride can also be used.

  When the second interlayer insulating film 1201 is formed, an opening is formed at a position corresponding to the cathode 649 by etching.

  In this case, a dry etching method such as an ICP etching method or an RIE (reactive ion etching) method or a wet etching method can be used for the etching here, but in this embodiment, dry etching using an RIE apparatus is performed. Do.

CF ₄ , O _2, and He are used as the etching gas, the gas flow ratio is set to 5/95/40 (sccm), and 500 W of RF power is supplied to the electrode at a pressure of 66.5 Pa. As a result, the second interlayer insulating film formed on the cathode can be etched, and the bank 1203 can be formed.

  Next, an organic compound layer 1202 is formed in the opening of the second interlayer insulating film using a vapor deposition method. Note that in this embodiment, an organic compound layer formed of organic compounds exhibiting three types of light emission of red, green, and blue is formed, so that a film is formed for each different organic compound layer using a metal mask. Note that FIG. 12B shows a state where one of the three types of organic compound layers is formed, but three types of organic compound layers are formed. Note that the organic compound described in Embodiment 1 can be used for the organic compound layer formed in this embodiment.

  Next, as illustrated in FIG. 13A, a conductive film 1204 is formed so as to cover the second interlayer insulating film of the pixel portion and part of the organic compound layer.

  As a metal material for forming the conductive film 1204, a metal material with low resistivity (also referred to as specific resistance) is preferably used. Note that in this specification, the low resistivity material is a material having a sheet resistance value of 0.01 to 1Ω / □. Specifically, titanium (Ti), aluminum (Al), tantalum (Ta), tungsten (W), chromium (Cr), copper (Cu), silver (Ag), or the like can be used.

  The conductive film 1204 is preferably formed by an evaporation method or a sputtering method using a metal mask so that the conductive film 1204 is not formed in a portion where the cathode 649 and the organic compound layer are stacked. Note that the film thickness may be 30 to 100 nm (preferably 40 to 80 nm).

  Further, when the conductive film 1204 is formed, an anode 1205 is formed by an evaporation method. As other anode forming methods, an ion plating method or a sputtering method can be used. As the anode 1205, a transparent conductive film is formed with a thickness of 80 to 120 nm.

  In this embodiment, as the anode 1205, an indium tin oxide (ITO) film or a transparent conductive film in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide is used. Note that in this embodiment, other known materials can be used as long as the anode 1205 of the light-emitting element is a transparent conductive film.

  As described above, the light-emitting device of the present invention can be formed. Note that the light-emitting device of this example can have the sealing structure according to Example 2, and can be implemented with the circuit configuration shown in Example 3.

  Since a light-emitting device using a light-emitting element is a self-luminous type, it is superior in visibility in a bright place and has a wide viewing angle as compared with a liquid crystal display device. Therefore, it can be used for display portions of various electric appliances.

  As an electric appliance using a light emitting device manufactured according to the present invention, a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, a sound reproduction device (car audio, audio component, etc.), a notebook personal computer, a game A device, a portable information terminal (mobile computer, mobile phone, portable game machine, electronic book, etc.), an image playback device equipped with a recording medium (specifically, a recording medium such as a digital video disc (DVD) And a device provided with a display device capable of displaying an image). In particular, a portable information terminal that frequently sees a screen from an oblique direction emphasizes the wide viewing angle, and thus a light emitting device having a light emitting element is preferably used. Specific examples of these electric appliances are shown in FIG.

  FIG. 14A illustrates a display device, which includes a housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like. The light-emitting device manufactured according to the present invention can be used for the display portion 2003. Since a light-emitting device having a light-emitting element is a self-luminous type, a backlight is not necessary and a display portion thinner than a liquid crystal display device can be obtained. The display devices include all information display devices for personal computers, for receiving TV broadcasts, for displaying advertisements, and the like.

  FIG. 14B shows a digital still camera, which includes a main body 2101, a display portion 2102, an image receiving portion 2103, operation keys 2104, an external connection port 2105, a shutter 2106, and the like. The light-emitting device manufactured according to the present invention can be used for the display portion 2102.

  FIG. 14C illustrates a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. The light-emitting device manufactured according to the present invention can be used for the display portion 2203.

  FIG. 14D illustrates a mobile computer, which includes a main body 2301, a display portion 2302, a switch 2303, operation keys 2304, an infrared port 2305, and the like. The light-emitting device manufactured according to the present invention can be used for the display portion 2302.

  FIG. 14E shows a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, and a recording medium (DVD or the like). A reading unit 2405, operation keys 2406, a speaker unit 2407, and the like are included. Although the display portion A 2403 mainly displays image information and the display portion B 2404 mainly displays character information, the light-emitting device manufactured according to the present invention can be used for the display portions A, B 2403, and 2404. Note that an image reproducing device provided with a recording medium includes a home game machine and the like.

  FIG. 14F illustrates a goggle type display (head mounted display), which includes a main body 2501, a display portion 2502, and an arm portion 2503. The light emitting device manufactured according to the present invention can be used for the display portion 2502.

  FIG. 14G) shows a video camera, which includes a main body 2601, a display portion 2602, a housing 2603, an external connection port 2604, a remote control receiving portion 2605, an image receiving portion 2606, a battery 2607, an audio input portion 2608, operation keys 2609, and the like. The light-emitting device manufactured according to the present invention can be used for the display portion 2602.

  Here, FIG. 14H shows a cellular phone, which includes a main body 2701, a housing 2702, a display portion 2703, an audio input portion 2704, an audio output portion 2705, operation keys 2706, an external connection port 2707, an antenna 2708, and the like. The light-emitting device manufactured according to the present invention can be used for the display portion 2703. Note that the display portion 2703 can reduce power consumption of the mobile phone by displaying white characters on a black background.

  If the emission luminance of the organic material is increased in the future, the light including the output image information can be enlarged and projected by a lens or the like and used for a front type or rear type projector.

  In addition, the electric appliances often display information distributed through electronic communication lines such as the Internet or CATV (cable television), and in particular, opportunities to display moving image information are increasing. Since the response speed of the organic material is very high, the light emitting device is preferable for displaying moving images.

  In addition, since the light emitting portion of the light emitting device consumes power, it is preferable to display information so that the light emitting portion is minimized. Therefore, when a light emitting device is used for a display unit mainly including character information, such as a portable information terminal, particularly a mobile phone or a sound reproduction device, it is driven so that character information is formed by the light emitting part with the non-light emitting part as the background It is preferable to do.

  As described above, the applicable range of the light-emitting device manufactured according to the present invention is so wide that the light-emitting device can be used for electric appliances in various fields. In addition, the electric appliance of this embodiment can use the light emitting device manufactured in Embodiments 1 to 4 for the display portion.

Claims (8)

A TFT formed on an insulating surface;
A reflective electrode having reflectivity electrically connected to the TFT;
A bank that covers an end of the reflective electrode and has an opening on the reflective electrode;
A light emitting device having the reflective electrode,
In the region where the bank is provided, an insulating film and a conductive film are stacked and arranged,
The light-emitting device, wherein the conductive film has a light shielding property and is provided without overlapping with the reflective electrode. A TFT formed on an insulating surface;
A reflective electrode having reflectivity electrically connected to the TFT;
A bank that covers an end of the reflective electrode and has an opening on the reflective electrode;
A light emitting device having the reflective electrode,
In the region where the bank is provided, an insulating film and a conductive film are stacked and arranged,
The conductive film has a light shielding property and is provided without overlapping the reflective electrode,
The organic compound layer is provided up to a region which is in contact with a taper provided in the bank and overlaps the conductive film. In claim 1 or claim 2,
The light emitting device, wherein the insulating film covers a wiring electrically connected to the TFT. In any one of Claim 1 thru | or 3,
The light-emitting device, wherein the insulating film includes an inorganic material. In claim 4,
The light-emitting device, wherein the inorganic material includes any one of silicon oxide, silicon nitride, and silicon oxynitride. In any one of Claim 1 thru | or 3,
The light-emitting device, wherein the insulating film includes an organic material. In claim 6,
The organic material includes one of acrylic, polyimide, polyamide, and benzocyclobutene. In any one of Claims 1 thru | or 7,
The light-emitting device, wherein the conductive film contains any one of titanium, aluminum, tantalum, tungsten, chromium, copper, and silver.

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