JP2011176238A - Chip-type electronic component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a chip-type electronic component that facilitates a plating film to be coated on a surface of a base electrode, and also facilitates a protective film such as glass coating to be coated on a surface of an element body. <P>SOLUTION: The chip-type electronic component includes the element body formed with internal electrodes inside, and terminal electrodes covering edges of the element body where the internal electrodes are exposed. The terminal electrode includes an edge part positioned at an edge of the element body and a side part formed to continue to the edge part and extending to four sides near the edges of the element body. If roughness of the surface of the element body which is not covered with the terminal electrode is expressed by αRa, and roughness of a surface of the side part is expressed by βRa, a ratio of βRa to αRa is expressed in a formula of 0.33≤βRa/αRa≤10. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a chip-type electronic component in which terminal electrodes are formed.

  In chip-type electronic components such as ceramic capacitors and varistors, it is necessary to form terminal electrodes on the outer surface of a ceramic element body. Therefore, first, a base electrode layer is formed by baking a paste film on the surface of the element body, and then a terminal electrode is formed by applying a plating film to the surface of the base electrode layer.

  Usually, the paste film contains a glass component in order to improve the adhesion between the element body and the base electrode. In particular, when the element body is composed of semiconductor ceramic, in order to prevent the plating solution from penetrating from the base electrode to the internal electrode and the element body and affecting the characteristics, a large amount of glass component is contained in the base electrode layer. There are things to do. However, if the base electrode layer contains a lot of glass component, the conductive particles are likely to be buried in the glass component on the surface of the base electrode layer, and the surface of the paste film is difficult to have a plating film. Therefore, the surface of the paste film may be barrel-polished.

  For example, an electronic component having a base electrode composed of a paste film is put into a barrel device together with media and water, and the barrel device is rotated (barrel polishing). As a result, the glass component on the surface of the base electrode may be polished to expose the conductive particles on the surface of the base electrode, thereby facilitating plating on the surface of the paste film.

  In addition, in order to improve the smoothness of the external electrode, there is a technique (rotary pot polishing) in which an electronic component having an external electrode is put into a rotating pot together with cobblestone (media) and water made of zirconia and the rotating pot is rotated. It is known (see Patent Document 1).

  However, when barrel polishing (or rotating pot polishing) is performed, the media randomly hits the surface of the element body other than the base electrode, resulting in uneven surface roughness, and due to plating elongation and peeling of the surface of the element body. There is a risk of reattachment. In addition, the element body is damaged by the impact of the media, micro cracks are generated on the surface of the element body, debris due to chipping of the element body or media adheres to the surface of the element body, and the plating film adheres unevenly. In some cases, it may contribute to poor appearance. In addition, it is difficult to uniformly energize the media, and when a protective film such as a glass film is formed on the surface of the element body, the glass film is also polished, and the surface of the element body is exposed. Depending on the surface roughness, the surface of the element body may be reattached due to plating elongation or plating peeling.

  In particular, in a small chip-type electronic component, since the distance between the terminal electrodes is short, there is a high demand for forming a protective film on the surface of the element main body positioned therebetween. By forming the protective film, the surface of the element body is prevented from being plated in the subsequent plating step.

Japanese Patent Laid-Open No. 7-22268

  The present invention has been made in view of such a situation, and an object of the present invention is to provide a chip-type electronic device in which the surface of the base electrode is likely to have a plating film and the surface of the element body is less likely to be reattached due to plating elongation or peeling. The purpose is to provide parts.

In order to achieve the above object, a chip-type electronic component according to the present invention includes:
An element body having an internal electrode formed therein;
A chip-type electronic component having a terminal electrode covering an end surface of the element body from which the internal electrode is exposed,
The terminal electrode has an end surface portion located on the end surface of the element body, and a side surface portion formed continuously to the end surface portion and extending to four side surfaces in the vicinity of the end surface of the element body,
The ratio of β · Ra to α · Ra when the roughness of the surface of the element body not covered with the terminal electrode is expressed as α · Ra and the roughness of the surface of the side surface portion is expressed as β · Ra. Is characterized by 0.33 ≦ β · Ra / α · Ra ≦ 10.

  In the chip-type electronic component according to the present invention, the ratio of α · Ra to β · Ra (β · Ra / α · Ra) is in the above-described range, so that the surface of the side surface portion of the terminal electrode is sufficiently polished. Is called. If the side surface portion of the terminal electrode is sufficiently polished, it is considered that the end surface portion is also sufficiently polished. For this reason, the conductive particles embedded in the glass component are exposed on the surface of the terminal electrode, and the plating film is easily attached to the terminal electrode. In the present invention, the ratio of α · Ra to β · Ra (β · Ra / α · Ra) is in the above-described range, so that the surface of the element body is effectively reattached due to plating elongation or plating peeling. Can be prevented.

  The case where the ratio of β · Ra to α · Ra (β · Ra / α · Ra) is smaller than 0.33 is a case where β · Ra is small and α · Ra is large. When β · Ra is small, it is considered that the polishing of the surface of the side surface portion is excessive, the end surface portion is also excessively polished, and the corner portion of the element body may be exposed from the terminal electrode. Furthermore, when α · Ra is large, it has been confirmed by experiments of the present inventors that the surface of the element body tends to be reattached due to plating elongation or peeling.

  The case where the ratio of β · Ra to α · Ra (β · Ra / α · Ra) is larger than 10 is when β · Ra is large and α · Ra is small. When α · Ra is small, the surface of the element body becomes smooth, but even in that case, it has been confirmed by experiments by the present inventors that the surface of the element body tends to cause plating elongation and peeling. It was done. Further, when β · Ra is large, the surface of the side surface portion is too rough, and the plating layer is not uniformly formed on the surface of the side surface portion, so that the solderability is not good.

  Preferably, the surface roughness α · Ra of the element body is in the range of 0.05 to 0.3 μm.

  By adjusting the roughness α · Ra of the surface of the element body to the above range, it is possible to effectively prevent reattachment due to plating elongation or plating peeling.

  Preferably, the surface roughness β · Ra of the side surface portion is in the range of 0.1 to 0.5 μm.

  By setting the surface roughness β · Ra of the side surface portion within the above range, the surface of the terminal electrode is more likely to have a plating film. If β · Ra is too large, the surface of the side surface portion is too rough, and the plating layer is not uniformly formed on the surface of the side surface portion, so that the plating on the element main body and the plating peeling off easily occur.

  Preferably, the value of the surface roughness β · Ra of the side surface portion is smaller than the value of the surface roughness γ · Ra of the end surface portion.

  Since the surface roughness γ · Ra of the end face portion of the terminal electrode is larger than β · Ra, the plating film is firmly formed on the end face portion due to the wedge effect. Furthermore, since β · Ra is within a predetermined range, a plating layer is uniformly formed on the surface of the side surface portion, and plating elongation and plating peeling on the surface of the element body are unlikely to occur.

  Preferably, the surface of the element body not covered with the terminal electrode is covered with a glass coat. By forming a glass coat on the surface of the element body, it is possible to effectively prevent reattachment due to plating elongation or plating peeling, particularly in small-sized chip-type electronic components.

  The present invention is particularly effective when the terminal electrode is formed by an electrode paste baking process and the surface of the terminal electrode is covered with a plating film.

FIG. 1 is a cross-sectional view of a chip-type electronic component according to an embodiment of the present invention. FIG. 2 is a cross-sectional view of the polishing apparatus for the chip-type electronic component shown in FIG. 3A to 3C are schematic cross-sectional explanatory views showing a polishing process. FIG. 4 is an explanatory diagram showing a control pattern of the rotational speed of the drum. FIG. 5 is an enlarged view of a portion V in FIG. 6A is a schematic cross-sectional view showing the distribution of conductive particles before polishing the terminal electrode, and FIG. 6B is a schematic cross-sectional view showing the distribution of conductive particles after polishing. FIG. 7 is a graph comparing the surface roughness Ra of the terminal electrodes. FIG. 8 is a side view showing a plating defect.

Hereinafter, the present invention will be described based on embodiments shown in the drawings.
First, a multilayer chip varistor 2 shown in FIG. 1 as a chip-type electronic component according to an embodiment of the present invention will be described. The multilayer chip varistor 2 has an element body 10 having a configuration in which internal electrode layers 4 and 6 and a resistor layer 8 are laminated. A pair of external terminal electrodes 12 and 14 are formed on both end portions 11 and 13 of the element body 10 to be electrically connected to the internal electrode layers 4 and 6 disposed inside the element body 10.

  The internal electrode layers 4 and 6 are laminated such that each end face is exposed on the surface of the opposite end portions 11 and 13 of the element body 10. The pair of external terminal electrodes 12 and 14 are formed at both ends of the element body 10 and connected to the exposed end surfaces of the internal electrode layers 4 and 6 to constitute a varistor circuit.

  The resistor layer 8 is not particularly limited as long as it is a material having varistor characteristics. For example, the resistor layer 8 is composed of a zinc oxide varistor material layer. This zinc oxide-based varistor material layer has, for example, ZnO as a main component and rare earth elements, Co, IIIb group elements (B, Al, Ga and In), Si, Cr, alkali metal elements (K, Rb and Cs) as subcomponents. ) And alkaline earth metal elements (Mg, Ca, Sr and Ba) and the like. Alternatively, it may be made of a material containing ZnO as a main component and Bi, Co, Mn, Sb, Al, etc. as subcomponents.

  The resistor layer 8 may be composed of a capacitor material layer, an NTC thermistor material layer, etc. in addition to the zinc oxide varistor material layer.

  The internal electrode layers 4 and 6 are configured to include a conductive material. The conductive material contained in the internal electrode layers 4 and 6 is not particularly limited, but is preferably made of Pd or an Ag—Pd alloy. The thickness of the internal electrode layers 4 and 6 may be appropriately determined according to the use, but is usually about 0.5 to 5 μm.

  The external terminal electrodes 12 and 14 are also configured to include a conductive material. Although it does not specifically limit as a electrically conductive material contained in the external terminal electrodes 12 and 14, Usually, Ag, an Ag-Pd alloy, etc. are used. Furthermore, if necessary, plated films 12c and 14c made of Ni and Sn films are formed on the surface of the base electrode layers 12p and 14p made of a paste electrode film such as Ag or Ag-Pd alloy by electroplating or the like. It is. The thickness of the base electrode layers 12p and 14p may be appropriately determined according to the use, but is preferably about 5 to 50 μm. Further, the thickness of the plating films 12c and 14c may be appropriately determined according to the use, but is preferably about 3 to 10 μm.

  The shape of the element body 10 is not particularly limited, but is usually a rectangular parallelepiped shape. Also, there is no particular limitation on the dimensions, and it is determined according to the application. In particular, the size is 1005 (length 1.0 mm × width 0.5 mm × thickness 0.5 mm) or less, for example, small and light, and the distance between electrodes Is less than the short 0603 shape (length 0.6 mm × width 0.3 mm × thickness 0.3 mm), the effect of the structure of this embodiment is great.

  In the element body 10, outer resistor layers 18 are disposed at both outer ends of the internal electrode layers 4 and 6 and the resistor layer 8 in the stacking direction, and protect the inside of the element body 10. The material of the outer resistor layer 18 may be the same as or different from the material of the resistor layer 8, but is usually substantially the same as the material of the resistor layer 8, and is made of a semiconductor material.

  Therefore, when the plating films 12c and 14c are formed outside the pair of base electrode layers 12p and 14p, the outer surface of the outer resistor layer 18 which is a semiconductor (the surface 10α of the element body 10) is formed during the plating process. Is likely to cause a short circuit due to the formation of a plating film. Therefore, a protective film 16 such as a glass coat is preferably formed on the surface 10α. However, in the present invention, the protective film 16 is not necessarily formed. When the protective film 16 is formed, the thickness of the protective film 16 is preferably as thin as about 0.05 to 0.2 μm. If the protective film 16 is too thick, the contact between the internal electrode layers 4 and 6 and the base electrode layers 12p and 14p tends to be difficult when the base electrode layers 12p and 14p are formed after the protective film 16 is formed. is there.

  The base electrode layers 12p and 14p are formed by an electrode paste baking process. The base electrode layers 12p and 14p are formed continuously with the end surface portions 12γ and 14γ located on the end surface of the element body 10 and the end surface portions 12γ and 14γ, and extend to the four side surfaces in the vicinity of the end surface of the element body 10. , 14β.

  In the present embodiment, the roughness of the surface 10α of the element body 10 that is not covered with the external terminal electrodes 12 and 14 is represented by α · Ra, and the roughness of the surface portions 12β and 14β of the external terminal electrodes 12 and 14 is defined as When expressed as β · Ra, α · Ra is preferably 0.02 to 0.4 μm, more preferably 0.05 to 0.3 μm, and β · Ra is preferably 0.05 to 0.3 μm. It is 7 μm, more preferably 0.1 to 0.5 μm. The ratio of β · Ra to α · Ra is 0.33 ≦ β · Ra / α · Ra ≦ 10, preferably 5 ≦ β · Ra / α · Ra ≦ 10. The roughness is an arithmetic average roughness.

  In the present embodiment, the value of the surface roughness β · Ra of the side surface portions 12β and 14β of the external terminal electrodes 12 and 14 is smaller than the value of the surface roughness γ · Ra of the end surface portions 12γ and 14γ. The surface roughness γ · Ra of the end face portions 12γ and 14γ is preferably 0.05 to 0.8 μm, more preferably 0.1 to 0.5 μm. The difference between γ · Ra and β · Ra (γ · Ra−β · Ra) is preferably 0.1 to 0.2 μm.

  The surface roughness α · Ra is the surface roughness on the surface 10α of the element body 10 after polishing, which will be described later. When the protective film made of glass coat is formed by a thin film method such as sputtering, the protective film 16 The surface roughness is the same. The surface roughness β · Ra and γRa is the surface roughness of the ground electrode layers 12p and 14p after the polishing process. However, the surface of the plating films 12c and 14c has the same surface roughness due to the characteristics of the plating process. Become.

Next, a method for manufacturing the multilayer chip varistor 2 shown in FIG. 1 will be described.
First, the element body 10 is manufactured. In order to manufacture the element body 10, the resistor layer 8 (varistor layer) and the internal electrode layers 4 and 6 are formed by a printing method or a sheet method so that the internal electrode layers 4 and 6 are alternately exposed at both ends. They are alternately stacked, and the outer resistor layers 18 are stacked at both ends in the stacking direction to form a stacked body.

  Next, this laminate is cut to obtain a green chip. Next, a binder removal process is performed as necessary, and the green chip is fired to obtain the element body 10. Next, if necessary, the element body 10 is polished (for example, general barrel polishing) to expose the end portions of the internal electrodes on both end surfaces of the element body. Thereafter, electrode paste for forming the external terminal electrodes 12 and 14 is applied and baked on both ends of the element body 10 to form the base electrode layers 12p and 14p.

  Next, after performing a polishing process to be described later, plated films 12c and 14c are formed on the surfaces of the base electrode layers 12p and 14p by electroplating. In this way, the multilayer chip varistor 2 shown in FIG. 1 is manufactured.

  The formation of the protective film 16 such as a glass coat is preferably performed before the plating process, and may be performed before the formation of the base electrode layers 12p and 14p. Since the protective film 16 is sufficiently thin, it is possible to ensure the connection with the internal electrode layers 4 and 6 when forming the base electrode layers 12p and 14p on the end face of the element body 10.

  Next, the polishing process performed before the plating process will be described. Before that, a polishing apparatus used for the polishing process will be described first.

  As shown in FIG. 2, the polishing apparatus 20 includes a turntable 21, a bottom plate 22, a side ring 23, a slit forming member 24, a cover 25, a take-out lid 26, a supply pipe 27, and a discharge receptacle 28. And a discharge pipe 29.

  A shaft portion 21a is formed on the lower surface of the rotating disk 21, and the shaft portion 21a receives a driving force from a belt and a belt drive motor (not shown), thereby rotating clockwise and counterclockwise around the rotating shaft 20T. It can be rotated in both directions. A bottom plate 22 is fixed to the turntable 21, and a side ring 23 is fixed on the bottom plate 22.

  A slit forming member 24 is arranged on the upper surface of the side ring 23. A fixing portion 25a of the cover 25 is fixed to the upper surface of the slit forming member 24, and an extraction lid 26 is fixed to the upper surface of the cover 25 so as to be opened and closed. Thereby, scattering of the polishing liquid described later is prevented.

  In the present embodiment, the slit forming member 24, the side ring 23, the bottom plate 22, and the turntable 21 are detachably fixed to the cover 25, and can be rotated together with the turntable 21. The take-out lid 26 is detachably attached to the cover 25 and is configured to be rotatable together with the cover 25. It is preferable that the supply pipe 27 is not fixed to the take-out lid 26 and does not rotate together with the turntable 21. In the present embodiment, the part that rotates together with the turntable 21 may be at least the side ring 23, and the slit forming member 24, the cover 25, the take-out lid 26, and the supply pipe 27 may not necessarily rotate. .

  The side ring 23 is a member that constitutes the concave container 20a together with the bottom plate 22, and an inner wall surface 23a is formed along the inner periphery. The inner wall surface 23a is inclined at a predetermined angle θ with respect to the upper surface of the bottom plate 22, that is, the bottom surface 22a of the concave container 20a. The predetermined angle θ is an inclination angle larger than 90 degrees and smaller than 180 degrees, more preferably 100 to 120 degrees. The inner wall surface 23a is not necessarily a linear inclined surface, and may be a convex or concave curved inclined surface. However, the inner wall surface 23a is preferably a linear inclined surface.

  The height of the side ring 23 in the axial direction is not particularly limited, but is preferably 5 to 35 mm. Between the side ring 23 and the slit forming member 24, or between the slit forming member 24 and the fixing portion 25 a of the cover 25, a slit 24 a that connects the inside and the outside of the concave container 20 a is formed. The polishing liquid 30 is supplied from the supply pipe 27 to the inside of the concave container 20 a, and the excess polishing liquid 30 is discharged from the slit 24 a to the outside of the container, and is discharged to the outside through the discharge receiver 28 and the discharge pipe 29.

  In this embodiment, water containing no media is used as the polishing liquid, but a solvent or the like may be used.

  In the present embodiment, the rotation of the turntable 21 of the polishing apparatus 20 shown in FIG. 2 is controlled as shown in FIG. First, as shown in FIG. 3A, a large number of element bodies 10 on which the base electrode layers 12p and 14p shown in FIG. 1 are formed are put into the concave container 20a. The number of element bodies 10 to be input is not particularly limited, and for example 1000 to 2000000 elements are input. These element bodies 10 are gathered at the center of the bottom surface 22a inside the concave container 20a supplied with the polishing liquid 30 to form an element body group 10a.

  When the rotational speed is gradually increased while slowly rotating the concave container 20a in a certain direction (first step T01 / first variable speed region shown in FIG. 4), the element body group 10a is moved to the bottom surface of the concave container 20a. It moves slowly along the outer peripheral direction along 22a. After that, in the second step T02 shown in FIG. 4, the concave container 20a rotates at a constant rotational speed (first constant speed region), and the element body group 10a has a concave container as shown in FIG. In the bottom face 22a of 20a, it moves near the inner wall surface 23 (bottom face moving step).

  Next, in the third step T03 shown in FIG. 4, the concave container 20a is rotated at a higher rotational speed than in the first step T01 and the second step T02. During the third step T03, the rotational speed increases rapidly (second variable speed region). At this time, as shown in FIG. 3C, the element body group 10a moves upward along the inner wall surface 23a by a centrifugal force (wall surface moving step). Thereafter, as shown in FIG. 4, in the fourth step T04, the rotational speed (second constant speed region) with the highest polishing efficiency is maintained.

  In the third step T03 and the fourth step T04 shown in FIG. 4, the inner side acting on the element main body group 10a due to frictional heat generated when the element main body group 10a shown in FIG. The surface of the base electrode layers 12p and 14p shown in FIG. 5 is polished only by the polishing liquid 30 without using a medium by the pressing force against the wall surface 23a.

  By polishing the surfaces of the base electrode layers 12p and 14p, the glass component 12r existing on the surfaces of the base electrode layers 12p and 14p is polished as shown in FIGS. Many conductive particles 12q are exposed on the surfaces of the electrode layers 12p and 14p. As a result, the plating films 12c and 14c (see FIG. 1) are easily formed uniformly on the surfaces of the base electrode layers 12p and 14p. In FIGS. 6A and 6B, for the sake of clarity, the conductive particles 12q are less than the glass component 12r, but actually there are more conductive particles 12q.

  In the present embodiment, when the element body group 10a climbs up the inner wall surface 23a, the element body 10 is separated into layers along the inner wall surface 23a by centrifugal force as shown in FIGS. 3 (C) and 5. Pressed. Therefore, the probability that the element bodies 10 collide with each other during polishing is relatively reduced. Therefore, there is little possibility that a medium or another element body 10 or the inner wall surface 23a collides with the surface 10α (see FIG. 1) of the element body 10 present at a position recessed from the base electrode layers 12p and 14p. The damage to the surface 10α of 10 is small.

  Thereafter, in the fifth step T05 shown in FIG. 4, the rotational speed of the concave container 20a is rapidly reduced, and in the sixth step T06, the rotational speed of the concave container 20a is made zero. Even if the rotation of the concave container 20a is stopped, the liquid present in the concave container 20a continues to rotate due to the inertial force. Therefore, the element body 10 that has been pressed along the inner wall surface 23a is separated from the inner wall surface 23a by the rotational flow of the liquid, and is slowly stirred to the approximate center of the bottom surface 22a of the inner container 23a while swirling. While falling (bottom return process). The state is shown in FIG.

  Thereafter, as shown in FIG. 4, the same first step T11 to sixth step T16 are performed except that the rotation direction is different from that of the first step T01 to sixth step T06, and then the first step T01 to the sixth step T16. Six steps T06 and the first step T11 to the sixth step T16 are alternately repeated. By repeating such a cycle, the base electrode layers 12p and 14p respectively formed on a large number of element bodies 10 are uniformly polished, and the occurrence rate of defective products that cause plating defects in the plating process is suppressed. Can do.

  In the multilayer chip varistor 2 according to this embodiment, the ratio of α · Ra to β · Ra (β · Ra / α · Ra) is in the above-described range, so that the surface of the side surface portions 12β and 14β of the terminal electrode is polished. Is well done. If the side surface portions 12β and 14β of the terminal electrode are sufficiently polished, it is considered that the end surface portions 12γ and 14γ are also sufficiently polished. For this reason, as shown in FIG. 6B, the conductive particles embedded in the glass component are exposed on the surfaces of the terminal electrodes 12 and 14, and the plating films 12p and 14p are easily attached to the terminal electrodes. . In this embodiment, the ratio of α · Ra to β · Ra (β · Ra / α · Ra) is in the above-described range, so that the surface 10α of the element body 10 is reattached due to plating elongation or peeling. Can be effectively prevented.

  The case where the ratio of β · Ra to α · Ra (β · Ra / α · Ra) is smaller than 0.33 is a case where β · Ra is small and α · Ra is large. When β · Ra is small, it is considered that the surfaces of the side surface portions 12β and 14β are excessively polished, the end surface portions 12γ and 14γ are also excessively polished, and the corners of the element body 10 are separated from the terminal electrodes 12 and 14. There is a risk of exposure. Further, when α · Ra is large, the surface of the element body 10 tends to be reattached due to plating elongation or peeling of the plating.

  The case where the ratio of β · Ra to α · Ra (β · Ra / α · Ra) is larger than 10 is when β · Ra is large and α · Ra is small. When α · Ra is small, the surface of the element body 10 is smooth, but even in that case, the surface of the element body 10 tends to be subject to plating elongation or peeling. Further, when β · Ra is large, the surfaces of the side surface portions 12β and 14β are too rough, and the plating layers 12c and 14c are not uniformly formed on the surface of the side surface portions 12β and 14β, so that the solderability is not good. .

  The present invention is not limited to the above-described embodiment, and can be variously modified within the scope of the present invention. For example, in the above-described embodiment, the multilayer chip varistor has been described as an example. However, the present invention is not limited to this, and chip-type electronic components to which the method of the present invention is applied include multilayer capacitors, chip varistors, chip inductors, A chip NTC thermistor or the like may be used.

Hereinafter, although this invention is demonstrated based on a more detailed Example, this invention is not limited to these Examples.
Example 1
In order to produce the material of the resistor ceramic composition constituting the resistor layer 8 and the outer resistor layer 18, ZnO was prepared as a main component material, and Pr, Co, Ca, and Al were prepared as subcomponent materials. In addition, a conductive paste containing Pd was prepared as a paste for forming the internal electrode layers 4 and 6. Next, the internal electrode layer, the resistor layer 8 and the outer resistor layer 18 were laminated to form a laminate. Thereafter, the laminate was cut to obtain a green chip. Thereafter, binder removal processing was performed, the green chip was fired, and a large number of element bodies 10 were prepared.

  Next, an electrode paste containing Ag was applied to both end faces 11 and 13 of the element body 10 and baked to form the base electrode layers 12p and 14p.

  Next, a large number of the element bodies 10 described above were put into the polishing apparatus 20 shown in FIG. 2, and the polishing process was performed with the pattern shown in FIG. As specific polishing conditions, 300 cycles of polishing treatment were performed in the pattern shown in FIG. Of the numerous element bodies 10 after polishing, 20 were sampled, and the surface roughness β · Ra of the side surface portions 12β and 14β of the base electrode layers 12p and 14p was measured with a laser microscope (VK-8550 manufactured by KEYENCE), and The roughness α · Ra of the surface 10α of the element body 10 was measured. The average values of the surface roughness were α · Ra = 0.4 μm and β · Ra = 0.05 μm. β · Ra / α · Ra = 0.125. The results are shown in Table 1.

  Next, a large number of the element bodies 10 described above were formed, and Ni plating layers and Sn plating layers were formed on the surface of the base electrode layers 12p and 14p by electroplating, and the multilayer chip varistor 2 shown in FIG. 1 was manufactured. The size of the element body 10 of the multilayer chip varistor 2 was 0.4 mm in length, 0.2 mm in width, and 0.2 mm in thickness.

  1000 samples were sampled from the multi-layer chip varistors 2 and the appearance was inspected using a stereo microscope. As shown in FIG. 8, in the multilayer chip varistor 2, the length L1 of the external terminal electrodes 12 and 14 is usually determined by a predetermined distance, and the distance L2 between the external terminal electrodes 12 and 14 also has a reference within a predetermined range. Have. In the appearance inspection, as shown in FIG. 8, when the external terminal electrodes 12 and 14 were reattached due to plating elongation or plating peeling within the range of the distance L2 in the element body 10, it was determined as NG. Moreover, when there was no reattachment by plating elongation or plating peeling, it was determined to be OK. Then, the number of multilayer chip varistors 2 determined as OK in the appearance inspection test was obtained. The results are shown in Table 1.

  Next, 50 samples were sampled from the 1000 laminated chip varistors 2 sampled in the above-described appearance inspection, and a passability test for solderability was performed. The external terminal electrodes 12 and 14 were soldered to the substrate. And the pass / fail of solderability was determined. The solderability was determined to be acceptable when the external terminal electrode was covered with 95% or more solder, and the solderability was determined to be unacceptable when the external terminal electrode was covered with less than 95% solder. Then, the number of multilayer chip varistors 2 that passed the solderability test was determined. The results are shown in Table 1.

Example 2
The element body 10 is put into the polishing apparatus 20 shown in FIG. 2, and 300 cycles of polishing treatment are performed with the pattern shown in FIG. 4 to adjust the initial surface roughness of the element body, and the base electrode layers 12p and 14p are formed. A laminated chip was obtained in the same manner as in Example 1, except that when polishing the element body 10, 250 cycles of polishing treatment were performed with the pattern shown in FIG. 4 and the relationship between α · Ra and β · Ra was adjusted. The varistor 2 was manufactured and the same experiment and measurement were performed. α · Ra = 0.3 μm. Further, β · Ra = 0.1 μm. β · Ra / α · Ra = 0.33. The results are shown in Table 1.

Example 3
The element body 10 is put into the polishing apparatus 20 shown in FIG. 2, and 400 cycles of polishing are performed with the pattern shown in FIG. 4 to adjust the initial surface roughness of the element body, and the base electrode layers 12p and 14p are formed. A laminated chip was obtained in the same manner as in Example 1, except that when polishing the element body 10, 250 cycles of polishing treatment were performed with the pattern shown in FIG. 4 and the relationship between α · Ra and β · Ra was adjusted. The varistor 2 was manufactured and the same experiment and measurement were performed. α · Ra = 0.2 μm. Further, β · Ra = 0.1 μm. β · Ra / α · Ra = 0.5. The results are shown in Table 1.

Example 4
The element body 10 is put into the polishing apparatus 20 shown in FIG. 2, and 400 cycles of polishing are performed with the pattern shown in FIG. 4 to adjust the initial surface roughness of the element body, and the base electrode layers 12p and 14p are formed. A laminated chip was obtained in the same manner as in Example 1 except that when the element body 10 was polished, 180 cycles of polishing treatment were performed with the pattern shown in FIG. 4 and the relationship between α · Ra and β · Ra was adjusted. The varistor 2 was manufactured and the same experiment and measurement were performed. In addition, after baking and forming the base electrode layers 12p and 14p, 20 of the many element bodies 10 are sampled, and the surface roughness (γ · Ra ′, β · Ra ′) was measured. The measured values are shown in FIG. The surface roughness of the baked side surface, which is the side surface portion of the base electrode layers 12p, 14p before polishing, was the surface roughness γ · Ra ′ = 0.61 μm of the baked end surface, which is the end surface portion of the base electrode layers 12p, 14p before polishing. The roughness β · Ra ′ = 0.52 μm. Further, the surface roughness was measured by the same method after polishing. The surface roughness of the end faces 12γ and 14γ after polishing was γ · Ra = 0.39 μm. The surface roughness of the side surfaces 12β and 14β after polishing was β · Ra = 0.3 μm. The roughness 10 · Ra of the surface 10α of the element body 10 after polishing was 0.2 μm. β · Ra / α · Ra = 1.5. The results are shown in Table 1.

Example 5
The element body 10 is put into the polishing apparatus 20 shown in FIG. 2, and 400 cycles of polishing are performed with the pattern shown in FIG. 4 to adjust the initial surface roughness of the element body, and the base electrode layers 12p and 14p are formed. A laminated chip was obtained in the same manner as in Example 1 except that, when the element body 10 was polished, 110 cycles of polishing treatment were performed with the pattern shown in FIG. 4 and the relationship between α · Ra and β · Ra was adjusted. The varistor 2 was manufactured and the same experiment and measurement were performed. α · Ra = 0.2 μm. Β · Ra = 0.5 μm. β · Ra / α · Ra = 2.5. The results are shown in Table 1.

Example 6
The element body 10 is put into the polishing apparatus 20 shown in FIG. 2, and 500 cycles of polishing processing are performed with the pattern shown in FIG. 4 to adjust the initial surface roughness of the element body, and the base electrode layers 12p and 14p are formed. A laminated chip was obtained in the same manner as in Example 1 except that, when the element body 10 was polished, 110 cycles of polishing treatment were performed with the pattern shown in FIG. 4 and the relationship between α · Ra and β · Ra was adjusted. The varistor 2 was manufactured and the same experiment and measurement were performed. α · Ra = 0.1 μm. Β · Ra = 0.5 μm. β · Ra / α · Ra = 5. The results are shown in Table 1.

Example 7
The element body 10 is put into the polishing apparatus 20 shown in FIG. 2 and 600 cycles of polishing treatment is performed with the pattern shown in FIG. 4 to adjust the initial surface roughness of the element body and to form the base electrode layers 12p and 14p. A laminated chip was obtained in the same manner as in Example 1 except that, when the element body 10 was polished, 110 cycles of polishing treatment were performed with the pattern shown in FIG. 4 and the relationship between α · Ra and β · Ra was adjusted. The varistor 2 was manufactured and the same experiment and measurement were performed. α · Ra = 0.05 μm. Β · Ra = 0.5 μm. β · Ra / α · Ra = 10. The results are shown in Table 1.

Example 8
The element body 10 is put into the polishing apparatus 20 shown in FIG. 2, and 1000 cycles of polishing treatment is performed with the pattern shown in FIG. 4 to adjust the initial surface roughness of the element body, and the base electrode layers 12p and 14p are formed. A laminated chip was obtained in the same manner as in Example 1 except that, when the element body 10 was polished, 110 cycles of polishing treatment were performed with the pattern shown in FIG. 4 and the relationship between α · Ra and β · Ra was adjusted. The varistor 2 was manufactured and the same experiment and measurement were performed. α · Ra = 0.02 μm. Β · Ra = 0.5 μm. β · Ra / α · Ra = 25. The results are shown in Table 1.

Example 9
The element body 10 is put into the polishing apparatus 20 shown in FIG. 2, and 1000 cycles of polishing treatment is performed with the pattern shown in FIG. 4 to adjust the initial surface roughness of the element body, and the base electrode layers 12p and 14p are formed. A laminated chip in the same manner as in Example 1 except that when the element body 10 was polished, polishing was performed for 40 cycles with the pattern shown in FIG. 4 and the relationship between α · Ra and β · Ra was adjusted. The varistor 2 was manufactured and the same experiment and measurement were performed. α · Ra = 0.02 μm. Further, β · Ra = 0.7 μm. β · Ra / α · Ra = 35. The results are shown in Table 1.

  Next, of the data shown in Table 1, the rearrangement was performed focusing on the value of α · Ra. The results are shown in Table 2. Of the data shown in Table 1, the rearrangement was performed focusing on the value of β · Ra. The results are shown in Table 3.

Comparative Example 1
The element body 10 is put into the polishing apparatus 20 shown in FIG. 2, and 100 cycles of polishing are performed with the pattern shown in FIG. 4 to adjust the initial surface roughness of the element body, and the base electrode layers 12p and 14p are formed. A laminated chip was obtained in the same manner as in Example 1 except that, when the element body 10 was polished, 110 cycles of polishing treatment were performed with the pattern shown in FIG. 4 and the relationship between α · Ra and β · Ra was adjusted. The varistor 2 was manufactured, and the value of α · Ra was measured and the appearance inspection pass rate was inspected. The results are shown in Table 2.

Comparative Example 2
The element body 10 is put into the polishing apparatus 20 shown in FIG. 2, and 500 cycles of polishing processing are performed with the pattern shown in FIG. 4 to adjust the initial surface roughness of the element body, and the base electrode layers 12p and 14p are formed. A laminated chip was obtained in the same manner as in Example 1 except that when the element body 10 was polished, polishing was performed for 5 cycles with the pattern shown in FIG. 4 and the relationship between α · Ra and β · Ra was adjusted. The varistor 2 was manufactured, and the β · Ra value was measured and the solderability pass rate was inspected. The results are shown in Table 3.

Comparative Example 3
The laminated chip varistor 2 is manufactured in the same manner as in Example 4 except that barrel polishing is performed when the element body 10 is polished after the base electrode layers 12p and 14p are formed, and the same experiment and measurement are performed. It was. In barrel polishing, the medium was made of ZrO ₂ and a spherical material having a diameter of 0.3 mm was put into the barrel polishing apparatus together with the element body 10 and barrel polishing was performed for 1 hour. The results are shown in FIG.

Evaluation 1
From the experimental results shown in Table 2, when the roughness α · Ra of the surface 10α of the element body 10 is in the range of 0.1 to 0.3 μm, it is possible to effectively prevent reattachment due to plating elongation or plating peeling. It turns out that you can. In addition, from the experimental results shown in Table 3, when the surface roughness β · Ra of the side surface portions 12 and 14β is in the range of 0.1 to 0.5 μm, the acceptance rate of solderability increases, and the base electrode layer It has been found that a plating film is more easily attached to the surfaces of 12p and 14p. Furthermore, from the experimental results shown in Table 1, when the ratio of α · Ra and β · Ra is 0.5 ≦ β · Ra / α · Ra ≦ 10, particularly 5 ≦ β · Ra / α · Ra ≦ 10, It was found that the solderability was good and the appearance inspection pass rate was high.

Evaluation 2
From the experimental data shown in FIG. 7, it was confirmed in Example 4 that the surfaces of the side surface portions 12β and 14β were sufficiently polished and the surfaces of the end surface portions 12γ and 14γ were also sufficiently polished. When the polishing was analyzed from the experimental data shown in FIG. 7, the surface roughness γ · Ra of the end face portions 12γ and 14γ after polishing was polished by about 36% compared to before polishing. The surface roughness β · Ra of the side surfaces 12β and 14β after polishing was polished by about 42% as compared with that before polishing, and the polishing efficiency of the side surface portion was higher. On the other hand, in Comparative Example 3, the value of the roughness γ · Ra after polishing and the value of the roughness β · Ra after polishing were both about 25% as compared with those before the polishing. If the polishing time is lengthened to obtain the value of β · Ra (0.30 μm) obtained in Example 4 in Comparative Example 3, the value of γ · Ra becomes γ · Ra obtained in Example 4. Ra (0.39 μm) would be exceeded, polishing would be excessive, and the corners of the element body 10 might be exposed from the terminal electrode, and Example 4 (considered in other examples) The effectiveness of was confirmed.

2 ... Laminated chip varistors 6, 8 ... Internal electrodes 10 ... Element main bodies 12, 14 ... External terminal electrodes 12p, 14p ... Base electrode layers 12c, 14c ... Plating films 12β, 14β ... Side portions 12γ, 14γ ... End face portions 16 ... Protection film

Claims (7)

An element body having an internal electrode formed therein;
A chip-type electronic component having a terminal electrode covering an end surface of the element body from which the internal electrode is exposed,
The terminal electrode has an end surface portion located on the end surface of the element body, and a side surface portion formed continuously to the end surface portion and extending to four side surfaces in the vicinity of the end surface of the element body,
The ratio of β · Ra to α · Ra when the roughness of the surface of the element body not covered with the terminal electrode is expressed as α · Ra and the roughness of the surface of the side surface portion is expressed as β · Ra. Is 0.33 ≦ β · Ra / α · Ra ≦ 10.   2. The chip-type electronic component according to claim 1, wherein the surface roughness α · Ra of the element body is in a range of 0.05 to 0.3 μm.   3. The chip-type electronic component according to claim 1, wherein a surface roughness β · Ra of the side surface portion is in a range of 0.1 to 0.5 μm.   4. The chip according to claim 1, wherein the value of the surface roughness β · Ra of the side surface portion is smaller than the value of the surface roughness γ · Ra of the end surface portion. Type electronic components.   The chip-type electronic component according to claim 1, wherein a surface of the element main body not covered with the terminal electrode is covered with a glass coat.   The chip-type electronic component according to claim 1, wherein the terminal electrode is formed by an electrode paste baking process. The chip-type electronic component according to claim 1, wherein a surface of the terminal electrode is covered with plating.

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