JP2010003922A - Production process of silicon wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a production process of a silicon wafer which can eliminate void defects in at least the surface layer of the silicon wafer. <P>SOLUTION: Using a thermal processing furnace with lamp heaters, a silicon wafer is subjected to first annealing for 45 seconds at 1,150°C under an atmosphere of non-oxidizing gas. Consequently, the inner wall oxide film of a void defect in at least the surface layer of a wafer is removed. Subsequently, the wafer is subjected to continuous annealing for 10 seconds at 1,150°C under an atmosphere of oxidizing gas in the lamp furnace, as a second annealing step for injecting interstitial silicon into the void defect. Consequently, a void defect elimination rate is accelerated in at least the surface layer of the wafer and the void defects are eliminated. Furthermore, the wafer is subjected to annealing for 10 seconds at 1,150°C under a gas atmosphere containing nitrogen as a third annealing step, and then it is cooled down at a cooling rate of 50°C/second so that a large quantity of vacancies are injected to the vicinity of the surface layer of the substrate thus enhancing the gettering capability. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention can effectively eliminate a grown-in defect that becomes a COP source of a silicon wafer manufacturing method, specifically, a COP (Crystal Originated Particle) and a wafer surface layer (from the wafer surface to a depth of several μm). Further, the present invention relates to a method for manufacturing a silicon wafer capable of gettering metal impurities.

In forming a device on a silicon wafer, a considerable number of processes such as a film forming process by heat treatment and dry cleaning are repeated to obtain a final device product. It is well known that such a process introduces various metal impurities into the silicon wafer, leading to deterioration of device characteristics.
Conventionally, in order to remove metal contamination in the device process from the device active layer, an intrinsic gettering method has been proposed in which oxygen precipitates are grown inside a silicon wafer and metal impurities are captured by the oxygen precipitates ( For example, Patent Document 1). An extrinsic gettering method has also been proposed in which polysilicon is deposited on the back surface of a silicon wafer and metal impurities are captured at the grain boundaries of the polysilicon. On the other hand, as an example of the intrinsic gettering method, in the heat treatment under a gas atmosphere containing nitrogen element, rapid cooling is performed to freeze the vacancies and use the oxygen precipitation promoting effect of the vacancies during the subsequent additional heat treatment The gettering method is also known.

JP 2002-134516 A

  By the way, these gettering techniques merely increase oxygen precipitation, and from the viewpoint of completeness in the vicinity of the surface layer of the silicon wafer (near the device active layer), a silicon wafer having no void defects is required. . This is because a silicon wafer containing void defects grown during crystal growth deteriorates device characteristics. However, it is very difficult to grow a long silicon single crystal without void defects. Further, surface defects are evaluated on a silicon wafer before product shipment using a surface defect evaluation apparatus (product number SP-1) manufactured by Tencor. Even for silicon wafers that are determined to have no defects of 0.07 μm or more in size (Free), defects with a size smaller than 0.03 μm are detected by performing a high-sensitivity evaluation using the latest surface defect evaluation apparatus or the like. Inferred.

  On the other hand, device fabrication is increasingly miniaturized, and device defects occur when minute defects are present in the surface layer of a silicon wafer. Therefore, it is desirable that the silicon wafer has only a small defect that does not affect the device characteristics at least in the wafer surface layer, or is completely defect-free. In addition, in a silicon wafer for MCP (Multi Chip Package) devices, it is expected that in the future, most of the silicon wafer will be removed from the back surface by grinding in the device post-process, and the final thickness will be 15 μm or less. In this case, the silicon wafer has no gettering capability. Therefore, a silicon wafer having a large gettering function in the vicinity of a wafer surface layer (device active layer) on which a device is formed is required.

Therefore, as a result of diligent research, the inventor, for example, is a lamp type capable of rapid heating and quenching with respect to a silicon wafer including a void defect that can be detected only by a highly sensitive surface defect evaluation apparatus having a detection limit value of about 0.03 μm. By using a rapid heating furnace and performing a short second heat treatment in an oxidizing gas atmosphere after a short first heat treatment in a non-oxidizing gas atmosphere, void defects in at least the wafer surface layer of the silicon wafer are obtained. The present invention has been completed.
In addition, after the second heat treatment, the third heat treatment is performed in an atmosphere of ammonia gas or nitrogen gas that can inject vacancies from the wafer surface into the silicon wafer using a lamp type rapid heating furnace. It has been found that by rapidly cooling the wafer, oxygen precipitates can be effectively grown below the region where the device is formed, and the present invention has been completed.

An object of the present invention is to provide a method for producing a silicon wafer that can eliminate void defects on at least the surface layer of the silicon wafer.
Another object of the present invention is to provide a silicon wafer manufacturing method capable of forming a gettering site capable of capturing metal impurities in the vicinity of a wafer surface layer on which a device is formed.

  According to the first aspect of the present invention, a silicon wafer obtained from a silicon single crystal grown by the Czochralski method is used in a non-oxidizing gas atmosphere or a reducing gas using a rapid heating furnace capable of rapid heating and rapid cooling. A first heat treatment step in which an inner wall oxide film of a void defect on at least a surface layer of the silicon wafer is removed by heat treatment in an atmosphere at a temperature of 1050 ° C. or more and less than a melting point of silicon for 1 second to 60 seconds; After the step, a second heat treatment for injecting interstitial silicon into the void defects by heat-treating the silicon wafer at 900 ° C. to 1350 ° C. for 1 second to 60 seconds in an oxidizing gas atmosphere using the rapid heating furnace. A method for manufacturing a silicon wafer comprising a process.

According to the first aspect of the present invention, first, a lamp type rapid heating furnace is used, and the silicon wafer (CZ wafer) is within the range of 1050 ° C. or higher and lower than the melting point of silicon in an atmosphere of non-oxidizing gas. First heat treatment is performed at a temperature of 1 second to 60 seconds. By this first heat treatment, oxygen in at least the surface layer of the silicon wafer diffuses outward to form an oxygen unsaturated region. Along with this, at least the inner wall oxide film in which the void defects on the surface layer of the wafer are dissolved is diffused and removed, and the void defects are also reduced.
Next, in the oxidizing gas atmosphere, the second heat treatment is performed at 900 ° C. to 1350 ° C. for 1 second to 60 seconds, so that the void defects having the inner wall oxide film removed by the first heat treatment grow on the wafer surface. Excess interstitial silicon is implanted from the interface of the oxidized film. As a result, at least the void defect disappearance rate on the surface layer of the wafer is accelerated, and the void defect disappears. As a result, at least the integrity (defect-freeness) of the wafer surface layer can be improved. The effect of the present invention becomes remarkable when a silicon wafer including a void defect that can be detected only by the latest surface defect evaluation apparatus having a detection limit value of about 0.03 μm is targeted.

In the Czochralski method, a silicon raw material for crystallization is charged into a crucible, and the charged material in the crucible is melted by a heater to obtain a melt. Next, the seed crystal attached to the lower end of the pulling shaft is immersed in the melt, and while the crucible and the pulling shaft are rotated, the pulling shaft is lifted in the axial direction to grow a silicon single crystal below the seed crystal. . In addition, a magnetic field application method Czochralski pulling method (MCZ method) in which a superconducting magnet is disposed around a quartz crucible may be employed.
As the shape of the silicon single crystal, for example, one having a neck portion (drawing portion), an increased diameter portion (upward cone portion), a straight body portion, and a reduced diameter portion (downward cone portion) can be adopted. Moreover, the thing with almost no neck part and the thing without a reduced diameter part may be sufficient.
The diameter of the silicon wafer is arbitrary. For example, it is 200 mm, 300 mm, 450 mm, or the like.
Rapid heating furnace (RTP) means rapid heating (1 to 200 ° C / second, maximum temperature 1400 ° C), rapid cooling (1 to 100 ° C / second) by infrared lamp, high frequency heating method, resistance heating method or laser. This is a heating furnace capable of
As the non-oxidizing gas, an inert gas such as helium gas, neon gas, or argon gas can be employed in addition to a reducing gas (hydrogen gas or the like). Further, a mixed gas of a reducing gas and an inert gas may be used.

If the heating temperature of the silicon wafer in the first heat treatment step is less than 1050 ° C., the outward diffusion of oxygen in the wafer is slow, and the dissolution time of the COP inner wall oxide film is long. In addition, when the melting point of silicon (about 1420 ° C.) or higher is required, it is necessary to improve heat resistance, resulting in a very expensive device or deformation of silicon. The preferable heating temperature of the silicon wafer in the first heat treatment step is 1100 ° C. to 1250 ° C. If it is this range, the fall of the productivity of a silicon wafer can be suppressed and the crystal defect called a slip can be suppressed.
When the heating time of the silicon wafer in the first heat treatment step is less than 1 second, the oxygen outward diffusion in the vicinity of the wafer surface layer is not sufficient, and the COP inner wall oxide film is not completely dissolved. Moreover, if it exceeds 60 seconds, the productivity of a silicon wafer will fall. The preferable heating time of the silicon wafer in the first heat treatment step is 5 to 60 seconds. If it is this range, it will become difficult to become high-cost, and also it is hard to generate | occur | produce a slip.

  The rapid heating rate of the silicon wafer in the first heat treatment step is not particularly limited but is 5 ° C./second or more. When the temperature is less than 5 ° C./second, the time until the target temperature is reached becomes too long, and the productivity of the silicon wafer decreases. The same applies to the rapid cooling rate.

  At least the surface layer of the silicon wafer includes not only the surface layer of the silicon wafer but also from the surface layer of the silicon wafer to the middle portion in the thickness direction. Further, it may be the entire region in the thickness direction of the silicon wafer.

If the heating temperature of the silicon wafer in the second heat treatment step is less than 900 ° C., an oxide film cannot be efficiently grown on the surface of the silicon wafer, and interstitial silicon cannot be efficiently injected into void defects, Furthermore, the inner wall oxide film may grow again in the void defect in which the inner wall oxide film is dissolved. Moreover, if it exceeds 1350 degreeC, the generation frequency of a slip will become high. The preferable heating temperature of the silicon wafer in the second heat treatment step is 1000 ° C. to 1250 ° C. If it is this range, the fall of productivity of a silicon wafer can be prevented and generation | occurrence | production of a slip can be suppressed.
If the heating time of the silicon wafer in the second heat treatment step is less than 1 second, the growth of the surface oxide film of the silicon wafer is not sufficient, and the amount of interstitial silicon injected into the COP in which the inner wall oxide film is dissolved is insufficient. Moreover, if it exceeds 60 seconds, the productivity of a silicon wafer will fall. The preferable heating time of the silicon wafer in the second heat treatment step is 2 seconds to 60 seconds. If it is this range, the productivity fall of a silicon wafer can be suppressed and generation | occurrence | production of a slip can also be suppressed.

The rapid heating rate of the silicon wafer in the second heat treatment step is not particularly limited, but is 5 ° C./second or more. When the temperature is less than 5 ° C./second, the time until the target temperature is reached becomes too long, and the productivity of the silicon wafer decreases. The same applies to the rapid cooling rate.
As the oxidizing gas, oxygen gas or the like can be employed.

  The second aspect of the present invention is the same as the second heat treatment step, using the same rapid heating furnace as the second heat treatment, and is performed at a temperature of 1050 ° C. to 1350 ° C. in a gas atmosphere containing nitrogen. 2. The method for producing a silicon wafer according to claim 1, wherein a third heat treatment step of injecting vacancies into the silicon wafer from the surface of the silicon wafer is performed by performing heat treatment for 2 to 30 seconds.

According to the invention described in claim 2, vacancies are injected at a high concentration from the surface of the silicon wafer into the silicon wafer, and oxygen precipitates can be efficiently grown (implanted) by the subsequent heat treatment. it can. In order to efficiently grow oxygen precipitates after the third heat treatment, the initial oxygen concentration of the silicon wafer should be 5 × 10 ¹⁷ atoms / cm ³ (old ASTM) or more.

As the gas containing nitrogen, for example, nitrogen gas, ammonia gas, or the like can be employed.
If the heating temperature of the silicon wafer in the third heat treatment step is less than 1050 ° C., the vacancy concentration cannot be sufficiently increased, and oxygen precipitates cannot be formed. Moreover, if it exceeds 1350 degreeC, the generation | occurrence | production of the slip of a silicon wafer will become obvious. The preferable heating temperature of the silicon wafer is 1150 ° C to 1250 ° C. If it is this range, generation | occurrence | production of a slip can also be suppressed.
When the heating time of the silicon wafer in the third heat treatment step is less than 1 second, the vacancies are not sufficiently diffused, and the vacancies cannot be diffused into the silicon wafer. Moreover, if it exceeds 30 seconds, the productivity of a silicon wafer will fall. The preferred heating time for the silicon wafer is 5 to 20 seconds. Within this range, the holes can be sufficiently diffused in the wafer, and the productivity of the silicon wafer is not reduced.

The rapid cooling rate of the silicon wafer in the third heat treatment step is 10 ° C./second or more. If it is less than 10 ° C./second, vacancies cannot be frozen in the wafer. A preferable quenching heat rate of the silicon wafer is 25 to 100 ° C./second. If it is this range, it can respond with a commercially available rapid heating furnace.
The rapid heating rate of the silicon wafer in the third heat treatment step is set to 5 ° C./second or more. If it is less than 5 ° C./second, there is a disadvantage that productivity is lowered.

  According to a third aspect of the present invention, after the second heat treatment step, the surface oxide film of the silicon wafer is completely or partially removed, and then, using the lamp type rapid heating furnace, in an atmosphere of a gas containing nitrogen. 2. The silicon wafer according to claim 1, wherein a third heat treatment step of injecting holes from the surface of the silicon wafer into the silicon wafer is performed by heat treatment at a temperature of 1050 ° C. to 1350 ° C. for 1 second to 30 seconds. It is a manufacturing method.

  According to the third aspect of the present invention, the surface of the silicon wafer generated during the second heat treatment using the rapid heating furnace between the second heat treatment and before the third heat treatment is applied to the silicon wafer. The oxide film is completely or partially removed. Thereby, it is possible to easily inject holes from the silicon surface during the third heat treatment.

The thickness of the partially remaining surface oxide film (silicon oxide film) is 50 mm or less. If it exceeds 50 mm, a phenomenon that holes are difficult to enter occurs.
As a method for removing the surface oxide film, for example, HF cleaning can be employed.

  According to a fourth aspect of the present invention, in the third heat treatment step, the heat treatment temperature of the silicon wafer is 1050 ° C. to 1350 ° C., and the cooling rate after the heat treatment is 10 ° C./second or more. It is a manufacturing method of the described silicon wafer.

  According to the invention of claim 4, since the heat treatment temperature of the silicon wafer in the third heat treatment step is 1050 ° C. to 1350 ° C. and the temperature lowering rate after the heat treatment is 10 ° C./second or more, Immediately after growing oxygen precipitates that become vacancies inside the wafer, the vacancies can be frozen by rapid cooling. Thereby, the metal impurity can be captured by utilizing the oxygen precipitation promoting action of the vacancies during the subsequent additional heat treatment.

When the heating temperature of the silicon wafer in the third heat treatment step is less than 1050 ° C., the amount of holes injected is not sufficient. Moreover, if it exceeds 1350 degreeC, the problem of slip generation will arise. The preferable heating temperature of the silicon wafer is 1150 ° C to 1250 ° C. If it is this range, the more suitable effect that slip suppression and a commercially available heat processing furnace can be applied will be acquired.
The rapid cooling rate of the silicon wafer in the third heat treatment step is 10 ° C./second or more. If it is less than 10 ° C./second, the vacancy concentration necessary for the formation of oxygen precipitates cannot be sufficiently frozen. A preferable rapid cooling rate of the silicon wafer in the third heat treatment step is 25 to 75 ° C./second.

  The invention according to claim 5 is the silicon wafer manufacturing method according to any one of claims 2 to 4, wherein the surface of the silicon wafer is finish-polished.

  According to the fifth aspect of the present invention, the surface of the wafer is roughened by diffusion of nitrogen into the wafer. Accordingly, the roughness can be eliminated by polishing the wafer surface after the third heat treatment step.

  According to the first aspect of the present invention, a rapid heating furnace is used for a silicon wafer, and the temperature is 1050 ° C. or higher and less than the melting point of silicon for 1 to 60 seconds in a non-oxidizing gas atmosphere. A first heat treatment is performed. Thereby, at least the inner wall oxide film of the void defect on the wafer surface layer is removed. Thereafter, using a lamp type rapid heating furnace, the silicon wafer is heat-treated at 900 ° C. to 1350 ° C. for 1 second to 60 seconds in an oxidizing gas atmosphere, and a second heat treatment step is performed in which interstitial silicon is injected into void defects. This accelerates the disappearance rate of at least the void defects on the wafer surface layer, eliminates the void defects, and improves at least the integrity of the wafer surface layer.

  According to the second aspect of the present invention, the same rapid heating furnace as that used in the second heat treatment step is used, and the silicon wafer is subjected to nitrogen gas atmosphere at 1050 ° C. to 1350 ° C. for 1 second to 30 seconds. A third heat treatment for second heat treatment is performed. Thereby, a void | hole can be inject | poured into the inside of a silicon wafer from the surface of a silicon wafer.

  According to the third aspect of the present invention, the surface oxide film is completely or partially removed from the silicon wafer generated during the second heat treatment between the second heat treatment and before the third heat treatment. Thereby, it is possible to easily obtain the vacancy injection.

According to the invention of claim 4, since the heat treatment temperature of the silicon wafer in the third heat treatment step is 1050 ° C. to 1350 ° C., and the temperature lowering rate after the heat treatment is 10 ° C./second or more,
After the vacancies are injected from the silicon surface to the inside, the vacancies can be efficiently frozen.

  Examples of the present invention will be specifically described below.

Next, a method for manufacturing a silicon wafer according to Embodiment 1 of the present invention will be described in detail.
First, a silicon wafer is heat-treated at 1200 ° C. (heating rate of about 25 ° C./second) for 45 seconds in an argon gas atmosphere using a lamp type rapid heating furnace using an infrared lamp capable of rapid heating and rapid cooling as a light source. (First heat treatment step). Thereby, oxygen in the wafer is diffused outward at a depth of several μm from the surface of the silicon wafer, and an oxygen unsaturated region is formed in the outward diffusion portion. Along with this, in the void defect existing at a depth of several μm from the wafer surface, the inner wall oxide film dissolved during heating is diffused outward and removed.

Next, heating is performed at 1150 ° C. for 30 seconds in a lamp type rapid heating furnace in an oxygen gas atmosphere (second heat treatment). Thus, interstitial silicon is implanted into the void defect from which the inner wall oxide film has been removed by the first heat treatment at a concentration equal to or higher than the thermal equilibrium concentration from the wafer surface. As a result, void defects existing at a depth of several μm from the surface of the silicon wafer disappear.
Then, the silicon wafer after the second heat treatment is HF cleaned, then the surface of the silicon wafer is polished by 0.5 to 1 μm, and finally SC-1 cleaning is performed. The number of surface defects (LPD) of the obtained silicon wafer is measured by a surface defect evaluation apparatus. As a result, the LPD except for the particles could be almost eliminated. Thereby, at least the integrity of the wafer surface layer could be improved.

  In addition, after removing the surface oxide film of the silicon wafer, a heat treatment may be performed for 10 seconds at a temperature of 1150 ° C. in an ammonia gas atmosphere using a lamp type rapid heating furnace (third heat treatment). In this case, holes can be injected from the surface of the silicon wafer into the wafer.

  Next, a comparison test between the silicon wafer manufacturing method of Example 1 and the conventional method was actually performed, and the difference between the wafer surface layer integrity when the silicon wafer was manufactured and the gettering ability in the vicinity of the wafer surface layer was reported. To do.

[Materials used]
(1) Silicon wafer (specimen);
A CZ wafer in which ring-shaped LPD was generated on the outer periphery of the wafer was used in the evaluation by a surface defect evaluation apparatus (product number SP-2) manufactured by Tencor.

[Evaluation methods]
(1) Evaluation method of void defect on wafer surface layer;
a) Evaluation method of LPD (Light Point Defect) The target silicon wafer is subjected to a surface defect evaluation device (product number SP-2) manufactured by Tencor to determine whether or not the LPD of 0.03 μm or more existing on the wafer surface has disappeared. evaluate.
b) Evaluation Method for Void Defects in Wafer Surface Layer Region In order to measure void defects near the wafer surface, a simple device thermal simulation is performed. After removing the obtained wafer surface oxide film with HF, SC-1 cleaning and HF cleaning are performed. Thereafter, 3 μm selective etching is performed from the wafer surface by an RIE evaluation apparatus to measure the density of undissolved voids.
(2) Evaluation method of gettering function;
c) BMD (Bulk Micro Defect) Evaluation Method After subjecting the target silicon wafer to heat treatment at 800 ° C. for 4 hours, it is subsequently subjected to heat treatment at 1000 ° C. for 16 hours. Each silicon wafer is cleaved and then selectively etched with a Wright etching solution, and the oxygen precipitate density on the cross section of the silicon wafer is measured using an optical microscope.

[Comparative Examples 1 to 10, Test Examples 1 to 9]
First, peripheral straight grinding, block cutting, slicing, chamfering, lapping, etching, and polishing were sequentially performed on a straight body portion of a silicon single crystal grown by the Czochralski method to obtain a diameter of 300 mm and an initial oxygen concentration of 9.0 × 10 ^18. / cm ^3, to prepare a silicon wafer of the same lot of the specific resistance of 10Ω · cm. Among them, 200 silicon wafers with ring-shaped LPD generated on the outer periphery of the wafer were extracted by a surface defect evaluation apparatus (product number SP-2) manufactured by Tencor (the actual state of the outer ring-shaped LPD was Void defect).

Next, these silicon wafers were inserted into a lamp annealing furnace and heat-treated at a predetermined temperature for a predetermined time in a predetermined gas atmosphere, and then cooled at a predetermined speed (first, second, and third heat treatments).
The results are shown in Table 1, respectively.

  As is clear from Table 1, in Test Examples 1 to 9, the first heat treatment, the second heat treatment, and the third heat treatment, if necessary, are performed for a short time, respectively. It has been found that LPD and BMD can be reduced, respectively. It has been found that a sufficient amount of gettering sites can be grown in the vicinity of the surface layer of the silicon wafer to capture metal impurities.

Claims (5)

A silicon wafer obtained from a silicon single crystal grown by the Czochralski method is used in a non-oxidizing gas atmosphere or a reducing gas atmosphere at 1050 ° C. or higher using a rapid heating furnace capable of rapid heating and quenching. A first heat treatment step of performing heat treatment for 1 second to 60 seconds within a temperature range below the melting point, and removing an inner wall oxide film of void defects on at least a surface layer of the silicon wafer;
After the first heat treatment step, the silicon wafer is heat-treated at 900 ° C. to 1350 ° C. for 1 second to 60 seconds in an oxidizing gas atmosphere using the rapid heating furnace to inject interstitial silicon into the void defects. A method for producing a silicon wafer comprising a second heat treatment step.   Using the same rapid heating furnace as in the second heat treatment step, the second heat treatment is continued, and heat treatment is performed at a temperature of 1050 ° C. to 1350 ° C. for 1 second to 30 seconds in an atmosphere of a gas containing nitrogen. The method for manufacturing a silicon wafer according to claim 1, wherein a third heat treatment step of injecting holes into the silicon wafer from the surface of the silicon wafer is performed.   After the second heat treatment step, the surface oxide film of the silicon wafer is completely or partially removed, and then using the lamp type rapid heating furnace at a temperature of 1050 ° C. to 1350 ° C. in a gas atmosphere containing nitrogen. The method for producing a silicon wafer according to claim 1, wherein a third heat treatment step of injecting holes from the surface of the silicon wafer into the silicon wafer is performed by performing heat treatment for 1 second to 30 seconds.   4. The method for producing a silicon wafer according to claim 2, wherein, in the third heat treatment step, a heat treatment temperature of the silicon wafer is 1050 ° C. to 1350 ° C., and a temperature lowering rate after the heat treatment is 10 ° C./second or more.   The method for producing a silicon wafer according to any one of claims 2 to 4, wherein the surface of the silicon wafer is finish-polished.