JP2010071729A - Semiconductor integrated circuit for driving motor and method for testing - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit for driving a motor capable of reducing a time period necessary for testing and performing testing without providing a terminal dedicated for testing or a sophisticated testing circuit. <P>SOLUTION: This a semiconductor integrated circuit includes first and second external terminals to which a Hall device is connected, a motor rotation detecting circuit, an oscillation circuit, a logic section that generates a signal for controlling an output on the basis of a rotation detection signal and an oscillation signal, and a voltage comparator circuit that is connected to one of the first and second external terminals and is adapted to detect whether or not an electric potential of the terminal is out of a range of voltages input by the Hall device. In a case where it is determined that the electric potential of one of the external terminals is out of the range of the voltages input by the Hall device by the voltage comparator circuit, a signal to be input to the other external terminal is supplied to the logic section instead of the rotation detection signal output from the motor rotation detecting circuit, and a signal having a frequency higher than that of the oscillation signal is supplied to the logic section instead of the oscillation signal. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a test technology for a motor driving IC (semiconductor integrated circuit) provided with a terminal for connecting a rotation detecting Hall element, and in particular, control is performed so that the rotational frequency of the motor matches the frequency of a predetermined clock signal. The present invention relates to a technique effective for use in a motor driving IC and a test method.

  In recent years, motors have been used for various purposes in electronic devices. For example, an electronic device such as a personal computer is provided with a motor for rotating a fan that cools an internal electronic component (particularly a CPU) and a spindle motor for rotating a DVD so that the internal electronic components (particularly the CPU) do not become hot. Various motor driving ICs for driving are provided.

  Motor driving ICs have different driving methods and characteristics depending on applications. For example, a spindle motor that rotates a DVD may be required to rotate at a speed corresponding to the position of the head. In addition, since the internal temperature of an electronic device differs depending on the ambient temperature, the operation state of the internal circuit, and the like, it is desired that the cooling fan can also be controlled for rotation.

  In many cases, the motor driving IC capable of such rotation control is provided with an oscillation circuit or a frequency dividing circuit for generating a clock signal having a desired frequency. In addition, a rotation control circuit may be provided that detects the number of rotations of the motor using a Hall element and makes the number of rotations of the motor coincide with the frequency of the internal clock signal by a PLL circuit or the like. In such a motor driving IC, a test for inspecting whether or not the internal circuit operates normally is necessary.

An invention relating to a test circuit in a motor driving IC is disclosed in Patent Document 1, for example.
JP 2007-263809 A

  The fan motor may have a much slower rotational speed than a spindle motor or the like. Therefore, the frequency of the output signal of the motor driving IC that drives the fan motor is very low, from several tens to several hundreds Hz. Therefore, if the inspection is performed under the same conditions as the actual driving of the motor, there is a problem that the test time becomes too long.

  Therefore, the present inventors have considered reducing the test time by operating the IC inside at a higher speed than in the normal operation state. However, it is necessary to provide a test function and a test mode in order to operate the IC in a state different from the normal operation state when the IC is inspected. Further, in order to shift the IC to the test mode, it is necessary to provide a mode setting terminal (pin), and it has become clear that the number of terminals may increase and the cost of the IC may be increased.

  The present invention has been made paying attention to the above-described problems, and an object of the present invention is to provide a motor-driving semiconductor integrated circuit and a test method capable of reducing the time required for the test.

  Another object of the present invention is to provide a motor integrated semiconductor integrated circuit capable of performing a test without providing a dedicated test terminal or providing an advanced test circuit.

  In order to achieve the above object, the present invention includes first and second external terminals to which a detection element is connected, a rotation detection circuit that detects rotation of a motor based on an input from the detection element, and a predetermined frequency. An oscillation circuit that oscillates at a frequency, a logic unit that generates a signal for controlling a motor drive output based on a rotation detection signal output from the rotation detection circuit and an oscillation signal output from the oscillation circuit; A voltage comparison circuit connected to any one of the second external terminals and detecting whether or not the potential of the terminal is equal to or higher than the predetermined voltage. When the voltage comparison circuit determines that the potential of the one external terminal is equal to or higher than the predetermined voltage, the rotation detection signal output from the rotation detection circuit is substituted. The signal input to the other external terminal of the first and second external terminals is supplied to the logic unit, and the frequency of the oscillation signal supplied from the oscillation circuit to the logic unit during normal operation is higher. A high signal is configured to be supplied to the logic unit.

  According to such a configuration, the time required for the test can be shortened, and the test can be performed without providing a dedicated test terminal or providing an advanced test circuit.

  Here, preferably, a third external terminal for outputting an information signal generated in the internal circuit to the outside is provided, and the voltage comparison circuit causes the potential of the one external terminal to be greater than or less than the predetermined voltage. When it is determined that there is a signal, the signal input to the other external terminal of the first and second external terminals is supplied to the logic unit instead of the rotation detection signal output from the rotation detection circuit. Instead of the oscillation signal generated by the oscillation circuit, a signal having a frequency higher than that of the oscillation signal input to the third external terminal is supplied to the logic unit. As a result, a signal having a frequency higher than that of the oscillation signal input instead of the oscillation signal can be supplied to the logic unit without providing a dedicated external terminal.

  In addition, preferably, the oscillation operation of the oscillation circuit is stopped when the signal input to the third external terminal is supplied to the logic unit. Thereby, noise at the time of a test can be reduced and a highly accurate test result can be obtained.

  More preferably, an open drain MOS transistor is connected to the third external terminal, and a signal output from the rotation detection circuit is applied to the gate terminal of the MOS transistor, which is generated by the oscillation circuit. When the signal input to the third external terminal instead of the oscillation signal is supplied to the logic unit, the MOS transistor is turned off. As a result, a clock signal required for the test can be input from the outside to the third external terminal without affecting the internal circuit. Here, as the third external terminal, for example, there is a terminal that outputs an information signal indicating the number of rotations detected by the rotation detection circuit.

  Further preferably, the oscillation circuit is configured such that the oscillation frequency is variable in accordance with the level of the supplied power supply voltage. Thereby, it is possible to easily control the rotation speed of the motor by changing the power supply voltage supplied from the outside of the chip.

  The oscillation circuit is configured so that the oscillation frequency can be switched to a frequency 10 times higher than that in normal operation, and the voltage comparison circuit determines that the potential of the one external terminal is equal to or higher than the predetermined voltage. In this case, the oscillation frequency of the oscillation circuit may be configured to be higher than that during normal operation. As a result, it is possible to reduce the clock signal applied from the outside during the test, reduce the burden on the test apparatus, and have a third external terminal for outputting the information signal generated by the internal circuit to the outside. It is possible to execute a short time test even in an IC that is not present.

  Furthermore, another invention of the present application is directed to first and second external terminals to which a detection element is connected, a third external terminal for outputting an information signal generated by an internal circuit to the outside, and the detection A rotation detection circuit that detects rotation of the motor based on an input from the element; an oscillation circuit that oscillates at a predetermined frequency; a rotation detection signal output from the rotation detection circuit; and an oscillation signal output from the oscillation circuit; And a logic unit that generates a signal for controlling the motor drive output based on the first and second external terminals, and the potential of the terminal is a voltage input from the detection element. A voltage comparison circuit for detecting whether or not the voltage is out of range; and when the voltage comparison circuit determines that the potential of the one external terminal is outside the range of the voltage input from the detection element, the rotation A first switching means capable of supplying a signal input to the other external terminal of the first and second external terminals instead of the rotation detection signal output from the output circuit; And a second switching means capable of supplying a signal input to the third external terminal in place of the oscillation signal output from the logic section to the logic unit. Applying a predetermined voltage outside the range of the voltage input from the detection element to the one external terminal, and supplying a first clock signal having a frequency higher than the rotational frequency of the motor driven to the other external terminal. While inputting, the second clock signal having a frequency higher than that of the first clock signal is inputted to the third external terminal. According to such a method, the time required for the test can be shortened by operating the logic unit at a higher speed during the test than during the normal operation.

  According to the present invention, the time required for testing a semiconductor integrated circuit for driving a motor can be shortened. In addition, it is possible to test the semiconductor integrated circuit for driving the motor without providing a dedicated test terminal or providing an advanced test circuit, and it is possible to avoid an increase in the cost of the IC.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, preferred embodiments of the invention will be described with reference to the drawings.

  FIG. 1 shows a schematic configuration of an embodiment of a motor driving IC and its peripheral circuit suitable for application of the present invention. In FIG. 1, a circuit portion surrounded by a broken line A is formed as a semiconductor integrated circuit on a semiconductor chip such as single crystal silicon. VCC is a power supply terminal to which a power supply voltage is applied from the outside, and GND is a ground terminal to which a ground potential is applied.

  As shown in FIG. 1, the motor driving IC 10 of this embodiment includes external terminals H− and H + to which a pair of detection terminals of a Hall element 20 as a rotation detection element is connected, and a Hall element 20. A bias terminal HB that outputs a bias voltage or a bias current for driving, a terminal FG for outputting a rotation speed signal to the outside of the chip, and a pair of output terminals Vo1 and Vo2 that output a driving current to be passed through the motor coil. Is provided.

  Further, inside the chip of the motor driving IC 10 of this embodiment, a bias circuit 11 for generating a bias voltage or a bias current output from the bias terminal HB and inputs to the external terminals H− and H + for connecting the Hall elements are input. Comparator 12 having a terminal connected thereto and generating a rotation detection signal by comparing a pair of output voltages of the Hall element, an oscillation circuit (OSC) 13 generating an oscillation signal φ0 that is a source of an internal clock signal, and the comparator 12 And a digital PLL circuit that generates a signal for matching the number of rotations of the motor with the frequency of the internal clock by comparing the frequency & phase of the output signal of the output signal and the internal clock obtained by dividing the oscillation signal φ0 from the oscillation circuit 13 A logic unit 14 having various functions is provided. A frequency dividing circuit that divides the oscillation signal φ 0 of the oscillation circuit 13 is provided in the logic unit 14.

  The rotation speed signal output terminal FG is provided with an N-channel MOSFET (insulated gate field effect transistor: hereinafter referred to as MOS transistor) Q1 having a drain terminal connected to the rotation detection comparator 12 at the gate terminal of Q1. Is applied to output the rotation number signal to the outside in an open drain format. Specifically, a resistor R1 for current-voltage conversion is connected between the terminal FG and a power source. When Q1 is turned on and a current flows through the resistor R1, R1 converts it into a voltage. Thus, it can be output as a rotation speed signal to the CPU or the like. A comparator having a hysteresis is used as the comparator 12.

  Further, the motor driving IC 10 is connected to the output terminals Vo1 and Vo2 and outputs a signal including a pair of MOSFETs PMOS1, NMOS1 and PMOS2, NMOS2 for driving a motor coil by a push-pull method and outputting a current flow signal. A drive circuit 15 and a pair of predrive circuits 16a and 16b for generating gate drive signals of these MOS transistors based on signals output from the logic unit 14 are provided.

  Further, in the motor drive IC 10 of this embodiment, an input terminal is connected to one terminal H- of the Hall element connection external terminals H- and H + in order to enable a short-time test which is an object of the present invention. And a buffer 18 for transmitting the signal of the other terminal H + to the logic unit 14 by bypassing the rotation detection comparator 12.

  The mode discriminating comparator 17 compares, for example, a reference voltage Vref set higher than the upper limit value of the output voltage range of the Hall element 20 with the voltage of the Hall element connection external terminal H- When it is detected that the voltage is higher than the voltage that is not output from the Hall element in the normal operation state where the motor is driven to rotate, it is determined that the output is changed by determining the test mode. .

  The rotation detection comparator 12 is followed by a changeover switch SW1 for selectively transmitting the output of the rotation detection comparator 12 or the output of the buffer 18 to the logic unit 14, and the rotation detection comparator. A changeover switch SW2 for selectively transmitting 12 outputs or ground potential to the gate terminal of the MOS transistor Q1 is provided.

  By applying a ground potential to the gate terminal of the MOS transistor Q1 connected to the terminal FG by this switch SW2 to turn off Q1, a signal can be input to the terminal FG from the outside of the chip. Further, a changeover switch SW3 for selectively transmitting the signal input from the rotation speed signal output terminal FG or the oscillation signal of the oscillation circuit 13 to the logic unit 14 is provided inside the IC.

  Further, in this embodiment, a voltage V1 higher than the reference voltage Vref of the mode discrimination comparator 17 is applied to the Hall element connection terminal H− outside the chip of the motor driving IC 10 instead of the signal from the Hall element 20. The changeover switch SW4 that enables input to the connection terminal H5, the changeover switch SW5 that can input the clock φ1 from the off-chip clock generation circuit (CG1) 31 in place of the signal from the Hall element 20 to the connection terminal H +, and the rotation speed There is provided a changeover switch SW6 that allows the clock φ2 from the clock generation circuit (CG2) 32 to be input from the signal output terminal FG.

  Of the changeover switches, the switches SW4 to SW6 outside the chip are virtually shown for easy understanding of the changeover between the test mode and the normal operation mode. In the test performed before shipping), the Hall element 20, SW4, and SW5 are unnecessary.

  The frequency of the clock φ1 generated by the clock generation circuit (CG1) 31 is set to several k to several MHz, for example, and the frequency of the clock φ2 generated by the clock generation circuit (CG2) 32 is set to several hundred k to several hundred MHz, for example. The Incidentally, the frequency of the oscillation signal φ0 of the oscillation circuit 13 in the chip is, for example, several k to several hundred kHz.

  Further, the oscillation circuit 13 is configured such that when the power supply voltage (voltage applied to the power supply terminal VDD) is changed, the frequency of the oscillation signal is changed. Therefore, in the motor rotation control system using the motor driving IC 10 of the present embodiment, the microprocessor (CPU) as the system control device monitors the signal at the rotation speed signal output terminal FG and changes the power supply voltage. Thus, it is possible to control to change the rotation speed of the motor. For this reason, for example, in a fan motor drive control system, the CPU can detect the ambient temperature and increase the rotational speed when the temperature is high, and decrease the rotational speed when the temperature is low, thereby stabilizing the system. Operation is possible.

  Next, the operation in the test mode in the motor drive IC 10 of this embodiment will be described. When the IC is tested, the switches SW4 to SW6 are set to the state shown in FIG. 1, and the voltage V1 is applied to the terminal H + from the outside. Further, the clock φ2 is input from the clock generation circuit (CG2) 32 to the terminal FG.

  When the voltage V1 is applied to the terminal H + as described above, the mode discriminating comparator 17 discriminates that the test mode is set, and the switches SW1 to SW3 in the chip are brought into a state as shown in FIG. Switch. As a result, the clock φ1 input to the terminal H + is supplied to the logic unit 14 via the buffer 16, and the clock φ2 input to the terminal FG is supplied to the logic unit 14 via SW3.

  As a result, the logic unit 14 operates to generate and output a signal that matches the frequency of the clock φ1 with the frequency of the clock φ2. The frequency of the clock φ2 is set to 100 to 1000 times the oscillation frequency of the internal oscillation circuit 13. Therefore, the test time can be shortened by several tens to several hundreds times compared to the normal state in which the internal oscillation circuit 13 is operated and a signal from the Hall element 20 is input to the terminals H− and H + to operate the IC. It becomes like this.

In the test mode, while observing the output waveforms of the output terminals Vo1 and Vo2 with an oscilloscope or the like, the frequency of the clock φ1 and the clock φ2 is intentionally shifted to observe how the output reacts thereby. It can be determined whether the unit 14 performs a desired operation. Further, by observing the output, it can also be determined whether the frequency divider circuit in the logic unit 14 is operating normally. In the test mode, the oscillation circuit 13 in the chip stops the oscillation operation by the output of the comparator 17. Thereby, the influence on the test by the noise generated in the oscillation circuit 13 can be reduced.
(Modification)
FIG. 2 shows a first modification of the motor drive IC of the above embodiment. The motor driving IC of this modified example is an IC provided with a lock detection terminal LD for detecting and outputting when the motor rotation stops suddenly, by a clock generation circuit (CG2) 32. A terminal LD is used instead of the terminal FG for outputting a rotation speed signal as a terminal for inputting the generated clock φ2. An open drain MOS transistor Q1 is connected to this terminal LD, and a lock detect signal is applied to its gate terminal. In FIG. 2, the Hall element 20, the changeover switches SW4 and SW5, and the clock generation circuit 31 are not shown.

  Alternatively, the clock φ2 may be input using the HB terminal instead of the FG terminal and the LD terminal. Since the bias circuit 11 connected to the HB terminal has a low impedance viewed from the outside of the chip, it is difficult to input the clock φ2 as it is. However, when the test mode is set, the HB terminal changes to a high impedance. This is possible by providing a simple circuit.

  FIG. 3 shows a second modification of the motor drive IC of the above embodiment. In the motor driving IC of this modification, the oscillation circuit 13 is configured so that the oscillation frequency of the oscillation circuit 13 can be changed instead of inputting the clock φ2 having a frequency higher than the internal oscillation signal φ0 from the outside of the chip. When the comparator 17 determines that the test mode is set, the oscillation frequency of the oscillation circuit 13 is switched to the higher one by the output.

  Instead of switching the oscillation frequency of the oscillation circuit 13, the frequency division ratio of the frequency division circuit provided in the logic unit 14 is switched, or in a frequency division circuit composed of a plurality of frequency division stages, The short-time test may be performed by skipping the peripheral stages and transmitting a high-frequency clock to the PLL unit.

  As mentioned above, although one Embodiment of this invention was described, this invention is not limited to the said embodiment, A various change is possible. For example, in the above-described embodiment, the application to a single-phase motor driving IC suitable for rotational driving such as a fan motor has been described, but the present invention can also be applied to a driving IC for a motor that is AC-driven in three phases. it can. In the above-described embodiment, the clock φ1 is input from the H + terminal and the clock φ2 is input from the FG terminal.

  Furthermore, in the above-described embodiment, the motor driving IC configured to control the rotation speed by changing the oscillation frequency of the internal oscillation circuit by changing the power supply voltage has been described. It can be applied to a motor driving IC that controls the number of revolutions by changing the rotation speed.

  In the above description, the example in which the present invention is applied to a motor driving IC has been described. However, the present invention is not limited to this, and a terminal for inputting a detection signal of a sensor is provided and an oscillation circuit is relatively incorporated. The present invention can be widely used for semiconductor integrated circuits having an internal circuit that operates with a low-frequency clock signal.

It is a block diagram which shows one Embodiment of IC for motor drive to which this invention is applied. It is a block diagram which shows the 1st modification of motor IC for motor of embodiment of FIG. It is a block diagram which shows the 2nd modification of motor IC for motor of embodiment of FIG.

Explanation of symbols

10 Motor drive IC
DESCRIPTION OF SYMBOLS 11 Bias circuit 12 Rotation detection comparator 13 Oscillation circuit 14 Logic part 15 Output drive circuit 16a, 16b Pre-drive circuit 17 Mode discrimination comparator 18 Buffer 20 Hall element 31, 32 Clock generation circuit

Claims (8)

First and second external terminals to which the detection element is connected;
A rotation detection circuit for detecting rotation of the motor based on an input from the detection element;
An oscillation circuit that oscillates at a predetermined frequency;
A logic unit that generates a signal for controlling a motor drive output based on a rotation detection signal output from the rotation detection circuit and an oscillation signal output from the oscillation circuit;
A voltage comparison circuit that is connected to one of the first and second external terminals and detects whether the potential of the terminal is greater than or less than a predetermined voltage;
A semiconductor integrated circuit for driving a motor comprising:
When the voltage comparison circuit determines that the potential of the one external terminal is greater than or less than the predetermined voltage,
In place of the rotation detection signal output from the rotation detection circuit, the signal input to the other external terminal of the first and second external terminals is supplied to the logic unit, and
A motor-driving semiconductor integrated circuit configured to supply a signal having a frequency higher than an oscillation signal supplied from the oscillation circuit to the logic unit during normal operation. A third external terminal for outputting the information signal generated in the internal circuit to the outside;
When the voltage comparison circuit determines that the potential of the one external terminal is greater than or less than the predetermined voltage,
In place of the rotation detection signal output from the rotation detection circuit, the signal input to the other external terminal of the first and second external terminals is supplied to the logic unit, and
The configuration is such that a signal having a frequency higher than that of the oscillation signal input to the third external terminal is supplied to the logic unit instead of the oscillation signal generated by the oscillation circuit. Item 6. A motor integrated semiconductor integrated circuit according to Item 1.   3. The motor-driving semiconductor integrated circuit according to claim 2, wherein an oscillation operation of the oscillation circuit is stopped when a signal input to the third external terminal is supplied to the logic unit.   An open drain MOS transistor is connected to the third external terminal, and a signal output from the rotation detection circuit is applied to the gate terminal of the MOS transistor, replacing the oscillation signal generated by the oscillation circuit. 4. The device according to claim 2, wherein the MOS transistor is turned off when a signal input to the third external terminal is supplied to the logic unit. 5. Semiconductor integrated circuit for motor drive.   5. The semiconductor integrated circuit for driving a motor according to claim 4, wherein the third external terminal is a terminal for outputting an information signal indicating the number of rotations detected by the rotation detection circuit.   6. The motor-driving semiconductor integrated circuit according to claim 1, wherein the oscillation circuit is configured such that an oscillation frequency is variable in accordance with a level of a supplied power supply voltage.   The oscillation circuit is configured so that the oscillation frequency can be switched to a frequency 10 times higher than that during normal operation, and the voltage comparison circuit has determined that the potential of the one external terminal is greater than or less than the predetermined voltage. 2. The motor driving semiconductor integrated circuit according to claim 1, wherein an oscillation frequency of the oscillation circuit is higher than that in a normal operation. First and second external terminals to which the detection element is connected;
A third external terminal for outputting an information signal generated by the internal circuit to the outside; a rotation detection circuit for detecting rotation of the motor based on an input from the detection element;
An oscillation circuit that oscillates at a predetermined frequency;
A logic unit that generates a signal for controlling a motor drive output based on a rotation detection signal output from the rotation detection circuit and an oscillation signal output from the oscillation circuit;
A voltage comparison circuit which is connected to one of the first and second external terminals and detects whether the potential of the terminal is outside the range of the voltage input from the detection element;
When the voltage comparison circuit determines that the potential of the one external terminal is outside the range of the voltage input from the detection element,
A first switching means capable of supplying a signal input to the other external terminal of the first and second external terminals instead of the rotation detection signal output from the rotation detection circuit;
A second switching means capable of supplying a signal input to the third external terminal instead of the oscillation signal output from the oscillation circuit to the logic unit;
A method for testing a semiconductor integrated circuit for driving a motor comprising:
A predetermined voltage outside the range of the voltage input from the detection element is applied to the one external terminal, and a first clock signal having a frequency higher than the rotational frequency of the motor to be driven is input to the other external terminal. However, a method for testing a semiconductor integrated circuit for driving a motor, wherein a second clock signal having a frequency higher than that of the first clock signal is input to the third external terminal.

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