JP2010062460A - Nitride semiconductor light emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a nitride semiconductor light emitting element that is reducible in driving voltage by excellently supplying a tunneling current. <P>SOLUTION: A nitride semiconductor light emitting element has a nitride semiconductor layer, a p-type nitride semiconductor layer, and an active layer laminated in order on an n-type nitride semiconductor layer. Further, a nitride semiconductor light emitting element has a nitride semiconductor layer having a polar plane at least partially, a p-type nitride semiconductor layer, and an active layer laminated in order on an n-type nitride semiconductor layer. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a nitride semiconductor light emitting device, and more particularly to a nitride semiconductor light emitting device capable of reducing a driving voltage by allowing a tunnel current to flow satisfactorily.

  For example, Non-Patent Document 1 and the like disclose a nitride semiconductor light emitting diode element using a tunnel junction as an example of a nitride semiconductor light emitting element using a nitride semiconductor.

  FIG. 11 is a schematic cross-sectional view of a nitride semiconductor light-emitting diode element using a conventional tunnel junction described in Non-Patent Document 1. In this nitride semiconductor light emitting diode element, on a sapphire substrate 1101, a GaN buffer layer 1102, a Si-doped n-type GaN layer 1103 (layer thickness: 3 μm), an InGaN layer (layer thickness: 2 nm), and a GaN layer (layer thickness: 8 nm) and an active layer 1104 having an MQW made of a laminate in which six periods are alternately laminated, an Mg-doped p-type GaN layer 1105 (layer thickness: 50 nm), an Mg-highly doped p + -type GaN layer 1106 (layer thickness: 10 nm) ), A Si-doped n + -type GaN layer 1107 (layer thickness: 10 nm) and a Si-doped n-type GaN layer 1108 (layer thickness: 200 nm) are sequentially stacked on the Si-doped n-type GaN layer 1103. The first n-electrode 1109 is formed on the Si-doped n-type GaN layer 1108, and the second n-electrode 1110 is formed on the Si-doped n-type GaN layer 1108. A tunnel junction is formed by a pn junction between the Mg highly doped p + -type GaN layer 1106 and the Si highly doped n + -type GaN layer 1107.

In the nitride semiconductor light-emitting diode device using such a tunnel junction, the current is spread in the plane in the Si-doped n-type GaN layer 1108, and the Mg-highly doped p + -type GaN layer 1106, the Si-highly doped n + -type GaN layer 1107, A current is passed between the Mg-doped p-type GaN layer 1105 and the Si-doped n-type GaN layer 1108 using this tunnel junction.
Seong-Ran Jeon et al., “GaN-Based Light-Emitting Diodes Using Tunnel Junctions”, IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL.8, NO.4, JULY / AUGUST 2002, pp.739-743

In the nitride semiconductor light-emitting diode device having the configuration shown in FIG. 11, the Si-doped n-type GaN layer 1108 can be relatively easily manufactured because it can be doped with n-type impurities up to a carrier density of about 3 × 10 ¹⁹ cm ^−3. Can do.

  However, it is difficult to achieve a high Mg doping concentration for the Mg highly doped p + -type GaN layer 1106 forming the tunnel junction, and as the Mg doping amount increases, the crystallinity of the Mg highly doped p + -type GaN layer 1106 deteriorates. There were problems such as surface roughening and conversely high resistance.

  Therefore, in the conventional nitride semiconductor light emitting diode device shown in FIG. 11, the Mg highly doped p + -type GaN layer 1106 with good crystallinity cannot be formed, so the Mg highly doped p + -type GaN layer 1106 and the Si highly doped n There is a problem that the depletion layer spreads to about 40 nm at the interface with the + -type GaN layer 1107, tunnel current does not flow well, and resistance is increased.

  In view of the above circumstances, an object of the present invention is to provide a nitride semiconductor light emitting device capable of reducing a driving voltage by allowing a tunnel current to flow satisfactorily.

  The present invention is a nitride semiconductor light emitting device in which a nitride semiconductor layer, a p-type nitride semiconductor layer, and an active layer are sequentially stacked on an n-type nitride semiconductor layer.

  In addition, the present invention is a nitride semiconductor light emitting device in which a nitride semiconductor layer having a polar surface at least partially, a p-type nitride semiconductor layer, and an active layer are sequentially stacked on an n-type nitride semiconductor layer. .

  In the nitride semiconductor light emitting device of the present invention, the nitride semiconductor layer preferably contains aluminum.

In the nitride semiconductor light emitting device of the present invention, the nitride semiconductor layer is preferably Al _x Ga _1-x N (0 <x ≦ 1).

  In the nitride semiconductor light emitting device of the present invention, the second n-type nitride semiconductor layer is stacked on the active layer, the first electrode in contact with the n-type nitride semiconductor layer is an anode electrode, The second electrode in contact with the n-type nitride semiconductor layer 2 is preferably a cathode electrode.

  In the nitride semiconductor light emitting device of the present invention, the thickness of the nitride semiconductor layer is preferably 0.5 nm or more and 30 nm or less.

  In the nitride semiconductor light emitting device of the present invention, the active layer has a well layer made of a group III nitride semiconductor containing In, and the In composition ratio in the well layer is 0.15 or more and 0.4 or less. Preferably there is.

  In the nitride semiconductor light emitting device of the present invention, the active layer has a well layer made of a group III nitride semiconductor containing In, and the In composition ratio in the well layer is 0.2 or more and 0.4 or less. Preferably there is.

  In the present invention, the In composition ratio is the ratio of the number of In atoms to the total number of group III element atoms constituting the group III nitride semiconductor ((In atom number) / (total number of group III element atoms)). ).

  ADVANTAGE OF THE INVENTION According to this invention, the nitride semiconductor light-emitting device which can reduce a drive voltage by sending a tunnel current favorably can be provided.

  Embodiments of the present invention will be described below. In the drawings of the present invention, the same reference numerals represent the same or corresponding parts. In addition, when expressing the crystal plane and direction, it should be expressed by adding a bar on the required number. However, because there are restrictions on the expression means, the required number is used in this specification. Instead of the expression with a bar on top, the symbol “-” is added in front of the required number.

FIG. 1 shows a schematic cross-sectional view of an example of the nitride semiconductor light emitting device of the present invention. Here, the nitride semiconductor light emitting device having the configuration shown in FIG. 1 includes a substrate 101, a first n-type nitride semiconductor layer 102 formed on the substrate 101, and a first n-type nitride semiconductor layer 102. A nitride semiconductor layer 103 made of a nitride semiconductor crystal represented by the formula of Al _x Ga _1-x N (0 <x ≦ 1), and a p-type nitride formed on the nitride semiconductor layer 103 A semiconductor layer 104 and an active layer 105 formed on the p-type nitride semiconductor layer 104 are included.

  A first n electrode 107 is formed on the surface of the first n-type nitride semiconductor layer 102. A second n-type nitride semiconductor layer 106 is formed on the active layer 105, and a second n-electrode 108 is formed on the second n-type nitride semiconductor layer 106.

  Here, the first n-electrode 107 is an anode electrode, and a positive bias voltage is applied from the outside. Further, the second electrode 108 is a cathode electrode, and a negative bias voltage is applied from the outside. Thus, by applying a bias voltage to the nitride semiconductor light emitting device, a forward bias voltage is applied to the pn junction including the p-type nitride semiconductor layer 104 and the second n-type nitride semiconductor layer 106 on both sides of the active layer 105. Is applied to emit light. However, at this time, when a pn junction is formed by directly joining the first n-type nitride semiconductor layer 102 and the p-type nitride semiconductor layer 104, a reverse bias voltage is applied to the pn junction. For this reason, it is difficult for current to flow. However, the nitride semiconductor layer 103, which will be described in detail below, is provided between the first n-type nitride semiconductor layer 102 and the p-type nitride semiconductor layer 104, thereby efficiently A current can be passed through the pn junction.

Here, a hexagonal crystal substrate such as a sapphire substrate, a nitride semiconductor substrate, or a silicon carbide substrate is used as the substrate 101, and the first n-type is formed on the C-plane ({0001} plane) of the substrate 101, for example. When the nitride semiconductor layer 102, the nitride semiconductor layer 103, and the p-type nitride semiconductor layer 104 are sequentially epitaxially grown by, for example, the MOCVD (Metal Organic Chemical Vapor Deposition) method, Al _x Ga _1-x N (0 < The surface of the nitride semiconductor layer 103 made of a nitride semiconductor crystal represented by the formula x ≦ 1) is a C plane.

Further, the nitride semiconductor layer 103 made of a nitride semiconductor crystal represented by the formula of Al _x Ga _1-x N (0 <x ≦ 1) having such a C plane has a lattice caused by, for example, lattice mismatch. When strain occurs, spontaneous polarization due to a piezoelectric field occurs in the nitride semiconductor layer 103, and the spontaneous polarization direction is along the C-axis direction. Therefore, the C-plane of the nitride semiconductor layer 103 is on the + C-axis side and −C-axis side. Since the nitride semiconductor layer 103 exhibits different properties on the shaft side, the nitride semiconductor layer 103 has a polar surface at the interface with other layers. In the configuration illustrated in FIG. 1, the interface with other layers is the interface between the first n-type nitride semiconductor layer 102 and the nitride semiconductor layer 103, and the nitride semiconductor layer 103 and the p-type nitride semiconductor. This is an interface with the layer 104.

  As described above, when the nitride semiconductor layer 103 has a polar surface, the energy band of the nitride semiconductor layer 103 is bent, and the gap between the first n-type nitride semiconductor layer 102 and the p-type nitride semiconductor layer 104 is changed. Since the width of the depletion layer can be reduced, the tunnel current easily flows, and the driving voltage of the nitride semiconductor light emitting device is reduced as compared with the device using the conventional tunnel junction having the configuration shown in FIG. can do.

Further, for example, a hexagonal crystal substrate is used as the substrate 101, and the first n-type nitridation is performed on a semipolar plane such as an R plane ({1-102} plane) or {11-22} plane of the substrate 101, for example. The semiconductor semiconductor layer 102, the nitride semiconductor layer 103, and the p-type nitride semiconductor layer 104 can also be epitaxially grown sequentially by, for example, the MOCVD method. In this case, the surface of the nitride semiconductor layer 103 made of the nitride semiconductor crystal represented by the formula of Al _x Ga _1-x N (0 <x ≦ 1) is an R plane ({1-102} plane) or { It becomes a semipolar plane such as an 11-22} plane.

Thus, a nitride represented by the formula Al _x Ga _1-x N (0 <x ≦ 1) having a semipolar plane such as an R plane ({1-102} plane) or {11-22} plane on the surface. Even when a lattice strain is generated in the nitride semiconductor layer 103 made of a semiconductor crystal due to, for example, lattice mismatch, spontaneous polarization due to a piezoelectric field is generated in the nitride semiconductor layer 103, and both sides of the nitride semiconductor layer 103 are formed. In this case, the nitride semiconductor layer 103 also has a polar surface.

Therefore, even when the surface of the nitride semiconductor layer 103 made of the nitride semiconductor crystal represented by the formula of Al _x Ga _1-x N (0 <x ≦ 1) is a semipolar plane, the nitride semiconductor layer 103 Since the energy band is bent and the width of the depletion layer between the first n-type nitride semiconductor layer 102 and the p-type nitride semiconductor layer 104 can be narrowed, a tunnel current easily flows. The driving voltage of the nitride semiconductor light emitting device can be reduced as compared with the conventional device using the tunnel junction having the configuration as shown in FIG.

  In addition, the nitride semiconductor layer 103 may have a polar surface having a predetermined off angle from the C plane or a polar surface having a predetermined off angle from the R plane. In addition, as a polar surface which has a predetermined off angle from said C surface, the surface which has the inclination of 0 degree or more and less than 45 degrees with respect to C surface is mentioned, for example. Moreover, as a polar surface which has a predetermined off angle from said R surface, the surface which has the inclination of 0 degree or more and less than 45 degrees with respect to R surface is mentioned, for example.

  The nitride semiconductor layer 103 may have a polar surface having a predetermined off angle from the m-plane which is a nonpolar surface or a polar surface having a predetermined off angle from the A surface which is a nonpolar surface. In addition, as a polar surface which has a predetermined off angle from said m surface, the surface which has the inclination larger than 0 degree and less than 45 degrees with respect to m surface is mentioned, for example. Moreover, as a polar surface which has a predetermined off angle from said A surface, the surface which has an inclination larger than 0 degree and less than 45 degrees with respect to A surface is mentioned, for example.

  FIG. 2 is a schematic cross-sectional view of another example of the nitride semiconductor light emitting device of the present invention. Here, the nitride semiconductor light emitting device having the configuration shown in FIG. 2 uses a conductive hexagonal n-type nitride semiconductor substrate 201 and a first n-electrode 107 is formed on the back surface of the n-type nitride semiconductor substrate 201. Thus, the nitride semiconductor light emitting device having the upper and lower electrode structures is characteristic.

That is, the nitride semiconductor light emitting device having the configuration shown in FIG. 2 includes an n-type nitride semiconductor substrate 201 and Al _x Ga _1-x N (0 <x ≦ 1) formed on the n-type nitride semiconductor substrate 201. Nitride semiconductor layer 103 made of a nitride semiconductor crystal represented by the formula: p-type nitride semiconductor layer 104 formed on nitride semiconductor layer 103, and an activity formed on p-type nitride semiconductor layer 104 A first n-electrode 107 is formed on the back surface of the n-type nitride semiconductor substrate 201, and a second n-type nitride semiconductor layer 106 formed on the active layer 105. A second n electrode 108 is formed on the second n-type nitride semiconductor layer 106.

Also in the nitride semiconductor light emitting device having the configuration shown in FIG. 2, for example, the nitride semiconductor layer 103 and the p-type nitride semiconductor layer 104 are formed on the C-plane ({0001} plane) of the n-type nitride semiconductor substrate 201 by, for example, the MOCVD method. When the layers are formed by epitaxial growth sequentially, etc., the surface of the nitride semiconductor layer 103 made of a nitride semiconductor crystal represented by the formula of Al _x Ga _1-x N (0 <x ≦ 1) is a C plane.

Therefore, the nitride semiconductor layer 103 made of the nitride semiconductor crystal represented by the formula of Al _x Ga _1-x N (0 <x ≦ 1) having such a C plane has a lattice caused by, for example, lattice mismatch. When distortion occurs, the nitride semiconductor layer 103 has a polar surface for the same reason as described above.

  In the nitride semiconductor layer 103 having a polar surface, the energy band is bent, and the width of the depletion layer between the n-type nitride semiconductor substrate 201 and the p-type nitride semiconductor layer 104 can be reduced. A tunnel current easily flows. Therefore, also in the nitride semiconductor light emitting device having the configuration shown in FIG. 2, the driving voltage of the nitride semiconductor light emitting device can be reduced as compared with the device using the conventional tunnel junction having the configuration shown in FIG. it can.

Further, the nitride semiconductor layer 103 and the p-type nitride semiconductor layer 104 are formed on a semipolar surface such as the R-plane ({1-102} plane) or {11-22} plane of the n-type nitride semiconductor substrate 201, for example. Sequential epitaxial growth can also be performed by MOCVD or the like. In this case, a nitride semiconductor layer made of a nitride semiconductor crystal represented by the formula of Al _x Ga _1-x N (0 <x ≦ 1) is used as described above. The surface of 103 is a semipolar plane such as an R plane ({1-102} plane) or a {11-22} plane.

As described above, the nitride semiconductor layer 103 made of the nitride semiconductor crystal represented by the formula of Al _x Ga _1-x N (0 <x ≦ 1) having a semipolar surface is caused by, for example, lattice mismatching. When lattice strain occurs, spontaneous polarization due to a piezoelectric field occurs in the nitride semiconductor layer 103, and thus the semipolar planes on both surfaces of the nitride semiconductor layer 103 exhibit different properties, and the nitride semiconductor layer 103 has a polar surface. When the nitride semiconductor layer 103 has a polar plane, the nitride semiconductor layer 103 is bent in an energy band, and a depletion layer between the n-type nitride semiconductor substrate 201 and the p-type nitride semiconductor layer 104 is formed. As a result, the tunnel current can easily flow. Therefore, also in this case, the driving voltage of the nitride semiconductor light emitting device can be reduced as compared with the device using the conventional tunnel junction having the configuration shown in FIG.

In the present invention, as the substrate 101, a substrate made of a hexagonal semiconductor crystal such as a sapphire substrate, a nitride semiconductor substrate, or a silicon carbide substrate can be used as described above. In particular, when a nitride semiconductor substrate is used as the substrate 101, the lattice constant difference from the nitride semiconductor layer formed on the substrate 101 is small, so that a nitride semiconductor layer with good crystallinity can be obtained. Because. As the nitride semiconductor substrate, for example, a group III nitride represented by the formula Al _x0 Ga _y0 In _z0 N (0 ≦ x0 ≦ 1, 0 ≦ y0 ≦ 1, 0 ≦ z0 ≦ 1, x0 + y0 + z0 = 1) is used. A substrate made of a semiconductor crystal can be used.

In the present invention, as the n-type nitride semiconductor substrate 201, for example, the above Al _x0 In _y0 Ga _z0 N (0 ≦ x0 ≦ 1, 0 ≦ y0 ≦ 1, 0 ≦ z0 ≦ 1, x0 + y0 + z0 = 1) A substrate formed by doping a group III nitride semiconductor crystal represented by the formula with an n-type impurity can be used.

  In the above formula, Al represents aluminum, In represents indium, Ga represents gallium, x0 represents the Al composition ratio, y0 represents the In composition ratio, and z0 represents the Ga composition ratio. As the n-type impurity, for example, silicon and / or germanium can be used.

  Further, the substrate 101 made of the nitride semiconductor substrate and the n-type nitride semiconductor substrate 201 each contain about 10 atomic% or less of nitrogen atoms within the range in which hexagonal crystals are maintained, as (arsenic) and P (phosphorus). Alternatively, it may be substituted with an atom such as Sb (antimony).

As the first n-type nitride semiconductor layer 102, a conventionally known n-type nitride semiconductor can be used, for example, Al _x1 In _{y1 Gaz1} N (0 ≦ x1 ≦ 1, 0 ≦ y1). ≦ 1, 0 ≦ z1 ≦ 1, x1 + y1 + z1 = 1) A single layer or a plurality of layers formed by doping a group III nitride semiconductor crystal with an n-type impurity can be used. In the above formula, Al represents aluminum, In represents indium, Ga represents gallium, x1 represents an Al composition ratio, y1 represents an In composition ratio, and z1 represents a Ga composition ratio. As the n-type impurity, for example, silicon and / or germanium can be used. From the viewpoint of imparting a polar surface to the nitride semiconductor layer 103, it is preferable to use a material different from that of the nitride semiconductor layer 103 as the first n-type nitride semiconductor layer 102.

  In addition, a buffer layer and a thin undoped layer are provided between the first n-type nitride semiconductor layer 102 and the substrate 101 and between the first n-type nitride semiconductor layer 102 and the n-type nitride semiconductor substrate 201, respectively. One or more other layers such as (for example, an undoped layer having a thickness of 0.5 μm or less) may or may not be included.

As described above, the nitride semiconductor layer 103 is a group III nitride semiconductor crystal represented by the formula of Al _x Ga _1-x N (0 <x ≦ 1) and having a polar face. Here, Al represents aluminum, Ga represents gallium, x represents an Al composition ratio, and (1-x) represents a Ga composition ratio. The nitride semiconductor layer 103 may be n-type, p-type, or undoped.

  The thickness t of the nitride semiconductor layer 103 is preferably not less than 0.5 nm and not more than 30 nm. When the thickness t of the nitride semiconductor layer 103 is 0.5 nm or more, the tendency that the nitride semiconductor layer 103 can be made to be a layer having a uniform thickness in the plane increases, and when the thickness t is 30 nm or less. Tends to not deteriorate the crystallinity of the nitride semiconductor layer 103 due to generation of cracks due to lattice strain in the nitride semiconductor layer 103.

  Further, one or more other layers may be included between the nitride semiconductor layer 103 and the first n-type nitride semiconductor layer 102, but from the viewpoint of reducing the width of the depletion layer, the nitride layer The metal semiconductor layer 103 and the first n-type nitride semiconductor layer 102 are preferably in contact with each other.

As the p-type nitride semiconductor layer 104, for example, a conventionally known p-type nitride semiconductor can be used. For example, Al _x2 In _y2 Ga _z2 N (0 ≦ x2 ≦ 1, 0 ≦ y2 ≦ 1, A single layer or a plurality of layers formed by doping a group III nitride semiconductor crystal represented by the formula of 0 ≦ z2 ≦ 1, x2 + y2 + z2 = 1) with a p-type impurity can be used. In the above formula, Al represents aluminum, In represents indium, Ga represents gallium, x2 represents an Al composition ratio, y2 represents an In composition ratio, and z2 represents a Ga composition ratio. Moreover, as a p-type impurity, magnesium and / or zinc etc. can be used, for example. From the viewpoint of providing the nitride semiconductor layer 103 with a polar surface, it is preferable to use a material different from that of the nitride semiconductor layer 103 as the p-type nitride semiconductor layer 104.

  One or more other layers may be included between the p-type nitride semiconductor layer 104 and the nitride semiconductor layer 103. From the viewpoint of reducing the width of the depletion layer, the p-type nitride is also included. The semiconductor layer 104 and the nitride semiconductor layer 103 are preferably in contact with each other.

As the active layer 105, for example, a conventionally known nitride semiconductor can be used. For example, Al _x3 In _{y3 Gaz3} N (0 ≦ x3 ≦ 1, 0 ≦ y3 ≦ 1, 0 ≦ z3 ≦ 1, x3 + y3 + z3 = 1) An undoped group III nitride semiconductor crystal represented by the formula or a group formed by doping at least one of a p-type impurity and an n-type impurity into a group III nitride semiconductor crystal represented by this formula A layer or a plurality of layers can be used. In the above formula, Al represents aluminum, In represents indium, Ga represents gallium, x3 represents an Al composition ratio, y3 represents an In composition ratio, and z3 represents a Ga composition ratio. The active layer 105 may have a conventionally known single quantum well (SQW) structure or multiple quantum well (MQW) structure.

  One or more other layers may or may not be included between the active layer 105 and the p-type nitride semiconductor layer 104.

As the second n-type nitride semiconductor layer 106, a conventionally known n-type nitride semiconductor can be used, for example, Al _x4 In _{y4 Gaz4} N (0 ≦ x4 ≦ 1, 0 ≦ y4). ≦ 1, 0 ≦ z4 ≦ 1, x4 + y4 + z4 = 1) A single layer or a plurality of layers formed by doping a group III nitride semiconductor crystal with an n-type impurity can be used. In the above formula, Al represents aluminum, In represents indium, Ga represents gallium, x4 represents the Al composition ratio, y4 represents the In composition ratio, and z4 represents the Ga composition ratio. As the n-type impurity, for example, silicon and / or germanium can be used.

  In addition, one or more other layers may or may not be included between the second n-type nitride semiconductor layer 106 and the active layer 105.

  Further, as the first n-electrode 107, for example, a conventionally known metal that can make ohmic contact with the first n-type nitride semiconductor layer 102 can be used. In addition, as the second n-electrode 108, for example, a conventionally known metal that can make ohmic contact with the second n-type nitride semiconductor layer 106 can be used. The first n-electrode 107 and the second n-electrode 108 may be made of the same metal or different metals.

  In the nitride semiconductor light emitting device having the configuration shown in FIG. 1 and FIG. 2, the second n-type nitride semiconductor layer 106 is formed after the active layer 105 is formed. Even when the oxide semiconductor layer 106 is formed, since the second n-type nitride semiconductor layer 106 is an n-type nitride semiconductor layer, the second n-type nitride semiconductor layer 106 has high resistance and remarkable crystallinity. Deterioration can be suppressed. In addition, since the second n-type nitride semiconductor layer 106 can be formed at a low temperature, thermal damage to the active layer 105 can be reduced.

It is known that a group III nitride semiconductor crystal containing In has a considerably lower decomposition temperature than a group III nitride semiconductor crystal containing no In. For example, In-free nitride semiconductor crystals such as GaN, AlN and mixed crystals thereof are relatively stable at a high temperature of about 1000 ° C., while InN decomposes even at a low temperature of about 600 to 700 ° C. Therefore, for example, a group III nitride semiconductor crystal containing In represented by the formula In _y Ga _1-y N depends on the In composition ratio y, but generally the crystallinity deteriorates at temperatures exceeding 1000 ° C. . Further, when light in a long wavelength region such as green light or red light is emitted, the In composition ratio y of the group III nitride semiconductor crystal containing In represented by the formula In _y Ga _1-y N is set to 0.15. Although it is necessary to make the composition as high as about 0.4, in such a case, the tendency of the crystallinity to deteriorate with respect to the temperature of the nitride semiconductor crystal containing In is further increased.

  In the conventional nitride semiconductor light emitting device having the configuration shown in FIG. 11, after forming an active layer 1104 containing InGaN at a low temperature of about 600 ° C. to 800 ° C., for example, a p-type nitride such as an Mg-doped p-type GaN layer 1105 or the like. It is necessary to form the semiconductor layer at a high temperature exceeding 1000 ° C.

  In the conventional nitride semiconductor light emitting device having the structure shown in FIG. 11, the thermal damage due to the temperature rise during the formation of the p-type nitride semiconductor layer such as the Mg-doped p-type GaN layer 1105 at a high temperature and the temperature at the time of the formation. Since the active layer 1104 receives the crystal, the crystallinity of the active layer 1104 is significantly deteriorated. On the other hand, when the In composition ratio of InGaN constituting the active layer 1104 is 0.15 or more, particularly 0.2 or more, a p-type nitride semiconductor layer such as the Mg-doped p-type GaN layer 1105 is formed at a low temperature. Although necessary, the resistance of the p-type nitride semiconductor layer is increased and the crystallinity is deteriorated, and the drive voltage is increased.

  However, in the nitride semiconductor light emitting device having the configuration shown in FIGS. 1 and 2, the second n-type nitride semiconductor layer 106 is formed after forming the active layer 105, and it is necessary to form the p-type nitride semiconductor layer. Therefore, for example, when the active layer 105 has a group III nitride semiconductor layer containing In, in the configuration in which the In composition ratio is 0.15 or more, particularly in the configuration in which the In composition ratio is 0.2 or more, A configuration in which the second n-type nitride semiconductor layer 106 is formed after the active layer 105 is formed and no p-type nitride semiconductor layer is formed as shown in FIGS. 1 and 2 is considered effective. In the present invention, the upper limit of the In composition ratio of the active layer 105 is not particularly limited. However, if the In composition ratio of the active layer 105 exceeds 0.4, the light emission efficiency may be reduced. The In composition ratio is preferably 0.4 or less.

  In the above description, the structure of the nitride semiconductor light emitting diode element has been mainly described as the nitride semiconductor light emitting element of the present invention. However, it goes without saying that the above structure can be applied to a nitride semiconductor laser element or the like.

<Example 1>
FIG. 3 is a schematic cross-sectional view of the nitride semiconductor light-emitting diode element of Example 1 which is an example of the nitride semiconductor light-emitting element of the present invention. Here, the nitride semiconductor light-emitting diode device of Example 1 has a first n-type GaN layer 302 having a thickness of 5 μm, an AlN intermediate layer 303 having a thickness of 2.5 nm, a thickness on a sapphire substrate 301 having a thickness of 400 μm. P-type GaN layer 304 having a thickness of 0.3 μm, p-type Al _0.1 Ga _0.9 N carrier blocking layer 309 having a thickness of 10 nm, multi-quantum well active layer 305 having a thickness of 0.168 μm, and a second n having a thickness of 0.3 μm. The first n-type GaN layer 306 is stacked in this order. A first n-electrode 307 is formed on the first n-type GaN layer 302, and a second n-type GaN layer 306 is formed on the second n-type GaN layer 306. N electrode 308 is formed.

Here, the multiple quantum well active layer 305 has a 60 nm thick non-doped GaN layer, a 8 nm thick non-doped In _0.02 Ga _0.98 N barrier layer, and a 4 nm thick layer from the p-type Al _0.1 Ga _0.9 N carrier blocking layer 309 side. It has a configuration in which a non-doped In _0.2 Ga _0.8 N well layer is alternately stacked in four cycles and a non-doped GaN layer having a thickness of 60 nm is stacked in this order.

  The first n-electrode 307 is formed so as to be in contact with the first n-type GaN layer 302. From the first n-type GaN layer 302 side, a hafnium film (thickness 30 nm), an aluminum film ( A thickness of 200 nm), a molybdenum film (thickness of 30 nm), a platinum film (thickness of 50 nm), and a gold film (thickness of 200 nm) are stacked in this order.

The second n-electrode 308 has the same structure as the first n-electrode 307.
The nitride semiconductor light emitting diode element of Example 1 having the above-described configuration is manufactured as follows.

First, the first n-type GaN layer 302 and the AlN intermediate layer 303 are formed on the (0001) plane, which is the C plane of the sapphire substrate 301 having a diameter of 2 inches and having a thickness of 400 μm, by using an MOCVD deposition apparatus. The p-type GaN layer 304, the p-type Al _0.1 Ga _0.9 N carrier block layer 309, the multiple quantum well active layer 305, and the second n-type GaN layer 306 are epitaxially grown in this order by the MOCVD method. Here, ammonia is used as the nitrogen source, TMG (trimethylgallium) is used as the gallium source, TMI (trimethylindium) is used as the indium source, TMA (trimethylaluminum) is used as the aluminum source, and p-type impurities. Cp2Mg (biscyclopentadienyl magnesium) is used as the magnesium source, and silane is used as the silicon source of the n-type impurity.

The carrier density of the first n-type GaN layer 302 and the second n-type GaN layer 306 is about 1 × 10 ¹⁸ cm ⁻³ . The carrier density of the p-type GaN layer 304 is about 4 × 10 ¹⁷ cm ⁻³ . The AlN intermediate layer 303 is not intentionally doped with p-type impurities and n-type impurities.

The first n-type GaN layer 302 is formed with the temperature of the sapphire substrate 301 being 1125 ° C., and the AlN intermediate layer 303, the p-type GaN layer 304, and the p-type Al _0.1 Ga _0.9 N carrier block layer 309 are also continued. The temperature of 301 is formed at 1125 ° C.

  Then, the temperature of the sapphire substrate 301 is lowered to 750 ° C. to form the multiple quantum well active layer 305, and the temperature of the sapphire substrate 301 is raised to 850 ° C. to form the second n-type GaN layer 306. Thereafter, the temperature of the sapphire substrate 301 is lowered to room temperature.

  As described above, even when the second n-type GaN layer 306 is formed after the multiple quantum well active layer 305 is formed and the temperature of the sapphire substrate 301 is lowered to about 850 ° C., the second n-type GaN layer 306 is Since the n-type nitride semiconductor layer is used, the second n-type GaN layer 306 can be prevented from having high resistance and significant deterioration in crystallinity. In addition, since the second n-type GaN layer 306 can be formed at a lower temperature than the conventional configuration shown in FIG. 11 in which a p-type nitride semiconductor layer is formed on the multiple quantum well active layer 305, multiple Thermal damage to the quantum well active layer 305 can be reduced.

  Thereafter, a second n-electrode 308 is formed on the second n-type GaN layer 306 by EB (Electron Beam) evaporation. Here, the patterning of the second n-electrode 308 is performed as follows. First, after forming a photoresist on the entire surface of the second n-type GaN layer 306, an opening is formed in the shape of the second n-electrode 308 in the photoresist using a general photolithography technique and an etching technique. . Then, a second n electrode 308 is formed by EB vapor deposition so as to cover the entire surface of the photoresist, and then the photoresist is removed by lift-off, whereby the second n electrode 308 patterned into a predetermined shape is formed. Is formed on the second n-type GaN layer 306.

  Next, a gas phase etching mask is formed on the second n-type GaN layer 306, and the first n-type GaN layer 302 is halfway in the thickness direction using an ICP (Inductively Coupled Plasma) etching method. Etching is performed.

  Next, the first n-electrode 307 is formed on the exposed surface of the first n-type GaN layer 302 using EB vapor deposition and sputtering. Here, the patterning of the first n-electrode 307 is performed in the same manner as the patterning of the second n-electrode 308.

  Next, the thickness of the sapphire substrate 301 after the formation of the first n-electrode 307 is reduced to about 100 μm by general grinding and polishing, and then scribed with a diamond needle to form a square shape having a side of 350 μm. The nitride semiconductor light-emitting diode element of Example 1 is obtained by dividing into chips having a surface.

  Note that the p-type nitride semiconductor layer doped with magnesium does not exhibit p-type conductivity unless it is formed at a high temperature of 1000 ° C. or higher, but the n-type nitride semiconductor layer doped with silicon has a low temperature of less than 1000 ° C. Even so, it exhibits n-type electrical conduction. Therefore, the second n-type GaN layer 306 can be formed by optimizing the formation conditions even at a low temperature of about 800 ° C.

  In the nitride semiconductor light emitting diode device of Example 1, a positive voltage is applied to the first n-electrode 307 and a negative voltage is applied to the second n-electrode 308, so that the first n-electrode 307 is positive. The second n-electrode 308 becomes a negative electrode (cathode electrode). Thus, light is emitted from the multiple quantum well active layer 305 by applying a voltage to the nitride semiconductor light-emitting diode device of Example 1.

On the other hand, as a comparative example, a nitride semiconductor light-emitting diode element having the configuration shown in the schematic cross-sectional view of FIG. 7 is manufactured. Here, in the nitride semiconductor light emitting diode device of the comparative example, instead of the AlN intermediate layer 303, as shown in the schematic cross-sectional view of FIG. 9, the upper portion of the first n-type GaN layer 302 has a thickness of 10 nm. A highly doped silicon layer 701 having a carrier density of 3.4 × 10 ¹⁹ cm ⁻³ and a magnesium heavily doped layer having a thickness of 10 nm and a carrier density of 3 × 10 ¹⁸ cm ⁻³ below the p-type GaN layer 304. 702 has the same configuration as that of the nitride semiconductor light emitting diode element of Example 1 except that a tunnel junction layer 703 having a tunnel junction formed by bonding them is formed.

  In the nitride semiconductor light emitting diode element of Example 1, the driving voltage when driven by injecting a current of 20 mA is 4.6V. On the other hand, the drive voltage when driving by injecting a current of 20 mA into the nitride semiconductor light emitting diode element of the comparative example is about 7.5V. Therefore, the nitride semiconductor light-emitting diode element of Example 1 can reduce the driving voltage when driven by injecting a current of 20 mA, by about 3 V, compared with the nitride semiconductor light-emitting diode element of the comparative example.

  Moreover, when the light emission pattern of the nitride semiconductor light emitting diode element of Example 1 and the nitride semiconductor light emitting diode element of the comparative example was observed with an optical microscope, the nitride semiconductor light emitting diode element of the comparative example is shown in FIG. Thus, it can be seen that the region 801 having a high light emission intensity and the region 802 having a low light emission intensity are mixed, the light emission intensity unevenness is large, and the current injection is not uniform.

  On the other hand, in the nitride semiconductor light-emitting diode element of Example 1, there is almost no uneven emission intensity unlike the nitride semiconductor light-emitting diode element of the comparative example.

  Further, in the nitride semiconductor light emitting diode element of the comparative example, the light emission intensity of the region 801 having a high light emission intensity and the region 802 having a low light emission intensity differed by about 8 times, but the nitride semiconductor light emitting diode element of Example 1 In FIG. 5, the light emission intensity is suppressed to about three times between the region where the light emission intensity is high and the region where the light emission intensity is low.

  FIG. 4 shows a theoretical calculation result of a band energy diagram in the vicinity of the AlN intermediate layer 303 of the nitride semiconductor light emitting diode element of Example 1, and FIG. 10 shows a vicinity of the tunnel junction layer 703 of the nitride semiconductor light emitting diode element of the comparative example. The theoretical calculation result of the band energy diagram of is shown.

4 and 10, the horizontal axis indicates the position (nm) in the thickness direction, and the vertical axis indicates the band energy (eV) and the carrier density (cm ⁻³ ). Note that the position of 50 (nm) on the horizontal axis in FIG. 4 indicates the position of the interface between the AlN intermediate layer 303 and the p-type GaN layer 304. The larger the numerical value on the horizontal axis in FIG. It progresses to the p-type GaN layer 302 side as the numerical value on the horizontal axis in FIG. Further, the position of 50 (nm) on the horizontal axis of FIG. 10 indicates the position of the interface between the first n-type GaN layer 302 and the silicon highly doped layer 701, and the numerical value on the horizontal axis of FIG. The process proceeds toward the first n-type GaN layer 302, and proceeds toward the p-type GaN layer 304 as the numerical value on the horizontal axis in FIG. 10 decreases.

  4 and 10, the band energy 401 of the conduction band and the band energy 405 of the valence band are joined so that their Fermi energies 402 coincide with each other, and the carrier density 403 of the p-type impurity is shown. A region where the carrier density between the region and the region where the carrier density 404 of the n-type impurity is not shown is a depletion layer in which no carrier exists, and the width of the depletion layer is indicated by z. As the depletion layer has a smaller width z, a tunnel current easily flows.

  As can be seen by comparing the width z of the depletion layer in FIGS. 4 and 10, in the nitride semiconductor light emitting diode device of Example 1, the width z of the depletion layer is approximately 2.5 nm, whereas the comparative example In the nitride semiconductor light emitting diode device, the width z of the depletion layer is about 30 nm. Therefore, the width of the depletion layer of the nitride semiconductor light-emitting diode element of Example 1 is about 1/10 of that of the nitride semiconductor light-emitting diode element of Comparative Example, thereby the nitride semiconductor light-emitting diode element of Example 1 In this case, it is considered that a good tunnel current flows and the driving voltage is reduced.

  That is, in the nitride semiconductor light emitting diode element of Example 1, the lattice constant of AlN constituting the AlN intermediate layer 303 is greater than the lattice constant of GaN constituting the first n-type GaN layer 302 and the p-type GaN layer 304. Is also getting smaller. Therefore, in the AlN intermediate layer 303, lattice distortion due to lattice mismatch occurs due to this lattice constant difference, spontaneous polarization due to the piezoelectric field occurs along the C-axis direction, and the C plane of the AlN intermediate layer 303 becomes The AlN intermediate layer 303 has a polar surface because it exhibits different properties on the + C axis side and the −C axis side. In the AlN intermediate layer 303 having a polar surface, it is considered that the band is bent, and thus the width of the depletion layer can be reduced.

  Further, in the nitride semiconductor light-emitting diode element of Example 1, almost no uneven emission intensity was observed between the first n-type GaN layer 302 and the p-type GaN layer 304 due to the insertion of the AlN intermediate layer 303. This is considered to be due to the fact that the current was uniformly injected because the resistance between these layers was reduced and the resistance between these layers was reduced.

  FIG. 5 shows a theoretical calculation result of a band energy diagram in the vicinity of the AlN intermediate layer 303 when the thickness of the AlN intermediate layer 303 of the nitride semiconductor light emitting diode element of Example 1 is changed to 4 nm. In this case, the width z of the depletion layer is about 4 nm, which is about 1/7 of the width of the depletion layer of the nitride semiconductor light emitting diode element of the comparative example. Therefore, it can be seen that even when the thickness of the AlN intermediate layer 303 is changed to 4 nm, the effect of the present invention that a good tunnel current flows and the drive voltage is reduced can be obtained. The other description in FIG. 5 is the same as the description in FIG.

Note that the same effects as in the present embodiment are not limited to the case where the intermediate layer 303 is made of AlN, but can also be obtained when the intermediate layer 303 is made of Al _x Ga _1-x N (0 <x <1).

  Further, even if the first n-type GaN layer 302 is formed after forming the GaN buffer layer on the (0001) plane which is the C plane of the sapphire substrate 301 by setting the temperature of the sapphire substrate 301 to about 500 ° C. The same effect as the embodiment can be obtained.

  In addition, an n-type nitride semiconductor substrate is used instead of the sapphire substrate 301, an intermediate layer 303 is directly formed on the polar surface or semipolar surface of the n-type nitride semiconductor substrate, and a p-type GaN layer is formed on the intermediate layer 303. Even when 304 is formed and the structure is changed to the structure of the upper and lower electrodes as shown in FIG. 2, the same effect as the present embodiment can be obtained.

  Further, even when a mixed crystal containing Al is used for the multiple quantum well active layer 305, the same effect as described above can be obtained. Further, the In composition ratio of the well layer constituting the multiple quantum well active layer 305 is appropriately changed. Even when the emission wavelength is changed, the same effect as in this embodiment can be obtained.

In the present invention, unlike the conventional general structure, the active layer is formed on the p-type nitride semiconductor layer. The multi-quantum well active layer 305 has a non-doped GaN layer having a thickness of 60 nm, a non-doped In _0.02 Ga _0.98 N barrier layer having a thickness of 8 nm, and a non-doped In _0.2 having a thickness of 4 nm from the p-type Al _0.1 Ga _0.9 N carrier blocking layer 309 side. Ga _0.8 N well layers are formed in this order. When the well layer of the active layer is directly formed on the p-type nitride semiconductor layer, the emission intensity may be reduced due to diffusion of Mg as a p-type dopant into the active layer. It is preferable to leave a space of 5 nm or more between the layer and the well layer of the active layer. Note that it is preferable to form a non-doped nitride semiconductor layer at the interval as in this embodiment.

<Example 2>
The nitride is the same as in Example 1 except that the composition of the intermediate layer 303 of the nitride semiconductor light-emitting diode element of Example 1 is changed to Al _0.3 Ga _0.7 N and the thickness of the intermediate layer 303 is changed to 20 nm. A semiconductor light emitting diode element is produced.

  The nitride semiconductor light-emitting diode element of Example 2 manufactured in this way is also light-emitting intensity as compared with the nitride semiconductor light-emitting diode element of Comparative Example, similarly to the nitride semiconductor light-emitting diode element of Example 1 described above. Unevenness can be suppressed and the operating voltage can also be reduced.

<Example 3>
FIG. 6 is a schematic cross-sectional view of the nitride semiconductor laser device of Example 3 which is an example of the nitride semiconductor light emitting device of the present invention. Here, in the nitride semiconductor laser device of Example 3, a first n-type Al _0.05 Ga _0.95 N clad layer 602a having a thickness of 2.5 μm, an n-type GaN substrate 601 having a thickness of 400 μm, 1 μm first n-type GaN guide layer 602b, 2.5 nm thick Al _0.8 Ga _0.2 N intermediate layer 603, 0.2 μm thick p-type GaN guide layer 604, 0.01 μm thick p-type Al _0.1 Ga _0.9 N carrier blocking layer 609, multiple quantum well active layer 605 having a thickness of 0.144 μm, second n-type GaN guide layer 606 b having a thickness of 0.2 μm, and second n-type Al _{0.05 having a} thickness of 0.6 μm A Ga _0.95 N clad layer 606a is stacked in this order.

Further, a part of the second n-type Al _0.05 Ga _0.95 N clad layer 606a and a part of the second n-type GaN guide layer 606b are removed, respectively, so that a ridge stripe portion (ridge) extending in the cavity length direction is removed. The stripe width of the stripe portion: 1.2 to 2.4 μm) is formed, and the side surface of the ridge stripe portion and the surface of the second n-type Al _0.05 Ga _0.95 N clad layer 606a are covered with an insulating film 611. Yes.

A first n-electrode 607 is formed on the back surface of the n-type GaN substrate 601, and a second n-electrode 608 is formed on the second n-type Al _0.05 Ga _0.95 N clad layer 606 a.

Here, the multiple quantum well active layer 605 is formed by adjusting the mixed crystal ratio so that the wavelength of the laser light oscillated from the nitride semiconductor laser element of Example 3 is 500 nm. Specifically, From the p-type Al _0.1 Ga _0.9 N carrier block layer 609 side, a 60 nm thick non-doped GaN layer, a 8 nm thick non-doped In _0.02 Ga _0.98 N barrier layer, and a 4 nm thick non-doped In _0.2 Ga _0.8 N well layer alternately The laminated body laminated | stacked two periods and the non-doped GaN layer of thickness 60nm have the structure laminated | stacked in this order.

  The first n-electrode 607 is formed so as to be in contact with the n-type GaN substrate 601. From the n-type GaN substrate 601 side, a hafnium film (thickness 30 nm), an aluminum film (thickness 200 nm), molybdenum A film (thickness 30 nm), a platinum film (thickness 50 nm), and a gold film (thickness 200 nm) are stacked in this order.

  The second n electrode 608 has the same structure as the first n electrode 607. The insulating film 611 has a structure in which a silicon oxide layer having a thickness of 200 nm and a titanium oxide layer having a thickness of 50 nm are stacked in this order.

The first n-type Al _0.05 Ga _0.95 N clad layer 602a, the first n-type GaN guide layer 602b, the second n-type Al _0.05 Ga _0.95 N clad layer 606a, and the second n-type GaN guide layer 606b are also provided. Each carrier density is about 1 × 10 ¹⁸ cm ⁻³ . The carrier density of the p-type GaN guide layer 604 is about 4 × 10 ¹⁷ cm ⁻³ . The Al _0.8 Ga _0.2 N intermediate layer 603 is not intentionally doped with p-type impurities and n-type impurities.

  The nitride semiconductor laser element of Example 3 having the above configuration is manufactured as follows.

First, the first n-type Al _0.05 Ga _0.95 N clad is formed on the (0001) plane, which is the C plane of the 400 μm-thick n-type GaN substrate 601 having a surface of 2 inches in diameter, using an MOCVD film forming apparatus. Layer 602a, first n-type GaN guide layer 602b, Al _0.8 Ga _0.2 N intermediate layer 603, p-type GaN guide layer 604, p-type Al _0.1 Ga _0.9 N carrier block layer 609, multiple quantum well active layer 605, second The n-type GaN guide layer 606b and the second n-type Al _0.05 Ga _0.95 N clad layer 606a are epitaxially grown in this order by the MOCVD method. Here, ammonia is used as the nitrogen source, TMG is used as the gallium source, TMI is used as the indium source, TMA is used as the aluminum source, Cp2Mg is used as the magnesium source of the p-type impurity, and n-type impurity is used. Silane is used as a silicon source.

Here, the temperature of the n-type GaN substrate 601 is set to 1125 ° C. from the first n-type Al _0.05 Ga _0.95 N cladding layer 602a to the non-doped GaN layer on the side close to the n-type GaN substrate 601 of the multiple quantum well active layer 605. Thereafter, the temperature of the n-type GaN substrate 601 is lowered to 750 ° C. to form the remaining part of the multiple quantum well active layer 605. Then, the temperature of the n-type GaN substrate 601 is raised to 850 ° C. to form the second n-type GaN guide layer 606b and the second n-type Al _0.05 Ga _0.95 N clad layer 606a. Thereafter, the temperature of the n-type GaN substrate 601 is lowered to room temperature.

Thus, after the multiple quantum well active layer 605 is formed, the temperature of the n-type GaN substrate 601 is set to a low temperature of about 850 ° C., and the second n-type GaN guide layer 606b and the second n-type Al _0.05 Ga _0.95 N cladding. Even when the layer 606a is formed, the second n-type GaN guide layer 606b and the second n-type Al _0.05 Ga _0.95 N cladding layer 606a are each an n-type nitride semiconductor layer. The resistance of the layer 606b and the second n-type Al _0.05 Ga _0.95 N cladding layer 606a can be increased and the deterioration of crystallinity can be suppressed. In addition, the second n-type GaN guide layer 606b and the second n-type Al _0.05 are formed at a lower temperature than the conventional configuration shown in FIG. 11 in which the p-type nitride semiconductor layer is formed on the multiple quantum well active layer 605. Since the Ga _0.95 N cladding layer 606a can be formed, thermal damage to the multiple quantum well active layer 605 can be reduced.

Thereafter, a second n-electrode 608 is formed on the second n-type Al _0.05 Ga _0.95 N clad layer 606a by EB (Electron Beam) evaporation. Then, after forming a photoresist on the entire surface of the second n-electrode 608, an opening is provided in a region where the ridge stripe portion of the photoresist is not formed by using a general photolithography technique and an etching technique. Thereafter, etching is performed halfway in the thickness direction of the second n-type GaN guide layer 606b using an ICP etching method. Then, an insulating film 611 is formed on the entire surface of the photoresist by stacking a silicon oxide layer and a titanium oxide layer in this order by using an EB vapor deposition method and a sputtering method. Thereafter, the photoresist is removed by lift-off, whereby a second n-electrode 608 is formed on the second n-type Al _0.05 Ga _0.95 N cladding layer 606a, and an insulating film 611 patterned into a predetermined shape is formed. It is formed.

  Next, a first n-electrode 607 is formed on the back surface of the n-type GaN substrate 601 using EB vapor deposition.

Next, after the thickness of the n-type GaN substrate 601 after forming the first n-electrode 607 is reduced to about 100 μm by general grinding and polishing, it is scribed with a diamond needle and cleaved into a bar shape. Then, an end face coating film made of a dielectric film represented by the formula of AlO _a N _1-a (0 ≦ a) is formed to a thickness of about 30 nm on the resonator end face exposed by this cleavage. Here, the reflectance at the resonator end face on the light emitting side is set to 10%, and the reflectance at the resonator end face on the light reflecting side is set to 90%. Thereby, the nitride semiconductor laser element of Example 3 is obtained.

Further, as a comparative example, instead of the Al _0.8 Ga _0.2 N intermediate layer 603, silicon having an upper portion of the first n-type GaN guide layer 602 b with a thickness of 50 nm and a carrier density of 3.4 × 10 ¹⁹ cm ^−3. As the highly doped layer, the lower part of the p-type GaN guide layer 604 is formed as a magnesium highly doped layer having a thickness of 50 nm and a carrier density of 3 × 10 ¹⁸ cm ^−3, and a tunnel junction layer having a tunnel junction is formed. A nitride semiconductor laser device of a comparative example having the same configuration as that of the nitride semiconductor laser device of Example 3 is manufactured except that described above.

  In the nitride semiconductor laser device of Example 3, the driving voltage when driven by injecting a current of 20 mA is 6.2V. On the other hand, the drive voltage when driving by injecting a current of 20 mA into the nitride semiconductor laser element of the comparative example is about 9.0V. Therefore, the nitride semiconductor laser element of Example 3 can reduce the driving voltage when driven by injecting a current of 20 mA, compared with the nitride semiconductor laser element of the comparative example, by about 3V.

In the nitride semiconductor laser device of Example 3, the n-type nitride such as the second n-type GaN guide layer 606b and the second n-type Al _0.05 Ga _0.95 N clad layer 606a is formed after the multiple quantum well active layer 605 is formed. Since only the semiconductor layer is formed and not the p-type nitride semiconductor layer, the structure of the nitride semiconductor laser device of Example 3 is such that the In composition ratio of the well layer in the multiple quantum well active layer 605 is 0.15. As mentioned above, it can be said that it is an excellent structure especially when it is 0.2 or more.

  Further, in the conventional nitride semiconductor laser element, the ridge stripe portion is formed of the p-type nitride semiconductor layer having a high resistance, so that the drive voltage becomes high. However, in the nitride semiconductor laser device of Example 3, the ridge stripe portion is formed by the n-type nitride semiconductor layer having a lower resistance than the p-type nitride semiconductor layer. This is preferable in that the drive voltage can be kept low.

  Furthermore, in the conventional nitride semiconductor laser device, it is necessary to form a p-electrode that contacts the p-type nitride semiconductor layer and an n-electrode that contacts the n-type nitride semiconductor layer. However, in the nitride semiconductor laser element of Example 3, since only the n electrode can be used, the contact resistance between the electrode and the nitride semiconductor can be reduced as compared with the conventional nitride semiconductor laser element. .

  In the nitride semiconductor laser device of Example 3, the first n-electrode 607 and the second n-electrode 608 may be the same or different, but the same may be used. In such a case, since it is not necessary to change the forming conditions, the productivity is improved, and the same material can be used, so that the manufacturing cost can be reduced. Note that the first n-electrode 607 and the second n-electrode 608 can also have a structure such as a stacked body of a titanium layer and an aluminum layer.

In the nitride semiconductor laser device of Example 3, an oxide film (for example, a silicon oxide film) is formed on the end face coat film made of a dielectric film represented by the formula of AlO _a N _1-a (0 ≦ a). , Aluminum oxide film, zirconium oxide film, tantalum oxide film, titanium oxide film, niobium oxide film, etc.), nitride film (for example, silicon nitride film, aluminum nitride film, etc.), oxynitride A film (for example, at least one of a silicon oxynitride film and an aluminum oxynitride film) may be formed.

  In the nitride semiconductor laser device of Example 3, the configuration of the multiple quantum well active layer 605 may be changed as appropriate to oscillate laser light having a wavelength of, for example, 380 nm to 550 nm.

  In the nitride semiconductor laser device of Example 3, instead of the n-type GaN substrate 601, an n-type AlGaN substrate, an n-type AlN substrate, an n-type InGaN substrate, or the like may be used.

  In the nitride semiconductor laser element of Example 3, the width of the ridge stripe portion may be set to a width of about 2 μm to 100 μm, for example, and may be a broad area type nitride semiconductor laser element used for illumination purposes.

<Example 4>
FIG. 12 is a schematic cross-sectional view of a nitride semiconductor laser device of Example 4, which is an example of the nitride semiconductor light emitting device of the present invention. Here, the nitride semiconductor laser device of Example 4 is a nitride semiconductor laser device of Example 3 in that a nitride semiconductor laser device is manufactured by forming an intermediate layer having a polar surface using a substrate having a nonpolar surface. This is different from a semiconductor laser device.

The nitride semiconductor laser device of Example 4 has a first n-type Al _0.05 Ga _0.95 N clad layer 1202a having a thickness of 2.5 μm and a thickness of 0.2 μm on the m-plane of an n-type GaN substrate 1201 having a thickness of 400 μm. 1 μm first n-type GaN guide layer 1202b, 2.5 nm thick AlN intermediate layer 1203, 0.2 μm thick p-type GaN guide layer 1204, 0.01 μm thick p-type Al _0.1 Ga _0.9 N carrier Block layer 1209, multiple quantum well active layer 1205 having a thickness of 0.144 μm, second n-type GaN guide layer 1206b having a thickness of 0.2 μm, and second n-type Al _0.05 Ga _0.95 N clad having a thickness of 0.6 μm The layers 1206a are stacked in this order.

Further, by removing a part of the second n-type Al _0.05 Ga _0.95 N cladding layer 1206a and a part of the second n-type GaN guide layer 1206b, a ridge stripe portion (ridge) extending in the cavity length direction is removed. The stripe width of the stripe portion is 1.2 to 2.4 μm), and the side surface of the ridge stripe portion and the surface of the second n-type Al _0.05 Ga _0.95 N clad layer 1206a are covered with the insulating film 1211. Yes.

A first n-electrode 1207 is formed on the back surface of the n-type GaN substrate 1201, and a second n-electrode 1208 is formed on the second n-type Al _0.05 Ga _0.95 N clad layer 1206 a. Here, the first n electrode 1207 is an anode electrode to which a positive bias voltage is applied, and the second n electrode 1208 is a cathode electrode to which a negative bias voltage is applied.

Here, the multiple quantum well active layer 1205 is formed by adjusting the mixed crystal ratio so that the wavelength of the laser light oscillated from the nitride semiconductor laser element of Example 3 is 520 nm. Specifically, From the p-type Al _0.1 Ga _0.9 N carrier block layer 1209 side, a 60 nm thick non-doped GaN layer, an 8 nm thick non-doped In _0.02 Ga _0.98 N barrier layer, and a 4 nm thick non-doped In _0.2 Ga _0.8 N well layer alternately The laminated body laminated | stacked two periods and the non-doped GaN layer of thickness 60nm have the structure laminated | stacked in this order.

  The first n-electrode 1207 is formed so as to be in contact with the n-type GaN substrate 1201. From the n-type GaN substrate 1201 side, a hafnium film (thickness 30 nm), an aluminum film (thickness 200 nm), molybdenum A film (thickness 30 nm), a platinum film (thickness 50 nm), and a gold film (thickness 200 nm) are stacked in this order.

  The second n-electrode 1208 has the same structure as the first n-electrode 1207. The insulating film 1211 has a structure in which a silicon oxide layer having a thickness of 200 nm and a titanium oxide layer having a thickness of 50 nm are stacked in this order.

The first n-type Al _0.05 Ga _0.95 N cladding layer 1202a, the first n-type GaN guide layer 1202b, the second n-type Al _0.05 Ga _0.95 N cladding layer 1206a, and the second n-type GaN guide layer 1206b Each carrier density is about 1 × 10 ¹⁸ cm ⁻³ . The carrier density of the p-type GaN guide layer 1204 is about 4 × 10 ¹⁷ cm ⁻³ . The Al _0.8 Ga _0.2 N intermediate layer 1203 is not intentionally doped with p-type impurities and n-type impurities.

  The nitride semiconductor laser element of Example 4 having the above configuration is manufactured as follows.

First, a first n-type Al is formed on a (1-100) plane which is a nonpolar m-plane of a 400 μm-thick n-type GaN substrate 1201 having a surface having a diameter of 2 inches by using a MOCVD film forming apparatus. _{A 0.05} Ga _0.95 N clad layer 1202a and a first n-type GaN guide layer 1202b are grown.

Next, the n-type GaN substrate 1201 after the growth of the first n-type GaN guide layer 1202b is once taken out from the MOCVD film forming apparatus, and the surface of the first n-type GaN guide layer 1202b is obtained by a general photolithography process. On top of this, for example, a resist pattern 1301 having a circular opening 1302 as shown in the schematic plan view of FIG. 13A or a rectangular opening as shown in the schematic plan view of FIG. A resist pattern 1301 having 1303 is formed. Thereafter, the shape of the opening 1302 of the resist pattern 1301 shown in FIG. 13A or the shape of the opening 1303 of the resist pattern 1301 shown in FIG. 13B is perpendicular to the surface of the first n-type GaN guide layer 1202b. Further, by removing a part of the first n-type GaN guide layer 1202b, irregularities are formed on the surface of the first n-type GaN guide layer 1202b. Note that the shape of the removed portion of the first n-type GaN guide layer 1202b is not limited to the circular shape and the rectangular shape described above, and may be other shapes such as a triangular shape. Further, the depth of the removed portion of the first n-type GaN guide layer 1202b is, for example, about 0.01 μm to 0.3 μm, and even a portion of the first n-type Al _0.05 Ga _0.95 N cladding layer 1202a is removed. Good. Moreover, the size of the surface of the removed portion can be, for example, about 0.1 μm to 5 μm. The size of the surface of the removed portion is the diameter in the case of a circle, and the length of the largest side in the case of a polygon such as a rectangle.

The n-type GaN substrate 1201 after the above unevenness is formed is returned to the MOCVD film forming apparatus, and the AlN intermediate layer 1203, the p-type GaN guide layer 1204, the p-type Al _0.1 Ga _0.9 N carrier block layer 1209, the multiple quantum well activity The layer 1205, the second n-type GaN guide layer 1206b, and the second n-type Al _0.05 Ga _0.95 N cladding layer 1206a are epitaxially grown in this order by the MOCVD method. Thereafter, the nitride semiconductor laser device of Example 4 is obtained through the same steps as in Example 3.

  In the nitride semiconductor laser device of Example 4, the driving voltage when driven by injecting a current of 20 mA is 6.8V. On the other hand, the drive voltage when driving the nitride semiconductor laser element of the above comparative example by injecting a current of 20 mA is about 9.0V. Therefore, the nitride semiconductor laser element of Example 4 can reduce the drive voltage by 2 V or more when driven by injecting a current of 20 mA, compared to the nitride semiconductor laser element of the comparative example.

  For example, when the nitride semiconductor laser device having the configuration shown in FIG. 12 is manufactured using the resist pattern 1301 shown in FIGS. 13A and 13B, the side surface of the first n-type GaN guide layer 1202b is formed. In X, a polar surface other than the m-plane is formed. As described above, when the AlN intermediate layer 1203 has a polar face at the interface with the first n-type GaN guide layer 1202b and the interface with the p-type GaN guide layer 1204, respectively, as shown by the arrows in FIG. As described above, the tunnel current effectively flows using the polar face (side face).

  It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  The nitride semiconductor light-emitting device of the present invention can be suitably used for lighting applications and display applications, for example.

It is typical sectional drawing of an example of the nitride semiconductor light-emitting device of this invention. It is typical sectional drawing of the other example of the nitride semiconductor light-emitting device of this invention. 3 is a schematic cross-sectional view of a nitride semiconductor light-emitting diode element according to Example 1. FIG. 3 is a theoretical calculation result of a band energy diagram in the vicinity of an AlN intermediate layer of the nitride semiconductor light-emitting diode element of Example 1. FIG. 4 is a theoretical calculation result of a band energy diagram in the vicinity of the AlN intermediate layer when the thickness of the AlN intermediate layer of the nitride semiconductor light-emitting diode element of Example 1 is changed. 6 is a schematic cross-sectional view of a nitride semiconductor laser element of Example 3. FIG. It is typical sectional drawing of the nitride semiconductor light-emitting diode element of a comparative example. It is a typical top view when the nitride semiconductor light emitting diode element of a comparative example is seen from upper direction. It is typical sectional drawing of the tunnel junction layer vicinity of the nitride semiconductor light-emitting diode element of a comparative example. It is the theoretical calculation result of the band energy diagram of the tunnel junction layer vicinity of the nitride semiconductor light emitting diode element of the comparative example. It is typical sectional drawing of the nitride semiconductor light-emitting diode element using the conventional tunnel junction. 6 is a schematic cross-sectional view of a nitride semiconductor laser element of Example 4. FIG. (A) And (b) is a typical top view of an example of the resist pattern used for preparation of the nitride semiconductor laser element of Example 4, respectively.

Explanation of symbols

101 substrate 102 first n-type nitride semiconductor layer 103 intermediate layer 104 p-type nitride semiconductor layer 105 active layer 106 second n-type nitride semiconductor layer 107 first n-electrode 108 second 2 n-electrodes, 201 n-type nitride semiconductor substrate, 301 sapphire substrate, 302 first n-type GaN layer, 303 AlN intermediate layer, 304 p-type GaN layer, 305 multiple quantum well active layer, 306 second n-type GaN layer, 307 first n-electrode, 308 second n-electrode, 309 p-type Al _0.1 Ga _0.9 N carrier blocking layer, 401 conduction band energy, 402 Fermi energy, 403 p-type impurity carrier density, 404 n the carrier density of the impurity, the band energy of 405 valence band, 601 n-type GaN substrate, 602a first n-type Al _0.05 Ga _0.95 n cladding layer, 60 b The first n-type GaN guide layer, 603 Al _0.8 Ga _0.2 N intermediate layer, 604 p-type GaN guide layer, 605 a multiple quantum well active layer, 606a second n-type Al _0.05 Ga _0.95 N cladding layer, 606b a second N-type GaN guide layer, 607 first n-electrode, 608 second n-electrode, 609 p-type Al _0.1 Ga _0.9 N carrier block layer, 611 insulating film, 701 silicon highly doped layer, 702 magnesium highly doped layer, 703 Tunnel junction layer, 801 region with high emission intensity, 802 region with low emission intensity, 1101 sapphire substrate, 1102 GaN buffer layer, 1103 Si-doped n-type GaN layer, 1104 active layer, 1105 Mg-doped p-type GaN layer, 1106 Mg highly doped p + type GaN layer, 1107 Si highly doped n + type GaN layer, 1108 Si doped n Type GaN layer, 1109 first n electrode, 1110 second n electrode, 1201 n type GaN substrate, 1202a first n type Al _0.05 Ga _0.95 N clad layer, 1202b first n type GaN guide layer, 1203 AlN Intermediate layer, 1204 p-type GaN guide layer, 1205 multiple quantum well active layer, 1206a second n-type Al _0.05 Ga _0.95 N cladding layer, 1206b second n-type GaN guide layer, 1207 first n-electrode, 1208 first 2 n electrodes, 1209 p-type Al _0.1 Ga _0.9 N carrier blocking layer, 1211 insulating film, 1301 resist pattern, 1302, 1303 openings.

Claims (8)

  A nitride semiconductor light-emitting device, wherein a nitride semiconductor layer, a p-type nitride semiconductor layer, and an active layer are sequentially stacked on an n-type nitride semiconductor layer.   A nitride semiconductor light emitting device comprising a nitride semiconductor layer having a polar face at least partially, a p-type nitride semiconductor layer, and an active layer sequentially stacked on an n-type nitride semiconductor layer.   The nitride semiconductor light emitting device according to claim 1, wherein the nitride semiconductor layer contains aluminum. 4. The nitride semiconductor light emitting device according to claim 1, wherein the nitride semiconductor layer is Al _x Ga _1-x N (0 <x ≦ 1). 5. A second n-type nitride semiconductor layer is stacked on the active layer;
The first electrode in contact with the n-type nitride semiconductor layer is an anode electrode;
5. The nitride semiconductor light emitting device according to claim 1, wherein the second electrode in contact with the second n-type nitride semiconductor layer is a cathode electrode.   6. The nitride semiconductor light emitting device according to claim 1, wherein a thickness of the nitride semiconductor layer is not less than 0.5 nm and not more than 30 nm. The active layer has a well layer made of a group III nitride semiconductor containing In,
The nitride semiconductor light-emitting element according to claim 1, wherein an In composition ratio in the well layer is 0.15 or more and 0.4 or less. The active layer has a well layer made of a group III nitride semiconductor containing In,
The nitride semiconductor light emitting device according to claim 1, wherein an In composition ratio in the well layer is 0.2 or more and 0.4 or less.

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