JP2009245996A - Substrate processing method, program, computer storage medium, and substrate processing system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To form a resist pattern of a predetermined target dimension on a substrate. <P>SOLUTION: The initial temperature of a POST device and the target dimension of a resist pattern are set (step S1). Resist patterns are formed on a plurality of inspecting wafers, and the dimensions of the resist patterns are measured (steps S2-S4). Based on the dimension measurement results, the correlation between a heating temperature of the POST device and the dimensions of the resist patterns is calculated based on the dimension measurement results (step S5). Based on the target dimension of the resist pattern, the set temperature of the POST device is calculated from the calculated correlation (step S6). The set temperature of each POST device is corrected (steps S7-S9). A heating process is executed at the corrected set temperature, and a resist pattern of the target dimension is formed on the wafer (step S10). <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a substrate processing method, a program, a computer storage medium, and a substrate processing system for heat-treating a substrate after forming a resist pattern on the substrate.

  For example, in a photolithography process in the manufacture of a semiconductor device, for example, a resist coating process for forming a resist film by coating a resist solution on a semiconductor wafer (hereinafter referred to as “wafer”), and exposing the resist film to a predetermined pattern An exposure process, a development process for developing the exposed resist film, and the like are sequentially performed to form a predetermined resist pattern on the wafer.

  When the resist pattern described above is formed, the resist pattern is required to be miniaturized in order to further increase the integration of semiconductor devices. In response to this, the wavelength of the exposure light source has been shortened. However, at present, there are technical and cost limits to shortening the wavelength of the exposure light source.

  Therefore, it has been proposed to refine the resist pattern by developing the wafer and then heating the wafer to expand the resist portion of the resist pattern. In order to form this resist pattern with a predetermined target dimension, the dimension of the resist pattern formed on the wafer is measured, and the temperature of the heat treatment and the dimension of the resist pattern determined in advance based on the dimension measurement result It has been proposed that the temperature of the heat treatment after the development processing is corrected from the correlation with the above, and the optimization of the dimensions of the resist pattern is measured (Patent Document 1).

JP 2008-4591 A

  However, the correlation between the temperature of the heat treatment described above and the size of the resist pattern is usually determined by forming a resist pattern on a wafer for inspection and measuring the size of the resist pattern. The relationship with temperature is manually calculated by the operator. Also, the initial temperature of the heat treatment of the wafer to be processed first is usually set manually by the operator based on the correlation between the temperature of the heat treatment and the dimensions of the resist pattern.

  Then, for example, if the relationship between the dimension measurement result and the temperature of the heat treatment is input incorrectly, or if the initial temperature of the heat treatment is set incorrectly, the resist pattern cannot be formed on the wafer with a predetermined target dimension. was there.

  The present invention has been made in view of this point, and an object thereof is to form a resist pattern having a predetermined target dimension on a substrate.

  In order to achieve the above object, the present invention provides a substrate processing method for forming a resist pattern on a substrate and then heat-treating the substrate, wherein the initial temperature of the heat treatment and the resist pattern on the substrate after the heat treatment are changed. After setting a target dimension, a correlation between the temperature of the heat treatment and the dimension of the resist pattern, and a condition setting step of automatically calculating the set temperature of the heat treatment, and thereafter forming the resist pattern on the substrate, Heat treatment at the set temperature to adjust the resist pattern to the target dimension, and the condition setting step includes an initial temperature of the heat treatment and a target of the resist pattern on the substrate after the heat treatment. A resist pattern is formed on the substrate, the substrate is heat-treated at the initial temperature set in the first step, and then the resist is formed. A second step of measuring the dimensions of the strike pattern, a third step of calculating the temperature of the heat treatment different from the initial temperature set in the first step, forming a resist pattern on the substrate, Corresponding to the fourth step of measuring the dimension of the resist pattern after heat treatment at the temperature calculated in the third step, and the result of measuring the size of the resist pattern in the second step and the fourth step A fifth step of calculating a correlation between the temperature of the heat treatment and the dimension of the resist pattern from a temperature of the heat treatment to be performed; a correlation calculated in the fifth step; and a target dimension of the resist pattern set in the first step And a sixth step of calculating the set temperature of the heat treatment. Note that the resist pattern dimensions include, for example, the diameter of the contact hole, the line width of the resist pattern, and the sidewall angle of the resist pattern.

  According to the present invention, in the condition setting step, after setting the initial temperature of the heat treatment and the target dimension of the resist pattern on the substrate after the heat treatment, the resist pattern is formed on the substrate for inspection, and the resist pattern after the heat treatment is formed. Since the dimensions are measured, the correlation between the temperature of the heat treatment and the dimension of the resist pattern and the set temperature of the heat treatment can be automatically calculated. As a result, the manual operation by the operator, which has been conventionally required, can be omitted, so that the correlation between the temperature of the heat treatment and the dimension of the resist pattern can be calculated appropriately and the set temperature of the heat treatment can be set appropriately. it can. Accordingly, a resist pattern having a predetermined target dimension can be subsequently formed on the substrate.

  In the condition setting step, after the sixth step, a resist pattern is formed on the substrate, the substrate is subjected to heat treatment at the set temperature calculated in the sixth step, and then the dimension of the resist pattern is measured. In addition, a seventh step of confirming appropriateness of the set temperature may be further included.

  When there are a plurality of heat treatment apparatuses for performing the heat treatment, a resist pattern is formed on the substrate after the condition setting step and before the treatment step, and the substrate is set at the set temperature calculated in the sixth step. After performing the heat treatment, based on the correlation pattern calculated in the fifth step based on the resist pattern size measurement step and the resist pattern size measurement result, the set temperature of the heat treatment in each heat treatment apparatus is determined. A temperature correction step including a correction step, and in the processing step, the substrate on which the resist pattern is formed may be heat-treated at a set temperature corrected in the temperature correction step.

  The resist pattern is formed by performing a resist film forming process for forming a resist film on a substrate, an exposure process for exposing the resist film, and a developing process for developing the exposed resist film. It may be performed after the development processing.

  The resist pattern includes a resist film forming process for forming a resist film on the substrate, an exposure process for exposing the resist film, a developing process for developing the exposed resist film, and a heating process for heating the substrate after the developing process. The heat treatment may be performed after applying the pattern expansion agent on the substrate after the heat treatment after the development processing.

  According to another aspect of the present invention, there is provided a program that runs on a computer of a control device that controls the substrate processing system in order to cause the substrate processing method to execute the substrate processing method.

  According to another aspect of the present invention, a readable computer storage medium storing the program is provided.

  According to yet another aspect of the present invention, there is provided a substrate processing system for heat-treating a substrate after forming the resist pattern on the substrate, wherein the resist pattern is formed on the substrate, and a pattern forming unit for forming the resist pattern on the substrate. A heat treatment apparatus for heat-treating the substrate, a pattern dimension measuring apparatus for measuring a dimension of a resist pattern of the substrate after the heat treatment, and a control device for controlling the temperature of the heat treatment in the heat treatment apparatus, A first step of setting an initial temperature of the heat treatment and a target dimension of a resist pattern on the substrate after the heat treatment; a resist pattern is formed on the substrate; and the substrate is set at an initial temperature set in the first step After the heat treatment, the second step of measuring the dimension of the resist pattern and the heat different from the initial temperature set in the first step A third step of calculating the temperature of the process; a resist pattern is formed on the substrate; and the substrate is subjected to heat treatment at the temperature calculated in the third step, and then the dimension of the resist pattern is measured. A fifth step of calculating a correlation between the temperature of the heat treatment and the dimension of the resist pattern from the temperature of the heat treatment corresponding to the dimension measurement result of the resist pattern in the second step and the fourth step. The pattern forming unit to perform the sixth step of calculating the set temperature of the heat treatment from the correlation calculated in the fifth step and the target dimension of the resist pattern set in the first step, The heat treatment apparatus and the pattern dimension measuring apparatus are controlled.

  The control device forms a resist pattern on the substrate after the sixth step, heat-treats the substrate at the set temperature calculated in the sixth step, and then measures the dimension of the resist pattern. The pattern forming unit, the heat treatment apparatus, and the pattern dimension measuring apparatus may be controlled so as to further execute a seventh step of confirming the suitability of the set temperature.

  A plurality of the heat treatment devices are provided, and the control device forms a resist pattern on the substrate, heats the substrate at the set temperature calculated in the sixth step, and then measures the dimension of the resist pattern. The pattern formation so as to further execute a step and a step of correcting the set temperature of the heat treatment in each heat treatment apparatus from the correlation calculated in the fifth step based on the dimension measurement result of the resist pattern The heat treatment apparatus and the pattern dimension measuring apparatus may be controlled.

  In the pattern forming unit, a resist film forming process for forming a resist film on the substrate and a developing process for developing the exposed resist film are performed. In the heat treatment apparatus, the heat treatment may be performed after the developing process. Good.

  In the pattern forming unit, a resist film forming process for forming a resist film on the substrate, a developing process for developing the exposed resist film, and a heating process for heating the substrate after the developing process are performed. The heat treatment apparatus may further include a coating treatment apparatus that coats a pattern expansion agent on the substrate. In the heat treatment apparatus, the heat treatment may be performed after application of the pattern expansion agent.

  According to the present invention, it is possible to automatically calculate the correlation between the temperature of the heat treatment and the resist pattern dimension that have been calculated manually, and the set temperature of the heat treatment, and the resist pattern having a predetermined target dimension on the substrate. Can be formed.

  Hereinafter, preferred embodiments of the present invention will be described. FIG. 1 is a plan view schematically showing the configuration of a coating and developing treatment system 1 as a substrate processing system according to the present embodiment, FIG. 2 is a front view of the coating and developing treatment system 1, and FIG. 1 is a rear view of a coating and developing treatment system 1. FIG.

  As shown in FIG. 1, the coating and developing treatment system 1 is a cassette that carries, for example, 25 wafers W from the outside to the coating and developing treatment system 1 in a cassette unit, and carries a wafer W into and out of the cassette C. A station 2, an inspection station 3 that performs a predetermined inspection on the wafer W, a processing station 4 in which a plurality of various processing apparatuses that perform predetermined processing in a single-wafer type in a photolithography process are arranged in multiple stages, An interface station 5 for transferring the wafer W to and from the exposure apparatus A provided adjacent to the processing station 4 is integrally connected.

  In the cassette station 2, a cassette mounting table 6 is provided, and the cassette mounting table 6 is capable of mounting a plurality of cassettes C in a row in the X direction (vertical direction in FIG. 1). The cassette station 2 is provided with a wafer transfer body 8 that can move along the X direction on the transfer path 7. The wafer transfer body 8 is also movable in the wafer arrangement direction (Z direction; vertical direction) of the wafers W accommodated in the cassette C, and selectively with respect to the wafers W arranged in the vertical direction in the cassette C. Accessible. The wafer carrier 8 can rotate around the vertical axis (θ direction), and can also access a delivery unit 10 on the inspection station 3 side described later.

  The inspection station 3 adjacent to the cassette station 2 is provided with a pattern dimension measuring device 20 that measures the dimension of the resist pattern on the wafer W. The pattern dimension measuring device 20 is disposed, for example, on the negative side in the X direction (downward in FIG. 1) of the inspection station 3. For example, on the cassette station 2 side of the inspection station 3, a delivery unit 10 for delivering the wafer W to and from the cassette station 2 is disposed. The delivery unit 10 is provided with a placement unit 10a on which, for example, a wafer W is placed. In the positive direction of the X direction of the pattern dimension measuring apparatus 20 (upward in FIG. 1), for example, a wafer transfer device 12 that can move along the X direction on the transfer path 11 is provided. For example, the wafer transfer device 12 is movable in the vertical direction and is also rotatable in the θ direction, and each processing of the pattern size measuring device 20, the transfer unit 10, and a third processing device group G3 described later on the processing station 4 side. Has access to the device.

  The processing station 4 adjacent to the inspection station 3 includes, for example, five processing device groups G1 to G5 in which a plurality of processing devices are arranged in multiple stages. A first processing device group G1 and a second processing device group G2 are arranged in this order from the inspection station 3 side on the X direction negative direction (downward direction in FIG. 1) side of the processing station 4. A third processing device group G3, a fourth processing device group G4, and a fifth processing device group G5 are sequentially arranged from the inspection station 3 side on the X direction positive direction (upward direction in FIG. 1) side of the processing station 4. Has been placed. A first transfer device 30 is provided between the third processing device group G3 and the fourth processing device group G4. The first transfer device 30 can selectively access each device in the first processing device group G1, the third processing device group G3, and the fourth processing device group G4 to transfer the wafer W. A second transport device 31 is provided between the fourth processing device group G4 and the fifth processing device group G5. The second transfer device 31 can selectively access each device in the second processing device group G2, the fourth processing device group G4, and the fifth processing device group G5 to transfer the wafer W.

  As shown in FIG. 2, in the first processing unit group G1, a liquid processing apparatus that supplies a predetermined liquid to the wafer W and performs processing, for example, a resist coating that applies a resist solution to the wafer W to form a resist film. Apparatuses 40, 41, and 42, and bottom coating apparatuses 43 and 44 that form an antireflection film for preventing reflection of light during the exposure process are stacked in five stages in order from the bottom. In the second processing unit group G2, liquid processing units, for example, development processing units 50 to 54 for supplying a developing solution to the wafer W and performing development processing are stacked in five stages in order from the bottom. Further, chemical chambers 60 and 61 for supplying various processing liquids to the liquid processing apparatuses in the processing apparatus groups G1 and G2 are provided at the lowermost stage of the first processing apparatus group G1 and the second processing apparatus group G2. Are provided.

  As shown in FIG. 3, the third processing unit group G3 includes, for example, a temperature control unit 70, a transition unit 71 for delivering the wafer W, and a high-accuracy temperature control that adjusts the wafer temperature under high-precision temperature control. The apparatuses 72 to 74 and the high temperature heat treatment apparatuses 75 to 78 that heat-treat the wafer W at a high temperature are sequentially stacked in nine stages from the bottom.

  The fourth processing unit group G4 includes, for example, a high-accuracy temperature control unit 80, pre-baking units (hereinafter referred to as “PAB units”) 81 to 84 that heat-treat the resist-coated wafer W, and post-development processing units. Post-baking apparatuses (hereinafter referred to as “POST apparatuses”) 85 to 89 as heat treatment apparatuses for performing heat treatment of the wafer W are stacked in ten steps in order from the bottom.

  In the fifth processing apparatus group G5, a plurality of heat treatment apparatuses that heat-treat the wafer W, for example, high-precision temperature control apparatuses 90 to 93, and a post-exposure baking apparatus (hereinafter referred to as “PEB apparatus”) 94 that heat-treats the wafer W. ˜99 are stacked in 10 steps from the bottom.

  As shown in FIG. 1, a plurality of processing devices are arranged on the positive side in the X direction of the first transfer device 30. For example, as shown in FIG. 3, an adhesion device 100 for hydrophobizing the wafer W is shown. , 101, and heat treatment apparatuses 102 and 103 for heat-treating the wafer W are stacked in four stages in order from the bottom. As shown in FIG. 1, a peripheral exposure device 104 that selectively exposes only the edge portion of the wafer W, for example, is disposed on the positive side in the X direction of the second transfer device 31.

  For example, as shown in FIG. 1, the interface station 5 is provided with a wafer transfer body 111 that moves on a transfer path 110 that extends in the X direction, and a buffer cassette 112. The wafer carrier 111 is movable in the Z direction and rotatable in the θ direction, and accesses the exposure apparatus A adjacent to the interface station 5, the buffer cassette 112, and the fifth processing apparatus group G5. The wafer W can be transferred.

  In the present embodiment, for example, the resist pattern forming unit is configured by the resist coating apparatuses 40 to 42, the PAB apparatuses 81 to 84, the PEB apparatuses 94 to 99, and the development processing apparatuses 50 to 54 of the processing station 4.

  Next, the configuration of the pattern dimension measuring apparatus 20 described above will be described. For example, as shown in FIG. 4, the pattern dimension measuring apparatus 20 has a casing 20a in which a wafer W is loaded and unloaded (not shown) on the side surface. In the casing 20a, a mounting table 120 for mounting the wafer W horizontally and an optical surface shape measuring instrument 121 are provided. The mounting table 120 can move, for example, in a two-dimensional direction in the horizontal direction. The optical surface shape measuring instrument 121 includes, for example, a light irradiation unit 122 that irradiates light on the wafer W from an oblique direction, a light detection unit 123 that detects light irradiated from the light irradiation unit 122 and reflected by the wafer W, A measurement unit 124 that calculates the size of the resist pattern on the wafer W based on the light reception information of the light detection unit 123 is provided. The pattern dimension measuring apparatus 20 measures the dimension of a resist pattern using, for example, a scatterometry method, and the light intensity distribution in the wafer surface detected by the light detecting part 123 is measured by the measuring part 124. The size of the resist pattern can be measured by collating the virtual light intensity distribution stored in advance and obtaining the size of the resist pattern corresponding to the collated virtual light intensity distribution. In the present embodiment, for example, the diameter D of the contact hole C shown in FIG. 5 is measured as the dimension of the resist pattern.

In addition, the pattern dimension measuring apparatus 20 moves the wafer W relatively horizontally with respect to the light irradiation unit 122 and the light detection unit 123, so that a plurality of regions within the wafer surface, for example, each wafer region as shown in FIG. The dimension D of the resist pattern of W _{1 to} W ₅ can be measured. The wafer regions W _{1 to} W ₅ correspond to hot plate regions R _{1 to} R ₅ of POST devices 85 to 89 described later.

  Next, the configuration of the above-described POST devices 85 to 89 will be described. As shown in FIG. 7, the POST apparatus 85 has a casing 85a in which a wafer W is loaded and unloaded (not shown) on the side surface. In the casing 85a, there are provided a lid body 130 which is located on the upper side and is movable up and down, and a hot plate accommodating portion 131 which is located on the lower side and forms the processing chamber K integrally with the lid body 130. .

  The lid 130 has a substantially cylindrical shape with an open bottom surface. An exhaust part 130 a is provided at the center of the upper surface of the lid 130. The atmosphere in the processing chamber K is uniformly exhausted from the exhaust part 130a.

As shown in FIG. 8, the hot plate 140 is divided into a plurality of, for example, five hot plate regions R ₁ , R ₂ , R ₃ , R ₄ , R ₅ . The hot plate 140 is, for example, positioned in the center when viewed from the plane, and is divided into a circular hot plate region R ₁ and hot plate regions R _{2 to} R ₅ whose periphery is divided into four arcs.

Each of the hot plate regions R _{1 to} R ₅ of the hot plate 140 has a built-in heater 141 that generates heat by power feeding, and can be heated for each of the hot plate regions R _{1 to} R ₅ . The amount of heat generated by the heater 141 in each of the hot plate regions R _{1 to} R ₅ is adjusted by the temperature controller 142. The temperature control device 142 can control the temperature of each of the hot plate regions R _{1 to} R ₅ to a predetermined heating temperature by adjusting the amount of heat generated by the heater 141. The setting of the heating temperature in the temperature control device 142 is performed by, for example, the control device 200 described later.

  As shown in FIG. 7, elevating pins 150 for supporting the wafer W from below and elevating it are provided below the hot plate 140. The elevating pin 150 can be moved up and down by an elevating drive mechanism 151. A through-hole 152 that penetrates the hot plate 140 in the thickness direction is formed near the center of the hot plate 140, and the lift pins 150 rise from below the hot plate 140 and pass through the through-hole 152, It can protrude above the plate 140.

  The hot plate accommodating portion 131 includes, for example, an annular holding member 160 that holds the hot plate 140 and holds the outer peripheral portion of the hot plate 140, and a substantially cylindrical support ring 161 that surrounds the outer periphery of the holding member 160. .

  Note that the configurations of the POST devices 86 to 89 are the same as those of the above-described POST device 85, and thus the description thereof is omitted.

  Next, the control device 200 that controls the heating temperature in the above-described POST devices 85 to 89 will be described. The control device 200 is configured by a general-purpose computer including, for example, a CPU and a memory, and is connected to the temperature control device 142 as shown in FIGS.

  As shown in FIG. 9, the control device 200 correlates the input unit 201 to which, for example, the dimension measurement result from the pattern dimension measuring device 20 is input, the resist pattern dimension D and the heating temperature of the POST devices 85 to 89. A correlation calculation unit 202 to calculate, a data storage unit 203 in which various information necessary for calculating the heating temperature of the POST devices 85 to 89 from the dimension measurement results, for example, a correlation calculated by the correlation calculation unit 202, is stored. A program storage unit 204 that stores a program P for calculating the heating temperature of the POST devices 85 to 89, a calculation unit 205 that executes the program P to calculate the heating temperature, and the calculated heating temperature to the POST devices 85 to 89. An output unit 206 for outputting is provided.

  The correlation calculation unit 202 automatically calculates a correlation M between the heating temperature T and the resist pattern dimension D in the POST apparatuses 85 to 89 as shown in FIG. 10, and the correlation M is stored in the data storage unit 203. .

The program P stored in the program storage unit 204 is obtained from the correlation M based on, for example, the resist pattern dimension measurement result in the wafer surface from the pattern dimension measuring apparatus 20, and the hot plate regions R ₁ in the POST apparatuses 85 to 89. the heating temperature of to R ₅ can be calculated. The program P for realizing the functions of the control device 200 is a computer such as a computer-readable hard disk (HD), flexible disk (FD), compact disk (CD), magnetic optical desk (MO), memory card, or the like. May be recorded in a readable storage medium and installed in the control device 200 from the storage medium.

  Next, the processing process of the wafer W in the coating and developing processing system 1 configured as described above will be described together with the inspection processing of the inspection wafer W ′. FIG. 11 is a flowchart for explaining the inspection processing steps for the inspection wafer W ′ and the processing steps for the wafer W. In the present embodiment, a case where the diameter D of the contact hole C is adjusted to a predetermined target dimension as the resist pattern dimension D as shown in FIG. 5 will be described.

First, in order to calculate a correlation M of the dimension D of the heating temperature T and the resist pattern in the POST device 85 to 89, sets a target dimension _{D g} of the initial temperatures _{T 1} and the resist pattern of the POST device 85-89, the initial inputting the temperature _{T 1} of the target dimension _{D g} to the input unit 201 of the control unit 200 (step S1 in FIG. 11). The initial temperature _{T 1} is output from the output unit 206 of the control apparatus 200 to the temperature controller 142, the heating temperature of the POST device 85-89 is set to an initial temperature _{T 1} of.

Next, the unprocessed inspection wafer W ₁ ′ is taken out from the cassette C on the cassette mounting table 6 by the wafer transfer body 8 and transferred to the delivery unit 10 of the inspection station 3. The inspection wafer W ₁ ′ transferred to the delivery unit 10 is transferred to the processing station 4 by the wafer transfer device 12, and a resist pattern forming process is performed (step S2 in FIG. 11).

A specific resist pattern forming process will be described. First, the inspection wafer W ₁ ′ is transferred to the temperature adjusting device 70 belonging to the third processing unit group G3 of the processing station 4 and adjusted to a predetermined temperature. Then, it is transported to the bottom coating device 43 by the first transport device 30, and an antireflection film is formed. Thereafter, the inspection wafer W ′ is sequentially transferred by the first transfer apparatus 30 to the heat treatment apparatus 102, the high temperature heat treatment apparatus 75, and the high precision temperature adjustment apparatus 90, and is subjected to a predetermined process in each processing apparatus. Thereafter, the inspection wafer W ₁ ′ is transferred to the resist coating apparatus 40 by the first transfer device 30, and a resist film is formed on the inspection wafer W ₁ ′.

The inspection wafer W ₁ ′ on which the resist film is formed is transferred to, for example, the PAB apparatus 81 by the first transfer apparatus 30 and subjected to heat treatment, and then the peripheral transfer apparatus 104 and the high exposure apparatus 104 by the second transfer apparatus 31. It is sequentially conveyed to the precision temperature adjusting device 93, and predetermined processing is performed in each processing device. Thereafter, the wafer is transferred to the exposure apparatus A by the wafer transfer body 111 of the interface station 5 and a predetermined pattern is exposed on the resist film on the inspection wafer W ₁ ′. The inspection wafer W ₁ ′ after the exposure processing is transferred to the PEB apparatus 94 of the processing station 4 by the wafer transfer body 111, and the inspection wafer W ₁ ′ is heated.

The inspection wafer W ₁ ′ after the heat treatment is transferred to the high-precision temperature adjusting device 91 by the second transfer device 31 and the temperature is adjusted. Thereafter, the inspection wafer W ₁ ′ is transported to the development processing apparatus 50, and the resist film on the inspection wafer W ₁ ′ is developed to form a resist pattern. Thereafter, the inspection wafer W ₁ ′ is transferred to the POST apparatus 85 by the second transfer apparatus 31.

The inspection wafer W ₁ ′ transferred to the POST apparatus 85 is transferred to the lift pins 150 that have been lifted and waited in advance, and after the lid 130 is closed, the lift pins 150 are lowered and are used for inspection. Wafer W ₁ ′ is placed on hot platen 140. At this time, the heat plate 140 is heated to the initial temperature T ₁ by the control device 200. Then, the inspection wafer W ₁ ′ is heated to the initial temperature T ₁ by the heated hot plate 140.

When the inspection wafer W ₁ ′ is heated to the initial temperature T ₁ , the resist portion of the resist pattern on the inspection wafer W ₁ ′ expands due to the thermal shrink phenomenon. Therefore, the dimension D of the resist pattern (the diameter D of the contact hole C) is reduced.

The inspection wafer W ₁ ′ after the heat treatment is transferred to the high-accuracy temperature adjusting device 72 by the first transfer device 30 and the temperature is adjusted. Thereafter, the inspection wafer W ₁ ′ is transferred by the wafer transfer device 12 to the pattern dimension measuring device 20 of the inspection station 3.

In the pattern dimension measuring apparatus 20, the inspection wafer W ₁ ′ is mounted on the mounting table 120. Next, light is irradiated from the light irradiation unit 122 to a predetermined portion of the inspection wafer W ₁ ′, the reflected light is detected by the light detection unit 123, and the resist pattern on the inspection wafer W ₁ ′ is measured by the measurement unit 124. The dimension D ₁ (the diameter D ₁ of the contact hole C) is measured (step S3 in FIG. 11). The measurement result of the resist pattern dimension D ₁ of the inspection wafer W ₁ ′ is output to the input unit 201 of the control device 200. The inspection wafer W ₁ ′ whose dimension D _{1 of the} resist pattern has been measured is then transferred to the transfer unit 10 of the inspection station 3 by the wafer transfer device 12, and transferred from the transfer unit 10 to the cassette C by the wafer transfer body 8. Returned.

Then, in the correlation calculating section 202, the heating temperature T of the POST device 85-89 is automatically changed to the heating temperature _{T 2} which is different from the initial temperature _{T 1,} the heating temperature of the POST device 85-89 is set to the heating temperature _{T 2} (Step S4 in FIG. 11). Incidentally, the change amount of the heating temperature when changing from an initial temperature T ₁ of the heating temperature T ₂ is the operator can arbitrarily set. Thereafter, a resist pattern is formed on the next inspection wafer W ₂ ′ by the same method as described above (step S 2 in FIG. 11), and the dimension D ₂ of the resist pattern is measured by the pattern dimension measuring device 20 ( Step S3 in FIG. Measurements of dimensions _{D 2} of the resist pattern is outputted to the input unit 201 of the control unit 200.

The resist pattern dimensions D ₁ and D ₂ input to the input unit 201 are output to the correlation calculation unit 202. The correlation calculation unit 202 linearly complements the resist pattern dimensions D ₁ and D ₂ and the heating temperatures T ₁ and T ₂ of the POST devices 85 to 89 to calculate the correlation M as shown in FIG. 11 step S5). The correlation M calculated by the correlation calculation unit 202 is output and stored in the data storage unit 203.

In subsequent control device 200, the program P, the resist pattern on the basis of the target dimension _{D g} of the correlation M shown in FIG. 10, the set temperature _{T g} of the heat treatment in the POST device 85-89 is calculated (FIG. 11 Step S6). In the present embodiment, the above-described steps S1 to S6 are referred to as condition setting step Q1. In the present embodiment, two inspection wafers W ′ are used to calculate the correlation M, but the correlation M may be calculated using three or more inspection wafers W ′. Further, after calculating the set temperature T _g of the POST device 85 to 89, 'subjected to heat treatment, the wafer W for inspection' wafer W for inspection at the set temperature T _g formed resist pattern on the target dimension D _g You may check if it is done.

Thus, in the condition setting step Q1, the resist pattern is set temperature _{T g} of the POST device 85-89 as being formed at the target dimension _{D g} is calculated, between the POST device 85 to 89, the resist pattern is a target The set temperature _Tg for forming with the dimension _Dg may be slightly different. Therefore, next, with reference to the wafer W 'for inspection, it corrects the set temperature _{T g} of each device POST device 85-89. When performing such an inspection, the same number of inspection wafers W ′ as the POST apparatuses 85 to 89 (or twice or three times the number) are prepared.

First, the POST device 85-89 from the control device 200 set temperature _{The T g} calculated in step S6 described above is output, the heating temperature of the POST device 85-89 is set to the set temperature _{T g.} Thereafter, a resist pattern is formed on the inspection wafer W ₃ ′ by the same method as in step S2 described above (step S7 in FIG. 11). At this time, the inspection wafer W ₃ ′ is subjected to heat treatment, for example, in the POST apparatus 85. Thereafter, the dimension D of the resist pattern on the inspection wafer W ₃ ′ is measured by the pattern dimension measuring apparatus 20 (step S8 in FIG. 11). Then, the dimension D of the resist pattern is outputted to the control unit 200, the set temperature _{T g} in the POST device 85 is corrected to the set temperature _{T r} in the control device 200 (step S9 in FIG. 11). In the present embodiment, the above-described steps S7 to S9 are referred to as a temperature correction step Q2.

The temperature correction process Q2 is also performed for the other POST devices 86 to 89. That is, for example, four inspection wafers W ₄ ′ ˜
A temperature correction step Q2 is performed on W ₇ ′, and the set temperature T _g in each of the POST devices 86 to 89 is corrected to the set temperature _Tr . The setting temperature _{T r} at each POST devices 85 to 89 may be set to a different temperature in each hot plate regions _R 1 to R ₅ of the thermal plate 140. In this case, in the pattern measuring apparatus 20, the inspection wafer W ₃ ′ ˜
The dimension D of the resist pattern is measured for each of the wafer regions W _{1 to} W _{5 of} W ₇ ′.

When the condition setting step Q1 and the temperature correction step Q2 that are inspection processing steps are completed in this way, for example, a series of processing is performed on the product wafer W to form a resist pattern. At this time, the set temperature _Tr calculated in step S10 is output from the control device 200 to the POST devices 85 to 89, and the heating temperature of the POST devices 85 to 89 is set to the set temperature _Tr . Then, a process in the same manner as in step S2 or S7 in above, the resist pattern is formed at the target dimension D _g on the wafer W (step S10 in FIG. 11). The resist pattern when forming a, on the wafer W after development, the resist pattern of the final target dimension D _g larger size is formed. Then, by heating the wafer W at a set temperature T _r in the POST device 85 to 89, inflating the resist portion of the resist pattern, the dimension of the resist pattern is adjusted to the target size D _g.

Then, the process of forming the resist pattern in step S10 is continuously performed on the wafer W. At this time, the dimension D of the resist pattern on the wafer W is periodically measured in the pattern dimension measuring apparatus 20 (step 11 in FIG. 11). The dimension measurement result is outputted to the control unit 200 from the pattern dimension measuring apparatus 20, the set temperature _{T r} of the POST device 85-89 is corrected in the control unit 200 (step S12 in FIG. 11). In the present embodiment, the steps from S10 to S12 described above are referred to as processing step Q3.

According to the above embodiment, in the condition setting step Q1, after setting the target dimension D _g of the initial temperatures T ₁ and the resist pattern of the POST device 85 to 89, a resist pattern is formed on the wafer W 'inspection Since the dimension D of the resist pattern after the heat treatment was measured by the POST apparatuses 85 to 89, the correlation M between the heating temperature T and the dimension D of the resist pattern in the POST apparatuses 85 to 89, and the set temperature of the POST apparatuses 85 to 89 _Tg can be automatically calculated. Then, since the manual operation by the operator which has been conventionally required can be omitted, the correlation M between the heating temperature T and the resist pattern dimension D in the POST devices 85 to 89 is appropriately calculated, and the POST device 85 to the set temperature T _g of the 89 can be set appropriately.

Further, it is possible to calculate automatically a correlation M and the set temperature T _g in the condition setting step Q1, it is possible to shorten the overall operation time, it is possible to improve the throughput of the wafer W processing.

Further, after calculating the automatic correlation M and the set temperature T _g in the condition setting step Q1, further a resist pattern is formed at a temperature compensation step Q2, measuring the dimensions D of the resist pattern after the heat treatment at POST device 85-89 because the can correct each set temperature _{T g} of the respective POST devices 85-89 to set temperature _{T r.} Thus, even in the case of using any of the apparatus of POST device 85 to 89, it is possible to form a resist pattern of a predetermined target dimension D _g on the wafer W.

In addition, since the set temperature _Tr can be set for each of the hot plate regions R _{1 to} R _{5 of} the POST devices 85 to 89, the wafer regions W _{1 to} W ₅ can be heated at appropriate heating temperatures, respectively. Therefore, the dimension D of the resist pattern formed on the wafer W can be made uniform in the wafer W plane.

Moreover, since the regular measuring the dimensions D of the resist pattern of the wafer W in the processing step Q3, even when the characteristics of the wafer W changes with time, appropriately setting the temperature T _r of the POST device 85-89 It can be corrected. This makes it possible to reliably form a resist pattern on the wafer W at the target dimension D _g.

Wafer in the above embodiment, by controlling the heating temperature T of the POST device 85 to 89, had been adjusted dimension D of the resist pattern on the wafer W to the target dimension D _g, the resist pattern is formed After applying a pattern expansion agent on W, the wafer W may be heat-treated. Then, by controlling the heating temperature of the heat treatment after the pattern expansion agent application, the dimension D of the resist pattern on the wafer W is adjusted to the target dimension D _g. As the pattern expansion agent, for example, a RELACS agent used in RELACS (Resolution Enhancement Lithography Assisted by Chemical Shrink) technology, SAFIER (Shrink Assist Film for Enhanced Resolution Process) (registered trademark of Tokyo Ohka Kogyo Co., Ltd.), or the like is used. It is done.

  In such a case, for example, as shown in FIG. 12, a coating processing apparatus 300 that applies a pattern expanding agent onto the wafer W is provided at the uppermost stage of the first processing apparatus group G1 of the coating and developing processing system 1. For example, as illustrated in FIG. 13, heat treatment apparatuses 301 to 304 for heating the wafer W are provided in the upper stage of the third processing apparatus group G3. In addition, since the structure of the heat processing apparatuses 301-304 is the same as the structure of the POST apparatus 85-89 mentioned above, description is abbreviate | omitted.

  As shown in FIG. 14, the coating processing apparatus 300 has a casing 300 a in which a carry-in / out port (not shown) of the wafer W is formed on the side surface and the inside can be closed. A spin chuck 310 that holds and rotates the wafer W is provided at the center of the casing 300a. The spin chuck 310 has a horizontal upper surface, and a suction port (not shown) for sucking, for example, the wafer W is provided on the upper surface. The wafer W can be sucked and held on the spin chuck 310 by suction from the suction port.

  The spin chuck 310 has a chuck drive mechanism 311 provided with, for example, a motor, and can be rotated at a predetermined speed by the chuck drive mechanism 311. The chuck drive mechanism 311 is provided with a lifting drive source such as a cylinder, and the spin chuck 310 can move up and down.

  Around the spin chuck 310, there is provided a cup 312 that receives and collects the liquid scattered or dropped from the wafer W. A discharge pipe 313 for discharging the collected liquid and an exhaust pipe 314 for exhausting the atmosphere in the cup 312 are connected to the lower surface of the cup 312.

  Above the spin chuck 310, a nozzle 315 for discharging a pattern expansion agent is provided. The nozzle 315 can be moved in the X direction in the casing 300 a by a nozzle driving unit (not shown), and can be moved in the radial direction of the wafer W on the surface of the wafer W. The nozzle 315 can be moved up and down by a nozzle driving unit.

  In the coating and developing treatment system 1 having such a configuration, the condition setting step Q1, the temperature correction step Q2, and the processing step Q3 are sequentially performed as in the above-described embodiment. In the present embodiment, the heating temperature of the heat treatment apparatuses 301 to 304 is controlled by the same method as the control of the heating temperature T of the POST apparatuses 85 to 89 performed in the above embodiment (FIG. 11). Steps S1, S4 to S6, S9, S12). Therefore, the correlation M shown in FIG. 10 is a correlation M between the heating temperature of the heat treatment apparatuses 301 to 304 and the dimension D of the resist pattern.

  Further, in this embodiment, when a resist pattern is formed on the wafer W, the heat treatment is performed by the POST apparatus 85 through the same processing process as that of the above-described embodiment, and then the wafer W is subjected to the coating treatment apparatus 300. A pattern expansion agent coating process and a heating process in the heating apparatus 301 are performed (step S10 in FIG. 11). A similar processing process is performed when a resist pattern is formed on the inspection wafer W ', and the description thereof is omitted (steps S2 and S7 in FIG. 11).

Specifically, the wafer W is heated by the POST apparatus 85 and then transferred to the coating processing apparatus 300 by the first transfer apparatus 30. In the coating processing transport apparatus 300, the wafer W is sucked and held on the spin chuck 310 and rotated, and a pattern expansion agent is discharged onto the wafer W from the nozzle 315. The discharged pattern inflating agent is diffused and applied to the entire surface of the wafer W by the centrifugal force generated by the rotation of the wafer W. Then, the resist portion of the resist pattern on the wafer W is expanded by the pattern expansion agent. Thereafter, the wafer W is transferred to the heat treatment apparatus 301 by the first transfer apparatus 30 and subjected to heat treatment. At this time, the heating temperature of the heat treatment 301 is set to a predetermined set temperature by the control device 200. Then, also in the present embodiment, it is possible to adjust the dimension D of the resist pattern on the wafer W to a predetermined target size D _g.

  In the above embodiment, the control device 200 calculates the heating temperature of the POST devices 85 to 89 or the heat treatment devices 301 to 304 to control the heating temperature of each device. A value may be calculated to control the heating temperature of each device.

  In the above embodiments, the contact hole diameter D is adjusted as the resist pattern dimension D. However, the resist pattern line width, resist pattern side wall angle, and the like can also be adjusted. .

  The preferred embodiments of the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to such examples. It is obvious for those skilled in the art that various modifications or modifications can be conceived within the scope of the idea described in the claims, and these naturally belong to the technical scope of the present invention. It is understood. The present invention is not limited to this example and can take various forms.

  For example, in the above-described embodiment, the pattern dimension measuring apparatus 20 measures the dimensions of the five regions of the wafer W, but the number and shape of these regions can be arbitrarily selected. In the above-described embodiment, the pattern dimension measuring apparatus 20 is provided in the inspection station 3, but may be provided in the processing station 4. Furthermore, the pattern dimension measuring apparatus 20 may measure the resist pattern dimension in the wafer surface by, for example, irradiating the wafer W with an electron beam and acquiring an image of the wafer W surface.

  The present invention can also be applied to a case where the substrate is another substrate such as an FPD (flat panel display) other than a wafer, a mask reticle for a photomask, or the like.

  The present invention is useful when a resist pattern is formed on a substrate and then the substrate is heat-treated to adjust the resist pattern dimension to a predetermined target dimension.

It is a top view which shows the outline of a structure of the application | coating development processing system concerning this Embodiment. It is a front view of the coating and developing treatment system according to the present embodiment. It is a rear view of the coating and developing treatment system according to the present embodiment. It is a longitudinal cross-sectional view which shows the outline of a structure of a pattern dimension measuring apparatus. It is a top view which shows the contact hole formed on the wafer. It is explanatory drawing which shows the divided | segmented wafer area | region. It is a longitudinal cross-sectional view which shows the outline of a structure of a POST apparatus. It is a top view which shows the structure of the hot platen of a POST apparatus. It is a block diagram which shows the structure of a control apparatus. It is a graph which shows the correlation with the heating temperature of a POST apparatus, and the dimension of a resist pattern. It is the flowchart explaining the inspection processing process of the wafer for an inspection, and the processing process of a wafer. It is a front view of the coating and developing treatment system according to another embodiment. It is a rear view of the coating and developing treatment system according to another embodiment. It is a longitudinal cross-sectional view which shows the outline of a structure of a coating processing apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Coating / development processing system 20 Pattern dimension measuring apparatus 85-89 POST apparatus 200 Control apparatus 300 Coating processing apparatus 301-304 Heat processing apparatus D Dimension of resist pattern P Program Q1 Condition setting process Q2 Temperature correction process Q3 Processing process W Wafer

Claims (12)

A substrate processing method of heat-treating the substrate after forming a resist pattern on the substrate,
A condition setting step of automatically calculating the correlation between the temperature of the heat treatment and the dimension of the resist pattern and the set temperature of the heat treatment after setting the initial temperature of the heat treatment and the target dimension of the resist pattern on the substrate after the heat treatment When,
Thereafter, after forming a resist pattern on the substrate, the substrate is heat-treated at the set temperature to adjust the resist pattern to the target dimension, and
The condition setting step includes
A first step of setting an initial temperature of the heat treatment and a target dimension of a resist pattern on the substrate after the heat treatment;
Forming a resist pattern on the substrate, subjecting the substrate to heat treatment at an initial temperature set in the first step, and then measuring a dimension of the resist pattern;
A third step of calculating a temperature of the heat treatment different from the initial temperature set in the first step;
Forming a resist pattern on the substrate, subjecting the substrate to heat treatment at the temperature calculated in the third step, and then measuring a dimension of the resist pattern;
A fifth step of calculating a correlation between the temperature of the heat treatment and the dimension of the resist pattern from the temperature of the heat treatment corresponding to the dimension measurement result of the resist pattern in the second step and the fourth step;
And a sixth step of calculating a set temperature of the heat treatment from the correlation calculated in the fifth step and a target dimension of the resist pattern set in the first step. Method. The condition setting step includes
After the sixth step, a resist pattern is formed on the substrate, the substrate is subjected to heat treatment at the set temperature calculated in the sixth step, the dimension of the resist pattern is measured, and the set temperature is set. The substrate processing method according to claim 1, further comprising a seventh step of confirming suitability. When there are a plurality of heat treatment apparatuses for performing the heat treatment,
After the condition setting step and before the processing step,
Forming a resist pattern on the substrate, subjecting the substrate to heat treatment at the set temperature calculated in the sixth step, and then measuring the dimension of the resist pattern;
Based on the result of dimension measurement of the resist pattern, from the correlation calculated in the fifth step, a step of correcting the set temperature of the heat treatment in each heat treatment apparatus is performed, and a temperature correction step is performed.
The substrate processing method according to claim 1, wherein in the processing step, the substrate on which the resist pattern is formed is heat-treated at a set temperature corrected in the temperature correction step. The resist pattern is formed by performing a resist film forming process for forming a resist film on a substrate, an exposure process for exposing the resist film, and a developing process for developing the exposed resist film,
4. The substrate processing method according to claim 1, wherein the heat treatment is performed after the development processing. The resist pattern includes a resist film forming process for forming a resist film on the substrate, an exposure process for exposing the resist film, a developing process for developing the exposed resist film, and a heating process for heating the substrate after the developing process. Formed by doing
The substrate processing method according to claim 1, wherein the heat treatment is performed after a heat treatment after the development processing and after applying a pattern expansion agent on the substrate. A program that operates on a computer of a control device that controls the substrate processing system in order to cause the substrate processing system to execute the substrate processing method according to claim 1. A readable computer storage medium storing the program according to claim 6. A substrate processing system for heat-treating a substrate after forming a resist pattern on the substrate,
A pattern forming portion for forming a resist pattern on the substrate;
A heat treatment apparatus for heat-treating the substrate on which the resist pattern is formed;
A pattern dimension measuring device for measuring the dimension of the resist pattern of the substrate after the heat treatment;
A control device for controlling the temperature of the heat treatment in the heat treatment device,
The controller is
A first step of setting an initial temperature of the heat treatment and a target dimension of a resist pattern on the substrate after the heat treatment; a resist pattern is formed on the substrate; and the substrate is set at an initial temperature set in the first step A second step of measuring the dimensions of the resist pattern after the heat treatment, a third step of calculating a temperature of the heat treatment different from the initial temperature set in the first step, and a resist pattern on the substrate And after the substrate is heat-treated at the temperature calculated in the third step, the fourth step of measuring the dimension of the resist pattern, the resist in the second step and the fourth step A fifth step of calculating a correlation between the temperature of the heat treatment and a dimension of the resist pattern from the temperature measurement result corresponding to the pattern dimension measurement result, the correlation calculated in the fifth step, and the first Controlling the pattern forming unit, the heat treatment apparatus, and the pattern dimension measurement apparatus to execute a sixth step of calculating a set temperature of the heat treatment from the target dimension of the resist pattern set in the step A substrate processing system as a feature. The controller is
After the sixth step, a resist pattern is formed on the substrate, the substrate is subjected to heat treatment at the set temperature calculated in the sixth step, the dimension of the resist pattern is measured, and the set temperature is set. The substrate processing system according to claim 8, wherein the pattern forming unit, the heat treatment apparatus, and the pattern dimension measuring apparatus are controlled so as to further execute a seventh step of confirming suitability. A plurality of the heat treatment apparatuses are provided,
The controller is
A resist pattern is formed on the substrate, the substrate is heat-treated at the set temperature calculated in the sixth step, and then the step of measuring the dimension of the resist pattern and the result of measuring the dimension of the resist pattern are used. The pattern forming unit, the heat treatment apparatus, and the pattern dimension measurement apparatus are controlled to further execute the step of correcting the set temperature of the heat treatment in each heat treatment apparatus from the correlation calculated in the fifth step. The substrate processing system according to claim 8 or 9, wherein In the pattern forming portion, a resist film forming process for forming a resist film on the substrate and a developing process for developing the exposed resist film are performed,
The substrate processing system according to claim 8, wherein the heat treatment is performed after the development processing in the heat treatment apparatus. In the pattern forming portion, a resist film forming process for forming a resist film on the substrate, a developing process for developing the exposed resist film, and a heating process for heating the substrate after the developing process are performed,
After the heat treatment after the development treatment, further has a coating treatment device for applying a pattern expansion agent on the substrate,
The substrate processing system according to claim 8, wherein the heat treatment is performed after the pattern expansion agent is applied.

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