JP2009146556A5 - - Google Patents

Download PDF

Info

Publication number: JP2009146556A5
Authority: JP; Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Pending

Application number

JP2008208642A

Other versions

JP2009146556A (ja

Filing date

2008-08-13

Publication date

2010-09-16

2007-12-13 Priority claimed from US11/955,831 external-priority patent/US7782673B2/en

2008-08-13 Application filed filed Critical

2009-07-02 Publication of JP2009146556A publication Critical patent/JP2009146556A/ja

2010-09-16 Publication of JP2009146556A5 publication Critical patent/JP2009146556A5/ja

Status Pending legal-status Critical Current

Links

JP2008208642A 2007-12-13 2008-08-13 半導体記憶装置 Pending JP2009146556A (ja)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US11/955,831 US7782673B2 (en)	2007-12-13	2007-12-13	Semiconductor memory device which includes memory cell having charge accumulation layer and control gate

Publications (2)

Publication Number	Publication Date
JP2009146556A JP2009146556A (ja)	2009-07-02
JP2009146556A5 true JP2009146556A5 (ja)	2010-09-16

Family

ID=40916960

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP2008208642A Pending JP2009146556A (ja)	2007-12-13	2008-08-13	半導体記憶装置

Country Status (2)

Country	Link
US (2)	US7782673B2 (ja)
JP (1)	JP2009146556A (ja)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US7782673B2 (en) *	2007-12-13	2010-08-24	Kabushiki Kaisha Toshiba	Semiconductor memory device which includes memory cell having charge accumulation layer and control gate
JP5365028B2 (ja) *	2008-03-03	2013-12-11	富士通セミコンダクター株式会社	半導体記憶装置
KR20090106869A (ko) *	2008-04-07	2009-10-12	삼성전자주식회사	3차원 메모리 장치 및 그것의 구동 방법
JP2010157283A (ja) *	2008-12-26	2010-07-15	Toshiba Corp	半導体記憶装置
JP2011113619A (ja) *	2009-11-27	2011-06-09	Toshiba Corp	Ｎａｎｄ型フラッシュメモリ
JP5268882B2 (ja) *	2009-12-28	2013-08-21	株式会社東芝	不揮発性半導体記憶装置
JP5198524B2 (ja) *	2010-09-10	2013-05-15	株式会社東芝	不揮発性半導体メモリ
JP2012169002A (ja) *	2011-02-14	2012-09-06	Toshiba Corp	半導体記憶装置
JP2012133840A (ja) *	2010-12-20	2012-07-12	Samsung Yokohama Research Institute Co Ltd	半導体記憶装置、及び記憶方法
JP5254413B2 (ja)	2011-09-22	2013-08-07	株式会社東芝	不揮発性半導体記憶装置
JP2013084318A (ja) *	2011-10-06	2013-05-09	Toshiba Corp	不揮発性半導体記憶装置
US8917557B2 (en)	2011-12-15	2014-12-23	Kabushiki Kaisha Toshiba	Nonvolatile semiconductor memory device
JP2013232258A (ja) *	2012-04-27	2013-11-14	Toshiba Corp	半導体記憶装置
JP2013254537A (ja)	2012-06-06	2013-12-19	Toshiba Corp	半導体記憶装置及びコントローラ
JP5814867B2 (ja)	2012-06-27	2015-11-17	株式会社東芝	半導体記憶装置
KR20140029953A (ko) *	2012-08-31	2014-03-11	에스케이하이닉스 주식회사	반도체 메모리 장치 및 그 동작 방법
JP2014164773A (ja) *	2013-02-21	2014-09-08	Toshiba Corp	不揮発性半導体記憶装置
KR20160053677A (ko) *	2014-11-05	2016-05-13	에스케이하이닉스 주식회사	반도체 장치
US10096356B2 (en) *	2015-12-04	2018-10-09	Toshiba Memory Corporation	Method of operation of non-volatile memory device
TWI727850B (zh) *	2020-07-13	2021-05-11	大陸商珠海南北極科技有限公司	磁阻式隨機存取記憶體及其操作方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP2709751B2 (ja) *	1990-06-15	1998-02-04	三菱電機株式会社	不揮発性半導体記憶装置およびそのデータ消去方法
JP2917924B2 (ja) *	1996-07-30	1999-07-12	日本電気株式会社	不揮発性半導体記憶装置
JP3486079B2 (ja)	1997-09-18	2004-01-13	株式会社東芝	半導体記憶装置
US5978277A (en) *	1998-04-06	1999-11-02	Aplus Flash Technology, Inc.	Bias condition and X-decoder circuit of flash memory array
JP3780865B2 (ja) *	2001-04-13	2006-05-31	セイコーエプソン株式会社	不揮発性半導体記憶装置
KR20020089587A (ko) *	2001-05-23	2002-11-30	삼성전자 주식회사	공유벌크로 형성된 섹터구조를 갖는 불휘발성 반도체메모리 장치
JP2003068086A (ja) *	2001-08-28	2003-03-07	Mitsubishi Electric Corp	不揮発性半導体記憶装置
JP2003077283A (ja) *	2001-08-31	2003-03-14	Hitachi Ltd	半導体集積回路、半導体不揮発性メモリ、メモリカード及びマイクロコンピュータ
JP4768256B2 (ja) *	2004-12-16	2011-09-07	株式会社東芝	半導体記憶装置
JP4300202B2 (ja) *	2005-06-29	2009-07-22	株式会社東芝	半導体記憶装置
US7782673B2 (en) *	2007-12-13	2010-08-24	Kabushiki Kaisha Toshiba	Semiconductor memory device which includes memory cell having charge accumulation layer and control gate
JP2010123201A (ja)	2008-11-20	2010-06-03	Toshiba Corp	不揮発性半導体記憶装置

2007
- 2007-12-13 US US11/955,831 patent/US7782673B2/en active Active
2008
- 2008-08-13 JP JP2008208642A patent/JP2009146556A/ja active Pending
2010
- 2010-08-02 US US12/848,762 patent/US8094501B2/en active Active

Publication	Publication Date	Title
BR112016019572A2 (ja)	2017-08-15
BRPI0909040A2 (ja)	2017-09-19
BRPI0908549B8 (ja)	2021-06-08
BRPI0918697A2 (ja)	2017-08-29
BRPI0920750A2 (ja)	2016-02-02
BRPI0919470A2 (ja)	2017-08-22
BRPI0922455A2 (ja)	2021-12-28
BRPI0907698A2 (ja)	2017-08-22
BRPI0917618A8 (ja)	2019-09-10
BRPI0923734A2 (ja)	2017-07-11
BRPI0908285A2 (ja)	2017-08-29
BRPI0922669A2 (ja)	2017-07-11
BRPI0908120A2 (ja)	2017-08-22
BRPI0904541A8 (ja)	2010-09-21
BRPI0919811A2 (ja)	2017-08-29
BRPI0920914A2 (ja)	2017-07-11
BRPI0922550A2 (ja)	2016-02-02
JP2009146556A5 (ja)	2010-09-16
BRPI0909508A2 (ja)	2017-08-22
CH2347250H2 (ja)	2019-09-13
AR073287B1 (ja)	2015-09-23
BRPI0919477A2 (ja)	2017-08-29
BRPI0923127A (ja)	2010-07-01
BRPI0923137A2 (ja)	2010-06-10
BRMU8803485U8 (ja)	2010-09-14