JP2008311606A - Semiconductor device, and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device provided with a voltage setting circuit and a voltage detection circuit wherein voltage setting accuracy is high and the degree of freedom of voltage adjustment is high, and to provide a manufacturing method thereof. <P>SOLUTION: The semiconductor device 1 includes: a semiconductor substrate 3 where an impurity diffusion region 2 which is an impurity diffused layer is formed; an interlayer insulating film 4 formed on the semiconductor substrate 3; a contact plug 6 formed by filling a conductive material in a contact hole 5 formed on the interlayer insulating film 4; an a resistance part 7 formed using a polysilicon film on the interlayer insulating film 4 and the contact plug 6. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor device having a resistor or a capacitor used in an analog circuit such as a voltage setting circuit or a voltage detection circuit, and a method for manufacturing the same. The present invention relates to a semiconductor device used for a detection circuit and a manufacturing method thereof.

  A voltage setting circuit that sets an arbitrary voltage on a semiconductor integrated circuit by dividing resistance and a voltage detection circuit using the voltage setting circuit are known. In these circuits, a resistor and a trimming fuse are connected in series or in parallel, and an arbitrary voltage is set by dividing the input voltage by resistance by cutting the fuse (see, for example, Patent Document 1). ).

  In addition, a voltage setting circuit and a voltage detection circuit are known that use a polysilicon thin film resistor as a resistor so as to be less affected by the potential of the wiring and suppress variation in resistance value (see, for example, Patent Document 2).

  FIG. 11 is a view showing a cross section of a semiconductor device used in a conventional voltage setting circuit.

The semiconductor device 101 includes a semiconductor substrate 102, a first interlayer insulating film 103 formed on the semiconductor substrate 102, a first interlayer insulating film 103, and a high resistance portion 104 and a low resistance portion 105. A thin film resistor 106, a first interlayer insulating film 103, a second interlayer insulating film 107 formed on the thin film resistor 106, and a contact hole 108 formed in the second interlayer insulating film 107. A contact plug 109 formed by filling a material and a wiring 110 formed using a conductive film over the second interlayer insulating film 107 and the contact plug 109 are provided.
JP 2001-77310 A JP-A-9-32229

  However, a semiconductor device resistor used in a conventional voltage setting circuit or voltage detection circuit cannot obtain a desired resistance value due to an increase or variation in contact resistance value between contact plugs connected to both ends of the resistor. There is.

  In the semiconductor device 101 shown in FIG. 11, when the contact hole 108 is formed in the second interlayer insulating film 107, the second interlayer insulating film 107 is removed by anisotropic dry etching. By over-etching for completely removing the insulating film 107, the upper portion 111 of the low resistance portion 105 made of a polysilicon film is dug, and an etching reaction product that is difficult to be removed by the cleaning process remains. Thereafter, the contact hole 108 is filled with a conductive material for electrically connecting the low resistance portion 105 and the wiring 110, but an ohmic contact is difficult to be formed due to an etching reaction product.

  Further, since the anisotropic dry etching has a variation in etching rate of about 5 to 10% in the wafer surface, the overetching is locally increased and the polysilicon film is thinned. Such a damage or thinning of the polysilicon film of the low resistance portion 105 at the bottom of the contact hole 108 causes an increase or variation in the contact resistance value. In particular, this phenomenon becomes more apparent as the number of contact plugs increases. Further, when the thin film resistor 106 is further thinned, when the contact hole 108 is formed, the dry etching penetrates the thin film resistor 106 and reaches the semiconductor substrate 102, so that the contact plug 109 and the low resistance portion 105 are formed. The contact area becomes only the side surface portion of the contact plug 109, increasing the contact resistance value and the variation.

  The present invention solves the above-described conventional problems, and a voltage setting circuit and a voltage detection circuit that can obtain a desired resistance value even with a thin film resistor, have high voltage setting accuracy, and a large degree of freedom in voltage adjustment. An object of the present invention is to provide a semiconductor device having the above and a manufacturing method thereof.

  In order to solve the above problems, a first semiconductor device of the present invention includes a semiconductor substrate, first and second impurity diffusion layers formed on the semiconductor substrate, an interlayer insulating film formed on the semiconductor substrate, A polysilicon film formed on the interlayer insulating film, a first contact plug formed in the interlayer insulating film and electrically connecting the first impurity diffusion layer and the polysilicon film, and in the interlayer insulating film And a second contact plug that electrically connects the second impurity diffusion layer and the polysilicon film.

  With this configuration, it is possible to stabilize the resistance value when the polysilicon film is used as a resistor by suppressing an increase or variation in the contact resistance value.

  Further, in the first semiconductor device of the present invention, a hydrogen diffusion preventing film formed so as to cover the upper side and the side of the polysilicon film through the covering insulating film and to be in contact with the interlayer insulating film around the polysilicon film. It is preferable to further provide.

  With this configuration, the resistance value of the resistance portion using the polysilicon film can be further stabilized.

In the first semiconductor device of the present invention, the hydrogen diffusion preventing film is made of at least one material selected from the group consisting of SiN, SiON, Al ₂ O ₃ , TiAlO, TaAlO, TiSiO, and TaSiO. It is preferable.

  The second semiconductor device of the present invention includes a semiconductor substrate, a first impurity diffusion layer formed on the semiconductor substrate, a first interlayer insulating film formed on the semiconductor substrate, and a first interlayer insulation. A first electrode formed on the film; a first contact plug formed in the first interlayer insulating film and electrically connecting the first impurity diffusion layer and the first electrode; A dielectric film formed on the first electrode, a second interlayer insulating film formed on the first interlayer insulating film, and a second film formed on the dielectric film and the second interlayer insulating film. A second contact formed in the first interlayer insulating film and the second interlayer insulating film and electrically connecting the second impurity diffusion layer formed in the semiconductor substrate and the second electrode. With a plug.

  With this configuration, it is possible to stabilize the capacitance value when the capacitor having the first electrode, the dielectric film, and the second electrode is used as a capacitor by suppressing an increase or variation in the contact resistance value. Moreover, the resistance value when used as a resistor can be stabilized.

  The first method for manufacturing a semiconductor device of the present invention includes a step (a) of forming first and second impurity diffusion layers on a semiconductor substrate, and a step (b) of forming an interlayer insulating film on the semiconductor substrate. (C) forming a first contact plug reaching the first impurity diffusion layer and a second contact plug reaching the second impurity diffusion layer in the interlayer insulating film; Forming a resistor portion made of a polysilicon film on the first and second contact plugs and electrically connecting the first and second impurity diffusion layers and the resistor portion (d);

  With this configuration, it is possible to avoid damage, thinning, or penetration of each electrode due to dry etching when forming a contact hole, and to suppress an increase or variation in contact resistance value, when using a polysilicon film as a resistor The resistance value can be stabilized.

  Further, in the first method for manufacturing a semiconductor device of the present invention, after the step (d), a step (e) of forming a covering insulating film covering the entire upper surface and side surface of the resistance portion, and covering the covering insulating film. Preferably, the method further includes a step (f) of forming a hydrogen diffusion preventing film in contact with the interlayer insulating film around the covering insulating film.

  With this configuration, the resistance value of the resistance portion using the polysilicon film can be further stabilized.

  The second method for manufacturing a semiconductor device of the present invention includes a step (a) of forming first and second impurity diffusion layers on a semiconductor substrate, and a step of forming a first interlayer insulating film on the semiconductor substrate. (B), a step (c) of forming a first contact plug reaching the first impurity diffusion layer in the first interlayer insulating film, and the first interlayer insulating film and the first contact plug. Forming a first electrode thereon, electrically connecting the impurity diffusion layer and the first electrode (d); forming a dielectric film on the first electrode (e); A step (f) of forming a second interlayer insulating film on the first interlayer insulating film so as to expose the surface of the body, and the first interlayer insulating film and the second interlayer insulating film in the first interlayer insulating film, A step (g) of forming a second contact plug reaching the two impurity diffusion layers, a dielectric film, a second interlayer insulating film, and A second electrode formed on the second contact plug, and a step of electrically connecting (h) and the second impurity diffusion layer and the second electrode.

  With this configuration, damage, thinning, or penetration of each electrode due to dry etching during contact hole formation can be avoided, and when a capacitor having a first electrode, a dielectric film, and a second electrode is used as a capacitor The capacitance value or the resistance value setting accuracy can be improved by suppressing the variation of the capacitance value and suppressing the variation of the resistance value when used as a resistor.

  The semiconductor device of the present invention is a semiconductor device including a voltage setting circuit that has a plurality of resistors and a plurality of fuses and obtains a divided voltage by dividing an input voltage. A semiconductor device is used.

  With this configuration, it is possible to realize a voltage setting circuit with high voltage setting accuracy and a high degree of freedom in voltage adjustment.

  The semiconductor device of the present invention includes a voltage setting circuit that divides an input voltage to obtain a divided voltage, a reference voltage generation circuit that supplies a reference voltage, and a comparison circuit that compares the divided voltage and the reference voltage. The voltage setting circuit includes a plurality of resistors and a plurality of fuses, and the semiconductor device is used as the resistor.

  With this configuration, it is possible to realize a voltage detection circuit with high voltage setting accuracy and a large degree of freedom in voltage adjustment.

  According to the semiconductor device and the manufacturing method thereof of the present invention, it is possible to avoid damage, thinning, or penetration of the resistor due to anisotropic dry etching when forming the contact hole, and further, a covering insulating film is formed on the resistance portion. When the hydrogen diffusion preventing film is formed through the film, it is possible to prevent hydrogen contained in the interlayer insulating film and the uppermost protective film from diffusing into the resistor, thereby suppressing variation in resistance value of the resistor. In addition, variation in the capacitance value of the capacitor can be suppressed. As a result, it is possible to realize a voltage setting circuit and a voltage detection circuit that have high voltage setting accuracy and a large degree of freedom in voltage adjustment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
In the semiconductor device of the first embodiment, the resistance value of the resistor is stabilized by forming the resistor on the interlayer insulating film.

  FIG. 1 is a diagram showing a cross section of the semiconductor device according to the first embodiment.

  The semiconductor device 1 is electrically conductive in a semiconductor substrate 3 in which an impurity diffusion region 2 that is an impurity diffusion layer is formed, an interlayer insulating film 4 formed on the semiconductor substrate 3, and a contact hole 5 formed in the interlayer insulating film 4. The contact plug 6 is formed by being filled with a material, and the resistance portion 7 is formed on the interlayer insulating film 4 and the contact plug 6 by using a polysilicon film. The impurity diffusion region 2 and the resistance portion 7 are directly and electrically connected by the contact plug 6.

  FIG. 2 is a diagram showing a method for manufacturing the semiconductor device of the first embodiment.

  After the impurity diffusion region 2 is formed on the semiconductor substrate 3 by a thermal diffusion method or an ion implantation method, an interlayer insulating film 4 made of a silicon oxide film is formed on the semiconductor substrate 3 in a thickness range of 300 to 1000 nm, for example, a thickness of 400 nm. Form (FIG. 2A).

  A mask pattern is formed on the interlayer insulating film 4 and anisotropic dry etching is performed by RIE (Reactive Ion Etching) to form a contact hole 5 having the impurity diffusion region 2 as a bottom surface in the interlayer insulating film 4. Then, the mask pattern is removed (FIG. 2B).

  A tungsten film, which is a conductive material, is deposited on the contact hole 5 and the interlayer insulating film 4 by a CVD (Chemical Vapor Deposition) method. Then, etching is performed so that the tungsten film remains only in the contact hole 5 by the etch back method, and the contact plug 6 is formed (FIG. 2C).

A polysilicon film containing no impurities is formed on the contact plug 6 and the interlayer insulating film 4 by a CVD method in a thickness range of 100 to 500 nm, for example, a thickness of 300 nm. Impurities such as boron are introduced into the entire surface of the polysilicon film by ion implantation so that a desired resistance value can be obtained. The boron concentration is in the range of 1 × 10 ¹⁶ to 1 × 10 ²¹ / cm ³ , for example, 3 × 10 ¹⁹ / cm ³ . A mask pattern is formed and etched by the RIE method, and the mask pattern is removed to form the resistance portion 7 (FIG. 2D).

  According to the semiconductor device and the manufacturing method thereof of the first embodiment, since the resistance portion 7 is formed after the contact plug 6 is formed, the resistance portion 7 is not damaged or thinned by etching when the contact hole 5 is formed. Further, the contact hole 5 does not penetrate the thin polysilicon film and reach the base of the polysilicon film. For this reason, it is possible to stabilize the resistance value of the resistance portion 7 by suppressing an increase or variation in the contact resistance value.

  The resistance value of the resistor is not limited to the polysilicon film and is generally determined by the following equation.

R = (ρ / t) × (L / W) (1)
Here, R: resistance value, ρ: resistivity, t: film thickness, L: length of resistor, and W: width of resistor. From the equation (1), it can be seen that the relationship between the dimension of the resistance portion 7 and the variation in the resistance value of the resistance portion 7 greatly depends on the length L and width W of the resistance portion 7. As the resistance portion 7 is miniaturized, the ratio of the thinned region and the ratio of the contact diameter in the width of the resistance portion 7 increase, and the resistance value varies.

  FIG. 3 is a diagram showing the relationship between the width of the resistance portion and the resistance value variation of the resistance portion according to the semiconductor device of the first embodiment.

  The case of the semiconductor device of the first embodiment is shown by a solid line, and the case of a conventional semiconductor device is shown by a broken line as a comparative example. In addition, the horizontal axis indicates the width of the resistance portion, and the vertical axis indicates variation in resistance value. This variation in resistance value is a standard deviation of a value obtained by dividing a resistance value difference between adjacent resistors by an average of these resistance values.

  As shown in FIG. 3, it can be seen that the variation in the resistance value of the resistance unit according to the semiconductor device of the first embodiment is better than that of the conventional semiconductor device. This improvement is 6% when the width of the resistance portion is 2.2 μm, for example.

  In the semiconductor device of the first embodiment, even if the variation in the etching rate of the polysilicon film is about 5 to 10% in the wafer surface, the contact hole is formed by forming the resistance portion 7 after the contact plug 6 is formed. There is no damage or thinning of the resistance portion 7 due to etching when forming 5, and the contact hole 5 does not penetrate through the thin polysilicon film and reach the base of the polysilicon film. For this reason, the variation in the contact resistance value caused by the variation in the etching rate can be suppressed, and the variation in the resistance value of the resistance portion can be suppressed as described above.

  In the semiconductor device according to the first embodiment, a silicon oxide film is used for the interlayer insulating film 4. However, the present invention is not limited to this, and a silicon nitride film or a silicon nitride film and a silicon oxide film are used. May be used.

  In the semiconductor device of the first embodiment, the tungsten film deposited on the contact hole 5 and the interlayer insulating film 4 is etched by etch back. However, the present invention is not limited to this, and the CMP is performed. Etching may be performed by a (Chemical Mechanical Polishing) method.

(Modification of Embodiment 1)
This modification further improves the stabilization of the resistance value of the resistance section in the first embodiment.

  FIG. 4 is a view showing a cross section of a semiconductor device according to a modification of the first embodiment.

  In the present modification, the same components as those in the first embodiment are denoted by the same reference numerals, description thereof will be omitted, and different portions will be described.

  This modification is different from the first embodiment because the periphery of the resistance portion is covered with a hydrogen diffusion preventing film.

  As shown in FIG. 4, the semiconductor device 8 in this modification has a hydrogen diffusion prevention film 10b formed so as to cover the resistance portion 7 formed of a polysilicon film through a covering insulating film 9b. Yes.

  The resistance value of the resistance portion formed of the polysilicon film varies as hydrogen contained in the interlayer insulating film or the uppermost protective film diffuses into the resistance portion. The cause of this is that the carriers trapped in the dangling bonds at the polysilicon grain boundary interface are replaced with hydrogen diffused in the polysilicon and work as free carriers, which promotes variations in the resistance value of the resistance portion. It is considered a thing.

  Therefore, in this modification, by forming a hydrogen diffusion prevention film so as to cover the periphery of the resistor, hydrogen diffusion to the resistance portion is prevented, and the resistance value of the resistance portion is further stabilized.

  FIG. 5 is a diagram showing a method for manufacturing a semiconductor device according to this modification.

  Since this modification is the same as the manufacturing method of the first embodiment up to the formation of the resistor portion 7 made of a polysilicon film, the following description will be made after the resistor portion 7 is formed.

  First, after forming the resistance portion 7, an insulating film 9a made of a silicon oxide film is deposited over the entire surface using the CVD method or the like so as to cover the resistance portion 7 (FIG. 5A).

  Next, a predetermined region of the insulating film 9a is etched using the RIE method or the like to form a covering insulating film 9b on the resistor 7 (FIG. 5B).

  Next, a hydrogen diffusion prevention film 10a made of titanium aluminum oxide (TiALO) is deposited over the entire surface using a sputtering method or the like so as to cover the surface of the covering insulating film 9b on the resistance portion 7 (FIG. 5C). )).

  Next, a predetermined region of the hydrogen diffusion preventing film 10a is etched by using the RIE method or the like to form the hydrogen diffusion preventing film 10b (FIG. 5D).

  According to the semiconductor device and the manufacturing method thereof of the present modification, as shown in FIG. 4, since the entire surface of the resistance portion 7 is covered with the hydrogen diffusion prevention film 10b through the covering insulating film 9b, the resistance portion 7 is reached. It is possible to prevent the diffusion of hydrogen very effectively. As a result, it is possible to obtain a semiconductor device having a voltage setting circuit and a voltage detection circuit in which fluctuations in the resistance value of the resistance unit 7 are suppressed, the voltage setting accuracy is higher, and the degree of freedom of voltage adjustment is greater.

  FIG. 6 shows the resistance value fluctuation suppressing effect of the hydrogen diffusion preventing film according to the semiconductor device of this modification. The relationship between the coating rate of the hydrogen diffusion preventing film covering the upper surface of the resistance part and the resistance value fluctuation of the resistance part is shown. FIG. The hydrogen diffusion prevention film here uses a metal wiring layer made of aluminum.

  As shown in FIG. 6, it can be seen that the resistance value varies depending on the coverage of the hydrogen diffusion preventing film. The variation here is a variation with a coverage of 10%, and the variation of the resistance value of the resistance portion is 0.8 kΩ / □.

  In this modification, titanium aluminum oxide is used as the material of the hydrogen diffusion preventing film 10b. However, the present invention is not limited to this, and other materials may be used as long as the material has a hydrogen diffusion preventing ability. Also good. The same effect can be obtained even when a plurality of types of hydrogen diffusion preventing films 10b are used in a laminated structure.

(Embodiment 2)
In the semiconductor device according to the second embodiment, the capacitor is formed on the interlayer insulating film to stabilize the capacitance value of the capacitor and stabilize the resistance value when used as a resistor.

  FIG. 7 is a view showing a cross section of the semiconductor device according to the second embodiment.

  The semiconductor device 11 includes a semiconductor substrate 13 in which the impurity diffusion region 12 is formed, a first interlayer insulating film 14 formed on the semiconductor substrate 13, and a first contact formed in the first interlayer insulating film 14. A first contact plug 16 formed by filling a hole 15 with a conductive material, a first electrode 17 formed on the first interlayer insulating film 14 and the first contact plug 16, and a first electrode 17 and a second interlayer insulating film formed in a region other than the region where the first electrode 17 and the dielectric film 18 are formed on the first interlayer insulating film 14. 19, a second contact plug 21 formed by filling a second contact hole 20 formed in the first interlayer insulating film 14 and the second interlayer insulating film 19 with a conductive material, a dielectric film 18, Second interlayer insulating film 19 and second And a second electrode 22 formed on the emission tact plug 21. The first electrode 17, the dielectric film 18 and the second electrode 22 constitute an MIM (Metal-Insulator-Metal) type capacitor 23.

  FIG. 8 shows a method for manufacturing the semiconductor device of the second embodiment.

  After the impurity diffusion region 12 is formed on the semiconductor substrate 13, a first interlayer insulating film 14 made of a silicon oxide film is formed on the semiconductor substrate 13. A first contact hole 15 having the bottom surface of the impurity diffusion region 12 is formed in the first interlayer insulating film 14, and a first contact plug 16 is formed in the first contact hole 15 (FIG. 8A). .

  An aluminum film and a silicon nitride film are continuously formed on the first contact plug 16 and the first interlayer insulating film 14. Then, dry etching is performed by the RIE method to form the first electrode 17 and the dielectric film 18. A silicon oxide film is deposited on the first interlayer insulating film 14 and the dielectric film 18, the dielectric film 18 is exposed by an etch back method, and the first electrode 17 on the first interlayer insulating film 14 and the dielectric are exposed. A second interlayer insulating film 19 is formed in a region other than the region where the body film 18 is formed (FIG. 8B).

  A second contact hole 20 having the bottom surface of the impurity diffusion region 12 is formed in the first interlayer insulating film 14 and the second interlayer insulating film 19, and a second contact plug 21 is formed in the second contact hole 20. (FIG. 8C).

  An aluminum film is formed on the second interlayer insulating film 19 and the dielectric film 18, and dry etching is performed to form the second electrode 22 (FIG. 8D).

  According to the semiconductor device and the manufacturing method thereof of the second embodiment, the first electrode 17 is formed after the first contact hole 15 is formed, and the second electrode 22 is formed after the second contact hole 20 is formed. Therefore, there is no damage to the first electrode 17 and the second electrode 22 due to etching when the first and second contact holes 15 and 20 are formed. For this reason, it is possible to stabilize the capacitance value when the MIM capacitor 23 is used as a capacitor, and to stabilize the resistance value when used as a resistor, by suppressing an increase or variation in contact resistance value. .

  In the semiconductor device according to the second embodiment, the silicon oxide film deposited on the first interlayer insulating film 14 and the dielectric film 18 is etched by etch back, but the present invention is limited to this. It may be etched by a CMP method instead of the one.

  In the semiconductor device of the second embodiment, silicon oxide films are used for the first interlayer insulating film 14 and the second interlayer insulating film 19, but the present invention is not limited to this. A nitride film or a laminated film of a silicon nitride film and a silicon oxide film may be used.

  In the semiconductor device of the second embodiment, aluminum is used for the first electrode 17 and the second electrode 22, but the present invention is not limited to this, and metal silicide may be used. .

(Embodiment 3)
The semiconductor device according to the third embodiment includes a voltage detection circuit that uses the semiconductor device according to the first or second embodiment as a resistor of the voltage setting circuit, so that the voltage setting accuracy can be increased. The degree of freedom of adjustment can be increased.

  FIG. 9 is a diagram illustrating a configuration of a voltage setting circuit according to the semiconductor device of the third embodiment.

  In the voltage setting circuit 31, a resistor Rbottom, setting resistors R0, R1,..., R (n−) are connected between a terminal 32 connected to the ground potential and a terminal 33 connected to the input voltage (Vdd). 1) Rn and resistor Rtop are connected in series. The semiconductor device of the first or second embodiment is used for at least one of the resistor Rbottom, the setting resistors R0, R1,..., R (n−1), Rn, and the resistor Rtop. Each setting resistor is connected in parallel with fuses RL0, RL1,..., RL (n-1), RLn. One end of the fuse RLbottom is connected to a contact 34 between the resistor Rbottom and the setting resistor R0, and one end of the fuse RLtop is connected to a contact 35 between the resistor Rtop and the setting resistor Rn. The other ends of the fuse RLbottom and the fuse RLtop are each connected to a comparison circuit (not shown) via a terminal 36.

  The fuse RLbottom is previously cut by laser trimming. Thus, the resistor Rtop constitutes a voltage dividing resistor Ra, and the resistor Rbottom and the setting resistors R0, R1,..., R (n−1), Rn constitute a voltage dividing resistor Rb. In the voltage setting circuit 31, a desired series resistance value can be obtained by cutting an appropriate one of the fuses RL0 to RLn by laser trimming.

  In the voltage setting circuit according to the third embodiment, at least one of the resistor Rbottom, the setting resistors R0, R1,..., R (n−1), Rn, and the resistor Rtop, By using the semiconductor device of the second embodiment, a resistance setting variation of the resistor or the setting resistor is suppressed, and a voltage setting circuit with high voltage setting accuracy is realized. Furthermore, since the resistance value variation of the resistor or the setting resistor is small, using the resistors and setting resistors having various resistance values from large to small, it is possible to obtain exactly the desired series resistance value. Thus, a voltage setting circuit having a large degree of freedom in voltage adjustment is realized.

  FIG. 10 is a diagram illustrating a configuration of a voltage detection circuit according to the semiconductor device of the third embodiment.

  In the voltage detection circuit 41, the terminal 35 of the voltage setting circuit 31 shown in FIG. 9 is connected to the inverting input terminal of the comparison circuit 42. The input voltage Vdd to be measured, which is input to the input terminal 33, is divided by the voltage dividing resistors Ra and Rb and input to the inverting input terminal of the comparison circuit 42. A reference voltage generation circuit 43 is connected to the non-inverting input terminal of the comparison circuit 42, and a preset reference voltage Vref is applied. The output of the comparison circuit 42 is output to the outside via the output terminal 44.

  In the voltage detection circuit 41, when the input voltage Vdd is high and the voltage divided by the voltage dividing resistors Ra and Rb is higher than the reference voltage Vref, the output of the comparison circuit 42 maintains Low. When the input voltage Vdd drops and the voltage divided by the voltage dividing resistors Ra and Rb becomes lower than the reference voltage Vref, the output of the comparison circuit 42 becomes High.

  Generally, in the voltage detection circuit, the reference voltage Vref supplied from the reference voltage generation circuit may vary due to variations in the manufacturing process. In the voltage detection circuit 41 according to the third embodiment, the configuration of the semiconductor device according to the first or second embodiment is used for the voltage setting circuit 31, and the voltage setting accuracy is compensated by compensating for the variation of the reference voltage Vref. A voltage detection circuit having a high degree of freedom in voltage adjustment can be realized.

  The semiconductor device and the manufacturing method thereof according to the present invention eliminate the influence of dry etching when forming a contact hole, suppress an increase or variation in the contact resistance value, stabilize the resistance value of the resistor, and The capacitance value can be stabilized. Accordingly, the setting accuracy of the resistance value and the capacitance value can be improved, and a voltage setting circuit with high voltage setting accuracy and high voltage adjustment freedom can be realized. Therefore, a semiconductor device having a voltage detection circuit and other analog circuits and its It is useful as a production method.

The figure which shows the cross section of the semiconductor device of Embodiment 1 of this invention The figure which shows the manufacturing method of the semiconductor device of Embodiment 1 of this invention. The figure which shows the relationship between the width | variety of a resistance part and the dispersion | variation in the resistance value of a resistance part which concern on the semiconductor device of Embodiment 1 of this invention. The figure which shows the cross section of the semiconductor device of the modification of Embodiment 1 of this invention The figure which shows the manufacturing method of the semiconductor device of the modification of Embodiment 1 of this invention. The figure which shows the relationship between the coating rate of the hydrogen diffusion prevention film which covers the resistor which concerns on the semiconductor device of the modification of Embodiment 1 of this invention, and the fluctuation | variation of the resistance value of a resistor The figure which shows the cross section of the semiconductor device of Embodiment 2 of this invention The figure which shows the manufacturing method of the semiconductor device of Embodiment 2 of this invention. The figure which shows the structure of the voltage setting circuit which concerns on the semiconductor device of Embodiment 3 of this invention. The figure which shows the structure of the voltage detection circuit which concerns on the semiconductor device of Embodiment 3 of this invention. The figure which shows the cross section of the conventional semiconductor device

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,8,11 Semiconductor device 2,12 Impurity diffusion area | region 3,13 Semiconductor substrate 4 Interlayer insulation film 6 Contact plug 7 Resistance part 9a Insulation film 9b Cover insulation film 10a, 10b Hydrogen diffusion prevention film 14 1st interlayer insulation film 16 First contact plug 17 First electrode 18 Dielectric film 19 Second interlayer insulating film 21 Second contact plug 22 Second electrode 31 Voltage setting circuit 41 Voltage detection circuit 42 Comparison circuit 43 Reference voltage generation circuit Rtop, Rbottom resistor R0, R1, R (n-1), Rn Setting resistor RLtop, RLbottom, RL0, RL1, RL (n-1), RLn fuse

Claims (9)

A semiconductor substrate;
First and second impurity diffusion layers formed in the semiconductor substrate;
An interlayer insulating film formed on the semiconductor substrate;
A polysilicon film formed on the interlayer insulating film;
A first contact plug formed in the interlayer insulating film and electrically connecting the first impurity diffusion layer and the polysilicon film;
A semiconductor device comprising: a second contact plug formed in the interlayer insulating film and electrically connecting the second impurity diffusion layer and the polysilicon film. A hydrogen diffusion prevention film is further provided, which covers an upper side and a side of the polysilicon film through a covering insulating film, and is formed so as to be in contact with the interlayer insulating film around the polysilicon film. Item 14. The semiconductor device according to Item 1. The hydrogen diffusion prevention film is made of at least one material selected from the group consisting of SiN, SiON, Al ₂ O ₃ , TiAlO, TaAlO, TiSiO, and TaSiO. Semiconductor device. A semiconductor substrate;
A first impurity diffusion layer formed on the semiconductor substrate;
A first interlayer insulating film formed on the semiconductor substrate;
A first electrode formed on the first interlayer insulating film;
A first contact plug formed in the first interlayer insulating film and electrically connecting the first impurity diffusion layer and the first electrode;
A dielectric film formed on the first electrode;
A second interlayer insulating film formed on the first interlayer insulating film;
A second electrode formed on the dielectric film and the second interlayer insulating film;
A second impurity diffusion layer formed in the first interlayer insulating film and the second interlayer insulating film and electrically connecting the second impurity diffusion layer formed in the semiconductor substrate and the second electrode; A semiconductor device comprising a contact plug. Forming the first and second impurity diffusion layers in the semiconductor substrate (a);
Forming an interlayer insulating film on the semiconductor substrate (b);
Forming a first contact plug reaching the first impurity diffusion layer and a second contact plug reaching the second impurity diffusion layer in the interlayer insulating film;
Forming a resistance portion made of a polysilicon film on the interlayer insulating film and the first and second contact plugs, and electrically connecting the first and second impurity diffusion layers and the resistance portion; And (d) a method for manufacturing a semiconductor device. After step (d)
A step (e) of forming a covering insulating film covering the entire upper surface and side surfaces of the resistance portion;
The semiconductor device according to claim 5, further comprising a step (f) of covering the covering insulating film and forming a hydrogen diffusion preventing film in contact with the interlayer insulating film around the covering insulating film. Production method. Forming the first and second impurity diffusion layers in the semiconductor substrate (a);
A step (b) of forming a first interlayer insulating film on the semiconductor substrate;
Forming a first contact plug reaching the first impurity diffusion layer in the first interlayer insulating film (c);
A step (d) of forming a first electrode on the first interlayer insulating film and the first contact plug, and electrically connecting the impurity diffusion layer and the first electrode;
Forming a dielectric film on the first electrode (e);
Forming a second interlayer insulating film on the first interlayer insulating film so as to expose the surface of the dielectric;
Forming a second contact plug reaching the second impurity diffusion layer in the first interlayer insulating film and the second interlayer insulating film;
Forming a second electrode on the dielectric film, the second interlayer insulating film and the second contact plug, and electrically connecting the second impurity diffusion layer and the second electrode; And (h) a method for manufacturing a semiconductor device. A semiconductor device including a voltage setting circuit that has a plurality of resistors and a plurality of fuses to obtain a divided voltage by dividing an input voltage,
A semiconductor device using the semiconductor device according to claim 1 or 4 as the resistor. A voltage setting circuit that divides the input voltage to obtain a divided voltage;
A reference voltage generating circuit for supplying a reference voltage;
A semiconductor device comprising a voltage detection circuit having a comparison circuit for comparing the divided voltage and the reference voltage,
The voltage setting circuit has a plurality of resistors and a plurality of fuses,
A semiconductor device using the semiconductor device according to claim 1 or 4 as the resistor.

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