JP2008112189A - Display device of active matrix drive type - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device which keeps the duration of energization of a display element accurately in proportion to the value of data voltage despite variations in characteristics of transistors constituting each pixel of the device, and performs power consumption diminished as compared with devices of the prior art. <P>SOLUTION: The display device of the active matrix drive type comprises a display panel having a plurality of the pixels arranged in the form of a matrix, and each pixel 51 of the display panel has: display elements 50 that emit light when supplied with electric power; and a control circuit for controlling the luminescence period of each display element within one frame period in accordance with the data voltage to be supplied from outside. A control circuit of each pixel 51 of the display panel has: a first control element TR3 for starting energizing the display element 50; and a second control element TR4 for stopping energizing the display element. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a display device including a display panel configured by arranging a plurality of pixels in a matrix like an organic electroluminescence display device.

  In recent years, organic electroluminescence displays (hereinafter referred to as organic EL displays) have been developed. For example, adopting organic EL displays in mobile phones is being studied. As driving methods for organic EL displays, there are known a passive matrix driving type in which time-division driving is performed using scanning electrodes and data electrodes, and an active matrix driving type in which light emission of each pixel is maintained over one vertical scanning period. Yes.

  In the active matrix driving type organic EL display, as shown in FIG. 51, each pixel (52) has an organic EL element (50), a driving transistor TR2 for controlling energization to the organic EL element (50), and scanning. A writing transistor TR1 that is rendered conductive in response to application of the scanning voltage SCAN by the electrode and a capacitive element C to which the data voltage DATA from the data electrode is applied when the writing transistor TR1 is rendered conductive are provided. The output voltage of the capacitive element C is applied to the gate of the driving transistor TR2.

  First, a voltage is sequentially applied to each scan electrode, a plurality of write transistors TR1 connected to the same scan electrode are turned on, and a data voltage (input signal) is applied to each data electrode in synchronization with this scan. At this time, since the writing transistor TR1 is in a conductive state, charges corresponding to the data voltage are accumulated in the capacitor C.

  Next, the operating state of the driving transistor TR2 is determined by the amount of charge accumulated in the capacitive element C, and when the driving transistor TR2 is turned on, data is transferred to the organic EL element (50) via the driving transistor TR2. A current having a magnitude corresponding to the voltage is supplied. As a result, the organic EL element (50) is lit with brightness according to the data voltage. This lighting state is maintained for one vertical scanning period.

  As described above, an analog drive organic EL display that supplies a current of a magnitude corresponding to the data voltage to the organic EL element (50) and lights the organic EL element (50) at a brightness corresponding to the data voltage. Has a problem of display unevenness. Therefore, a digital drive type organic EL display that expresses multiple gradations by supplying a pulse current having a duty ratio corresponding to a data voltage to the organic EL element (50) has been proposed (see, for example, Patent Document 1). ).

  In the digital drive type organic EL display, as shown in FIG. 53 (a), one field (or one frame) which is a display period of one screen is divided into a plurality of (N) subfields (or subframes) SF. Each subfield SF is composed of a scanning period and a light emission period. Here, all the scanning periods included in one field have the same length, but the light emitting period has a length of 2 to the nth power (n = 0, 1, 2,... N−1). Has changed. In the illustrated example (N = 4), the four light emission periods are set to lengths of 8, 4, 2 and 1, respectively, and 16 gradations can be expressed by turning each light emission period on and off. .

  In the subfield driving described above, in each subfield SF, a scanning voltage is applied to the writing transistor TR1 constituting each pixel in the scanning period, and binary data of the subfield is written to the capacitor C, During the subsequent light emission period, current is supplied to the organic EL element according to the binary data by the driving transistor TR2.

  However, in the organic EL display adopting the above-described subfield driving method, since it is necessary to scan all horizontal scanning lines in each of a plurality of subfields in one field, high-speed scanning is accompanied with the increase in the number of gradations. There are problems that necessitates a problem and a problem that a pseudo contour occurs.

  Therefore, the applicant has proposed an organic EL display device as shown in FIG. In the organic EL display device, each pixel (51) includes an organic EL element (50) and a driving transistor that turns on / off energization of the organic EL element (50) in response to an input of an on / off control signal to the gate. TR2, a write transistor TR1 that is turned on when a scan voltage from the scan driver is applied to the gate, and a capacitive element C to which a data voltage is applied from the data driver when the write transistor TR1 is turned on. And a comparator (9) for supplying the ramp voltage supplied from the ramp voltage generating circuit and the output voltage of the capacitive element C to a pair of positive and negative input terminals and comparing the two voltages, the output signal of the comparator (9) Is supplied to the gate of the driving transistor TR2.

  A current supply line (54) is connected to the source of the driving transistor TR2, and the drain of the driving transistor TR2 is connected to the organic EL element (50). The data driver is connected to one electrode (for example, source) of the writing transistor TR1, and the other electrode (for example, drain) of the writing transistor TR1 is connected to one end of the capacitive element C, and the comparator (9). Is connected to the inverting input terminal. The output terminal of the ramp voltage generating circuit is connected to the non-inverting input terminal of the comparator (9).

  In the organic EL display device, as shown in FIG. 53B, one field period is divided into a first scanning period and a second light emission period. In the scanning period, for each horizontal line, the scanning voltage from the scanning driver is applied to the writing transistor TR1 constituting each pixel (51), and the writing transistor TR1 is turned on. The data voltage from the data driver is applied, and the voltage is stored as an electric charge. As a result, data for one field is set for all the pixels constituting the organic EL display device.

  As shown in FIG. 53C, the ramp voltage generation circuit maintains a high voltage value in the first scanning period and linearly extends from a low voltage value to a high voltage value in the second light emission period for each field period. A ramp voltage that varies with time. In the first half scanning period, a high voltage from the ramp voltage generation circuit is applied to the non-inverting input terminal of the comparator (9), so that the output of the comparator (9) is independent of the input voltage to the inverting input terminal. As shown in FIG. 53 (d), it is always high.

  In addition, the ramp voltage from the ramp voltage generation circuit is applied to the non-inverting input terminal of the comparator (9) during the latter light emission period, and at the same time, the output voltage (data voltage) of the capacitive element C is inverted to the inverting input of the comparator (9). By being applied to the terminal, the output of the comparator (9) takes two values, low and high, according to the comparison result of both voltages as shown in FIG. 53 (d). That is, the output of the comparator is low while the ramp voltage is below the data voltage, and the comparator output is high while the ramp voltage is above the data voltage. Here, the length of the period during which the output of the comparator is low is proportional to the magnitude of the data voltage.

In this way, when the output of the comparator (9) becomes low for a period proportional to the magnitude of the data voltage, the driving transistor TR2 is turned on only for the period, and the energization to the organic EL element (50) is turned on. It becomes. As a result, the organic EL element (50) of each pixel (51) emits light for a period proportional to the magnitude of the data voltage for each pixel (51) within one field period. Is realized. According to the above-described organic EL display device, multi-tone expression is performed only by performing one scan within one field period. Therefore, high-speed scanning is unnecessary, and no pseudo contour is generated. .
Japanese Patent Laid-Open No. 10-312173 Japanese Patent No. 3305946 JP 2000-235370 A JP 2002-297097 A JP 2002-287682 A

  However, even in the organic EL display device including the pixel (51) shown in FIG. 52, it is unavoidable that the characteristics of the plurality of transistors constituting the comparator (9) vary. As a result, The time when the output of the comparator (9) is low, that is, the time when the current flows through the organic EL element (50) is not exactly proportional to the magnitude of the data voltage, resulting in display unevenness and image quality deterioration. Was left. Further, in the display devices disclosed in Patent Document 2 and Patent Document 4, the current flowing through the comparator is not negligible compared to the current flowing through the organic EL element, which increases the power consumption. It was.

  Therefore, a first object of the present invention is to provide an active matrix drive type display in which the energization time for the display element is exactly proportional to the magnitude of the data voltage, regardless of variations in the characteristics of the transistors constituting each pixel. Is to provide a device. A second object of the present invention is to provide an active matrix drive type display device capable of reducing power consumption as compared with the prior art.

  An active matrix drive display device according to the present invention includes a display panel configured by arranging a plurality of pixels in a matrix, and each pixel of the display panel includes a display element that emits light upon receiving power supply. A control circuit is provided that controls the light emission period of each display element within one frame period in accordance with the data voltage supplied from the outside. And the control circuit of each pixel which comprises a display panel is provided with the 1st control element for starting energization to a display element, and the 2nd control element for stopping energization to a display element.

  In the active matrix drive display device of the present invention, a first control element for starting energization of the display element and a second control element for stopping energization of the display element in each pixel of the display panel, Therefore, in the manufacturing process of the display panel, two control elements in the same pixel are simultaneously formed in the very close position by the same process. Therefore, these two control elements are similarly subject to characteristic variations. Even if the time at which the first control element operates to start energization of the display element is shifted, the second control element is subsequently controlled. The point in time when the element operates to stop energization of the display element is also shifted in the same direction by the same amount. As a result, the time during which the display element is energized is a time according to the data voltage regardless of variations in the characteristics of both control elements.

  The active matrix driving display device according to the present invention is configured by connecting a scanning driver and a data driver to a display panel configured by arranging a plurality of pixels in a matrix, and each pixel of the display panel is A display element that emits light when supplied with current or voltage, a writing element that is turned on when a scanning voltage is applied from the scanning driver, and a data voltage that is applied from the data driver when the writing element is turned on The voltage holding means for holding the voltage, the driving element for turning on / off the energization of the display element in response to the input of the on / off control signal, and the voltage holding means by a lamp voltage having a predetermined rate of change. Pulse width modulation control means for controlling on / off of the drive element by pulse width modulation of the output voltage of the drive element, and the pulse width modulation control Means is provided with off-control element for turning off said drive element and on the control element for turning on the driving element.

  In a specific configuration, the on control element operates by applying a voltage according to the lamp voltage, and turns on the driving element, and the off control element sets the sum of the data voltage and the lamp voltage. The operation is performed by applying a corresponding voltage to turn off the driving element. Alternatively, the on-control element operates by applying a voltage corresponding to the sum of the data voltage and the lamp voltage, and turns on the driving element, and the off-control element has the lamp voltage It operates by applying a voltage according to the magnitude and turns off the drive element.

  In the active matrix drive display device of the present invention, a scanning voltage from a scanning driver is applied to a writing element constituting each pixel in a scanning period within a display period of one screen so that the writing element is turned on. Thus, the data voltage from the data driver is applied to the voltage holding means, and the voltage is held.

  On the other hand, a ramp voltage having a predetermined rate of change is applied to the pulse width modulation control means within the light emission period within the display period of one screen, and the pulse width modulation control means outputs the voltage holding means according to the lamp voltage. The voltage (data voltage) is subjected to pulse width modulation, and the off control element turns off the drive element when a period corresponding to the data voltage elapses after the on control element turns on the drive element. As a result, the display element is energized only for a period corresponding to the data voltage.

  Here, the pair of on-control elements and off-control elements exist in the same pixel and are close to each other, and are formed simultaneously by the same manufacturing process. (Threshold level between the gate and the source) is generated in the same manner, and even when the time when the on-control element turns on the driving element is shifted due to the variation, the time when the off-control element turns off the driving element after that is the same. Will only shift in the same direction. Therefore, the time from when the on control element turns on the drive element to when the off control element turns off the drive element is a time corresponding to the data voltage regardless of variations in the characteristics of both control elements.

  In the active matrix drive display device according to the present invention, each pixel of the display panel has a first control element for starting energization to the display element and a second control element for stopping energization to the display element. In the configuration in which the first control element also serves to drive the display element, the first control element is interposed in series in a power supply line extending from a power source to which power is to be supplied to the display element. The second control element is turned on when energization of the display element is started, and the second control element is turned on when energization of the display element is stopped to turn off the first control element, thereby energizing the display element. A specific configuration for stopping can be adopted.

  Here, when the first control element and the second control element are configured by the first transistor and the second transistor, respectively, the first transistor serves as a driving transistor for driving the display element. By changing the cathode potential, the first transistor can be operated in either the linear region (non-saturated region) or the saturated region. That is, when the driving transistor is operated in the saturation region, the variation in characteristics of the driving transistor greatly affects the energization time for the display element, but if the driving transistor is configured by the first transistor as described above, Since the variation in the characteristics of the first transistor and the second transistor that should control the energization time for the display element is offset, the first transistor can be operated not only in the linear region but also in the saturation region.

  In addition, since the first control element is interposed in series in the power supply line extending from the power supply to which power is to be supplied to the display element, the power supply to the display element is turned on / off. Therefore, generation of useless current can be avoided.

  In the active matrix drive display device according to the present invention, the control circuit of each pixel includes a first control element for starting energization of the display element and a second control element for stopping energization of the display element. And a light emission period adjusting means for adjusting a light emission period of the display element by controlling an ON time point of the first control element or an ON time point of the second control element according to one terminal voltage of the display element at the light emission start time point. Is provided.

  Here, the light emission period adjusting means extends the light emission period of the display element for each frame period when the voltage between the terminals of the display element at the start of light emission increases, and displays the display element when the voltage between the terminals decreases. The light emission period is shortened. As a result, the amount of light emitted from the display element in one frame becomes a magnitude corresponding to the data voltage regardless of the change in characteristics of the display element due to temperature change or change over time, and the change in display element characteristic is absorbed. Become.

  According to the active matrix drive type display device of the present invention, an accurate energization time corresponding to the data voltage is set for the display element of each pixel regardless of variations in characteristics of a plurality of transistors constituting each pixel. Therefore, display unevenness is prevented and high image quality can be obtained. Further, according to the active matrix drive type display device according to the present invention, it is possible to reduce the power consumption by suppressing the generation of reactive power.

Hereinafter, the embodiment in which the present invention is implemented in an organic EL display device will be specifically described with reference to the drawings.
(overall structure)
As shown in FIG. 1, an organic EL display (2) according to the present invention is provided with a scanning driver (3) and a data driver (4) on a display panel (5) configured by arranging a plurality of pixels in a matrix. Connected and configured. A video signal supplied from a video source such as a TV receiver is supplied to a video signal processing circuit (6), where signal processing necessary for video display is performed. It is supplied to the data driver (4) of the EL display (2).

Further, the horizontal synchronizing signal H _sync and the vertical synchronizing signal V _sync obtained from the video signal processing circuit (6) are supplied to the timing signal generating circuit (7), and the timing signals obtained thereby are scanned driver (3) and data driver. To (4). A timing signal obtained from the timing signal generation circuit (7) is supplied to the lamp voltage generation circuit (8), thereby generating a lamp voltage used for driving the organic EL display (2). It is supplied to each pixel of the display panel (5). Further, a reset signal obtained from the timing signal generation circuit (7) is supplied to each pixel of the display panel (5). A power supply circuit (not shown) is connected to each circuit, each driver, and the organic EL display shown in FIG.

  The display panel (5) is configured by arranging pixels (51) having the circuit configuration shown in FIG. 2 in a matrix. Each pixel (51) includes an organic EL element (50), a driving transistor TR2 for turning on / off the energization of the organic EL element (50) in response to an input of an on / off control signal to the gate, and the scanning driver. The write transistor TR1 that is turned on when the scan voltage is applied to the gate, the capacitive element C1 to which the data voltage from the data driver is applied when the write transistor TR1 is turned on, and the ramp voltage generation And a pulse width modulation control circuit (90) for performing pulse width modulation on the output voltage of the capacitive element C1 by the ramp voltage RAMP supplied from the circuit.

  Both ends of the capacitive element C1 are connected to the drain of the writing transistor TR1 and the ramp voltage supply line, respectively. The pulse width modulation control circuit (90) includes an on-control transistor TR3 for turning on the driving transistor TR2 and an off-control transistor TR4 for turning off the driving transistor TR2.

The organic EL display (2), and a power supply _{V SS} power supply _{V DD} and the low potential of the common high potential is provided in each pixel (51), the power supply _{V DD} of the high potential of each pixel (51) The source of the driving transistor TR2 is connected. Between the power supply V _DD and V _SS, together with the on-control transistor TR3 and the off-control transistor TR4 is interposed in parallel with each other, a pair of transistors TR5 and TR6 are interposed in series with each other, the connection point of the two transistors B is connected to the gate of the driving transistor TR2.

The ramp voltage RAMP is supplied to the gate of the on-control transistor TR3, and the output voltage (data voltage) of the capacitive element C1 is supplied to the gate of the off-control transistor TR4. Both ends of the capacitive element C2 are connected to the power supply V _DD and the gate of the transistor TR5, respectively, and the source and drain of the reset transistor TR7 are connected to each other. The reset signal line RESET is connected to the gate of the transistor TR7. Has been.

In the organic EL display device composed of the pixel (51), as shown in FIG. 3, the write transistor TR1 is turned on by the supply of the scanning voltage SCAN during the scanning period, and the data voltage DATA (point A) is applied to the capacitive element C1. Then, the reset signal RESET is changed from high to low, whereby the reset transistor TR7 is turned on, and both ends of the capacitor C2 are set to the high-potential power supply voltage V _DD. The As a result, the transistor TR5 is turned off. At this point, the other transistors TR2, TR3, TR4 and TR6 are all off.

Thereafter, during the light emission period, the ramp voltage RAMP rises difference between power supply voltage V _SS of the low potential is increased, the gate of the on-control transistor TR3 - exceeds the threshold level V _th between the source, the transistor TR3 is Turn on. As a result, the transistor TR6 becomes conductive, and the gate voltage (voltage at the point B) of the driving transistor TR2 decreases, whereby the driving transistor TR2 becomes conductive. As a result, a current flows from the high potential power source V _DD to the organic EL element (50), and light emission is started.

Thereafter, further ramp voltage increases, the voltage at point A increases with this difference between the power supply voltage V _SS of the low potential is increased, the gate of the off-control transistor TR4 - threshold level V _th between the source Exceeds the threshold value, the transistor TR4 becomes conductive, and the gate voltage of the transistor TR6 is lowered. As a result, the transistor TR6 is turned off. At the same time, the transistor TR5 is turned on, and the gate voltage (point B voltage) of the driving transistor TR2 rises. As a result, the driving transistor TR2 is turned off, the energization to the organic EL element (50) is stopped, and light emission ends.

  As described above, when the light emission end point of the organic EL element (50) changes according to the magnitude of the data voltage, the light emission time changes in proportion to the magnitude of the data voltage, thereby realizing multi-gradation expression. The

  In the pulse width modulation control circuit (90), the on-control transistor TR3 and the off-control transistor TR4 are formed at positions close to each other in the same pixel (51). Since the transistors are formed simultaneously by the process, even if there is a variation in the threshold level between the gate and the source of each transistor, the variation in both transistors occurs in the same manner. Therefore, the on-control transistor TR3 becomes the driving transistor TR2 due to the variation. Even when the time point when turning on is deviated, the time point when the off-control transistor TR4 turns off the driving transistor TR2 is also deviated in the same direction.

  Therefore, the time from when the on-control transistor TR3 turns on the driving transistor TR2 to when the off-control transistor TR4 turns off the driving transistor TR2 is accurate regardless of variations in the threshold levels of both transistors TR3 and TR4. The time depends on the data voltage.

Further, the signal line leading from the power supply _{V DD} of the high potential of the low potential to the power supply _{V SS,} a pair of the transistor TR5, TR6 are interposed, the transistor TR6 is off in the scanning period, the transistor TR5 is reset signal Is turned off in response to the supply of the transistor TR6, and then the transistor TR6 is turned off from on in the light emission period, and at the same time, the transistor TR5 is turned on to stop the light emission. at least one of is turned off, to cut off the current path to the power supply V _SS of the low potential from the power supply V _DD of the high potential. Therefore, not flow useless current from the power supply V _DD of the high potential of the low potential to the power source V _SS, thereby reduce power consumption.

  As shown in FIG. 4, in the circuit configuration of each pixel (51), the pulse width modulation control circuit (90) turns on the driving transistor TR2 and turns off the driving transistor TR2. The off-control transistor TR4 is provided with the output voltage (data voltage) of the capacitive element C1 supplied to the gate of the on-control transistor TR3, and the ramp voltage RAMP is supplied to the gate of the off-control transistor TR4. Is the same as that of the first embodiment except that the capacitor element C3 is connected in parallel to the transistor TR5.

In the organic EL display device composed of the pixels (51), as shown in FIG. 5, the lamp voltage RAMP rises during the light emission period, and the voltage at the point A rises accordingly, and the low-potential power supply voltage _VSS Is increased and exceeds the threshold level _Vth between the gate and source of the on-control transistor TR3, the transistor TR3 is turned on. As a result, the transistor TR6 becomes conductive, and the gate voltage (voltage at the point B) of the driving transistor TR2 decreases, whereby the driving transistor TR2 becomes conductive. As a result, a current flows from the high potential power source V _DD to the organic EL element (50), and light emission is started.

Furthermore, the lamp voltage rises difference between power supply voltage V _SS of the low potential is increased, the gate of the off-control transistor TR4 - exceeds the threshold level V _th between the source and the transistor TR4 is turned on, the transistor The gate voltage of TR6 is lowered. As a result, the transistor TR6 is turned off. At the same time, the transistor TR5 is turned on, and the gate voltage (point B voltage) of the driving transistor TR2 rises. As a result, the driving transistor TR2 is turned off, the energization to the organic EL element (50) is stopped, and light emission ends.

  As described above, when the light emission start time of the organic EL element (50) changes according to the magnitude of the data voltage, the light emission time changes in proportion to the magnitude of the data voltage, thereby realizing multi-gradation expression. The

  In the pulse width modulation control circuit (90), as in the first embodiment, even if there is a variation in the threshold level between the gate and source of the on-control transistor TR3 and the off-control transistor TR4, Since the time when the transistor TR3 turns on the driving transistor TR2 and the time when the off-control transistor TR4 turns off the driving transistor TR2 thereafter vary in the same direction, the on-time of the driving transistor TR2 Is exactly the time according to the data voltage, regardless of variations in the threshold levels of both transistors TR3 and TR4.

Further, the signal line leading from the power supply _{V DD} of the high potential of the low potential to the power supply _{V SS,} a pair of transistors TR5, TR6 are interposed, at least one of the pair of transistors TR5, TR6 through scanning period and light emission period one is turned off, so to cut off the current path from the power supply V _DD of the high potential of the low potential to the power source V _SS, not flow wasteful current from a power supply V _DD of the high potential of the low potential to the power source V _SS, This saves power consumption.

  As shown in FIG. 6, the pulse width modulation control circuit (90) of each pixel (51) includes an on control transistor TR3 for turning on the driving transistor TR2 and an off state for turning off the driving transistor TR2. And a control transistor TR4.

The organic EL display (2), and a power supply _{V SS} power supply _{V DD} and the low potential of the common high potential is provided in each pixel (51), the power supply _{V DD} of the high potential of each pixel (51) The source of the driving transistor TR2 is connected. Between the power supply _{V DD} and _{V SS,} with on-control transistor TR3 and the off-control transistor TR4 is interposed in parallel with each other, interposed with the transistor TR5 and the capacitor C4 in series with each other, the transistor TR5 and the capacitor C4 Is connected to the gate of the driving transistor TR2.

The ramp voltage RAMP is supplied to the gate of the on-control transistor TR3, and the output voltage (data voltage) of the capacitive element C1 is supplied to the gate of the off-control transistor TR4. Both ends of the capacitive element C2 are connected to the high-potential power supply _VDD and the gate of the transistor TR5, respectively, and the source and drain of the reset transistor TR7 are connected to each other, and the reset signal line is connected to the gate of the transistor TR7. RESET is connected. The source and drain of the reset transistor TR8 are connected to one end (point B) of the high-potential power supply V _DD and the capacitive element C4, respectively, and the reset signal line RESET is connected to the gate of the transistor TR8. Yes. Furthermore, the source and drain of the reset transistor TR9 are connected to the other end of the high-potential power supply V _DD and the capacitive element C4, respectively, and the reset signal line RESET is connected to the gate of the transistor TR9.

In the organic EL display device composed of the pixel (51), as shown in FIG. 7, the write transistor TR1 is turned on by the supply of the scanning voltage SCAN in the scanning period, and the data voltage DATA (point A) is applied to the capacitive element C1. Then, the reset signal RESET goes from high to low to turn on the three reset transistors TR7, TR8, and TR9, and both ends of the capacitor C2 have a high potential V _DD. And both ends of the capacitive element C4 are set to the high-potential power supply voltage V _DD . As a result, the transistor TR5 is turned off. At this point, the other transistors TR2, TR3, TR4 are off.

Thereafter, during the light emission period, the ramp voltage RAMP rises difference between power supply voltage V _SS of the low potential is increased, the gate of the on-control transistor TR3 - exceeds the threshold level V _th between the source, the transistor TR3 is Turn on. As a result, the potential at both ends of the capacitive element C4 decreases, and the driving transistor TR2 becomes conductive due to the decrease in the gate voltage (voltage at point B). As a result, a current flows from the high potential power source V _DD to the organic EL element (50), and light emission is started. Note that the gate voltage of the transistor TR5 is kept at a high potential by the capacitor C2, and the transistor TR5 remains off.

Furthermore, the lamp voltage rises, rising voltage at point A along with this difference between the low potential V _SS is increased, the gate of the off-control transistor TR4 - exceeds the threshold level V _th between source, The transistor TR4 is turned on to lower the gate voltage of the transistor TR5. As a result, the transistor TR5 is turned on. As a result, the gate voltage (voltage at point B) of the driving transistor TR2 rises, the transistor TR2 is turned off, energization of the organic EL element (50) is stopped, and light emission ends.

  As described above, when the light emission end point of the organic EL element (50) changes according to the magnitude of the data voltage, the light emission time changes in proportion to the magnitude of the data voltage, thereby realizing multi-gradation expression. The

In the pulse width modulation control circuit (90), as in the first and second embodiments, the threshold level between the gate and the source of the on-control transistor TR3 and the off-control transistor TR4 varies. However, the on-time of the driving transistor TR2 is exactly the time according to the data voltage. Also, the high potential power supply V _DD from a signal line leading to the power source V _SS of the low potential, the capacitance element C4 is interposed, through the scanning period and light emission period, the power supply V _DD of the high potential of the low potential power source V _SS not flow wasteful current to thereby reduce power consumption.

  The circuit configuration of each pixel (51) in this embodiment is the same as that of the first embodiment, the second embodiment, or the third embodiment. However, as shown in FIG. Generate voltage twice.

  As a result, the light emission can be dispersed in the first half and the second half of the light emission period, thereby suppressing color breakup (a phenomenon in which the color of the edge of an object that moves at high speed) due to a shift in the light emission time of the R, G, and B pixels. I can do it.

  The circuit configuration of each pixel (51) in this embodiment is the same as that in the first embodiment, the second embodiment, or the third embodiment, but the three primary colors as shown in FIGS. 9 (a) to 9 (c). A ramp voltage having a different slope is supplied to each of the (R, G, B) pixels.

  According to this configuration, the white balance can be adjusted without changing the data voltage by changing the slope of the ramp voltage for each of the R, G, and B pixels. In addition, by switching the three patterns in FIGS. 9A, 9B, and 9C for each frame, color breakup (edges of an object that moves at high speed) due to a shift in light emission time of R, G, and B pixels. The phenomenon that the color changes) can be suppressed.

  As shown in FIG. 10, the organic EL display device of the present embodiment has a constant current driver (91) connected to the display panel (5), and a current flowing through the organic EL element (50) of each pixel by a current program circuit described later. And the energization of the organic EL element (50) is controlled by the pulse width modulation control circuit. In the organic EL display device, a constant current driver (91) is connected to a pulse width modulation control circuit (90) constituting each pixel (51) through a current program circuit (92) as shown in FIG. Yes.

The pulse width modulation control circuit (90) includes an on control transistor TR11 for turning on the current on transistor TR13 and an off control transistor TR12 for turning off the transistor TR14 constituting the current program circuit (92). And. A current-on transistor TR13 is connected to the power source V _DD via a transistor TR14 constituting a current program circuit (92).

Both ends of the capacitive element C11 are connected to the power supply V _DD and the gate of the transistor TR14, and the source and drain of the off-control transistor TR12 are connected to the power supply V _DD and the transistor TR14. Further, both ends of the capacitive element C12 are connected to the power source V _DD and the gate of the current-on transistor TR13, and the source and drain of the on-control transistor TR11 are connected to each other. Furthermore, the connection point between the capacitive element C11 and the drain of the off-control transistor TR12 is connected to the constant current driver (91) via the transistors TR15 and TR16. The connection point between the transistors TR15 and TR16 is connected to the drain of the current-on transistor TR13.

  The connection point between the gate of the current-on transistor TR13 and the drain of the on-control transistor TR11 is connected to the connection point between the current-on transistor TR13 and the organic EL element (50) via the transistor TR17. Is connected to a reset signal line RESET. In the organic EL display device including the pixel (51), as shown in FIG. 12, first, the transistor TR17 is turned on by supplying the reset signal RESET during the reset period, and the current-on transistor TR13 is turned off. At this time, the transistors TR1, TR11, TR12, TR14, TR15, and TR16 are off.

Subsequently, in the scanning period, the writing transistor TR1 is turned on by supplying the scanning voltage SCAN, and charges corresponding to the data voltage DATA (the voltage at the point A) are accumulated in the capacitor C1. Further, the transistors TR15 and TR16 are turned on, and the transistor TR14 of the current program circuit (92) gradually starts to conduct. As a result, the programmed current starts to flow from the power supply V _DD to the current driver (91) through the transistors TR14 and TR16, and finally the gate voltage of the transistor TR14 is determined. In addition, a charge corresponding to the programmed current is accumulated in the capacitive element C11.

Thereafter, the ramp voltage RAMP decreases during the light emission period, and accordingly, the gate voltage of the on-control transistor TR11 decreases to increase the difference from the power supply voltage V _DD, and between the gate and source of the on-control transistor TR11. When the threshold level _Vth is exceeded, the transistor TR11 is turned on. As a result, the current-on transistor TR13 is turned on, and a programmed current flows from the power source _VDD to the organic EL element (50) through the transistors TR14 and TR13, and light emission is started.

Further, when the ramp voltage decreases and the difference from the power supply voltage V _DD increases and exceeds the threshold level V _th between the gate and the source of the off-control transistor TR12, the transistor TR12 is turned on, and the current program circuit ( 92) transistor TR14 is turned off. As a result, energization to the organic EL element (50) is stopped, and light emission ends.

As described above, when the light emission start time of the organic EL element (50) changes according to the magnitude of the data voltage, the light emission time changes in proportion to the magnitude of the data voltage, thereby realizing multi-gradation expression. The Also in the pulse width modulation control circuit (90), the energization time to the organic EL element (50) is accurate regardless of the variation in the threshold level between the gate and the source of the on-control transistor TR11 and the off-control transistor TR12. The time depends on the data voltage. Further, the current from the power source V _DD only flows to the organic EL element (50) for a time corresponding to the data voltage, and no wasteful current flows, so that power consumption can be reduced.

  As shown in FIG. 13, in the circuit configuration of each pixel (51), the pulse width modulation control circuit (90) includes an on-control transistor TR11 and an off-control transistor TR12, but the gate of the on-control transistor TR11. Is the same as that of the sixth embodiment except that the ramp voltage RAMP is supplied and the output voltage (data voltage) of the capacitive element C1 is supplied to the gate of the off-control transistor TR12.

In the organic EL display device composed of the pixels (51), as shown in FIG. 14, the ramp voltage RAMP decreases during the light emission period, and accordingly, the gate voltage of the on-control transistor TR11 decreases and the power supply voltage V _DD is obtained. Is increased and exceeds the threshold level _Vth between the gate and source of the on-control transistor TR11, the transistor TR11 is turned on. As a result, the current-on transistor TR13 becomes conductive. As a result, a current flows from the power supply V _DD to the organic EL element (50) through the transistors TR14 and TR13, and light emission is started.

Further, when the ramp voltage decreases and the difference from the power supply voltage V _DD increases and exceeds the threshold level V _th between the gate and the source of the off-control transistor TR12, the transistor TR12 is turned on, and the current program circuit ( 92) transistor TR14 is turned off. As a result, energization to the organic EL element (50) is stopped, and light emission ends.

As described above, when the light emission end point of the organic EL element (50) changes according to the magnitude of the data voltage, the light emission time changes in proportion to the magnitude of the data voltage, thereby realizing multi-gradation expression. The Also in the pulse width modulation control circuit (90), the energization time to the organic EL element (50) is exactly the time according to the data voltage. Further, the current from the power source V _DD only flows to the organic EL element (50) for a time corresponding to the data voltage, and no wasteful current flows, so that power consumption can be reduced.

  In the present embodiment, as shown in FIG. 15, the current program circuit (92) shown in FIG. 11 is added to the pulse width modulation control circuit (90) of the first embodiment shown in FIG. As shown in FIG. 16, the same operation as in the first embodiment is performed, and the energization to the organic EL element (50) is controlled.

  In the organic EL display device of this embodiment, as shown in FIG. 17, a plurality of adjacent pixels (51a), (51b), (51c) are grouped into one pixel group, and one pixel (51a) is included therein. As a circuit configuration, the pulse width modulation control circuit (90) is incorporated, but the circuit configuration of the other pixels (51b) and (51c) is only a part of the pulse width modulation control circuit (90). The other circuit portions are shared by the pixels (51a), (51b), and (51c) in the same pixel group.

The pulse width modulation control circuit (90) incorporated in the one pixel (51a) includes an on control transistor TR11 for turning on the driving transistor TR2 and an off for turning off the driving transistor TR2. And a control transistor TR12. The pixel (51a) is connected to a high potential power source V _DD and a low potential power source V _SS, and the high potential power source V _DD is connected to the organic EL element (50) via the driving transistor TR2. It is connected.

Between the two power sources V _DD and V _SS , the on-control transistor TR11 and the off-control transistor TR12 are interposed in parallel with each other, and the capacitive element C21 and the two transistors TR21 and TR22 are interposed in series with each other. The connection point B between the off-control transistor TR12 and the capacitive element C21 is connected to the gate of the drive transistor TR2. The high-potential power supply V _DD is connected to the drain of the transistor TR21 through the transistor TR23, and the first reset signal line RST1 is connected to the gates of both transistors TR23 and TR21. Further, the power supply _{V SS} of the gate and the low potential of the transistor TR22 is connected to the drain and source of the transistor TR24 is, the gate of the transistor TR24, a second reset signal line RST2 is connected.

  The ramp voltage RAMP is supplied to the gate of the on-control transistor TR11, and the output voltage (data voltage) of the capacitive element C1 is supplied to the gate of the off-control transistor TR12. On the other hand, in the pixels (51b) and (51c) adjacent to the pixel (51a), only the off-control transistor TR12 and the capacitive element C21 that are components of the pulse width modulation control circuit (90) are provided. The capacitive elements C21 of the pixels are connected to each other on the low potential side.

  In the organic EL display device composed of the pixels (51a), (51b), and (51c), as shown in FIG. 18, the writing transistor TR1 of each pixel is turned on by the supply of the scanning voltage SCAN during the scanning period. Charges corresponding to the data voltage DATA (voltage at point A) are accumulated in the capacitive element C1, and data is written. At this point, the transistors TR2, TR11, TR12, TR21, TR22, TR23 and TR24 are all off.

Thereafter, in the light emission period, the ramp voltage RAMP decreases and the difference from the high potential V _DD increases, and when the threshold level _Vth between the gate and the source of the on-control transistor TR11 is exceeded, the transistor TR11 is turned on. . As a result, the transistor TR22 is turned on, and at the same time, the transistor TR21 is turned on, and the voltage across the capacitor C21 provided in each pixel is lowered. As a result, the driving transistor TR2 of each pixel is turned on, a current flows from the high potential power source V _DD to the organic EL element (50), and light emission is started.

Furthermore, when the ramp voltage decreases, the voltage at point A decreases and the difference from the high potential V _DD increases, and exceeds the threshold level V _th between the gate and source of the off-control transistor TR12, The transistor TR12 is turned on and the potential at point B rises. As a result, the driving transistor TR2 is turned off, the energization to the organic EL element (50) is stopped, and light emission ends.

  Subsequently, in the reset period, the first reset signal RST1 is first switched from high to low, so that the transistor TR23 is turned on and at the same time the transistor TR21 is turned off, and the potential at the connection point between the capacitive element C21 and the transistor TR21 of each pixel. Rises, and both ends of the capacitive element C21 are set to a high potential.

  Next, when the ramp voltage rises to high, the on-control transistor TR11 and the off-control transistor TR12 are turned off. Subsequently, the second reset signal RST2 becomes high for a certain time, whereby the transistor TR24 is turned on, and the transistor TR22 is turned off. Thereafter, the first reset signal RST1 goes high, whereby the transistor TR23 is turned off.

By controlling in this way, it is possible to prevent a through current from flowing between the two power sources V _DD and V _SS . According to the organic EL display device, one of the plurality of pixels (51a), (51b), and (51c) adjacent to each other includes all the circuits of the pulse width modulation control circuit (90) in one pixel (51a). Although only a part of the circuit configuration of the pulse width modulation control circuit (90) needs to be provided for the other pixels (51b) and (51c), the number of transistors is reduced as a whole display panel. As a result, the aperture ratio and yield of the display panel can be improved.

  In this embodiment, the driving transistors of the first to ninth embodiments are omitted, and both driving and on-control of the organic EL element (50) are performed by an on-control transistor (first transistor described later). Is to do.

As shown in FIG. 19, each pixel (51) includes an organic EL element (50), a p-channel type writing transistor TR1 to which a scanning voltage SCAN is applied to the gate, and the writing transistor TR1 being in a conductive state. Thus, the gate voltage and the power supply voltage V _DD are interposed in series in the capacitor C1 to which the data voltage DATA is applied to hold the voltage and the power supply line (55) extending from the power supply V _DD to the organic EL element (50). a first transistor TR31 of p-channel type which difference is turned on when exceeding the predetermined threshold value V _th of, and on when the difference between the gate voltage and the supply voltage V _DD exceeds a predetermined threshold value V _th Thus, a p-channel type second transistor TR32 that turns off the first transistor TR31 is provided.

  A voltage (voltage at point A) corresponding to the sum of the ramp voltage RAMP and the capacitor output voltage is applied to the gate of the first transistor TR31, and the ramp voltage RAMP is applied to the gate of the second transistor TR32.

  As shown in FIG. 20, when the writing transistor TR1 is turned on by applying the scanning voltage SCAN in the first half of the scanning period of one frame, the potential at the point A is set to the data voltage, thereby charging the capacitor C1.

Thereafter, when the lamp voltage RAMP gradually decreases during the light emission period of the second half of one frame, the voltage at the point A also gradually decreases at the same decrease rate. As a result, when the difference between the power supply voltage V _DD and the data voltage exceeds the threshold value _Vth of the first transistor TR31, the first transistor TR31 becomes conductive and energization from the power supply _VDD to the organic EL element (50) is started. The As a result, the current flowing through the organic EL element (50) gradually increases as shown in FIG. 20, and the organic EL element (50) emits light.

After that, when the difference between the power supply voltage V _DD and the ramp voltage RAMP exceeds the threshold value _Vth of the second transistor TR32, the second transistor TR32 is turned on, thereby increasing the potential at the point A toward the power supply voltage V _DD . The first transistor TR31 is turned off. As a result, energization from the power source V _DD to the organic EL element (50) is stopped, and light emission of the organic EL element (50) is stopped. When the end point of one frame is reached, the lamp voltage returns to the original voltage, and the voltage at point A also returns to the original voltage, and the operation moves to the next frame.

  FIG. 21 shows the change of each voltage and the change of the current flowing through the organic EL element (50) when the data voltage is changed. In this way, the light emission period of the organic EL element (50) changes according to the change of the data voltage, thereby realizing multi-tone representation of the image. Here, for example, when the threshold value of the first transistor TR31 varies in the positive direction, the light emission start timing of the organic EL element (50) is delayed as shown by the broken lines in FIGS. Since the light emission stop timing of the organic EL element (50) is also delayed by the same amount, the light emission period of the organic EL element (50) has the same length according to the data voltage regardless of variations in the threshold values of the transistors TR31 and TR32.

  As a result, display unevenness can be prevented and high image quality can be obtained. Further, by changing the cathode potential CV of the organic EL element (50), the first transistor TR31 can be operated in either the linear region or the saturation region, and the first transistor TR31 is operated by operating in the linear region. Power can be saved, and the first transistor TR31 can be made less susceptible to the influence of temperature and changes with time by operating in the saturation region.

Furthermore, since the first transistor TR31 is interposed in series in the power supply line (55) to turn on / off the energization to the organic EL element (50), the current from the power source V _DD is supplied only to the power supply line (55). Therefore, generation of useless current can be avoided, thereby reducing power consumption. Note that the writing transistor TR1 is not limited to the p-channel type, and can be configured by an n-channel type or a CMOS switch which is an n-channel type and a p-channel type connected in parallel.

As shown in FIG. 22, in each pixel (51), an organic EL element (50), a p-channel type writing transistor TR1, and a capacitor for holding the data voltage DATA when the writing transistor TR1 is turned on. C1, a p-channel first transistor TR31 that is interposed in series in the power supply line (55) and that is turned on when the difference between the gate voltage and the power supply voltage V _DD exceeds a predetermined threshold V _th , and the gate In a configuration in which a p-channel type second transistor TR32 that is turned on when the difference between the voltage and the power supply voltage V _DD exceeds a predetermined threshold value _Vth and that turns off the first transistor TR31 is provided. Although it is the same as the embodiment, each of the pixels (51) is supplied with two types of ramp voltages RAMP1 and RAMP2 having different rates of change. A capacitor C1 is interposed between the supply line of the 1 ramp voltage RAMP1 and the point A, and the second ramp voltage RAMP2 is applied to the gate of the second transistor TR32.

  As shown in FIG. 23, during the light emission period, the voltage at the point A decreases with a decrease in the first ramp voltage RAMP1, but when the capacitance of the capacitor C1 is small, the rate of decrease in the voltage at the point A is the first ramp voltage. It becomes smaller than the decrease rate of RAMP1. Therefore, the second ramp voltage RAMP2 having the same rate of change as the voltage change rate at the point A is created and applied to the gate of the second transistor TR32, thereby obtaining a light emission period corresponding to the data voltage.

  In the pixel (51) shown in FIG. 24, the writing transistor TR1, the first transistor TR31, and the second transistor TR32 are each configured by an n-channel transistor.

  Each of the first transistor TR31 and the second transistor TR32 is turned on when the difference between the gate voltage and the terminal voltage (point B voltage) on the high potential side of the organic EL element (50) exceeds a predetermined threshold value. Further, a voltage (point A voltage) corresponding to the sum of the ramp voltage RAMP and the output voltage of the capacitor is applied to the gate of the first transistor TR31. A ramp voltage RAMP is applied to the gate.

  As shown in FIG. 25, when the writing transistor TR1 is turned on by applying the scanning voltage SCAN during the scanning period, the potential at the point A is set to the data voltage, thereby charging the capacitor C1.

Thereafter, during the light emission period, when the lamp voltage RAMP gradually increases, the voltage at point A also gradually increases at the same increase rate. As a result, when the difference between the voltage at the point B and the data voltage exceeds the threshold value _Vth of the first transistor TR31, the first transistor TR31 is turned on and energization from the power source V _DD to the organic EL element (50) is started. The As a result, the current flowing through the organic EL element (50) gradually increases as shown in FIG. 25, and the organic EL element (50) emits light. In the circuit configuration of the pixel (51) shown in FIG. 24, the potential at the point B rises as the current flowing through the organic EL element (50) increases.

Thereafter, when the difference between the voltage at point B and the ramp voltage RAMP exceeds the threshold value _Vth of the second transistor TR32, the second transistor TR32 becomes conductive, whereby the potential at point A drops toward the potential at point B, The first transistor TR31 is turned off. As a result, energization from the power source V _DD to the organic EL element (50) is stopped, and light emission of the organic EL element (50) is stopped. When the end point of one frame is reached, the lamp voltage returns to the original voltage, and the voltage at point A also returns to the original voltage, and the operation moves to the next frame.

  FIG. 26 shows the change of each voltage and the change of the current flowing through the organic EL element (50) when the data voltage changes. In this way, the light emission period of the organic EL element (50) changes according to the change of the data voltage, thereby realizing multi-tone representation of the image. Here, for example, when the threshold value of the first transistor TR31 varies in the positive direction, the light emission start timing of the organic EL element (50) is delayed as shown by the broken lines in FIGS. Since the light emission stop timing of the organic EL element (50) is also delayed by the same amount, the light emission period of the organic EL element (50) has the same length according to the data voltage regardless of variations in the threshold values of the transistors TR31 and TR32.

  As a result, display unevenness can be prevented and high image quality can be obtained. In addition, according to the circuit configuration of the pixel (51) shown in FIG. 24, the characteristics of the organic EL element (50) are shifted by a change in temperature or a change with time, and as a result, for example, as shown by an arrow in FIG. Even if the potential at the point is lowered, the waveform of the current flowing through the organic EL element (50) is merely translated because the drain of the second transistor TR32 is connected to the point B. Therefore, display unevenness does not occur.

In the pixel (51) shown in FIG. 28, in the above embodiment is obtained by connecting the drain of the second transistor TR32, which was connected to the point B to the power supply V _SS of the low potential.

According to the circuit configuration, as shown in FIG. 29, when the difference between the supply voltage _{V SS} and the ramp voltage RAMP during the light emission period exceeds the threshold value _{V th} of the second transistor TR32, a second transistor TR32 is rendered conductive, the first transistor TR31 is turned off. As a result, energization from the power source V _DD to the organic EL element (50) is stopped, and light emission of the organic EL element (50) is stopped.

In the pixel (51) as well, as shown by a broken line in FIG. 29, the light emission period of the organic EL element (50) has the same length according to the data voltage, regardless of variations in threshold values of the transistors TR31 and TR32. Therefore, even if the transistors TR31 and TR32 have variations in characteristics, the energization time for the organic EL element (50) is proportional to the magnitude of the data voltage, and there is no risk of display unevenness. Further, since the first transistor TR31 is interposed in series in the power supply line (55) to turn on / off the energization to the organic EL element (50), the current from the power source V _DD flows only in the power supply line (55). As a result, generation of useless current can be avoided.

  In the pixel (51) shown in FIG. 30, the first signal line (56) for applying the scan voltage SCAN in the first half of one frame period and the ramp voltage RAMP2 in the second half of one frame period, and one frame period And a second signal line (57) for applying the ramp voltage RAMP1 in the second half of one frame period and the data voltage DATA in the first half.

The first transistor TR31 is interposed in series in the power supply line (55), and the second signal line (57) is connected to the point A connected to the gate of the first transistor TR31 via the capacitor C1. The drain of the transistor TR32 is connected. The source of the second transistor TR32, a second power source _{V CC} of the first voltage higher than the power supply _{V DD,} which is connected to the supply line (55) is connected. The first signal line (56) is connected to the gate of the second transistor TR32.

As shown in FIG. 31, in the scanning period, the voltage at the point A changes according to the data voltage of each scanning line applied to the second signal line (57), but from the first signal line (56) to the second signal line. when the scan voltage to the gate of the transistor TR32 is applied, the voltage of the point a by conduction of the second transistor TR32 is settled on the second power supply voltage V _CC. At this time, a potential difference corresponding to the data voltage is given to the capacitor C1 with the power supply voltage _VCC as a reference, and the potential difference is held regardless of the subsequent voltage fluctuation at the point A.

In the light emission period, the voltage at the point A is first set to a voltage corresponding to the difference between the voltage held in the capacitor C1 and the ramp voltage RAMP1, and then the voltage at the point A according to the decrease in the ramp voltage RAMP1 is Decrease gradually. As a result, when the difference between the power supply voltage V _DD and the voltage at the point A exceeds the threshold value _Vth of the first transistor TR31, the first transistor TR31 is turned on, and the power is supplied from the power supply V _DD to the organic EL element (50). Is started. As a result, the current flowing through the organic EL element (50) gradually increases, and the organic EL element (50) emits light.

Then, the difference between the second power supply voltage _{V CC} and the lamp voltage RAMP2 is exceeds the threshold value _{V th} of the second transistor TR32, a second transistor TR32 is rendered conductive, the first transistor TR31 is turned off by this. As a result, energization from the power source V _DD to the organic EL element (50) is stopped, and light emission of the organic EL element (50) is stopped.

In the pixel (51) as well, as shown by the broken line in FIG. 31, the light emission period of the organic EL element (50) has the same length according to the data voltage, regardless of variations in the threshold values of the transistors TR31 and TR32. Therefore, even if the transistors TR31 and TR32 have variations in characteristics, the energization time for the organic EL element (50) is proportional to the magnitude of the data voltage, and there is no risk of display unevenness. Further, since the first transistor TR31 is interposed in series in the power supply line (55) to turn on / off the energization to the organic EL element (50), the current from the power source V _DD flows only in the power supply line (55). As a result, generation of useless current can be avoided.

  A pixel (51) shown in FIG. 32 is configured by configuring each of the two p-channel transistors TR31 and TR32 of the above-described embodiment by n-channel transistors, and realizes exactly the same circuit operation.

  In this embodiment, the ramp voltage is supplied to the first transistor TR31 for starting energization, while the data voltage is applied to the second transistor TR32 for stopping energization, and the energization stop timing is controlled according to the data voltage. is there.

As shown in FIG. 33, each pixel (51) has an organic EL element (50), a writing transistor TR1 that is turned on when a scanning voltage SCAN is applied thereto, and the writing transistor that is turned on. In order to turn off the first capacitor C2 to which the data voltage is applied, the first transistor TR31 interposed in series in the power supply line (55) connected from the power source V _DD to the organic EL element (50), and the first transistor TR31. The second transistor TR32, the third transistor TR33 which is turned on by applying the scanning voltage and applies the power supply voltage to the gate of the first transistor TR31, and the second transistor TR31 interposed between the gate of the first transistor TR31 and the ramp voltage supply line. Two capacitors C3 are provided.

The gate of the first transistor is connected to the ramp voltage supply line via the second capacitor C3, and is connected to the power supply V _DD via the second transistor TR32 and the third transistor TR33. The gate of the second transistor TR32 is connected to the lamp voltage supply line via the first capacitor C2. The gate of the third transistor TR33 is connected to the scanning voltage supply line.

In the pixel (51), as shown in FIG. 34, when the scanning transistor SCAN is applied during the scanning period and the writing transistor TR1 and the third transistor TR33 are turned on, the first capacitor C2 is charged by the data voltage. Then, the output terminal (point A) is set to the data voltage, and the point B connected to the gate of the first transistor TR31 is set to the power supply voltage V _DD . During the light emission period, the lamp voltage RAMP gradually decreases, and the potential at points A and B gradually decreases accordingly. When the difference between the power supply voltage V _DD and the voltage at the point B exceeds the threshold value _Vth of the first transistor TR31, the first transistor TR31 is turned on and energization to the organic EL element (50) is started.

Thereafter, when the difference between the power supply voltage V _DD and the voltage at the point A exceeds the threshold value _Vth of the second transistor TR32, the second transistor TR32 becomes conductive, and the voltage at the point B rises to the power supply voltage V _DD . As a result, the first transistor TR31 is turned off and the energization of the organic EL element (50) is stopped. In the pixel (51), since the second capacitor C3 is interposed between the ramp voltage supply line and the point B, the ramp voltage RAMP and the power supply voltage V _DD do not collide with each other.

In the pixel (51) as well, as shown by a broken line in FIG. 34, the light emission period of the organic EL element (50) has the same length according to the data voltage, regardless of variations in the threshold values of the transistors TR31 and TR32. Therefore, the energization time for the organic EL element (50) is proportional to the magnitude of the data voltage, and there is no risk of display unevenness. Further, since the first transistor TR31 is interposed in series in the power supply line (55) to turn on / off the energization to the organic EL element (50), the current from the power source V _DD flows only in the power supply line (55). As a result, generation of useless current can be avoided.

In the embodiment shown in FIG. 35, the organic EL element (50) is disposed on the higher potential (V _DD ) side than the first transistor TR31 for driving, and the sources of the first transistor TR31 and the second transistor TR32 are set at a lower potential. which are connected to the power supply V _SS.

  According to this embodiment, it is possible to prevent display unevenness and wasteful power consumption as in the above-described embodiment.

  The following eighteenth to twenty-fourth embodiments have a configuration for causing a display element to emit light with a light emission amount corresponding to a data voltage regardless of changes in characteristics of the organic EL element.

  In the eighteenth embodiment shown in FIG. 36, the first signal for applying the scanning voltage SCAN to the first half of one frame period and the high selection voltage SEL to the second half of one frame period in each pixel (51). The line (61), the second signal line (62) for applying the first ramp voltage RAMP1 and the reset signal RST are applied in the first half of one frame period and the data voltage DATA is applied in the second half of one frame period. A third signal line (63) for providing the second ramp voltage RAMP2 and a fourth signal line (64) for applying the second ramp voltage RAMP2 are provided.

Furthermore, the organic EL element (50), the writing transistor TR1, and the data voltage DATA from the second signal line (62) are applied to each pixel (51) when the writing transistor TR1 becomes conductive. Capacitor C1, the first transistor TR31 interposed in the power supply line (6) connected from the high-potential power supply V _DD to the organic EL element (50), the output terminal (point B) of the capacitor C1, and the organic EL element ( a second transistor TR32 interposed between one end (C point) of 50), a third transistor TR34 is deployed interposed between the power source _{V SS} at the output terminal of the capacitor C1 and (B point) lower potential .

  The first signal line (61) is connected to the gate of the writing transistor TR1, and the drain of the writing transistor TR1 is connected to the gate of the first transistor TR31 via the capacitor C1. The fourth signal line (64) is connected to the gate of the second transistor TR32, and the third signal line (63) is connected to the gate of the third transistor TR34.

As shown in FIG. 37, one frame is divided into a scanning period, a light emission period, and a reset period. In the reset period, first, the second ramp voltage RAMP2 falls, and thereby the second transistor TR32 is turned off. The reset signal RST goes high immediately thereafter, this third transistor TR34 is turned on, the potential at point B decreases to power supply voltage V _SS. Thereafter, the second ramp voltage RAMP2 rises, thereby turning on the second transistor TR32. As a result, the points B and C are connected to have substantially the same potential. Further, the first ramp voltage RAMP1 falls during the period when the reset signal RST is high.

In the scanning period of the next frame, when the writing transistor TR1 is turned on by applying the scanning voltage SCAN, the potential at the output terminal (point A) of the writing transistor TR1 rises to the data voltage. The potential and the potential at point C rise to the light emission starting voltage of the organic EL element (50). At this time, the first transistor TR31 is off and the second transistor TR32 is on, and the electric charge accumulated in the capacitor C1 flows into the cathode through the second transistor TR32 and the organic EL element (50). The increase in the potential at the point C is smaller than the increase in the potential at the point A. Incidentally, it sets the potential at the point B by the reset operation to the power supply voltage V _SS in the reset period, since it is not possible to lower than the power supply voltage V _SS, thereby increasing the potential of the point A to the data voltage in the subsequent scan period Thus, the potential at point B and point C can be raised to the light emission start voltage of the organic EL element.

Simultaneously with the end of the scanning period, the second ramp voltage RAMP2 decreases, and thereby the second transistor TR32 is turned off. Subsequently, in the light emission period, the first ramp voltage RAMP1 and the second ramp voltage RAMP2 start to rise. As a result, the potential at the point A is switched from the data voltage to the first ramp voltage RAMP1 and rises, and accordingly, the potential at the point B rises. As a result, when the difference between the potential at point B and the potential at point C exceeds the threshold level _Vth of the first transistor TR31, the first transistor TR31 is turned on and energization to the organic EL element (50) is started. The EL element (50) starts to emit light.

Thereafter, when the second ramp voltage RAMP2 rises and the difference between the second ramp voltage RAMP2 and the potential at the point C exceeds the threshold level _Vth of the second transistor TR32, the second transistor TR32 is turned on. Thereby, the first transistor TR31 is turned off, the energization to the organic EL element (50) is stopped, and the light emission of the organic EL element (50) is completed.

In the pixel (51) as well, as shown by the broken line in FIG. 37, the light emission period of the organic EL element (50) has the same length according to the data voltage, regardless of variations in the threshold values of the transistors TR31 and TR32. Therefore, the energization time for the organic EL element (50) is proportional to the magnitude of the data voltage, and there is no risk of display unevenness. Further, since the first transistor TR31 is interposed in series in the power supply line (6) to turn on / off the energization to the organic EL element (50), the current from the power supply V _DD flows only in the power supply line (6). As a result, generation of useless current can be avoided.

  Furthermore, according to the present embodiment, the problems associated with the temperature change and aging of the organic EL element (50) can be solved. That is, as shown in FIG. 39, the organic EL characteristic shifts due to the temperature change or aging change of the organic EL element. As a result, the operating point changes and the light emission amount changes. As described above, this problem is solved by feeding back the potential at the point C after scanning (the terminal voltage at the time when the light emission of the organic EL element is disclosed) to the energization time of the organic EL element (50).

  FIG. 38 shows an operation in the case where the organic EL characteristics are shifted to the right side due to a temperature change or aging change of the organic EL element. As shown in the figure, the potential at the point A rises to the data voltage by the application of the scanning voltage SCAN during the scanning period, and the potential at the point B and the potential at the point C slightly increase accordingly. As a result of this shift, the amount of increase in potential at points B and C is slightly larger than in the case without the aforementioned characteristic shift (FIG. 37) as indicated by arrows in the figure.

Thereafter, during the light emission period, the first ramp voltage RAMP1 and the second ramp voltage RAMP2 start to rise, and when the difference between the potential at the point B and the potential at the point C exceeds the threshold level _Vth of the first transistor TR31, One transistor TR31 is turned on, energization of the organic EL element (50) is started, and the organic EL element (50) starts to emit light. This time is the same as the case where there is no characteristic shift (FIG. 37).

Thereafter, as the second ramp voltage RAMP2 rises, the difference between the potential of the second ramp voltage RAMP2 and the point C exceeds the threshold level _Vth of the second transistor TR32, and the second transistor TR32 is turned on. Since the potential at the point is higher than when there is no characteristic shift, when the difference between the second ramp voltage RAMP2 and the potential at the point C exceeds the threshold level _Vth of the second transistor TR32, that is, the organic EL element (50). The end point of the light emission will be delayed.

  As shown in FIG. 39, when the organic EL characteristic is shifted to the right side due to a temperature change or a change with time of the organic EL element, the current flowing through the organic EL element decreases as shown.

  Therefore, the change in current from the start of energization to the end of energization of the organic EL element becomes gradual as shown in FIG. 38, and the peak current is also low. However, according to the present embodiment, as described above, the time from the start of energization to the end of energization of the organic EL element is extended, so the total light emission amount of the organic EL element from the start of energization to the end of energization within one frame is organic. This is constant regardless of the shift amount of the EL characteristic. Similarly, when the organic EL characteristic is shifted to the left side due to a temperature change, the total light emission amount from the start of energization to the end of energization within one frame is constant.

In the pixel (51) shown in FIG. 40, instead of the third transistor TR34 of the eighteenth embodiment, which is interposed a diode D between the power supply V _SS output terminal and the low potential of the capacitor C1, the the potential of the output end of the capacitor C1 drops below the power supply voltage V _SS is blocked by the diode D. According to this embodiment, the same effect as that of the eighteenth embodiment can be obtained.

  In the pixel (51) shown in FIG. 41, instead of the signal switching type first signal line (61) and second signal line (62) of the eighteenth embodiment, signal individual signal lines are employed. Thus, a dedicated signal line (65) for applying the first ramp voltage RAMP1 and a dedicated signal line (66) for applying the selection voltage SEL are added. Accordingly, the transistor TR39 is interposed between the drain of the writing transistor TR1 and the first ramp voltage dedicated signal line (65), and the gate of the transistor TR39 is connected to the selection voltage dedicated signal line (66). .

  The operation of the pixel (51) is the same as that of the eighteenth embodiment, and the same effect as that of the eighteenth embodiment can be obtained. Further, according to the configuration using the dedicated signal line for each signal, the application of the ramp voltage can be started immediately after the application of the scanning voltage, so that almost the entire period of one frame can be used as the light emission period. is there.

  In the present embodiment, as shown in FIG. 42, the circuit configuration for reset provided in the eighteenth embodiment is omitted. Although the organic EL element (50) has a capacitance component due to its structure, this example is effective when the capacity of the organic EL element (50) is sufficiently larger than the capacity of the capacitor C1. is there. In this case, since the potential fluctuation at the point C is smaller than the potential fluctuation at the point A shown in FIG. 36, the amount of decrease in the potential at the point B is not excessive, thereby suppressing the decrease in the potential at the point B. The reset operation is not necessary.

  In the pixel (51) shown in FIG. 43, instead of the signal switching type first signal line (61) and second signal line (62) of the twenty-first embodiment, individual signal lines are adopted. Thus, a dedicated signal line (67) for applying the ramp voltage RAMP and a dedicated signal line (66) for applying the selection voltage SEL are added.

  Accordingly, the transistor TR39 is interposed between the drain of the write transistor TR1 and the ramp voltage dedicated signal line (67), and the gate of the transistor TR39 is connected to the selection voltage dedicated signal line (66). The operation of the pixel (51) is the same as that of the 21st embodiment, and the same effect as that of the 21st embodiment can be obtained.

  In the present embodiment, as shown in FIG. 44, a first signal line (71) for applying the data voltage DATA in the first half of one frame period and applying the first ramp voltage RAMP1 in the second half of one frame period; A second signal line (72) for applying the scan voltage SCAN in the first half of one frame period and a second ramp voltage RAMP2 in the second half of one frame period, and a third signal for applying a high selection signal SEL. A signal line (73) and a fourth signal line (74) for applying a reset signal RST are provided.

Each pixel (51) includes an organic EL element (50), a capacitor C1 to which the data voltage DATA from the first signal line (71) is applied, and a power supply line connected from the power source V _DD to the organic EL element (50). (6) a first transistor TR31 interposed therein, a second transistor TR32 interposed between the output end (point B) of the capacitor C1 and one end (point C) of the organic EL element (50), a power supply V _DD , A third transistor TR35 interposed between the first transistors TR31 and a fourth transistor TR36 are arranged between the power source V _DD and the point B.

  The first signal line (71) is connected to the gate of the first transistor TR31 via the capacitor C1, the second signal line (72) is connected to the gate of the second transistor TR32, and the gate of the third transistor TR35 is connected to the gate. Is connected to the third signal line (73). The fourth signal line (74) is connected to the gate of the fourth transistor TR36.

As shown in FIG. 45, one frame is divided into a scanning period, a light emission period, and a reset period. In the reset period, first, the second ramp voltage RAMP2 falls, and thereby the second transistor TR32 is turned off. Immediately thereafter, the reset signal RST goes high, thereby turning on the fourth transistor TR36, and the potential at the point B rises to the power supply voltage V _DD . Further, the first ramp voltage RAMP1 falls.

In the scanning period of the next frame, when the second transistor TR32 is turned on by applying the scanning voltage SCAN, the potential at the point A rises to the data voltage, and the potential at the point B becomes the potential at the point C (light emission of the organic EL element Drop to the starting voltage. In the light emission period, the third transistor TR35 is turned on by the high selection signal SEL. Further, the first ramp voltage RAMP1 and the second ramp voltage RAMP2 start to rise. As a result, the potential at the point A is switched from the data voltage to the first ramp voltage RAMP1 and rises, and accordingly, the potential at the point B rises. As a result, when the difference between the potential at point B and the potential at point C exceeds the threshold level _Vth of the first transistor TR31, the first transistor TR31 is turned on and energization to the organic EL element (50) is started. The EL element (50) starts to emit light.

Thereafter, when the second ramp voltage RAMP2 rises and the difference between the second ramp voltage RAMP2 and the potential at the point C exceeds the threshold level _Vth of the second transistor TR32, the second transistor TR32 is turned on. Thereby, the first transistor TR31 is turned off, the energization to the organic EL element (50) is stopped, and the light emission of the organic EL element (50) is completed. In the pixel (51) as well, as shown by a broken line in FIG. 45, the light emission period of the organic EL element (50) has the same length according to the data voltage regardless of variations in the threshold values of the first and second transistors TR31 and TR32. Become. Therefore, the energization time for the organic EL element (50) is proportional to the magnitude of the data voltage, and there is no risk of display unevenness.

Further, since the first transistor TR31 is interposed in series in the power supply line (6) to turn on / off the energization to the organic EL element (50), the current from the power supply V _DD flows only in the power supply line (6). As a result, generation of useless current can be avoided. Further, even if the organic EL characteristics are shifted due to the temperature change or aging of the organic EL element (50), the potential at point C after scanning is fed back to the energization time of the organic EL element (50), so that the light emission amount is There is no change.

  The pixel 51 shown in FIG. 46 supplies the data voltage DATA, the scanning voltage SCAN, the selection signal SEL, the first ramp voltage RAMP1 and the second ramp voltage RAMP2 through individual signal lines, and all the transistors are connected to the p-channel. Type transistors.

As shown in FIG. 46, each pixel (51) includes a writing transistor TR1 to which a scanning voltage is applied to the gate, a capacitor C1 connected to the output terminal (point A) of the writing transistor TR1, and a power source V _DD. The first transistor TR31 interposed in the power supply line (6) extending to the organic EL element (50), the second transistor TR32 interposed between the power supply _VDD and the gate of the first transistor TR31, and one end of the capacitor C1 (B Point) and one end (point C) of the organic EL element (50), and a fourth transistor TR38 for applying the first ramp voltage RAMP1 to the point B is provided.

  A point A is connected to the gate of the first transistor TR31. Further, the second ramp voltage RAMP2 is applied to the gate of the second transistor TR32, the scanning voltage SCAN is applied to the gate of the third transistor TR37, and the selection signal SEL that becomes high during the light emission period is applied to the fourth transistor TR38. Applied.

  As shown in FIG. 47, when the scanning voltage SCAN is applied in the scanning period, the writing transistor TR1 is turned on, and the potential at the point A rises to the data voltage. Further, the third transistor TR37 is turned on, and the potential at the point B is lowered to the potential at the point C (light emission start voltage of the organic EL element).

Thereafter, in the light emission period, the fourth transistor TR38 is turned on by application of the selection signal SEL. Further, the first ramp voltage RAMP1 and the second ramp voltage RAMP2 start to decrease, and the potential at the point A gradually decreases as the first ramp voltage RAMP1 decreases. As a result, when the difference between the potential at the point A and the power supply voltage V _DD exceeds the threshold level _Vth of the first transistor TR31, the first transistor TR31 is turned on, and energization to the organic EL element (50) is started. The organic EL element (50) starts to emit light.

Thereafter, when the difference between the second ramp voltage RAMP2 and the power supply voltage V _DD exceeds the threshold level _Vth of the second transistor TR32, the second transistor TR32 is turned on. Thereby, the first transistor TR31 is turned off, the energization to the organic EL element (50) is stopped, and the light emission of the organic EL element (50) is ended. Then, at the end of the light emission period, the first ramp voltage RAMP1 increases, and the potential at point B increases accordingly. Subsequently, the second ramp voltage RAMP2 rises, whereby the second transistor TR32 is turned off.

Also in the pixel (51), the light emission period of the organic EL element (50) has the same length according to the data voltage regardless of variations in the threshold values of the first and second transistors TR31 and TR32. Therefore, the energization time for the organic EL element (50) is proportional to the magnitude of the data voltage, and there is no risk of display unevenness. Further, since the first transistor TR31 is interposed in series in the power supply line (6) to turn on / off the energization to the organic EL element (50), the current from the power supply V _DD flows only in the power supply line (6). As a result, generation of useless current can be avoided. Further, even if the organic EL characteristics are shifted due to the temperature change or aging of the organic EL element (50), the potential at point C after scanning is fed back to the energization time of the organic EL element (50), so that the amount of light emission is reduced. There is no change.

In this embodiment, the second transistor TR32 of the twelfth embodiment shown in FIG. 24 is omitted. As shown in FIG. 48, each pixel (51) includes an n-channel type writing transistor TR1 and a driving transistor TR30, and a capacitor C1 to which a data voltage is applied when the writing transistor TR1 becomes conductive. The capacitor C1 is interposed between a point A connected to the drain of the writing transistor TR1 and the ramp voltage supply line, and the point A is connected to the gate of the driving transistor TR30. A scanning voltage SCAN is applied to the gate of the writing transistor TR1. The driving transistor TR30 is interposed in series in the power supply line (55), and the difference between the gate voltage and the terminal voltage (point B voltage) on the high potential side of the organic EL element (50) has a predetermined threshold value _Vth . It is turned on when it is exceeded.

  As shown in FIG. 49, when the writing transistor TR1 is turned on by applying the scanning voltage SCAN during the scanning period, the potential at the point A is set to the data voltage, thereby charging the capacitor C1.

Thereafter, during the light emission period, when the lamp voltage RAMP gradually increases, the voltage at point A also gradually increases at the same increase rate. As a result, when the difference between the voltage at point B and the voltage at point A exceeds the threshold value _Vth of the driving transistor TR30, the driving transistor TR30 becomes conductive, and current is supplied from the power source V _DD to the organic EL element (50). Be started. As a result, the current flowing through the organic EL element (50) increases and the organic EL element (50) emits light. Note that the potential at the point B increases as the current flowing through the organic EL element (50) increases.

Thereafter, when the lamp voltage is reduced to the original voltage at the end of the frame, the voltage at the point A also decreases toward the original voltage accordingly, and thereby the driving transistor TR30 is turned off. As a result, energization from the power source V _DD to the organic EL element (50) is stopped, and light emission of the organic EL element (50) is stopped. In the circuit configuration of the pixel (51), the light emission start time is controlled by the driving transistor TR30 in accordance with the data voltage. However, since the light emission stop time is fixed at the end time of the frame, the driving transistor TR30. If there is a variation in characteristics, the energization time for the organic EL element (50) is not proportional to the magnitude of the data voltage, and there is a possibility that display unevenness occurs.

However, in the pixel (51) shown in FIG. 48, for example, by passing a very small current through the driving transistor TR30, an inversely proportional relationship between the threshold _Vth of the driving transistor TR30 and the potential at the point B, that is, driving If the relationship in which the potential at the point B decreases when the threshold value _{Vth of the} transistor TR30 increases and the potential at the point B increases when the threshold value _Vth of the driving transistor TR30 decreases is shown in FIG. Similarly, even if there is a variation in the threshold value _Vth of the driving transistor TR30, if the data voltage is the same, the time when the difference between the voltage at the point B and the voltage at the point A exceeds the threshold value _Vth of the driving transistor TR30. There will be almost no difference.

  Therefore, even if there is a variation in characteristics of the driving transistor TR30, the energization time for the organic EL element (50) is proportional to the magnitude of the data voltage, and there is no possibility of uneven display. In each of the above-described embodiments, the case where the display element is a current driving element has been described. However, a voltage driving element may be employed instead of the current driving element, and in this case, the first to ninth embodiments may be employed. The driving transistor TR2 in the embodiment can be omitted. Further, if the parasitic capacitance or wiring capacitance of the transistor can be substituted, the capacitors C2, C3, C12 and C22 can be omitted. Further, in the first to fifth embodiments, it is possible to freely set the time and period as long as the application of the reset signal is outside the light emission period. The lamp voltage is not limited to a waveform that gradually increases or decreases uniformly over the entire light emission period as shown in FIGS. 50A and 50B. For example, the lamp voltage in the twelfth embodiment shown in FIGS. In the eighteenth to twenty-third embodiments shown in FIGS. 36 to 45, it is possible to adopt a waveform that gradually increases or decreases in the first half of the light emission period and maintains a constant voltage in the second half of the light emission period. is there.

It is a block diagram which shows the structure of the organic electroluminescent display apparatus of this invention. It is a figure which shows the circuit structure of the pixel in 1st Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the circuit structure of the pixel in 2nd Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the circuit structure of the pixel in 3rd Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a wave form diagram which shows the operation | movement in 4th Example. It is a wave form diagram which shows the operation | movement in 5th Example. It is a block diagram which shows the structure of the organic electroluminescence display in a 6th Example. It is a figure which shows the circuit structure of the pixel in 6th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the circuit structure of the pixel in 7th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the circuit structure of the pixel in 8th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the circuit structure of the several pixel in 9th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the circuit structure of the pixel in 10th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a wave form diagram same as the above when a data voltage changes. It is a figure which shows the circuit structure of the pixel in 11th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the circuit structure of the pixel in 12th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a wave form diagram same as the above when a data voltage changes. It is a wave form diagram explaining correction | amendment operation | movement when the characteristic of an organic EL element shifts in this circuit configuration. It is a figure which shows the circuit structure of the pixel in 13th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the circuit structure of the pixel in 14th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the circuit structure of the pixel in 15th Example. It is a figure which shows the circuit structure of the pixel in 16th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the circuit structure of the pixel in 17th Example. It is a figure which shows the circuit structure of the pixel in 18th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a wave form diagram which shows the operation | movement at the time of an organic EL characteristic shift. It is a graph which shows a transistor characteristic and an organic EL characteristic. It is a figure which shows the circuit structure of the pixel in 19th Example. It is a figure which shows the circuit structure of the pixel in 20th Example. It is a figure which shows the circuit structure of the pixel in 21st Example. It is a figure which shows the circuit structure of the pixel in 22nd Example. It is a figure which shows the circuit structure of the pixel in 23rd Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the circuit structure of the pixel in 24th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the circuit structure of the pixel in 25th Example. It is a wave form diagram which shows operation | movement of this circuit structure. It is a figure which shows the various waveforms of a lamp voltage. It is a figure which shows the circuit structure of the pixel in the conventional organic electroluminescence display. It is a figure which shows the circuit structure of the pixel in the organic electroluminescence display which an applicant proposes. It is a wave form diagram which shows operation | movement of this circuit structure.

Explanation of symbols

(2) Organic EL display (3) Scan driver (4) Data driver (5) Display panel (6) Video signal processing circuit (7) Timing signal generation circuit (8) Lamp voltage generation circuit (51) Pixel (50) Organic EL element (90) Pulse width modulation control circuit

Claims (11)

A display panel configured by arranging a plurality of pixels in a matrix is provided, and each pixel of the display panel has a display element that emits light when supplied with power, and 1 according to a data voltage supplied from the outside. In an active matrix drive type display device in which a control circuit for controlling the light emission period of each display element within a frame period is provided,
The control circuit of each pixel constituting the display panel is
A writing transistor that is turned on when a scanning voltage is applied;
A data voltage is applied when the writing transistor is turned on, and a capacitor that holds the voltage;
The display element is interposed in series in a power supply line extending from a power source to supply power to the display element, and is turned on when the difference between the voltage applied to the gate and the power supply voltage exceeds a predetermined threshold value. A first transistor for starting
A second transistor that turns on when the difference between the voltage applied to the gate and the power supply voltage exceeds a predetermined threshold, turns off the first transistor, and stops energization of the display element;
A voltage corresponding to a sum of a ramp voltage having a predetermined change rate and an output voltage of a capacitor is applied to the gate of the first transistor, and the ramp voltage is applied to the gate of the second transistor. An active matrix drive type display device. A display panel configured by arranging a plurality of pixels in a matrix is provided, and each pixel of the display panel has a display element that emits light when supplied with power, and 1 according to a data voltage supplied from the outside. In an active matrix drive type display device in which a control circuit for controlling the light emission period of each display element within a frame period is provided,
The control circuit of each pixel constituting the display panel is
A writing transistor that is turned on when a scanning voltage is applied;
A data voltage is applied when the writing transistor is turned on, and a capacitor that holds the voltage;
When the difference between the voltage applied to the gate and the power supply voltage or one terminal voltage of the display element exceeds a predetermined threshold, it is interposed in series in a power supply line extending from a power supply to supply power to the display element. A first transistor that is turned on and starts energizing the display element;
A second transistor that turns on when the difference between the voltage applied to the gate and the power supply voltage or one terminal voltage of the display element exceeds a predetermined threshold, turns off the first transistor, and stops energization of the display element And comprising
A voltage corresponding to the sum of the first ramp voltage having a predetermined change rate and the output voltage of the capacitor is applied to the gate of the first transistor, and the second transistor having a predetermined change rate is applied to the gate of the second transistor. An active matrix drive type display device, characterized in that the lamp voltage is applied. A display panel configured by arranging a plurality of pixels in a matrix is provided, and each pixel of the display panel has a display element that emits light when supplied with power, and 1 according to a data voltage supplied from the outside. In an active matrix drive type display device in which a control circuit for controlling the light emission period of each display element within a frame period is provided,
The control circuit of each pixel constituting the display panel is
A writing transistor that is turned on when a scanning voltage is applied;
A data voltage is applied when the writing transistor is turned on, and a capacitor that holds the voltage;
The display element is interposed in series in a power supply line extending from a power source to supply power, and is turned on when the difference between the voltage applied to the gate and one terminal voltage of the display element exceeds a predetermined threshold value. A first transistor that starts energization of the display element;
A second transistor that turns on when the difference between the voltage applied to the gate and one terminal voltage of the display element exceeds a predetermined threshold value, turns off the first transistor, and stops energization of the display element; Prepared,
A voltage corresponding to a sum of a ramp voltage having a predetermined change rate and an output voltage of a capacitor is applied to the gate of the first transistor, and the ramp voltage is applied to the gate of the second transistor. An active matrix drive type display device. A display panel configured by arranging a plurality of pixels in a matrix is provided, and each pixel of the display panel has a display element that emits light when supplied with power, and 1 according to a data voltage supplied from the outside. In an active matrix drive type display device in which a control circuit for controlling the light emission period of each display element within a frame period is provided,
The control circuit of each pixel constituting the display panel is
A writing transistor that is turned on when a scanning voltage is applied;
A data voltage is applied when the writing transistor is turned on, and a capacitor that holds the voltage;
The display element is interposed in series in a power supply line extending from a power source to supply power, and is turned on when the difference between the voltage applied to the gate and one terminal voltage of the display element exceeds a predetermined threshold value. A first transistor that starts energization of the display element;
A second transistor that turns on when the difference between a voltage applied to the gate and a predetermined constant voltage exceeds a predetermined threshold, turns off the first transistor, and stops energization of the display element;
A voltage corresponding to a sum of a ramp voltage having a predetermined change rate and an output voltage of a capacitor is applied to the gate of the first transistor, and the ramp voltage is applied to the gate of the second transistor. An active matrix drive type display device. A display panel configured by arranging a plurality of pixels in a matrix is provided, and each pixel of the display panel has a display element that emits light when supplied with power, and 1 according to a data voltage supplied from the outside. In an active matrix drive type display device in which a control circuit for controlling the light emission period of each display element within a frame period is provided,
The control circuit of each pixel constituting the display panel is
A first signal line for applying a scanning voltage in the first half of one frame period and applying a first ramp voltage in the second half of one frame period;
A second signal line for applying a data voltage in the first half of one frame period and a second ramp voltage in the second half of one frame period;
The display element is interposed in series in a power supply line extending from a power source to supply power to the display element, and is turned on when the difference between the voltage applied to the gate and the power supply voltage exceeds a predetermined threshold value. A first transistor for starting
A second transistor that turns on when the difference between a voltage applied to the gate and a predetermined constant voltage exceeds a predetermined threshold, turns off the first transistor, and stops energization of the display element;
An active matrix driving type display device, wherein the gate of the first transistor is connected to the second signal line through a capacitor, and the gate of the second transistor is connected to the first signal line. A display panel configured by arranging a plurality of pixels in a matrix is provided, and each pixel of the display panel has a display element that emits light when supplied with power, and 1 according to a data voltage supplied from the outside. In an active matrix drive type display device in which a control circuit for controlling the light emission period of each display element within a frame period is provided,
The control circuit of each pixel constituting the display panel is
A first signal line for applying a scanning voltage in the first half of one frame period and applying a first ramp voltage in the second half of one frame period;
A second signal line for applying a data voltage in the first half of one frame period and a second ramp voltage in the second half of one frame period;
The display element is interposed in series in a power supply line extending from a power source to supply power, and is turned on when the difference between the voltage applied to the gate and one terminal voltage of the display element exceeds a predetermined threshold value. A first transistor that starts energization of the display element;
A second transistor that turns on when the difference between a voltage applied to the gate and a predetermined constant voltage exceeds a predetermined threshold, turns off the first transistor, and stops energization of the display element;
An active matrix driving type display device, wherein the gate of the first transistor is connected to the second signal line through a capacitor, and the gate of the second transistor is connected to the first signal line. A display panel configured by arranging a plurality of pixels in a matrix is provided, and each pixel of the display panel has a display element that emits light when supplied with power, and 1 according to a data voltage supplied from the outside. In an active matrix drive type display device in which a control circuit for controlling the light emission period of each display element within a frame period is provided,
The control circuit of each pixel constituting the display panel is
A writing transistor that is turned on when a scanning voltage is applied;
A data capacitor is applied when the writing transistor is turned on, and a first capacitor that holds the voltage;
The display element is interposed in series in a power supply line extending from a power source to supply power to the display element, and is turned on when the difference between the voltage applied to the gate and the power supply voltage exceeds a predetermined threshold value. A first transistor for starting
A second transistor that turns on when the difference between the voltage applied to the gate and the power supply voltage exceeds a predetermined threshold, turns off the first transistor, and stops energization of the display element;
A third transistor that conducts by applying a scanning voltage and applies a power supply voltage to the gate of the first transistor;
A voltage corresponding to a ramp voltage having a predetermined rate of change is applied to the gate of the first transistor, and a voltage corresponding to the sum of the ramp voltage and the output voltage of the first capacitor is applied to the gate of the second transistor. The active matrix drive type display device, wherein the gate of the first transistor is connected to a signal line for applying the ramp voltage via the second capacitor. A display panel configured by arranging a plurality of pixels in a matrix is provided, and each pixel of the display panel has a display element that emits light when supplied with power, and 1 according to a data voltage supplied from the outside. In an active matrix drive type display device in which a control circuit for controlling the light emission period of each display element within a frame period is provided,
The control circuit of each pixel constituting the display panel is
A writing transistor that conducts by passing a scanning voltage and passes a data voltage;
The display element is interposed in series in a power supply line extending from a power source to supply power, and is turned on when the difference between the voltage applied to the gate and one terminal voltage of the display element exceeds a predetermined threshold value. A first transistor that starts energization of the display element;
A second transistor that turns on when the difference between the voltage applied to the gate and one terminal voltage of the display element exceeds a predetermined threshold, turns off the first transistor, and stops energization of the display element;
A capacitor interposed between the write transistor and the first transistor;
Voltage control means for preventing the terminal voltage on the first transistor side of the capacitor from falling below a predetermined potential;
An active matrix in which a voltage corresponding to a difference between a first ramp voltage and a data voltage is applied to the gate of the first transistor, and a second ramp voltage is applied to the gate of the second transistor. Drive-type display device. A display panel configured by arranging a plurality of pixels in a matrix is provided, and each pixel of the display panel has a display element that emits light when supplied with power, and 1 according to a data voltage supplied from the outside. In an active matrix drive type display device in which a control circuit for controlling the light emission period of each display element within a frame period is provided,
The control circuit of each pixel constituting the display panel is
A writing transistor that conducts by passing a scanning voltage and passes a data voltage;
The display element is interposed in series in a power supply line extending from a power source to supply power, and is turned on when the difference between the voltage applied to the gate and one terminal voltage of the display element exceeds a predetermined threshold value. A first transistor that starts energization of the display element;
A second transistor that turns on when the difference between the voltage applied to the gate and one terminal voltage of the display element exceeds a predetermined threshold, turns off the first transistor, and stops energization of the display element;
A capacitor interposed between the writing transistor and the first transistor,
A voltage corresponding to a difference between a first ramp voltage and a data voltage is applied to the gate of the first transistor, a second ramp voltage is applied to the gate of the second transistor, and the display element is supplied from the capacitor. An active matrix drive type display device characterized by having a large capacitance value. A display panel configured by arranging a plurality of pixels in a matrix is provided, and each pixel of the display panel has a display element that emits light when supplied with power, and 1 according to a data voltage supplied from the outside. In an active matrix drive type display device in which a control circuit for controlling the light emission period of each display element within a frame period is provided,
The control circuit of each pixel constituting the display panel is
The display element is interposed in series in a power supply line extending from a power source to supply power, and is turned on when the difference between the voltage applied to the gate and one terminal voltage of the display element exceeds a predetermined threshold value. A first transistor that starts energization of the display element;
A second transistor that turns on when the difference between the voltage applied to the gate and one terminal voltage of the display element exceeds a predetermined threshold, turns off the first transistor, and stops energization of the display element;
A capacitor having one terminal connected to the data voltage supply line and the other terminal connected to the second transistor;
A third transistor that conducts only during a light emission period within one frame and supplies a power supply voltage to the first transistor;
A fourth transistor that conducts by applying a reset signal and connects the other terminal of the capacitor to a power source,
An active matrix in which a voltage corresponding to a difference between a first ramp voltage and a data voltage is applied to the gate of the first transistor, and a second ramp voltage is applied to the gate of the second transistor. Drive-type display device. A display panel configured by arranging a plurality of pixels in a matrix is provided, and each pixel of the display panel has a display element that emits light when supplied with power, and 1 according to a data voltage supplied from the outside. In an active matrix drive type display device in which a control circuit for controlling the light emission period of each display element within a frame period is provided,
The control circuit of each pixel constituting the display panel is
A writing transistor that conducts by passing a scanning voltage and passes a data voltage;
The display element is interposed in series in a power supply line extending from a power source to supply power to the display element, and is turned on when the difference between the voltage applied to the gate and the power supply voltage exceeds a predetermined threshold value. A first transistor for starting
A second transistor that turns on when the difference between the voltage applied to the gate and the power supply voltage exceeds a predetermined threshold, turns off the first transistor, and stops energization of the display element;
A capacitor having one end connected to the output end of the writing transistor;
A third transistor that conducts by applying a scanning voltage and connects the other end of the capacitor to one end of the display element;
A fourth transistor that conducts during a light emission period and applies a first lamp voltage to the other end of the capacitor;
One end of the capacitor is connected to the gate of the first transistor, and a second ramp voltage supply line is connected to the gate of the second transistor.