JP2007324873A - Solid-state imaging apparatus, and its driving method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging apparatus which is capable of reducing the minimum charge storage time of a photodiode to less than 1 H (a horizontal period) and obtaining a good image, and to provide its driving method. <P>SOLUTION: The solid-state imaging apparatus enables reset pulses which are supplied to a reset transistor, and readout pulses which are used for operating a readout transistor, to rise up in a horizontal blanking period. The solid-state imaging apparatus enables the reset pulses to fall down in a horizontal effective period, following a horizontal blanking period, and furthermore enables the reset pulses to rise up in a following horizontal blanking period following the horizontal effective period. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device and a driving method thereof, and more particularly to an amplification type solid-state imaging device that amplifies and outputs a signal charge obtained by photoelectric conversion and a driving method thereof.

  In recent years, MOS solid-state imaging devices have been actively developed at various places as solid-state imaging devices suitable for application to video cameras, electronic still cameras, and the like. The MOS type solid-state imaging device is a solid-state imaging device having a structure in which a signal charge obtained by photoelectric conversion in each cell is amplified and extracted by a MOS transistor.

  FIG. 8 is a functional block diagram showing a schematic configuration of a conventional imaging apparatus.

  The imaging device 900 includes an imaging device 901, a timing signal generation circuit (TG) 902, a preprocessing circuit 903, an A / D converter 904, an imaging signal processing unit 905, a buffer memory 906, and a video output unit. 907 and a booster circuit 908.

  The imaging element 901 includes a pixel array in which a plurality of pixels including photoelectric conversion elements such as photodiodes are arranged in a matrix. The photoelectric conversion element photoelectrically converts the light collected on the pixel array by the camera lens into an electrical signal that is an analog signal, thereby generating image data representing an image connected by the camera lens. The image sensor 901 outputs the obtained analog signal to the preprocessing circuit 903. Further details of the image sensor 901 will be described later.

  The pre-processing circuit 903 includes a CDS (Correlated Double Sampling) circuit, a non-linear amplification circuit, and the like. The pre-processing circuit 903 receives the analog signal output from the image sensor 901, performs output noise reduction processing included in the received analog signal, and amplification processing before A / D conversion, and then performs processed analog processing. The signal is output to the A / D converter 904.

  The A / D converter 904 receives the processed analog signal output from the pre-processing circuit 903, converts the received analog signal into a digital signal, and then outputs the converted digital signal to the imaging signal processing unit 905. .

  The imaging signal processing unit 905 receives the digital signal output from the A / D converter 904, performs various processing on the received digital signal to generate an imaging signal, and then stores the generated video signal in the buffer memory 906. Store. Further, the imaging signal processing unit 905 outputs drive information for driving the imaging element 901 to the timing signal generation circuit 902.

  The buffer memory 906 receives the video signal output from the video signal processing unit 905 and temporarily stores the received video signal. The video output unit 907 reads an imaging signal temporarily stored in the buffer memory 906, and outputs a video created from the read imaging signal to a display device or the like (not shown).

  The timing signal generation circuit 902 receives the driving information output from the imaging signal processing unit 905, and generates a timing signal necessary for driving the imaging element 901 based on the received driving information. The timing signal generation circuit 902 outputs the generated timing signal to the booster circuit 908. Further, the booster circuit 908 amplifies the amplitude of the timing signal output from the timing signal generation circuit 902 and outputs the amplified timing signal to the image sensor 901.

  FIG. 9 is a diagram showing a schematic configuration of a conventional MOS type solid-state imaging device. FIG. 9 shows a part of the configuration shown in FIG.

  The solid-state imaging device shown in FIG. 9 includes a pixel array 8 in which a plurality of pixels are arranged two-dimensionally in the row direction and the column direction, and a plurality of vertical signal lines 5 connected to each of the pixels aligned in the column direction. And a plurality of readout signal lines Φt and a plurality of reset signal lines Φr connected to each of the pixels aligned in the row direction.

  Each of the pixels constituting the pixel array 8 includes a photodiode (hereinafter referred to as “PD”) 1 that is a photoelectric conversion element, a read transistor 2 that transfers signal charges accumulated in the PD 1, and a read transistor 2. A floating diffusion part (hereinafter referred to as “FD part”) 7 that temporarily accumulates signal charges read from the PD 1, a reset transistor 3 for resetting the potential of the FD part 7, and the potential of the FD part 7 And a detection transistor 4 that outputs a corresponding signal.

  In each pixel aligned in the row direction (for example, each pixel in the N row), each gate of the read transistor 2 is connected to the read signal line Φt (N), and each gate of the reset transistor 3 is connected to the reset signal line. It is connected to Φr (N). The drains of the detection transistors included in the pixels aligned in the column direction are connected to the vertical signal line 5.

  Further, the solid-state imaging device shown in FIG. 9 includes a multiplexer circuit 15 connected to each of the readout signal line and the reset signal line, a vertical shift register 90 and an electronic shutter vertical shift register 16 connected to the multiplexer circuit 15. A CDS circuit 13 connected to each of the vertical signal lines 5, a horizontal shift register 9, a horizontal signal line 14, and an output amplifier 12.

  The vertical shift register 90 and the electronic shutter vertical shift register 16 supply a read pulse and a reset pulse based on a timing signal supplied from the timing signal generation circuit 902 shown in FIG. The multiplexer circuit 15 selects one of the output of the vertical shift register 90 and the output of the electronic shutter vertical shift register 16 to supply a read pulse to the read signal line Φt and to reset the reset signal line Φr. Supply.

  By the electronic shutter operation realized by the vertical shift register 90 and the electronic shutter vertical shift register 16, signal charges are accumulated in the PD 1 for a predetermined time. An analog signal corresponding to the accumulated signal charge is output to the CDS circuit 13 via the vertical signal line 5 for each pixel row. Thereafter, the horizontal shift register 9 sequentially scans the vertical signal lines 5 sequentially based on the timing signal output from the timing signal generation circuit 902 (FIG. 8), and the signal held in the CDS circuit 13 is converted into the horizontal signal. The signals are sequentially output to the subsequent circuit via the line 14 and the output amplifier 12.

  Here, the details of the driving method of the conventional MOS type solid-state imaging device will be described.

  FIG. 10 is a timing chart of the horizontal drive period when the electronic shutter operation is performed such that the charge accumulation time by the photoelectric conversion element is less than 1H (one horizontal cycle). The horizontal drive period is composed of a horizontal blanking period and a horizontal effective period. In FIG. 9, only a part of the horizontal drive period outside the vertical blanking period is shown.

  In the following description, for convenience of description, a horizontal blanking period and a horizontal effective period outside the vertical blanking period are specified by adding a subscript.

<Horizontal blanking period (m): times T1 to T3>
At time T1, the horizontal blanking period (m) starts, and at time T2, the level of the VDD power supply 6 is controlled to transition from low to high.

<Horizontal effective period (m): Time T3 to T8>
Next, at time T4, based on the output of the electronic shutter vertical shift register 16 and the reset signal of the timing signal generation circuit 902, the multiplexer circuit 15 supplies the reset signal line Φr (N) of the Nth row. The level of the reset pulse is controlled so as to rise from Low to High. When the level of the reset pulse transitions to High, each of the reset transistors 3 aligned in the Nth row is turned on. As a result, the potential of the FD unit 7 included in each pixel in the Nth row is reset.

  Next, at time T5, the read pulse is controlled to rise from Low to High based on the output of the electronic shutter vertical shift register 16 and the read signal output from the timing generation signal. When the potential of the readout signal line Φr (N) transitions to High in accordance with the rise of the readout pulse, each of the readout transistors 2 included in the pixels in the Nth row is turned on. Therefore, the charge accumulated in the PD1 in the Nth row is transferred to the FD unit 7 through the read transistor 2.

  Next, at time T6, the read pulse is controlled to fall from High to Low. In accordance with the fall of the read pulse, each of the read transistors 2 in the Nth row is turned off, and the transfer of charge from PD1 to the FD portion 7 is blocked.

  Next, at time T7, the reset pulse is controlled to fall from High to Low. When the reset pulse falls, all the charges transferred from the PD 1 to the FD unit 7 are discharged, and the reset of the FD unit 7 is completed.

<Horizontal blanking period (m + 1): times T8 to T15>
At time T8, a horizontal blanking period (m + 1) following the horizontal effective period (m) starts.

  Next, at time T9, the reset pulse supplied to the reset signal line Φ (N) in the Nth row is controlled so as to rise from Low to High. When the level of the VDD power source 6 is High and the potential of the reset signal line Φ (N) transitions to High, each of the N-th row reset transistors 3 is turned ON. When the reset transistor 3 transitions to the ON state, the potential of the FD unit 7 is reset by the VDD power source 6 and the N-th row detection transistor is turned on.

  Next, at time T10, the reset pulse is controlled to fall from High to Low.

  Next, at time T11, the read pulse is controlled to rise from Low to High. Since each of the read transistors 2 in the N-th row is turned on by the rise of the read pulse, transfer of signal charges accumulated in the PD 1 to the FD unit 7 after time T6 is started.

  Next, at time T12, the read pulse is controlled to fall from High to Low. Since the readout transistors 2 in the Nth row are turned off by the fall of the readout pulse, the transfer of signal charges from the PD 1 to the FD unit 7 is blocked.

  By driving the electronic shutter readout pulse as described above, the charge accumulation time (period T6 to T12) by the PD1 in the Nth row is controlled to be less than 1H (one horizontal cycle). Each of the detection transistors 4 in the Nth row outputs an analog signal corresponding to the signal charge temporarily stored in the FD unit 7 to the CDS circuit 13 through the vertical signal line 5.

  Next, at time T13, the reset pulse is controlled to rise, and at time T14, the level of the VDD power supply 6 is controlled to transition to low. When the level of the VDD power supply 6 is low and the reset transistor 3 in the Nth row is turned on, the potential of the FD section 7 is shifted to the low level, so that the detection transistor 4 in the Nth row is turned off. . Thereafter, at time T15, the horizontal blanking period (m + 1) ends.

  The analog signals output from the pixels in the Nth row accumulated in the CDS circuit 13 are sequentially solid-state imaged according to the horizontal scanning by the horizontal shift register 9 in the horizontal effective period (m + 1), that is, from time T15 to T16. Output from the device.

  Conventionally, an electronic shutter operation in which the charge accumulation time in the PD 1 is less than one horizontal cycle has been realized by the above-described driving method of the solid-state imaging device.

  However, when the charge accumulation time is controlled to be less than one horizontal cycle by the electronic shutter operation, the rising and falling edges of the reset pulse and the rising and falling edges of the readout pulse occur in the horizontal effective period (m). . The rise and fall of the reset pulse and the readout pulse lead to the occurrence of jump noise, and the generated jump noise causes deterioration in image quality.

As a method for preventing image quality deterioration due to jump noise, Patent Document 1 discloses an analog signal affected by jump noise caused by an electronic shutter pulse by stopping a drive pulse of a horizontal shift register during a horizontal effective period. It describes that the solid-state imaging device is driven so as not to read.
JP 2001-111900 A

  However, the conventional solid-state imaging device driving method described in Patent Document 1 has a problem that the continuity of pixel signals is lost by stopping the driving pulse of the horizontal shift register during the horizontal effective period. In order to ensure the continuity of the pixel signals, it is necessary to separately provide a circuit for connecting the pixel signals, which leads to an increase in circuit scale.

  In addition, there is a problem that the image quality deteriorates due to the loss of continuity of the pixel signal itself, and a problem that a new jump noise generated by stopping the horizontal shift register affects the image signal and the image quality is greatly deteriorated. There is also.

  Therefore, the present invention can perform a very high-speed electronic shutter operation in which the charge accumulation time in the photoelectric conversion element is less than one horizontal cycle, and suppresses noise in the image pickup signal and always obtains a good image. It is an object of the present invention to provide a solid-state imaging device that can be used and a driving method thereof.

  The first invention relates to a driving method of a solid-state imaging device having a plurality of photoelectric conversion units, a plurality of floating diffusion units, a plurality of readout transistors, a plurality of reset transistors, and a plurality of detection transistors. In the horizontal blanking period outside the vertical blanking period, the solid-state imaging device driving method includes a step of raising the amplitude of a reset pulse supplied to each reset transistor aligned in a certain row, and in the horizontal blanking period, A step of increasing the amplitude of a read pulse supplied to a read transistor aligned in a row, a step of decreasing the amplitude of the read pulse in a horizontal effective period following the horizontal blanking period, and a horizontal blanking period following the horizontal effective period And a step of lowering the amplitude of the first reset pulse.

  When a pulse transitions during the horizontal effective period, noise is generated due to fluctuations in the power supply voltage and ground voltage. However, according to the driving method described above, the effects of noise and the like generated when the pulse transitions are Since it is suppressed only by the fall of the readout pulse in the effective period, a good image can be obtained.

  Further, in the step of lowering the amplitude of the read pulse, the fall timing of the read pulse may be controlled according to a desired charge accumulation time.

  According to such a driving method, since the charge accumulation time in the photoelectric conversion unit is defined by the fall timing of the readout pulse, the electronic shutter can be easily controlled in a desired period shorter than one horizontal cycle. .

  The solid-state imaging device further includes a horizontal signal line that receives a signal output from each of the detection transistors, and the step of lowering the amplitude of the readout pulse has a high level of the horizontal signal line reset pulse supplied to the horizontal signal line. It may be performed during a period that is a level.

  According to such a driving method, since the horizontal signal line potential is clamped to a certain potential by the reset operation of the horizontal signal line, the jumping noise caused by the falling edge of the readout pulse is generated in the image signal on the horizontal signal line. The influence can be suppressed, and a good image can be obtained.

  The solid-state imaging device further includes a horizontal signal line that outputs a signal output from the detection transistor, and in the step of lowering the amplitude of the readout pulse, the rising edge of the horizontal signal line reset pulse supplied to the horizontal signal line, or Simultaneously with the fall, the amplitude of the read pulse may be lowered.

  According to such a driving method, the jumping noise due to the falling edge of the readout pulse input within the horizontal effective period is offset with the noise due to the rising edge or falling edge of the reset pulse supplied to the horizontal signal line. The influence can be suppressed and a good image can be obtained.

  The solid-state imaging device may further include a horizontal shift register, and the step of decreasing the amplitude of the readout pulse may be performed during a period in which the horizontal shift register pulse supplied to the horizontal shift register is at a low level.

  According to such a driving method, the jumping noise caused by the fall of the readout pulse input during the horizontal effective period does not affect the period during which the pixel signal is output (the high period of the horizontal shift register pulse). A good image can be obtained.

  The solid-state imaging device further includes a horizontal shift register, and in the step of lowering the amplitude of the readout pulse, the amplitude of the readout pulse is increased simultaneously with the rise or fall of the horizontal shift register pulse supplied to the horizontal shift register. It may be lowered.

  According to such a driving method, the jumping noise caused by the falling edge of the readout pulse input during the horizontal effective period is offset with the noise accompanying the rising edge or falling edge of the horizontal shift register, thereby suppressing the influence of the noise. And a good image can be obtained.

  Further, in the step of lowering the amplitude of the readout pulse, the fall of the amplitude of the readout pulse may be controlled so that the falling transition period of the readout pulse is 5 ns or more.

  According to such a driving method, since the falling transition period of the readout pulse input in the horizontal effective period becomes long, the jumping noise caused by the fall of the readout pulse is suppressed, and a good image can be obtained. it can.

  The second invention relates to a solid-state imaging device. The solid-state imaging device includes a photoelectric conversion unit that accumulates charges obtained by photoelectric conversion of incident light, a read transistor that reads charges accumulated in the photoelectric conversion unit, and a floating that temporarily accumulates read charges. A pixel array in which a plurality of unit cells are arranged two-dimensionally, including a diffusion section, a reset transistor that resets the potential of the floating diffusion section, and a detection transistor that detects the electric charge read to the floating diffusion section A plurality of read signal lines connected to gates of read transistors aligned in the same row, a plurality of reset signal lines connected to gates of reset transistors aligned in the same row, and each of the read signal lines A read pulse is supplied to the reset signal line and a reset pulse is supplied to each reset signal line. And a vertical scanning unit supplies Toparusu.

  Then, the vertical scanning unit raises a reset pulse supplied to a reset signal line in a certain row and a read pulse supplied to a read signal line in a certain row in a horizontal blanking period outside the vertical blanking period, thereby generating a horizontal blanking. In the horizontal effective period following the ranking period, the amplitude of the read pulse supplied to the read signal line in a row is lowered, and in the horizontal blanking period following the horizontal effective period, the amplitude of the reset pulse supplied to the reset signal line in a row Fall down.

  According to such a configuration, the influence of noise and the like generated when the pulse transitions in the horizontal effective period is suppressed only by the fall of the readout pulse, so a solid-state imaging device capable of obtaining a good image is realized. can do.

  According to the solid-state imaging device and the driving method thereof according to the present invention, it is possible to perform a very high-speed electronic shutter operation in which the charge accumulation time in the photoelectric conversion unit is less than one horizontal period, and is favorable even in an environment where the amount of incident light is extremely large. An image can be obtained.

(First embodiment)
FIG. 1A is a functional block diagram illustrating an example of an imaging apparatus according to the first embodiment of the present invention.

  The imaging device 100 includes an imaging device 101, a timing signal generation circuit (TG) 102, a preprocessing circuit 103, an A / D converter 104, an imaging signal processing unit 105, a buffer memory 106, and a video output unit. 107.

  The image sensor 101 includes a pixel array in which a plurality of pixels including photoelectric conversion elements such as photodiodes are arranged in a matrix. Incident light collected by the camera lens is applied to the pixel array, and photoelectrically converted into an electrical signal, which is an analog signal, in the photoelectric conversion element. The image sensor 101 outputs the obtained electrical signal to the pre-processing circuit 103 as image information indicating an image formed on the pixel array.

  The pre-processing circuit 103 includes a CDS (Correlated Double Sampling) circuit for reducing output noise included in an analog signal, a non-linear amplification circuit for performing amplification processing before A / D conversion, and the like. The pre-processing circuit 103 receives the analog signal output from the image sensor 101, performs noise reduction processing and amplification processing included in the received analog signal, and then converts the processed analog signal to the A / D converter 104. Output to.

  The A / D converter 104 receives the processed analog signal output from the pre-processing circuit 103, converts the received analog signal into a digital signal, and then outputs the converted digital signal to the imaging signal processing unit 105. .

  The imaging signal processing unit 105 receives the digital signal output from the A / D converter 104, performs various video processes on the received digital signal, and stores the processed image signal in the buffer memory 106. Further, the imaging signal processing unit 105 generates a timing signal indicating timing for driving the imaging element 101 and outputs the timing signal to the timing signal generation circuit 102.

  The buffer memory 106 receives the video signal output from the imaging signal processing unit 105, and temporarily stores the received video signal. The video output unit 107 reads a video signal temporarily stored in the buffer memory 106, and outputs the read video signal to a display device (not shown).

  The timing signal generation circuit (TG) 102 receives the driving information output from the imaging signal processing unit 105 and generates a timing signal necessary for driving the imaging device 101 based on the received driving information. The timing signal generation circuit 102 outputs the generated timing signal to the image sensor 101.

  Note that the image pickup apparatus shown in FIG. 1A does not include a booster circuit between the timing signal generation circuit 102 and the image pickup device 101, and supplies a predetermined voltage supplied from a power source to the image pickup device. This is different from the conventional image sensor shown in FIG. Due to this difference, the imaging apparatus 100 according to the present embodiment can output a stable voltage for a long time.

  However, the solid-state imaging device driving method described below can be similarly applied to an imaging device including a booster circuit 108 between the timing signal generation circuit 102 and the imaging element 101 as shown in FIG. 1B. Is possible. When the imaging device includes the booster circuit 108, a predetermined voltage can be supplied to the imaging device more stably for a longer time.

  FIG. 2 is a device configuration diagram of the solid-state imaging device according to the first embodiment of the present invention. In FIG. 2, a part of the configuration shown in FIG. 1 is shown. Further, for the sake of space, FIG. 2 shows only some pixels aligned in the Nth and (N + 1) th rows, and the remaining descriptions are omitted.

  The solid-state imaging device 50 includes a pixel array 8 in which a plurality of pixels are two-dimensionally arranged on a semiconductor substrate, a plurality of vertical signal lines 5, a plurality of readout signal lines Φt, and a plurality of reset signal lines r. Is provided.

  Each of the pixels constituting the pixel array 8 is configured as an amplification type unit pixel. Each of the pixels is read through a photodiode (hereinafter referred to as “PD”) 1 that is a photoelectric conversion element, a read transistor (transfer transistor) 2 that reads charges accumulated in PD 1, and a read transistor 2. A floating diffusion section (hereinafter referred to as “FD section”) 7 that temporarily accumulates charges, a reset transistor 3 for resetting the potential of the FD section 7, and an electric signal corresponding to the potential of the FD section 7 are output. And a detection transistor (amplification transistor) 4.

  A VDD power source 6 is connected to the sources of the reset transistor 3 and the detection transistor 4. A transfer signal line Φt is connected to each gate of the read transistors 2 aligned in the same row. Further, a reset signal line Φr is connected to each gate of the reset transistors 3 aligned in the same row. Further, a vertical signal line 5 is connected to the drains of the detection transistors 4 aligned in the same column.

  Further, the solid-state imaging device 50 includes a multiplexer circuit 15, a vertical shift register 10, an electronic shutter vertical shift register 16, a CDS circuit 13, a horizontal shift register 9, a horizontal signal line 14, and an output amplifier 12. Prepare. In the present embodiment, the multiplexer circuit 15, the vertical shift register 10, and the electronic shutter vertical shift register 16 supply a read pulse to the read signal line Φt and a reset pulse to the reset signal line Φr. This corresponds to the vertical scanning unit.

  The electronic shutter vertical shift register 16 receives the timing signal output from the timing signal generation circuit 102 and outputs the received timing signal and a read pulse to be supplied to the read transistor 2 to the multiplexer circuit 15. As a result, the transfer signal line Φt (N) is sequentially selected, and the charge accumulated in the PD1 of each row is transferred to the FD unit 7.

  The vertical shift register 10 receives the timing signal output from the timing signal generation circuit 102 and outputs the received timing signal and a read pulse to be supplied to the read transistor 2 to the multiplexer circuit 15. As a result, the electric charge accumulated in the PD 1 of each row is transferred to the FD unit 7, and a signal corresponding to the FD unit 7 is output from the detection transistor 4 to the vertical signal line 5. The signal output to the vertical signal line 5 is temporarily stored in the CDS circuit 13.

  Thereafter, the horizontal shift register 9 sequentially selects the vertical signal lines 5 based on the timing signal output from the timing signal generation circuit 102. According to the selection of the vertical signal line 5 by the horizontal shift register 9, the signal for each pixel of one row temporarily stored in the CDS circuit 13 is sequentially output from the output amplifier 12 via the horizontal signal line 14. The

  Next, a method for driving the solid-state imaging device 50 according to the first embodiment of the present invention will be described.

  FIG. 3 is a timing chart showing a method for driving the solid-state imaging device according to the embodiment of the present invention. FIG. 3 shows the pulse timing in the horizontal drive period outside the vertical blanking period.

  In the following description, only a certain horizontal driving period and a subsequent horizontal driving period will be described in order to explain a driving method when reading out a pixel signal from each of the pixels in the Nth row. In the following description, for convenience of description, a horizontal blanking period and a horizontal effective period outside the vertical blanking period are specified by adding a subscript.

<Horizontal blanking period (m): Time T1 to Time T5>
First, at time T1 outside the vertical blanking period, the horizontal blanking period starts.

  Next, at time T2, control is performed so that the level of the VDD power supply 6 changes from Low to High.

  Next, at time T3, the electronic shutter reset pulse is controlled to rise from Low to High. When the level of the reset pulse transitions to Low, each reset transistor 3 in the N-th row is turned on, so that each potential of the FD section 7 in the N-th row is reset by the VDD power source 6.

  Next, at time T4, the electronic shutter read pulse is controlled to rise from Low to High. When the level of the read pulse transitions to High, each of the read transistors 2 in the Nth row is turned on, so that the charge accumulated in PD1 is discharged to the FD unit 7.

<Horizontal effective period (m): times T5 to T7>
At time T5, the next horizontal effective period (m) following the horizontal blanking period (m) starts.

  Next, at time T6, control is performed so that the readout pulse for the electronic shutter falls from High to Low. When the read pulse transitions to Low, each of the read transistors 2 in the Nth row is turned off, so that charge transfer from PD1 to FD unit 7 is blocked.

  As described above, in the method for driving the solid-state imaging device according to this embodiment, the readout pulse for the electronic shutter has a period during which the level is High (time T4 to T6) and a certain horizontal blanking period (m). And a part of the subsequent horizontal effective period (m). In addition, since the solid-state imaging device illustrated in FIG. 1A generates a pulse using a predetermined power supply voltage without using a booster circuit, the high period of the pulse can be stabilized.

<Horizontal blanking period (m + 1)>
At time T7, a horizontal blanking period (m + 1) following the horizontal effective period (m) starts.

  Next, at time T8, the reset pulse is controlled to fall from High to Low. When the level of the VDD power supply 6 is High and the reset pulse transitions to Low, each of the N-th row reset transistors 3 is turned off.

  Next, at time T9, the read pulse is controlled to rise from Low to High. When the level of the read pulse transitions to High, each of the read transistors 2 in the Nth row is turned on, so that transfer of signal charges accumulated in PD1 to the FD unit 7 after time T4 starts.

  Then, at time T10, the read pulse is controlled to fall from High to Low. When the level of the read pulse transitions to Low, each of the read transistors 2 in the Nth row is turned off, and charge transfer from PD1 to the FD unit 7 is stopped.

  By supplying the reset pulse and the readout pulse as described above, the periods T6 to T10 are controlled to be less than one horizontal cycle. That is, the amount of charge transferred from the PD 1 to the FD unit 7 in the periods T 6 to T 10 becomes an accumulated charge amount less than one horizontal cycle. Thereafter, a signal corresponding to the amount of charge temporarily accumulated in the FD unit 7 is output from each of the detection transistors 4 in the Nth row to the CDS circuit 13 via the vertical signal line 5.

  After that, at time T11, the reset pulse is controlled to transition from Low to High. At time T12, the level of the VDD power supply 6 is controlled to transition to Low. When the level of the VDD power source 6 is Low and the level of the reset pulse transitions to Low, each of the N-th row reset transistors 3 is turned on. Therefore, the potential of the FD unit 7 transitions to the Low level. When the potential of the FD unit 7 becomes low, each of the detection transistors 4 in the Nth row is turned off (non-selected state).

<Horizontal effective period (m + 1): times T13 to T14>
Each of the pixel signals of the Nth row held by the CDS circuit 13 is sequentially output from the output amplifier 12 via the horizontal signal line 14 according to the horizontal scanning by the horizontal shift register 9 in the horizontal effective period (m + 1). Is output.

  As described above, in the solid-state imaging device driving method according to the present embodiment, the set pulse rises and falls, and the readout pulse is not raised during the horizontal effective period, and only the readout pulse is lowered. It has a feature in that.

  On the other hand, since the conventional solid-state imaging device driving method performs the rise and fall of the readout pulse for the electronic shutter and the rise and fall of the reset pulse during the horizontal effective period. As a result of this transition, a jumping noise is generated, and the image pickup signal is deteriorated by the jumping noise.

  On the other hand, according to the driving method of the solid-state imaging device according to the present embodiment, the transition of the pulse in the horizontal effective period is caused only by the falling edge of the readout pulse. It is reduced only to those caused by. Therefore, according to the driving method of the solid-state imaging device according to the present embodiment, it is possible to significantly reduce the jumping noise caused by the reset pulse and the readout pulse and obtain a good image signal.

  Further, in the imaging apparatus shown in FIG. 1A, it is possible to generate the reset pulse and the readout pulse without providing a booster circuit for amplifying the amplitude of the signal output from the timing signal generation circuit 102.

  Here, the details of the jump noise generated by the fall of the readout pulse within the horizontal effective period and a driving method for further reducing the jump noise will be described.

  4 to 7 are enlarged views of each pulse in the vicinity of time T6 (P portion) shown in FIG.

  In the MOS type solid-state imaging device as shown in FIG. 2, analog signals for one pixel row are sequentially read out to the horizontal signal line 14 in accordance with the scanning of the horizontal shift register 9 in the horizontal effective period. If another pulse signal is supplied from the outside of the solid-state imaging device during horizontal scanning by the horizontal shift register 9, noise may jump into the analog signal due to fluctuations in the power supply voltage and the ground voltage. In order to suppress the influence of this jumping noise, it is necessary to further control the falling timing of the readout pulse within the effective period.

  With reference to FIG. 4, in the driving method of the solid-state imaging device according to the present embodiment, the readout pulse within the horizontal effective period is the driving period (High level period) of the horizontal signal line reset pulse for resetting the horizontal signal line 14. It is driven to fall. In this case, the potential of the horizontal signal line 14 is clamped to a certain reset level during the driving period of the horizontal signal line reset pulse. Therefore, even if the jump noise due to the falling edge of the readout pulse occurs, it is possible to suppress the generated jump noise from affecting the image signal output from the horizontal signal line 14. Therefore, according to the driving method shown in FIG. 4, a better image can be obtained.

  Further, instead of the driving method shown in FIG. 4, the falling timing of the read pulse may be controlled as follows. Hereinafter, the driving methods shown in FIGS. 5 to 7 are referred to as first to third modifications, respectively.

<First Modification>
Referring to FIG. 5, in the first modification, the read pulse is controlled to fall during the Low period of the horizontal shift register pulse. According to the driving method according to the first modification, since the fall of the readout pulse is performed during the output period of the pixel signal (the high period of the horizontal shift register pulse), jump noise is generated along with the fall of the readout pulse. However, the generated jump noise does not affect the output image signal. Therefore, according to the driving method shown in FIG. 5, a better image can be obtained.

<Second Modification>
Referring to FIG. 6, in the second modification, the read pulse is controlled to fall in synchronization with the rise of the horizontal shift register pulse and the fall of the horizontal signal line reset pulse. According to the driving method according to the second modification, the jumping noise generated with the falling edge of the read pulse is offset with the rising edge of the horizontal shift register pulse and the falling edge of the horizontal signal line reset pulse. It is possible to obtain a better image in which the influence is suppressed.

<Third Modification>
Referring to FIG. 7, in the third modification, the read pulse is controlled to fall in synchronization with the fall of the horizontal shift register pulse and the rise of the horizontal signal line reset pulse. According to the driving method according to the third modified example, as in the driving method according to the second modified example, the jumping noise generated with the falling edge of the read pulse is caused by the falling edge of the horizontal shift register pulse and the horizontal signal line. Since this cancels out the rising edge of the reset pulse, it is possible to obtain a better image in which the influence of the jumping noise is suppressed.

  Further, in addition to the control timing of the readout pulse shown in FIGS. 4 to 7, it is preferable to set the falling transition period of the readout pulse to 5 ns or more. In this case, since fluctuations in the power supply voltage and the installation voltage can be suppressed, it is possible to reduce the level of noise itself accompanying the fall of the readout pulse.

  As described above, the solid-state imaging device according to the present embodiment includes the vertical shift register for the electronic shutter, and can control the electronic shutter speed to be less than 1H (one horizontal cycle). Furthermore, the solid-state imaging device according to the present embodiment has a driving feature in that the rising and falling edges of the reset pulse and the rising edge of the readout pulse do not occur during the horizontal effective period. Therefore, according to the solid-state imaging device according to the present embodiment, even in an environment where the amount of incident light on the imaging device such as outdoors in the daytime is extremely large, a high-speed electronic shutter operation of less than one horizontal cycle is realized, and the influence of jump noise It is possible to take a good image with reduced image quality.

  More specifically, noise is generated due to fluctuations in the power supply voltage and the ground voltage with the transition of the pulse within the horizontal effective period. According to the driving method of the solid-state imaging device according to the present embodiment, the pulse Since the influence of noise and the like associated with the transition of the signal can be reduced only to the fall of the readout pulse, a good image can be obtained.

  Furthermore, according to the present invention, it is possible to control so that the falling transition of the read pulse in the horizontal effective period is performed in the High period of the horizontal signal line reset pulse. In this case, since the horizontal signal line is clamped to a certain potential by the reset operation of the horizontal signal line, it is possible to suppress the influence of jump noise caused by the fall of the readout pulse input within the horizontal effective period. And a good image can be obtained.

  Further, according to the present invention, it is possible to control so that the falling transition of the read pulse in the horizontal effective period is performed in the low period of the horizontal shift register pulse. In this case, a jumping noise due to the falling edge of the readout pulse is suppressed from affecting the output period of the pixel signal (that is, the high period of the horizontal shift register pulse), so that a good image can be obtained.

  Alternatively, according to the present invention, in the horizontal effective period, the falling edge of the read pulse is simultaneously with the rising edge or falling edge of the reset pulse of the horizontal signal line, or simultaneously with the rising edge or falling edge of the horizontal shift register pulse. Can be controlled. Due to the feature of such a driving method, it is possible to prevent the jumping noise from affecting the imaging signal. In this case, the jumping noise caused by the falling edge of the readout pulse input within the horizontal effective period is canceled with the noise caused by the rising edge or falling edge of the reset pulse of the horizontal signal line. Therefore, the influence of noise can be suppressed by such a readout pulse control method, and a good image can be obtained.

  In addition, by setting the falling transition period of the readout pulse within the horizontal effective period to be long (for example, 5 ns), jumping noise caused by the fall of the readout pulse is suppressed, and a good image can be obtained.

  Since the solid-state imaging device and the driving method thereof according to the present invention enable a very high-speed electronic shutter operation in which the charge accumulation time in the photodiode is less than one horizontal period, the solid-state imaging device is used, for example, in an environment where the amount of incident light is extremely large. It is particularly useful as a solid-state imaging device incorporated in a video camera, an electronic still camera, or the like.

1 is a functional block diagram illustrating an example of an imaging apparatus according to a first embodiment of the present invention. Functional block diagram showing another example of the imaging apparatus according to the first embodiment of the present invention 1 is a block diagram of a solid-state imaging device according to a first embodiment of the present invention. 1 is a timing chart showing a method for driving a solid-state imaging device according to a first embodiment of the present invention. Enlarged view of each pulse in the vicinity of time T6 shown in FIG. FIG. 6 is a diagram illustrating a method for driving a solid-state imaging device according to Modification 1 of the first embodiment. FIG. 10 is a diagram illustrating a driving method of the solid-state imaging device according to the second modification of the first embodiment. FIG. 6 is a diagram illustrating a method for driving a solid-state imaging device according to Modification 3 of the first embodiment. Functional block diagram showing a schematic configuration of a conventional imaging device Device configuration diagram of a conventional solid-state imaging device Timing diagram showing a driving method of a conventional solid-state imaging device

Explanation of symbols

1 Photodiode (PD)
2 Reading transistor 3 Reset transistor 4 Detection transistor 5 Vertical signal line 6 VDD power supply 7 Floating diffusion (FD) section 8 Pixel array 9 Horizontal shift register 10 Vertical shift register 12 Output amplifier 13 CDS circuit 14 Horizontal signal line 15 Multiplexer circuit 16 Electronic shutter Vertical shift register 50 Solid-state imaging device 101 Image sensor 102 Timing signal generation circuit (TG)
103 Pre-processing circuit 104 A / D converter 105 Imaging signal processing unit 106 Buffer memory 107 Video output unit 108 Booster circuit

Claims (8)

A method for driving a solid-state imaging device having a plurality of photoelectric conversion units, a plurality of floating diffusion units, a plurality of readout transistors, a plurality of reset transistors, and a plurality of detection transistors,
Raising the amplitude of a reset pulse supplied to each of the reset transistors aligned in a row in a horizontal blanking period outside the vertical blanking period;
Within the horizontal blanking period, raising the amplitude of a read pulse supplied to the read transistors aligned in the row;
Lowering the amplitude of the readout pulse in a horizontal effective period following the horizontal blanking period;
And a step of lowering the amplitude of the first reset pulse in a horizontal blanking period subsequent to the horizontal effective period.   2. The method for driving a solid-state imaging device according to claim 1, wherein, in the step of lowering the amplitude of the readout pulse, the fall timing of the readout pulse is controlled according to a desired charge accumulation time. The solid-state imaging device further includes a horizontal signal line that receives a signal output from each of the detection transistors,
2. The solid-state imaging device according to claim 1, wherein the step of decreasing the amplitude of the readout pulse is performed during a period in which a level of a horizontal signal line reset pulse supplied to the horizontal signal line is high. Driving method. The solid-state imaging device further includes a horizontal signal line that outputs a signal output from the detection transistor,
2. The step of lowering the amplitude of the read pulse lowers the amplitude of the read pulse simultaneously with the rise or fall of a horizontal signal line reset pulse supplied to the horizontal signal line. A driving method of the solid-state imaging device according to claim 1. The solid-state imaging device further includes the horizontal shift register,
2. The method of driving a solid-state imaging device according to claim 1, wherein the step of decreasing the amplitude of the readout pulse is performed in a period in which a horizontal shift register pulse supplied to the horizontal shift register is at a low level. . The solid-state imaging device further includes a horizontal shift register,
2. The step of lowering the amplitude of the read pulse lowers the amplitude of the read pulse simultaneously with the rise or fall of a horizontal shift register pulse supplied to the horizontal shift register. A driving method of the solid-state imaging device according to claim 1.   2. The fall of the amplitude of the read pulse is controlled so that the fall transition period of the read pulse is 5 ns or more in the step of lowering the amplitude of the read pulse. 7. A method for driving a solid-state imaging device according to any one of 6 above. A solid-state imaging device,
A photoelectric conversion unit that accumulates charges obtained by photoelectrically converting incident light, a read transistor that reads charges accumulated in the photoelectric conversion unit, a floating diffusion unit that temporarily accumulates the read charges, A pixel array in which a plurality of unit cells including a reset transistor for resetting the potential of the floating diffusion portion and a detection transistor for detecting a charge read to the floating diffusion portion are arranged two-dimensionally;
A plurality of read signal lines connected to the gates of the read transistors aligned in the same row;
A plurality of reset signal lines connected to the gates of the reset transistors aligned in the same row;
A vertical scanning unit that supplies a read pulse to each of the read signal lines and supplies a reset pulse to each of the reset signal lines,
The vertical scanning unit includes:
In the horizontal blanking period outside the vertical blanking period, the reset pulse supplied to the reset signal line in a certain row and the read pulse supplied to the read signal line in the certain row are raised,
In the horizontal effective period following the horizontal blanking period, the amplitude of the read pulse supplied to the read signal line of the certain row is lowered,
In the horizontal blanking period following the horizontal effective period, the amplitude of the reset pulse supplied to the reset signal line in the certain row is lowered.

Images