JP2007316511A - Active matrix type display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent the occurrence of a display defect accompanying the abnormality of a pixel circuit in a display device of an active matrix drive system of writing a current signal as a video signal into the pixel circuit. <P>SOLUTION: The active matrix type display device is disposed in matrix with a plurality of pixel sections PX having display elements OELD emitting light according to a supply current on a substrate, in which a part of the pixel sections are subjected to repair processing for preventing trailing bright line display due to the defect of the pixel sections and at least one dummy pixel section PX' is formed in correspondence to the respective columns formed by the plurality of the pixel sections. In a video signal writing period to the pixel sections, the video signal is run simultaneously with the dummy pixel sections corresponding to the pixel sections. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an active matrix display device in which a display screen is configured by arranging display pixels including self-luminous elements such as organic electroluminescence (hereinafter referred to as EL) elements in a matrix.

  In an organic electroluminescence (EL) display device, when drive current varies, image quality defects such as luminance unevenness occur. Therefore, when the active matrix driving method is employed in this display device, it is required that the characteristics of the drive control element that controls the magnitude of the drive current are substantially the same among the pixels. However, in this display device, since the drive control element is usually formed on an insulator such as a glass substrate, the characteristics are likely to vary.

  Patent Document 1 below describes an organic EL display device that employs a current copy type circuit as a pixel circuit. The current copy type pixel circuit includes an n-channel field effect transistor (FET) that is a drive control element, an organic EL element, a capacitor, an output control switch, a video signal supply control switch, and a diode connection switch. It is out.

  The source of the drive control element is connected to the first power supply line having a low potential, and the capacitor is connected between the gate of the drive control element and the first power supply line. The output control switch is connected between the drain of the drive control element and the cathode of the organic EL element, and the anode of the organic EL element is connected to a second power supply line having a higher potential. The video signal supply control switch is connected between the drain of the drive control element and the video signal line, and the diode connection switch is connected between the drain and gate of the drive control element.

In the current copy type pixel circuit, a video signal is supplied to the pixel circuit as a current signal I _sig in a writing period. In the holding period subsequent to the writing period, a driving current having a magnitude substantially equal to the current _Isig flows between the drain and the source of the driving control element. Therefore, not only the threshold value V _th of the drive control element but also the influence of mobility and dimensions on the drive current can be eliminated.

  By the way, in an active matrix driving type display device, a part of pixels may be visually recognized as a bright spot or a dark spot due to disconnection or short circuit in the pixel circuit. In a display device using an active matrix driving method, a column or row of pixels may be visually recognized as a bright line or a dark line due to disconnection of a scanning signal line or a video signal line.

In carrying out the present invention, the present inventor, in an active matrix drive type display device that writes a current signal as a video signal to a pixel circuit, in addition to the above-described line-like or dot-like luminance unevenness in an image, It has been found that bright spots with linear tails can be produced.
US Pat. No. 6,373,454

  An object of the present invention is to prevent the occurrence of a display defect due to an abnormality of a pixel circuit in an active matrix driving type display device that writes a current signal as a video signal to the pixel circuit.

  In order to achieve the above object, an active matrix display device according to an aspect of the present invention includes an active matrix display device in which a plurality of pixel portions each having a display element that emits light according to a supply current are arranged in a matrix on a substrate. And at least one dummy pixel portion is formed corresponding to each column formed by the plurality of pixel portions, and at the same time as writing the video signal to the pixel portion, the pixel portion and the corresponding dummy pixel portion. This is an active matrix type display device adapted to flow a video signal.

  According to the present invention, in an active matrix driving type display device that writes a current signal as a video signal to a pixel circuit, it is possible to prevent occurrence of a display defect due to an abnormality of the pixel circuit.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, in each figure, the same referential mark is attached | subjected to the component which exhibits the same or similar function, and the overlapping description is abbreviate | omitted.

FIG. 1 is a plan view schematically showing a display device according to one embodiment of the present invention.
As shown in FIG. 1, this display device is a bottom emission type organic EL display device adopting an active matrix driving method. The organic EL display device is connected to each row of m × n display pixels PX and display pixels PX arranged in a matrix on a light-transmissive insulating substrate SUB such as a glass substrate and constituting a display area. In addition, each has m write control lines SG and light emission control lines BG provided independently, and n video signal lines DL respectively connected to each column of the display pixels PX.
In addition, n dummy pixels PX ′ for preventing the generation of a bright spot with a tail are arranged in the horizontal direction in the drawing at the upper end portion of the light transmissive insulating substrate SUB. A write control line SG ′ connected to each dummy pixel PX ′ and n video signal lines DL are provided.
Further, the display device includes a scanning signal line driver YDR that sequentially drives the write control lines SG and SG ′ and the light emission control line BG for each row of display pixels, and a video signal line driver XDR that drives the plurality of video signal lines DL. I have.

  FIG. 2 is a cross-sectional view schematically showing an example of a structure that can be employed in the display device of FIG. FIG. 3 is a plan view schematically showing an example of a structure that can be employed in the pixel of the display device of FIG. In FIG. 2, the display device is drawn such that its display surface, that is, the front surface or the light emitting surface faces downward, and the back surface faces upward. Further, FIG. 3 illustrates a pixel structure viewed from the display surface side.

On the substrate SUB, as shown in FIG. 2, for example, a SiN _x layer and a SiO _x layer are sequentially stacked as the undercoat layer UC.

  On the undercoat layer UC, for example, a gate insulating film GI that can be formed using a semiconductor layer SC that is a polysilicon layer in which a channel and a source / drain are formed, for example, TEOS (TetraEthyl OrthoSilicate), etc., and MoW, for example, The gates G are sequentially stacked, and they constitute a top gate type TFT. In this example, these TFTs are p-channel TFTs, and are used as DRTT, BCT, SST, and TCT (described later) included in the pixel PX of FIGS.

  On the gate insulating film GI, the light emission control line BG and the write control line SG shown in FIG. 1 and the electrode E1 shown in FIGS. 1 and 3 are further arranged. The light emission control line BG, the write control line SG, and the electrode E1 can be formed in the same process as the gate G.

  As shown in FIG. 1, each of the light emission control line BG and the write control line SG extends in the row direction (X direction) of the pixel PX, and is alternately arranged in the column direction (Y direction) of the pixel PX. Yes. The light emission control line BG and the write control line SG are connected to the scanning signal line driver YDR.

  The electrode E1 is connected to the gate G of the DRT. The electrode E1 is used as one electrode of a capacitor Cs described later.

The gate insulating film GI, the gate G, the light emission control line BG and the write control line SG, and the electrode E1 are covered with the interlayer insulating film II shown in FIG. The interlayer insulating film II is made of, for example, SiO _x formed by a plasma CVD method or the like. A portion of the interlayer insulating film II on the electrode E1 is used as a dielectric layer of the capacitor Cs.

  On the interlayer insulating film II, a source electrode SE and a drain electrode DE shown in FIGS. 2 and 3, a video signal line DL and a power supply line PSL shown in FIGS. 1 and 3, and an electrode E2 shown in FIG. 3 are arranged. Has been. These can be formed in the same process and have, for example, a three-layer structure of Mo / Al / Mo.

  The source electrode SE and the drain electrode DE are electrically connected to the source and drain of the TFT through contact holes provided in the interlayer insulating film II.

  As shown in FIGS. 1 and 3, each of the video signal lines DL extends in the Y direction and is arranged in the X direction. These video signal lines DL are connected to a video signal line driver XDR.

  In this example, as shown in FIG. 3, the power supply lines PSL each extend in the Y direction and are arranged in the X direction.

  The electrode E2 is connected to the power supply line PSL. The electrode E2 is used as the other electrode of the capacitor Cs.

The source electrode SE, the drain electrode DE, the video signal line DL, the power supply line PSL, and the electrode E2 are covered with the passivation film PS shown in FIG. The passivation film PS is made of, for example, SiN _x .

  On the passivation film PS, as shown in FIG. 2, light-transmitting first electrodes PE are juxtaposed apart from each other as a front electrode. Each first electrode PE is a pixel electrode, and is connected to the drain electrode DE of the BCT through a through hole provided in the passivation film PS, as shown in FIGS.

  The first electrode PE is an anode in this example. As a material of the first electrode PE, for example, a transparent conductive oxide such as ITO (Indium Tin Oxide) can be used.

  A partition insulating layer PI shown in FIG. 2 is further disposed on the passivation film PS. In the partition insulating layer PI, a through hole is provided at a position corresponding to the first electrode PE, or a slit is provided at a position corresponding to a column or row formed by the first electrode PE. Here, as an example, the partition insulating layer PI is provided with a through hole at a position corresponding to the first electrode PE.

  The partition insulating layer PI is, for example, an organic insulating layer. The partition insulating layer PI can be formed using, for example, a photolithography technique.

  On the first electrode PE, an organic layer ORG including a light emitting layer is disposed as an active layer. The light emitting layer is, for example, a thin film containing a luminescent organic compound whose emission color is red, green, or blue. The organic layer ORG may further include a hole injection layer, a hole injection layer, a hole blocking layer, an electron transport layer, an electron injection layer, and the like in addition to the light emitting layer.

  The partition insulating layer PI and the organic layer ORG are covered with a second electrode CE that is a back electrode. The second electrode CE is a common electrode connected to each other between the pixels PX, and is a light-reflective cathode in this example. For example, the second electrode CE is electrically connected to an electrode wiring (not shown) formed on the same layer as the video signal line DL through a contact hole provided in the passivation film PS and the partition insulating layer PI. It is connected to the. Each organic EL element OLED includes a first electrode PE, an organic layer ORG, and a second electrode CE.

Each pixel PX includes an organic EL element OLED and a pixel circuit. In this example, as shown in FIGS. 1 and 3, the pixel circuit includes a pixel switch SST (hereinafter referred to as SST), a drive transistor DRT (hereinafter referred to as DRT), a switch TCT (hereinafter referred to as TCT), An output switch BCT (hereinafter referred to as BCT) and a capacitor Cs are provided.
As described above, in this example, DRT, BCT, SST, and TCT are p-channel TFTs. In this example, SST and TCT are the connection state between the drain of the DRT and the video signal line DL and the gate of the DRT, the first state in which they are connected to each other, and the second state in which they are disconnected from each other. The switch group which switches between states is comprised.

  The DRT, BCT, and organic EL element OLED are connected in series in this order between the first power supply terminal ND1 and the second power supply terminal ND2. In this example, the first power supply terminal ND1 is a high potential power supply terminal, and the second power supply terminal ND2 is a low potential power supply terminal.

  The gate of BCT is connected to the light emission control line BG. SST is connected between the video signal line DL and the drain of the DRT, and its gate is connected to the write control line SG. The TCT is connected between the drain and gate of the DRT, and the gate is connected to the write control line SG. The capacitor Cs is connected between the gate of the DRT and the constant potential terminal ND1 '.

  When an image is displayed on this organic EL display device, for example, each of the light emission control line BG and the write control line SG is driven line-sequentially. In a writing period in which a video signal is written to a certain pixel PX, first, a scanning signal for opening BCT is output as a voltage signal from the scanning signal line driver YDR to the light emission control line BG to which the previous pixel PX is connected. Subsequently, a scanning signal for closing the switches SST and TCT is output as a voltage signal to the writing control line SG to which the previous pixel PX is connected. In this state, the video signal line driver XDR outputs the video signal as a current signal to the video signal line DL to which the previous pixel PX is connected, and the DRT gate-source voltage is set to a magnitude corresponding to the previous video signal. Set to Thereafter, a scanning signal for opening the switches SST and TCT is output as a voltage signal from the scanning signal line driver YDR to the writing control line SG to which the previous pixel PX is connected, and subsequently, light emission to which the previous pixel PX is connected. A scanning signal for closing the BCT is output to the control line BG as a voltage signal.

  In the effective display period in which the BCT is closed, a driving current having a magnitude corresponding to the gate-source voltage of the DRT flows through the organic EL element OLED. The organic EL element OLED emits light with a luminance corresponding to the magnitude of the drive current.

  As described above, in an active matrix driving type display device that writes a current signal as a video signal to a pixel circuit, a bright spot with a tail in a bright line shape or a dark line shape can be generated. As a result of examining the reason in detail, the present inventor found the following facts.

  For example, in the pixel PX connected to the light emission control line BG and write control line SG in the Mth row and the video signal line DL in the Nth column, the source and drain of the DRT are short-circuited. In this case, the organic EL element OLED of the pixel PX always emits light with the maximum luminance during the effective display period. Therefore, this pixel PX is visually recognized as a bright spot.

  In this case, in the writing period of the previous pixel PX, the video signal line driver XDR sets the video signal line DL in the Nth column to a potential substantially equal to the first power supply terminal ND1. That is, the potential of the video signal line DL in the Nth column becomes excessively high. Since the wiring capacity of the video signal line DL is so large that it cannot be ignored, for example, a writing period of several tens of rows is required until the potential of the video signal line DL in the Nth column is restored to an appropriate range. is there.

  For this reason, among the pixels PX connected to the video signal line DL in the Nth column, signals smaller than the output of the video signal line driver XDR are written in several tens of pixels after the M + 1th row. As a result, the luminance of these pixels PX is lower than the original luminance. Therefore, these pixels PX are visually recognized as dark lines.

  For this reason, when the source and drain of the DRT are short-circuited, a bright spot with a trailing edge is generated. As can be seen from the above description, the brightness of the dark line is not constant and usually increases from the end on the bright spot side toward the other end.

  For example, in the pixel PX connected to the light emission control line BG and the write control line SG of the Mth row and the video signal line DL of the Nth column, the bright spot with a tail drawn in a bright line shape is the source-drain of the BCT. This occurs when there is a short circuit.

  That is, in this case, during the writing period of the pixel PX, the video signal line driver XDR sets the video signal line DL in the Nth column to a potential lower than that of the second power supply terminal ND2. Therefore, in the pixel PX, the gate potential of the DRT is very low. Therefore, the organic EL element OLED of the pixel PX always emits light with the maximum luminance during the effective display period. Therefore, this pixel PX is visually recognized as a bright spot.

  In this case, in the writing period of the previous pixel PX, the video signal line DL in the Nth column is set to an excessively low potential. Since the wiring capacity of the video signal line DL is so large that it cannot be ignored, for example, a writing period of several tens of rows is required until the potential of the video signal line DL in the Nth column is restored to an appropriate range. is there.

  Therefore, among the pixels PX connected to the video signal line DL in the Nth column, a signal larger than the output of the video signal line driver XDR is written in several tens of pixels from the M + 1th row. As a result, the luminance of these pixels PX is higher than the original luminance. Therefore, these pixels PX are visually recognized as bright lines.

  For this reason, when the source and drain of the BCT are short-circuited, a bright spot having a bright tail is generated. As can be seen from the above description, the brightness of the bright line is not constant, and usually decreases from the end on the bright spot side toward the other end.

Based on the above facts, the present inventor has conceived that the following method can be taken.
That is, first, the structure shown in FIGS. 1 and 2 is fabricated by a normal method. Next, a repair process is performed.

  In the restoration process, first, a pixel that can be visually recognized as a bright spot with a tail in a bright line shape or a dark line shape is selected from the pixels PX. Note that the pixel PX corresponding to the bright spot is selected here, not the pixel PX corresponding to the bright line or the dark line. Further, the bright spots to be focused on here are only those having tails in the Y direction.

  Next, in the selected pixel PX, a first conductive path that connects the first electrode CE of the organic EL element OLED to the first power supply terminal ND1, and a second conductive path that connects the first conductive path to the video signal line DL. And disconnect both. For example, the first conductive path is disconnected at a portion connecting the BCT and the first electrode PE of the organic EL element OLED. For example, the second conductive path is disconnected at a portion where the SST and the video signal line DL are connected. In addition, the first and second conductive paths are disconnected by, for example, irradiating the semiconductor layer SC with laser light.

  When the first conductive path is disconnected in the selected pixel PX, the organic EL element OLED included in the pixel PX does not emit light during the effective display period. Therefore, the pixel PX is not visually recognized as a bright spot.

  Further, when the second conductive path is disconnected in the selected pixel PX, the potential of the video signal line DL to which the pixel PX is connected becomes the potential of the first power supply terminal ND1 or the second power supply terminal ND2 during the writing period of the pixel PX. It will not be affected. Therefore, no bright line or dark line occurs due to the influence of the pixel PX.

  This restoration leaves the following traces on the pixel PX. This will be described with reference to FIG.

FIG. 4 is a plan view schematically showing a structure after the pixel shown in FIG. 3 is repaired.
As described above, in this aspect, a pixel PX that can be viewed as a bright spot with a bright line shape or a dark-lined tail is selected, and both the first and second conductive paths are disconnected in the pixel PX. Therefore, in the completed organic EL display device, some of the pixels PX include two disconnected portions.

  For example, the first conductive path is disconnected at a portion where the BCT and the first electrode PE of the organic EL element OLED are connected, and the second conductive path is disconnected at a portion where the SST and the video signal line DL are connected. In such a case, the structure shown in FIG. 4 is obtained. When the semiconductor layer SC is crystalline such as polysilicon and is disconnected at the position of the semiconductor layer SC, a phase change from crystalline to amorphous is caused by laser light irradiation to the semiconductor layer SC. be able to. In this case, even if the semiconductor layer SC is not completely physically cut by the laser light irradiation, the electrical resistance is remarkably increased, so that the electrical cutting is not insufficient.

As described above, when the previous restoration is performed, it is possible to prevent the appearance of a bright spot with a bright line or a broken line in the image. However, even after such repair, thin white tails were sometimes observed. FIG. 5 schematically shows a state where a thin white tail appears.
The inventor further studied the cause of this white tail and found the following facts.

  Since the pixel circuit of the pixel that has become defective due to the above-described repair is disconnected from the video signal line DL, the video signal line driver XDR causes the video signal current to flow to the pixel PX during the writing period of the pixel PX. I can't. Therefore, the video signal line driver XDR sets the potential of the video signal line DL low so as to flow a predetermined video signal current. That is, the potential of the video signal line DL is set to supply a signal current brighter than the original display luminance. In order to recover the potential drop of the video signal line DL, for example, several rows of writing periods are required thereafter. A signal larger than the output of the video signal line driver XDR is written in the pixels PX for several rows thereafter. As a result, the luminance of these pixels PX is higher than the original luminance. Therefore, a thin white tail is observed.

  Based on the above facts, the present inventor has come up with a method for preventing the appearance of a thin white tail in an image by using the dummy pixel PX ′.

FIG. 6 is a diagram illustrating an equivalent circuit of a dummy pixel and a display pixel.
As described above, the dummy pixel PX ′ is provided for each column of the pixels PX.
The configuration of the dummy pixel PX ′ is a configuration in which the organic EL element OLED and the output switch BCT are excluded from the configuration of the display pixel PX. The source of DRT ′ is connected to the high potential power supply line ND1, and the drain of SST ′ is connected to the video signal line DL. Further, the gate of SST ′ and the gate of TCT ′ are both connected to the write control line SG of the scanning signal line driver YDR.

Next, operations of the dummy pixel PX ′ and the display pixel PX when the display pixel PX is normal will be described.
At the time of writing the video signal current, the scanning signal line driver YDR sets the OFF potential to the light emission control line BG to turn off the BCT, and sets the ON potential to the write control lines SG and SG ′. SST and SST ′ are connected to TCT and TCT ′. Then, the video signal line driver XDR supplies the video signal current via the video signal line DL, and writes it in the capacitors Cs and Cs ′ that can hold the gate-source voltage of DRT and DRT ′.
As described above, since the signal current is distributed almost evenly between the normal display pixel PX and the dummy pixel PX ′, the signal current is approximately twice as large as that in the conventional case when the dummy pixel PX ′ is not present. Brightness can be obtained.

  On the other hand, when the display pixel PX is repaired, the video signal current supplied from the video signal driver XDR can be supplied to the dummy pixel PX ′ as shown in FIG. For this reason, the video signal line driver XDR does not set the potential of the video signal line DL low, and it is possible to prevent thin white tailing due to potential recovery that appears due to the presence of the repair pixel.

[Second Embodiment]
In the second embodiment, the configuration of the display pixels is different from that of the first embodiment, but the other configurations are the same. Accordingly, the same parts as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

FIG. 7 is a diagram illustrating an equivalent circuit of the display pixel PX included in the display device according to the second embodiment.
In the display pixel PX of FIG. 7, instead of connecting the SST between the video signal line DL and the drain of the DRT, SSTa and SSTb are connected in series in this order. The rest of the configuration is the same as in the prior art. That is, in the second embodiment, the switch group is configured by SSTa, SSTb, and TCT instead of the signal supply control switches SST and TCT. As described above, the switch group may include three or more switches.

When the structure of FIG. 7 is adopted for the pixel PX, the repair is disconnected at the portion where the BCT and the first electrode PE of the organic EL element OLED are connected, and any of the four locations shown in FIG. This can be dealt with by cutting one of them.
For example, it can be disconnected at a portion where SSTa and the video signal line DL are connected. Further, it may be disconnected at a portion where SSTa and SSTb are connected. Further, it may be disconnected at a portion where the write control line SG is connected to the drain of SSTa or SSTb.

  Even when the pixel PX of the second embodiment is used, white tailing can be prevented by combining with the dummy pixel PX 'of the first embodiment. Since the operation of combining the dummy pixel PX ′ and the pixel PX of the second embodiment is the same as that of the first embodiment, detailed description thereof is omitted.

[Variation of this embodiment]
The present invention is not limited to the embodiments described above, and can be configured with various variations shown below.

(1) The capacitor Cs ′ provided in the dummy pixel PX ′ may not have the same capacitance (capacitance) as the capacitor Cs. Further, the capacitor Cs ′ may not be provided in the dummy pixel PX ′. This is because, when the display pixel PX is repaired, a desired object can be achieved if a state in which a video signal current can flow can be configured.
(2) The installation location of the dummy pixel PX ′ is not limited to the upper end portion of the light transmissive insulating substrate SUB, but may be at the lower end portion. In principle, it may be provided outside the light-transmissive insulating substrate SUB except for the display portion. However, in manufacturing the display device, it is preferable to provide the display device close to the display portion on the light-transmitting insulating substrate SUB. This is for suppressing an increase in the size of the display device.

(3) The number of rows of the dummy pixels PX ′ is not limited to providing only one row, but a plurality of rows can be provided, and the dummy pixel rows can be appropriately switched and used for writing.
For example, two dummy pixel rows are provided, and when writing a video signal to the odd-numbered pixel PX, one row of the dummy pixels PX ′ is selected, and when writing a video signal to the even-numbered pixel PX, the dummy pixel PX ′ is selected. Other rows may be selected. Further, instead of switching the dummy pixel row for each row, the dummy pixel row may be switched for each frame.
By switching and using in this way, it is possible to suppress the deterioration of the TFT of the dummy pixel PX ′.

(4) White tailing can be more effectively reduced by making the DRT W / L ratio of the display pixel PX different from the DRT 'W / L ratio of the dummy pixel PX ′. That is, the W / L ratio of DRT ′ of the dummy pixel PX ′ is set larger than the W / L ratio of DRT of the display pixel PX.
Then, when the display pixel PX is normal, more video signals flow to the dummy pixel PX ′. Therefore, when the display pixel PX is repaired, the current flowing through the display pixel PX also flows through the dummy pixel PX ′, but the rate of change of the current flowing through the dummy pixel PX ′ is relatively small. As a result, it is possible to further suppress a change in signal potential when writing to the dummy pixel PX ′ for the repaired pixel.

  In addition, the present invention is not limited to the above-described embodiments as they are, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. In addition, various inventions can be formed by appropriately combining a plurality of components disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, constituent elements over different embodiments may be appropriately combined.

  In the above-described embodiment, the case where all the thin film transistors constituting the pixel circuit are formed of the same conductivity type, here, the P channel type is described. However, the present invention is not limited to this, and all the thin film transistors are formed of N channel type thin film transistors. Is also possible. It is also possible to form pixel circuits in a mixture of thin film transistors of different conductivity types, such as pixel switches and switches composed of N-channel thin film transistors, and drive transistors and output switches composed of P-channel thin film transistors.

  Furthermore, the semiconductor layer of the thin film transistor is not limited to polysilicon, but may be composed of amorphous silicon. The self-light-emitting elements constituting the display pixel are not limited to organic EL elements, and various light-emitting elements capable of self-light emission are applicable.

1 is a plan view schematically showing a display device according to one embodiment of the present invention. Sectional drawing which shows schematically an example of the structure employable as a display apparatus. The top view which shows roughly an example of the structure employable as the pixel of a display apparatus. The top view which shows roughly the structure after performing a repair to a pixel. The figure which shows the state which a thin white tail appears roughly. The figure which shows the equivalent circuit of a dummy pixel and a display pixel. FIG. 11 shows an equivalent circuit of display pixels included in a display device of another embodiment. The figure which shows the cutting part for repair.

Explanation of symbols

  Cs ... capacitor, Cs' ... capacitor, DL ... video signal line, DRT ... drive transistor, DRT '... dummy drive transistor, ND1 ... first power supply terminal, ND1' ... constant potential terminal, ND2 ... second power supply terminal, OLED ... Organic EL element, PX ... pixel, PX '... dummy pixel, BG ... light emission control line, SG ... write control line, SG' ... write control line, SUB ... insulating substrate, BCT ... output switch, SST ... pixel switch, SST '... dummy pixel switch, SSTa ... pixel switch, SSTb ... pixel switch, TCT ... switch, TCT' ... dummy switch, XDR ... video signal line driver, YDR ... scanning signal line driver.

Claims (11)

In an active matrix display device in which a plurality of pixel portions each having a display element that emits light according to a supply current are arranged in a matrix on a substrate,
At least one dummy pixel portion is formed corresponding to each column formed by the plurality of pixel portions,
An active matrix display device, wherein a video signal is simultaneously sent to a dummy pixel portion corresponding to the pixel portion at the time of writing a video signal to the pixel portion. A plurality of pixel portions arranged in a matrix on the substrate, a plurality of video signal lines connected to each column of the pixel portions, and a plurality of first control signals connected to each row of the pixel portions, respectively. And a second control signal line,
Each pixel unit is connected between a low potential first voltage power supply line and a high potential second voltage power supply line and emits light in response to a supply current; the second voltage power supply line; the display element; A drive transistor for controlling the amount of current supplied to the display element in accordance with a gate control voltage, and a first control signal connected between the drain of the drive transistor and the display element. An output switch that is turned on and off by a control signal from the line, a storage capacitor connected between the gate and source of the driving transistor, and a drain formed by the transistor between the drain of the driving transistor and the video signal line A pixel switch that is connected and controlled to be turned on / off by a control signal from the second control signal line and takes in the video signal from the video signal line to the pixel unit. Has a switch, a gate of the driving transistor, with which is connected between the drain, on the control signal from the second control signal line, and a switch which is off-controlled,
In a part of the plurality of pixel portions, both the first conductive path connecting the driving transistor and the display element and the second conductive path connecting the pixel switch and the video signal line are disconnected. In an active matrix display device,
At least one dummy pixel portion is formed corresponding to each column formed by the plurality of pixel portions,
An active matrix display device, wherein a video signal is simultaneously sent to a dummy pixel portion corresponding to the pixel portion at the time of writing a video signal to the pixel portion. Each dummy pixel portion formed corresponding to each column formed by a plurality of pixel portions,
A dummy driving transistor connected to the second voltage power line and turned on and off according to a gate control voltage;
A transistor formed by a transistor is connected between the drain of the dummy drive transistor and the video signal line, and is controlled to be turned on / off by a control signal from a third control signal line, and the video signal from the video signal line is transferred to the dummy signal. A dummy pixel switch to be taken into the pixel portion;
3. The active matrix according to claim 2, further comprising a dummy switch connected between a gate and a drain of the dummy drive transistor and controlled to be turned on and off by a control signal from the third control signal line. Type display device. Each dummy pixel part
4. The active matrix display device according to claim 3, further comprising a dummy storage capacitor connected between a gate and a source of the dummy drive transistor. A plurality of rows of dummy pixel portions formed corresponding to respective columns formed by the plurality of pixel portions,
4. The active matrix display device according to claim 2, wherein a video signal is simultaneously supplied to the pixel unit and a corresponding dummy pixel unit in a row selected as appropriate at the time of writing the video signal to the pixel unit. .   4. The active matrix display device according to claim 3, wherein a W / L ratio of the dummy driving transistor is larger than a W / L ratio of the driving transistor. A plurality of pixel portions arranged in a matrix on the substrate, a plurality of video signal lines connected to each column of the pixel portions, and a plurality of first control signals connected to each row of the pixel portions, respectively. And a second control signal line,
Each pixel unit is connected between a low potential first voltage power supply line and a high potential second voltage power supply line and emits light in response to a supply current; the second voltage power supply line; the display element; A drive transistor for controlling the amount of current supplied to the display element in accordance with a gate control voltage, and a first control signal connected between the drain of the drive transistor and the display element. An output switch that is turned on and off by a control signal from the line, a storage capacitor connected between the gate and source of the driving transistor, and a drain formed by the transistor between the drain of the driving transistor and the video signal line A plurality of images that are connected and controlled to be turned on / off by a control signal from the second control signal line, and that captures a video signal from the video signal line into the pixel unit. Includes a switch, a gate of the driving transistor, turned on by the control signal from the second control signal line with and is connected between the drain and a switch which is off-controlled,
A part of the plurality of pixel portions where a first conductive path connecting the driving transistor and the display element is disconnected, and a portion connecting the pixel switch and the video signal line is connected to each other. In the active matrix display device in which at least one of the connected portion, one of the pixel switches and the portion connecting the second control signal line is disconnected,
At least one dummy pixel portion is formed corresponding to each column formed by the plurality of pixel portions,
An active matrix display device, wherein a video signal is simultaneously sent to a dummy pixel portion corresponding to the pixel portion at the time of writing a video signal to the pixel portion. Each dummy pixel portion formed corresponding to each column formed by a plurality of pixel portions,
A dummy driving transistor connected to the second voltage power line and turned on and off according to a gate control voltage;
A transistor formed by a transistor is connected between the drain of the dummy drive transistor and the video signal line, and is controlled to be turned on / off by a control signal from a third control signal line, and the video signal from the video signal line is transferred to the dummy signal. A dummy pixel switch to be taken into the pixel portion;
8. The active matrix according to claim 7, further comprising a dummy switch connected between a gate and a drain of the dummy drive transistor and controlled to be turned on and off by a control signal from the third control signal line. Type display device. Each dummy pixel part
9. The active matrix display device according to claim 8, further comprising a dummy storage capacitor connected between a gate and a source of the dummy drive transistor. A plurality of rows of dummy pixel portions formed corresponding to respective columns formed by the plurality of pixel portions,
9. The active matrix display device according to claim 7, wherein a video signal is simultaneously supplied to the pixel unit and a corresponding dummy pixel unit in a row selected as appropriate at the time of writing the video signal to the pixel unit. .   9. The active matrix display device according to claim 8, wherein a W / L ratio of the dummy driving transistor is larger than a W / L ratio of the driving transistor.

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