JP2007081332A - Nitride-based semiconductor light-emitting element and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a nitride-based semiconductor light-emitting element which is reduced in the influence of warpage caused by film-forming stress in manufacturing and can ensure light extracting efficiency from a side surface, and to provide a manufacturing method thereof. <P>SOLUTION: This light-emitting element is characterized in that at least an n-type semiconductor layer 1, a light-emitting layer 2 and a p-type semiconductor layer 3 are laminated to form a light-emitting element 5, and a light-transmissive insulated inorganic particle portion 6 is formed around the light-emitting element 5 of the layers 1, 2 and 3. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a nitride-based semiconductor light-emitting device and a manufacturing method thereof, and more particularly to a structure capable of improving light extraction efficiency and a manufacturing method thereof in a nitride-based semiconductor light-emitting device of a type having an upper and lower electrode structure including a substrate peeling process. .

In recent years, GaN-based compound semiconductor materials have attracted attention as semiconductor materials for short wavelength light emitting devices. GaN-based compound semiconductors include sapphire single crystals, various oxide substrates and III-V group compounds as substrates, and metalorganic vapor phase chemical reaction method (MOCVD method) or molecular beam epitaxy method (MBE method). ) Etc.
A sapphire single crystal substrate has a lattice constant of 10% or more different from that of GaN. However, by forming a buffer layer such as AlN or AlGaN, a good nitride semiconductor can be formed thereon, and it is generally widely used. Yes. When a sapphire single crystal substrate is used, an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are stacked in this order. Since the sapphire substrate is an insulator, the element structure generally includes a positive electrode formed on the p-type semiconductor layer and a negative electrode formed on the n-type semiconductor layer. This type of light-emitting element uses a face-up method that uses a transparent electrode such as ITO as the positive electrode to extract light from the p-type semiconductor side, and a flip that uses a highly reflective film such as Ag as the positive electrode to extract light from the sapphire substrate side Two types of chip systems are known.

  As described above, the sapphire single crystal substrate is generally widely used as a substrate for a light emitting element, but has several problems because it is an insulator. First, since the n-type semiconductor layer is exposed by partially removing the light emitting layer by etching or the like to form the negative electrode, the area of the light emitting layer is reduced only in the negative electrode portion, and the output is reduced accordingly. To do. Secondly, since the positive electrode and the negative electrode are on the same plane, the current flow becomes horizontal, creating a region with a high current density locally, and the element generates heat. Third, since the thermal conductivity of the sapphire substrate is low, the generated heat does not diffuse and the temperature of the light emitting element rises.

In order to solve the above problems, a conductive substrate is bonded to an element in which an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are stacked in this order on a sapphire single crystal substrate, and then the sapphire single crystal substrate is removed. And the method of arrange | positioning a positive electrode and a negative electrode up and down is disclosed. (See Patent Document 1)
Furthermore, a method for producing a substrate by plating instead of bonding a conductive substrate is disclosed. (See Patent Document 2)
Japanese Patent No. 3511970 JP 2004-47704 A

Examples of the conventional method of bonding the conductive substrate include a method of bonding a low melting point metal compound such as AuSn as an adhesive, an activated bonding in which a bonding surface is activated by argon plasma in a vacuum, and the like. The method is known.
With this method, the adhesion surface is required to be extremely smooth, and if there is a foreign substance such as a particle, the part floats and it is difficult to form a uniform adhesion surface, such as poor adhesion. is there.
A GaN film laminated on a substrate such as sapphire has a very high film stress because it is a thick film of 1 to 10 μm and the temperature at the time of lamination is as high as about 1000 ° C. For example, when a GaN film is laminated to a thickness of 5 μm on a sapphire substrate having a thickness of 0.4 mm, a warp of about 50 to 100 μm is generated on the substrate.

When creating a support substrate by a plating method, the mechanical strength of the plating support substrate is weaker than sapphire, and the film thickness (plate thickness) of the plating support substrate is limited to 10 μm to 200 μm from the viewpoint of production efficiency. Since warp resulting from the previous film stress is generated on the plating support substrate, there is a problem that the influence of the warp after the support substrate is peeled off is further increased.
In order to reduce the influence of the warpage of the substrate due to the GaN film, it is effective to previously divide the GaN film stacked on the substrate. For example, when a plurality of light emitting elements are formed on the GaN film after forming the GaN film on the substrate, if the GaN film is divided into a plurality of parts for each light emitting element, the stress is generated at the divided part of the GaN film. Relaxation occurs and the warpage of the entire substrate can be reduced.
On the other hand, when the plating support substrate is formed after dividing the GaN film, it is effective for reducing the warp of the entire support substrate, but the following two problems occur.
(1) Since the n-type semiconductor layer is exposed, if the plating is performed as it is, the n-type semiconductor layer and the p-type semiconductor layer are short-circuited by the plating layer.
(2) If the plating process is simply performed to form the plating support substrate, plating for forming the plating support substrate enters the side surfaces of the exposed p-type semiconductor layer, light emitting layer, and n-type semiconductor layer. In addition, since the plating layer shields these side surfaces and light cannot be extracted from the side surfaces, there is a problem that the light intensity obtained from the light emitting element is lowered.

  The problem (1) can be solved by forming a protective film on the side surfaces of the p-type semiconductor layer, the light emitting layer, and the n-type semiconductor layer, but the problem (2) There is a problem that it is difficult to solve easily because the depth of the side surface of the combined portion of the p-type semiconductor layer, the light-emitting layer, and the n-type semiconductor layer is 1 to 10 μm.

As a result of diligent efforts to solve the above problems, the present inventors have formed a light-emitting element portion by laminating at least an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer. The light-transmitting insulating inorganic fine particle layer is provided around the light-emitting element portion of the p-type semiconductor layer, so that there is little influence of warp caused by film-forming stress during manufacturing, and light extraction from the side surface It has been found that efficiency can also be secured.
Furthermore, the present inventors have made a light-transmitting insulation between the light-emitting element portions in the case of a light-emitting element structure obtained by forming a device portion on a substrate to form an element portion and then performing element portion separation and substrate separation. By filling the porous inorganic fine particle part and then creating a plating support substrate as necessary, it is possible to reduce the warpage after peeling off the substrate from the sapphire substrate, etc., and achieve both light extraction efficiency from the side I found out that That is, the present invention relates to the following.

(1) In the nitride semiconductor light emitting device of the present invention, at least an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are laminated to form a light-emitting device portion, and the n-type semiconductor layer, the light-emitting layer, and the p-type semiconductor layer are formed. A light-transmitting insulating inorganic fine particle part is provided around a light emitting element part provided with
(2) The nitride semiconductor light emitting device of the present invention is characterized in that a metal film layer and a plated metal plate are laminated on the light emitting device portion.
(3) The nitride semiconductor light-emitting device of the present invention includes a plurality of light-emitting device portions in which at least an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked on a substrate. Is obtained by dividing an element from the substrate, and the light emitting element portion formed on the substrate is filled with insulating inorganic fine particles, and the light emitting element portion is separated from the substrate after the light emitting element portion is separated from the substrate. It is characterized by comprising light-transmitting insulating inorganic fine particle portions remaining around.
(4) The nitride semiconductor light emitting device of the present invention is characterized in that the insulating inorganic fine particles are at least one of silica sol and titania sol.

(5) The nitride semiconductor light emitting device of the present invention is characterized in that the insulating inorganic fine particles have a particle size of 5 nm to 30 μm.
(6) The nitride semiconductor light emitting device of the present invention is characterized in that the metal film layer includes an ohmic contact layer.
(7) The nitride semiconductor light emitting device of the present invention is characterized in that the ohmic contact layer is composed of a single metal of Pt, Ru, Os, Rh, Ir, Pd, or Ag and an alloy thereof.
(8) The nitride semiconductor light emitting device of the present invention is characterized in that the metal film layer includes a reflective layer.
(9) The nitride semiconductor light emitting device of the present invention is characterized in that the reflective layer is made of an Ag alloy or an Al alloy.
(10) The nitride semiconductor light emitting device of the present invention is characterized in that the metal film layer includes an adhesion layer.

(11) The nitride semiconductor light emitting device of the present invention is characterized in that the adhesion layer is composed of a single metal of Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, W and / or an alloy thereof. And
(12) In the nitride semiconductor light emitting device of the present invention, the plated metal plate has a thickness of 10 μm to 200 μm.
(13) The nitride semiconductor light emitting device of the present invention is characterized in that the plated metal plate is formed of NiP alloy, Cu, or Cu alloy.
(14) The nitride semiconductor light emitting device of the present invention is characterized in that a plating adhesion layer is formed between the metal film and the plated metal plate in contact with the plated metal plate.
(15) The nitride semiconductor light emitting device of the present invention is characterized in that the plating adhesion layer has 50 wt% or more of the same composition as the main component occupying 50 wt% or more of the plated metal plate.
(16) The nitride semiconductor light emitting device of the present invention is characterized in that a negative electrode connected to the n-type semiconductor layer is formed and a positive electrode connected to the plated substrate is formed.

(17) In the method for manufacturing a nitride semiconductor light emitting device according to the present invention, at least an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are stacked to form a light-emitting device portion, and the n-type semiconductor layer, light-emitting layer, p When manufacturing a nitride-based semiconductor light-emitting device in which a light-transmitting insulating inorganic fine particle portion is provided around the light-emitting device portion of the type semiconductor layer, at least a buffer layer, an n-type semiconductor layer, a light-emitting layer, A p-type semiconductor layer is stacked, and the stacked body is divided into elements on a substrate to form a light emitting element portion. After these elements are divided, light-transmitting insulating inorganic fine particles are filled between the light emitting element portions. Thereafter, a metal thin film and a plated metal plate are laminated on the light emitting element portion divided as described above and the insulating inorganic fine particles filled as described above, and then the substrate and the buffer layer are removed to remove the n-type semiconductor. Layer surface exposed Characterized by dividing the plating plate and the metal thin film by the light emitting element section units.
(18) The method for producing a nitride semiconductor light emitting device of the present invention is characterized in that the substrate is removed by a laser.
(19) The method for producing a nitride semiconductor light emitting device of the present invention is characterized in that heat treatment is performed at 100 ° C. to 300 ° C. after forming the plated metal plate.
(20) In the method for manufacturing a nitride semiconductor light emitting device of the present invention, after exposing the surface of the n-type semiconductor layer, a negative electrode connected to the n-type semiconductor layer is formed and a positive electrode connected to the plating substrate is formed. An electrode is formed.

As described above, according to the present invention, at least an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked to form a light-emitting element portion, and light emission of the n-type semiconductor layer, the light-emitting layer, and the p-type semiconductor layer. By adopting a structure in which a light-transmitting insulating inorganic fine particle part is provided around the element part, a short circuit on the side surface side of the light-emitting element part composed of the n-type semiconductor layer, the light-emitting layer, and the p-type semiconductor layer. Since the insulating inorganic fine particle part allows the light output from the side surface side of the light emitting element part to pass through while preventing the light emission, the light extraction efficiency from the side surface side can be improved.
According to the present invention, the light-transmitting insulating inorganic fine particles are filled between the light emitting element portions formed on the substrate, and then, after the peeling from the substrate such as the sapphire substrate by creating the plating support substrate. There is little warping and it is possible to achieve both light extraction efficiency from the side. Thereby, it is possible to provide a nitride-based semiconductor light-emitting device with high reliability and high output.
In the present invention, the light transmittance as the insulating inorganic fine particles or the insulating inorganic fine particle part means having light transmittance in a wavelength range of 350 nm to 550 nm. In order to improve the light extraction property of the nitride semiconductor light emitting device, it is preferable that the light transmittance of the insulating inorganic fine particles or the insulating inorganic fine particle portion is 80% or more.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention is not limited to the following embodiments, and for example, the constituent elements of these embodiments may be appropriately combined.
FIG. 1 shows a schematic cross-sectional view of an example of a nitride semiconductor light-emitting device according to this embodiment. The nitride semiconductor light-emitting device A of this example includes an n-type semiconductor layer 1, a light-emitting layer 2, and a p-type semiconductor layer. 3, the entire side surface of the light emitting element portion 5 is covered with a light-transmitting insulating inorganic fine particle portion 6, and the ohmic contact layer 7 and the reflective layer 8 are formed on the p-type semiconductor layer 3. And an adhesion layer 9 and a plating adhesion layer so as to sequentially cover the upper surface, the upper surface of the p-type semiconductor layer 3 located around the upper surface, and the upper surface of the insulating inorganic fine particle portion 6. 10 and the plated substrate 11 are laminated.
The planar shape of the light emitting element portion 5 may be a quadrangular shape, a round shape, or other shapes, but the inorganic fine particle portion 6 preferably covers the entire side surface. However, in the present invention, it is not necessary that the inorganic fine particle portion 6 completely covers the entire side surface of the light emitting element portion 5.
In addition, the nitride semiconductor light emitting device A shown in FIG. 1 has a vertical electrode structure in which the negative electrode 12 is formed on the lower surface side of the n-type semiconductor layer 1 and the positive electrode 13 is formed on the upper surface side of the plating substrate 11. .

  In order to manufacture the nitride semiconductor light emitting device A having the structure shown in FIG. 1, for example, as shown in FIG. 2, a plurality of nitride semiconductor light emitting devices A that can be a plurality of nitride semiconductor light emitting devices A are aligned and formed. It can be manufactured by separating elements from the substrate 21 individually. In FIG. 2, only two nitride-based semiconductor light-emitting elements among a plurality of nitride-based semiconductor light-emitting elements manufactured at the same time are shown for easy viewing of the drawing. A large number of nitride-based semiconductor light-emitting elements may be formed.

For example, the buffer layer 22 is formed on the substrate 21 as shown in FIG.
The substrate 21 used here is a sapphire single crystal (Al ₂ O ₃ ; A plane, C plane, M plane, R plane), spinel single crystal (AgAl ₂ O ₄ ), ZnO single crystal, LiAlO ₂ single crystal, LiGaO _2. Known substrate materials such as single crystals, oxide single crystals such as MgO single crystals, Si single crystals, SiC single crystals, and GaAs single crystals can be used without any limitation.
If a conductive substrate such as SiC is used, the nitride semiconductor light emitting device A in which the positive electrode and the negative electrode are arranged vertically can be formed without peeling the substrate. In that case, the buffer layer that is an insulator is used. As a result, the crystals of the nitride-based semiconductor layers (n-type semiconductor layer 1, light-emitting layer 2, and p-type semiconductor layer 3) grown thereon deteriorate and a good light-emitting element is formed. I can't. In the present invention, it is preferable to perform substrate peeling even when conductive SiC or Si is used.
The buffer layer 22, for example, has a lattice constant of 10% or more different from that of the sapphire single crystal substrate 21, so that AlN, AlGaN, etc. having an intermediate lattice constant improve the crystallinity of GaN. In the present invention, AlN and AlGaN can be applied without any limitation.

Next, an n-type semiconductor layer 23, a light-emitting layer 24, and a p-type semiconductor layer 25 are sequentially stacked on the previous buffer layer 22 as a base layer for the nitride-based semiconductor (light-emitting element portion 5).
In the present embodiment, the nitride-based semiconductor (light-emitting element portion 5) has a heterojunction structure including the n-type semiconductor layer 1, the light-emitting layer 2, and the p-type semiconductor layer 3 described above. As a nitride-based semiconductor layer, many semiconductors represented by the general formula Al _x In _y Ga _1-xy N (0 ≦ x <1, 0 ≦ y <1, x + y <1) are known. Also in the invention, a nitride-based semiconductor represented by the general formula Al _x In _y Ga _1-xy N (0 ≦ x <1, 0 ≦ y <1, x + y <1) is used without any limitation.

There is no particular limitation on the growth method of each layer on which these nitride-based semiconductors are based. Organometallic chemical vapor deposition (MOCVD), hydride vapor deposition (HPVE), molecular beam epitaxy (MBE), etc. III All methods known to grow group nitride semiconductors can be applied. A preferred growth method is the MOCVD method from the viewpoint of film thickness controllability and mass productivity.
In the MOCVD method, hydrogen (H ₂ ) or nitrogen (N ₂ ) is used as a carrier gas, trimethyl gallium (TMG) or triethyl gallium (TEG) is used as a Ga source as a group III source, and trimethyl aluminum (TMA) or triethyl aluminum is used as an Al source. (TEA), trimethylindium (TMI) or triethylindium (TEI) as the In source, and ammonia (NH ₃ ), hydrazine (N ₂ H ₄ ), etc. as the N source as the group V source. As dopants, monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ) is used as a Si raw material for n-type, germane (GeH ₄ ) is used as a Ge raw material, and biscyclohexane is used as an Mg raw material for p-type. Pentadienyl magnesium (Cp ₂ Mg) or bisethylcyclopentadienyl magnesium ((EtCp) ₂ Mg) is used.

If the n-type semiconductor layer 23, the light emitting layer 24, and the p-type semiconductor layer 25 are sequentially stacked, an isolation groove 26 is formed by dry etching means or the like along a boundary to be element-separated thereafter. The elements are separated into individual light emitting element portions 27 in which the n-type semiconductor layer 1, the light emitting layer 2, and the p type semiconductor layer 3 are stacked.
As a method for dividing the nitride-based semiconductor (light-emitting element portion 5) on the sapphire substrate 21, a known technique such as an etching method or a laser cutting method can be used without any limitation. In the case of using the laser lift-off method, the nitride-based semiconductor is divided, but it is preferable to prevent damage to the sapphire substrate in order to achieve good substrate peeling. Therefore, when dividing | segmenting by an etching method, it is preferable to use the method with a quick etching rate with respect to a nitride-type semiconductor, and a slow etching rate with respect to a sapphire substrate. When dividing by a laser, it is preferable to use a laser having a wavelength of 300 to 400 nm because of the difference in absorption wavelength between GaN and sapphire.

  When the light emitting element portion 5 is divided on the substrate 21, the width of the dividing grooves 26 formed on the side surfaces is set to about 1 to 30 μm and the depth is set to about 1 to 10 μm. As a means for filling the dividing groove 26, a film forming method such as CVD, sputtering, or vapor deposition has a low film forming rate and is difficult to use as a practical mass production means. In order to form such a thick film, the method of filling the insulating inorganic fine particles 28 as described above is suitable.

Next, the exposed separation grooves 27 are filled with insulating inorganic fine particles 28 such as silica sol or titania sol to form insulating inorganic fine particle portions 29.
As the insulating inorganic fine particles 28, known materials can be used without any limitation as long as they are insulating inorganic fine particles having translucency such as silica sol and titania sol.
The particle diameter of the insulating inorganic fine particles 28 is preferably 5 nm to 30 μm. When the particle diameter of the insulating inorganic fine particle portion 28 is less than 5 nm, aggregation of the insulating inorganic fine particle 28 proceeds and stable fine particles cannot be obtained. When the particle diameter of the insulating inorganic fine particles 28 exceeds 30 μm, the groove width on the side surface of the element is exceeded, so that it cannot be filled. In view of appropriate filling of the grooves, the range of 10 nm to 2 μm is more preferable.

  The translucency of the insulating inorganic fine particle portion 28 is preferably 80% or higher in transmittance in the wavelength range of 350 nm to 550 nm. However, this transmittance is a preferable range for making the light emitting performance as a nitride semiconductor light emitting element desirable, and the light transmittance is not limited to this range.

After filling the separation grooves 26 with the insulating inorganic fine particles 28, baking at 100 ° C. to 500 ° C. is preferable for improving adhesion and removing moisture and organic components contained in the coating solution.
As a method for filling the insulating grooves 28 with the insulating inorganic fine particles 28, the insulating inorganic fine particles are dispersed in an aqueous solution, and the aqueous solution is applied by a known method such as a spin coating method, a spray method, or a dip coating method. It is preferable. Furthermore, it is preferable to use a spin coat method from the viewpoint of productivity.

Next, an ohmic contact layer 7 is formed on the p-type semiconductor 3. A reflective layer 8 is provided on the ohmic contact layer 7 in order to improve the light reflectivity, but the reflective layer 8 may be omitted.
As the performance required for the ohmic contact layer 7, it is essential that the contact resistance with the p-type semiconductor layer 3 is small. The material of the ohmic contact layer 7 is preferably a platinum group such as Pt, Ru, Os, Rh, Ir, Pd or Ag from the viewpoint of contact resistance with the p-type semiconductor layer 3. More preferred are Pt, Ir, Rh and Ru. Pt is particularly preferred. Using Ag is preferable for obtaining good reflection, but the contact resistance is lower than Pt. Therefore, Ag can be used for applications that do not require much contact resistance.
The thickness of the ohmic contact layer 7 is preferably 0.1 nm or more in order to stably obtain a low contact resistance. More preferably, it is 1 nm or more, and uniform contact resistance is obtained by satisfying this thickness range.

A reflective layer 8 such as an Ag alloy is preferably formed on the ohmic contact layer 7. Pt, Ir, Rh, Ru, OS, Pd, and the like have a lower reflectance from visible light to ultraviolet region than Ag alloys. Therefore, it is difficult to obtain an element with high output because the light from the light emitting layer is not sufficiently reflected. In this case, it is preferable that the ohmic contact layer 7 is formed to be thin enough to allow light to pass therethrough, and a reflective layer such as an Ag alloy is formed to obtain reflected light. Can be created. In this case, the thickness of the ohmic contact layer 7 is preferably 30 nm or less. Furthermore, the thickness of the ohmic contact layer 7 is preferably 10 nm or less.
A method for forming the ohmic contact layer 7 and the reflective layer 8 is not particularly limited, and a known sputtering method or vapor deposition method can be used.

Next, a plating process is performed. However, before the plating process is performed, the adhesion layer 9 and the plating adhesion layer 10 are provided in order to improve the adhesion between the insulating inorganic fine particle portion 29 and the p-type semiconductor layer 3, and after these are formed, the plating process is performed. A plated substrate 31 is formed. These adhesion layer 9 and plating adhesion layer 10 are preferably formed, but the formation thereof may be omitted.
For the adhesion layer 9 formed here, a metal having good adhesion with GaN can be used. As a material of the adhesion layer 9, a single metal of Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, and W and / or an alloy combining them can be used.
Further, the plating adhesion layer 10 may be formed in order to improve the adhesion with the plating substrate 31. The material of the plating adhesion layer 10 varies depending on the plating to be used, but the adhesion is improved when the material mainly contained in the plating component is included. For example, when NiP plating is used, it is preferable to use a Ni-based alloy for the plating adhesion layer 10. More preferably, NiP is used.
When using Cu plating, it is preferable to use a Cu-based alloy for the plating adhesion layer 10. More preferably, Cu is used.
The thickness of the adhesion layer 9 and the plating adhesion layer 10 is preferably 0.1 nm or more in order to obtain good adhesion. More preferably, it is 1 nm or more, and uniform adhesion is obtained. The upper limit of the thickness is not particularly limited, but is preferably 2 μm or less from the viewpoint of productivity.

  The method for forming the adhesion layer 9 and the plating adhesion layer 10 is not particularly limited, and a known sputtering method or vapor deposition method can be used. In the sputtering method, since the sputtered particles collide with the substrate surface with high energy to form the film, a film having high adhesion can be obtained. Therefore, it is more preferable to use the sputtering method.

Next, when the plating adhesion layer 10 is formed, the plating substrate 31 is formed by plating.
Before carrying out the plating treatment, it is preferable to degrease and wash using a general-purpose neutral detergent or the like. Further, it is preferable to remove the natural oxide film on the plating adhesion layer by chemically etching the surface of the plating adhesion layer using an acid such as nitric acid.
Either electroless plating or electrolytic plating can be used for the plating treatment. In the case of electroless plating, it is preferable to use NiP alloy plating as the material. In the case of electrolytic plating, it is preferable to use Cu or a Cu alloy as a material.
The thickness of the plated substrate 31 is preferably 10 μm or more in order to maintain the strength as a substrate. When the thickness is increased, peeling of the plating is likely to occur and the productivity is also lowered. Therefore, the thickness is preferably 200 μm or less.

In a plating process such as NiP alloy plating, an electroless plating process using a nickel bath such as nickel sulfate or nickel chloride and a phosphorus source such as hypophosphite as a plating bath is employed. be able to. A commercially available product suitable as a plating bath used in the electroless plating method includes Nimden HDX manufactured by Uemura Kogyo. The pH of the plating bath when performing the electroless plating treatment is preferably 4 to 10, and the temperature is preferably 30 to 95 ° C.
As a plating method for Cu or Cu alloy, an electrolytic plating method using a Cu source such as copper sulfate can be employed as a plating bath.
The pH of the plating bath when performing electroplating is preferably 2 or less under strong acid conditions. The temperature is preferably 10 to 50 ° C, and more preferably at room temperature (25 ° C). Current density is preferably carried out in 0.5~10A / dm ^2. More preferably, the current density is ² to 4 A / dm2. It is more preferable to add a leveling agent in order to smooth the surface of the plated substrate to be produced. As a commercial item used for the leveling agent, for example, ETN-1-A or ETN-1-B manufactured by Uemura Kogyo Co., Ltd. can be used as appropriate.

  In order to improve the adhesion of the plated substrate 31 thus obtained, it is preferable to perform a heat treatment. The heat treatment temperature is preferably 100 to 300 ° C. for improving adhesion. If the temperature is increased further, the adhesion may be further improved, but there is a risk that the ohmic contact property is lowered.

After the above-described plating substrate 31 is formed, the substrate 21 is peeled off, and the buffer layer 22 is further removed. Thereafter, the positive electrode 13 and the negative electrode 12 are formed, and finally the plated substrate 31 is divided into elements, whereby the nitride semiconductor light emitting element A having the cross-sectional structure shown in FIG. 1 can be manufactured.
When the substrate 21 is peeled after the plated substrate 31 is formed, a known technique such as a polishing method, an etching method, or a laser lift-off method can be used as the substrate peeling method without any limitation.

After the substrate 21 is peeled off, the buffer layer 22 is removed by a polishing method, an etching method or the like to expose the n-type semiconductor layer. Here, the negative electrode 12 is formed on the n-type semiconductor layer 3. As the negative electrode, negative electrodes having various compositions and structures are known, and these known negative electrodes can be used without any limitation.
Various structures using materials such as Au, Al, Ni, and Cu are known for the positive electrode, and these known materials can be used without any limitation.
For the separation of the plated substrate 31, the same method as in the case of the previous element separation or separation of the substrate 21 can be applied. Here, when the plating substrate 31 is divided and the nitride semiconductor light emitting element A is separated from the plating substrate 31 in element units, the portion filled with the insulating inorganic fine particles 28 is cut or etched as compared with the other laminated film portions. Since the separation by laser cutting is easy, the plating substrate 31 can be easily divided.

  By performing the steps described above, the nitride-based semiconductor light-emitting device A having the cross-sectional structure shown in FIG. 1 can be manufactured. In this nitride-based semiconductor light-emitting device A, Since the inorganic fine particle part 6 having a high light transmittance is provided in the periphery, it can be used as the output light without blocking the light emitted toward the periphery of the light emitting element part 5, so that the nitride-based semiconductor light emitting device having a high light output can be used. Element A can be obtained. In particular, if the inorganic fine particle part 6 has a light transmittance of 80% or more in the wavelength range of 350 nm to 550 nm, the light in the blue light emitting region on the short wavelength side and the surrounding wavelength region in the wavelength range that can be recognized as visible light. Light can be emitted without attenuation.

Hereinafter, an example is shown and the operation effect of the present invention is clarified. However, the present invention is not limited to the following examples.
Example 1
FIG. 1 is a schematic view showing a cross section of a nitride-based semiconductor prepared in this example. The nitride semiconductor light emitting device having the cross-sectional structure shown in this figure was manufactured in the following examples.
On a substrate made of sapphire, a 5 μm thick Si-doped n-type GaN contact layer, a 30 nm thick n-type In0.1Ga0.9N cladding layer, and a thickness through a buffer layer (thickness 10 nm) made of AlN A 30 nm thick Si-doped GaN barrier layer and a 2.5 nm thick In0.2Ga0.8N well layer are stacked five times, and finally a multiwell light emitting layer provided with a barrier layer, and a 50 nm thick Mg doped layer A clad layer of p-type Al 0.07 Ga 0.93 N and an Mg-doped p-type GaN contact layer having a thickness of 150 nm were laminated in this order to form a nitride semiconductor multilayer film.

Next, a nitride-based semiconductor laminated film was dug up to the buffer layer by dry etching, and the elements were divided into light emitting element portions as partially shown in FIG. (Note that FIG. 2 shows a state after trench filling after element splitting and lamination of other films, so in FIG. 2, n-type semiconductor layer (in this example, n-type GaN contact layer) 1, light emitting layer 2. The grooves formed on both sides of the p-type semiconductor layer 3 (p-type GaN contact layer in this example) correspond to the element dividing grooves.
Next, the groove between the divided elements was filled with silica sol. For silica sol, silica sol MP-2040 (SiO ₂ 40%, average particle size 200 nm, aqueous solution) manufactured by Nissan Chemical Co., Ltd. was used. After the application, it was baked at 300 ° C. for 30 minutes.
A 1.5-nm-thick Pt layer was formed as an ohmic contact layer on the nitride semiconductor p-type contact layer by sputtering as shown in FIG. On top of that, Ag was formed as a reflective layer by sputtering so as to have a thickness of 20 nm. A known photolithography technique and lift-off technique were used for the pattern of silica sol, Pt, and Ag.

Thereafter, Cr is deposited as the adhesion layer by a sputtering method so as to have a thickness of 20 nm, and a NiP alloy (Ni: 80 at%, P: 20 at%) is deposited thereon as the plating adhesion layer so as to have a thickness of 30 nm. A film was formed by sputtering.
Next, the surface of this NiP alloy film was immersed in a nitric acid aqueous solution (5N) and treated at a temperature of 25 ° C. for 30 seconds to remove the oxide film.
Next, using a plating bath (Nimden HDX-7G, manufactured by Uemura Kogyo Co., Ltd.), an electroless plating made of a NiP alloy having a thickness of 50 μm was formed on the NiP alloy film to obtain a plated metal substrate. The treatment conditions at this time were pH 4.6, temperature 90 ° C., and time 3 hours.
Next, the plated metal substrate was washed with water and dried, and then treated for 1 hour at 250 ° C. using a clean oven.
Next, the sapphire substrate and the buffer layer were peeled off by a laser lift-off method to expose the n-type semiconductor layer.

ITO (SnO ₂ : 10 wt%) was deposited on the surface of the n-type semiconductor layer by vapor deposition to a thickness of 400 nm. Next, a negative electrode made of Cr (40 nm), Ti (100 nm), and Au (1000 nm) was formed on the center of the ITO surface by vapor deposition. A known photolithography technique and lift-off technique were used for the negative electrode pattern.
A positive electrode made of Au (1000 nm) was formed on the p-type semiconductor surface by vapor deposition.

Next, each laminate on the plated metal substrate thus obtained was divided by dicing to obtain a 350 μm square nitride semiconductor device.
About the obtained nitride semiconductor light emitting element, it mounted in the TO-18 can package, and the light emission output in the applied current 20mA was measured with the tester.
As a result, the light emission output was 18 mW.

(Example 2)
The same treatment as in Example 1 was performed except that Cu was deposited as a plating adhesion layer by 30 nm instead of the NiP alloy film by sputtering, and Cu was deposited by electrolytic plating as a plating layer by 50 μm instead of the NiP alloy film. gave.
As Cu plating conditions, CuSO4: 80 g / L, sulfuric acid: 200 g / L, leveling agent (UTN-made ETN-1-A: 1.0 mL / L, ETN-1-B: 1-mL / L) The plating was carried out at room temperature at a current density of 2.5 A / dm2. The plating time was 3 hours, and a 50 μm Cu film was formed. Moreover, copper-containing copper phosphate was used for the anode.
About the obtained element, it mounted in the TO-18 can package, and the light emission output in 20 mA of applied currents was measured with the tester. The light emission output was 18 mW.

(Comparative Example 1)
In the manufacturing process of Example 1 described above, the side surfaces of the n-type semiconductor layer, the light-emitting layer, and the p-type semiconductor layer are formed using a SiO ₂ film so as to have a thickness of 100 nm without using silica sol for filling the grooves. Protected. The SiO ₂ film forming method using the CVD. Otherwise, the same treatment as in Example 1 was performed.
About the obtained nitride semiconductor light emitting element, it mounted in the TO-18 can package, and the light emission output in the applied current 20mA was measured with the tester.
As a result, the light emission output was 12 mW.
The nitride semiconductor light emitting device of Comparative Example 1 cannot extract light from the side surface side because the plating has entered the side surfaces of the n-type semiconductor layer, the light emitting layer, and the p-type semiconductor layer. For this reason, the output is as low as 12 mW.
On the other hand, the nitride semiconductor light-emitting device of Example 1 uses a light-transmitting silica sol insulator on the side surfaces of the n-type semiconductor layer, the light-emitting layer, and the p-type semiconductor layer. The output was 18 mW, and a high output was obtained.
Similarly, a high output of 18 mW was obtained for Example 2 in which Cu was used for the plated metal substrate.

  The nitride-based semiconductor device provided by the present invention has excellent characteristics and stability and is useful as a material for light-emitting diodes and lamps.

FIG. 1 is a cross-sectional view showing an embodiment of a nitride semiconductor light emitting device according to the present invention. FIG. 2 is a cross-sectional view showing a state in which a plurality of elements are formed on a substrate in the course of manufacturing the nitride semiconductor light emitting element of the embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS A Nitride semiconductor light emitting element 1 N type semiconductor layer 2 Light emitting layer 3 P type semiconductor layer 4 Metal film layer 5 Light emitting element part 6 Insulating inorganic fine particle part 7 Ohmic contact layer 8 Reflective layer 9 Adhesion layer 10 Plating adhesion layer 11 Plating substrate 12 Negative electrode 13 Positive electrode

Claims (20)

  At least an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked to form a light-emitting element portion. A light-transmitting element is provided around the light-emitting element portion including the n-type semiconductor layer, the light-emitting layer, and the p-type semiconductor layer. A nitride-based semiconductor light-emitting device comprising an insulating inorganic fine particle portion.   The nitride-based semiconductor light-emitting element according to claim 1, wherein a metal film layer and a plated metal plate are laminated on the light-emitting element part.   A plurality of light-emitting element portions each including at least an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked on a substrate, and each light-emitting element portion is obtained by dividing the element from the substrate. Insulating inorganic fine particles are filled between the light-emitting element portions formed on the substrate, and the light-transmitting insulating inorganic material remaining around the light-emitting element portion after the light-emitting element portion is separated from the substrate. A nitride semiconductor light emitting device comprising a fine particle portion.   The nitride-based semiconductor light-emitting element according to claim 1, wherein the insulating inorganic fine particles are at least one of silica sol and titania sol.   The nitride-based semiconductor light-emitting element according to claim 1, wherein the insulating inorganic fine particles have a particle size of 5 nm to 30 μm.   The nitride-based semiconductor light-emitting element according to claim 2, wherein the metal film layer includes an ohmic contact layer.   The nitride-based semiconductor light-emitting device according to claim 6, wherein the ohmic contact layer is made of a single metal of Pt, Ru, Os, Rh, Ir, Pd, or Ag and an alloy thereof.   The nitride-based semiconductor light-emitting element according to claim 2, wherein the metal film layer includes a reflective layer.   The nitride-based semiconductor light-emitting element according to claim 8, wherein the reflective layer is made of an Ag alloy or an Al alloy.   The nitride-based semiconductor light-emitting element according to claim 2, wherein the metal film layer includes an adhesion layer.   11. The nitride-based semiconductor light emitting device according to claim 10, wherein the adhesion layer is made of a single metal of Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, or W and / or an alloy thereof. element.   The nitride-based semiconductor light-emitting element according to claim 2, wherein the plated metal plate has a thickness of 10 μm to 200 μm.   The nitride-based semiconductor light-emitting element according to any one of claims 2 to 12, wherein the plated metal plate is formed of NiP alloy, Cu, or Cu alloy.   The nitride-based semiconductor light-emitting element according to any one of claims 2 to 13, wherein a plating adhesion layer is formed between the metal film layer and the plated metal plate in contact with the plated metal plate.   The nitride-based semiconductor light-emitting element according to claim 14, wherein the plating adhesion layer has 50 wt% or more of the same composition as a main component that occupies 50 wt% or more of the plated metal plate. The nitride-based semiconductor light-emitting element according to claim 1, wherein a negative electrode connected to the n-type semiconductor layer is formed, and a positive electrode connected to the plating substrate is formed. At least an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked to form a light-emitting element portion. A light-transmitting insulating property is formed around the light-emitting element portion of the n-type semiconductor layer, the light-emitting layer, and the p-type semiconductor layer. When manufacturing a nitride-based semiconductor light-emitting device provided with an inorganic fine particle portion,
At least a buffer layer, an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked on the substrate, and the stacked body is divided into elements on the substrate to form a light-emitting element portion. The light-transmitting insulating inorganic fine particles are filled between the element portions, and then a metal thin film and a plated metal plate are laminated on the light-emitting element portions divided as described above and the insulating inorganic fine particles filled as described above,
Thereafter, the substrate and the buffer layer are removed to expose the surface of the n-type semiconductor layer, and the metal thin film and the plated plate are divided in units of the light emitting element portion. Method.   The method for manufacturing a nitride-based semiconductor light-emitting element according to claim 17, wherein the substrate is removed by a laser.   The method for manufacturing a nitride-based semiconductor light-emitting element according to any one of claims 17 to 18, wherein heat treatment is performed at 100 ° C to 300 ° C after forming the plated metal plate. The negative electrode connected to the n-type semiconductor layer is formed after exposing the surface of the n-type semiconductor layer, and the positive electrode connected to the plating substrate is formed. A method for producing a nitride-based semiconductor light-emitting device according to claim 1.

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