JP2005174208A - Constant voltage power supply device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a constant voltage power supply device for improving a response speed to the fluctuation of the current consumption of a load without deteriorating phase margin or increasing the steady driving currents of an error amplifier by increasing the amplification rate of a differential amplifier. <P>SOLUTION: When the output currents of a driver transistor M7 fluctuate in an increasing direction, the voltage of a connecting part A varies in an increasing direction, and a gate voltage of an NMOS transistor M2 is transiently increased. When the gate voltage of the NMOS transistor M2 is increased, driving currents of a differential amplifier 8 are transiently increased, and the response characteristics of the differential amplifier 8 to the fluctuation of an output voltage Vout are improved. On the contrary, when the output currents of the driver transistor M7 fluctuate in a decreasing direction, the driving currents of the differential amplifier 8 are transiently decreased, and the response characteristics of the differential amplifier 8 due to the fluctuation of the output voltage Vout are decreased. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a constant voltage power supply apparatus that can respond to a change in output voltage due to a transient change in a load at a high speed and can operate with a low current consumption.

  Conventionally, as a configuration of a constant voltage power supply apparatus that converts an input voltage into a predetermined constant voltage and outputs the output voltage, the output voltage is usually controlled by comparing the output voltage with a reference voltage and minimizing the difference voltage. Feedback is applied to the output control transistor. For this reason, a change in the output voltage is transmitted to the output control transistor, and some time is required to restore the output voltage to a predetermined voltage value. The time required for such transmission is delayed in response. If the response delay is large, the output voltage also fluctuates greatly when the load current fluctuates greatly, etc., and in the worst case, the operation of the load circuit connected to the output terminal from which the output voltage is output There was a possibility that the load circuit would fail because the voltage was lower than the guaranteed voltage.

  Many of such response delays are determined by the inter-wiring capacitance in the control circuit of the constant voltage power supply device, the parasitic capacitance between the electrodes of the transistor, and the current value for charging and discharging these capacitances. That is, in order to increase the response speed, such a capacity may be reduced or a current value for charging and discharging such a capacity may be increased. However, since such a capacitance is almost determined by the layout of the IC constituting the control circuit and the size of the transistor necessary for controlling the output current, the charge / discharge current value is usually set. There was a way to make it bigger.

  However, increasing the charge / discharge current value means increasing the drive current value of the control circuit in the constant voltage power supply device, and inevitably increases the current consumption of the power supply device itself. In recent years, in consideration of environmental problems, power saving of electric devices has been demanded, and such a tendency is particularly remarkable in devices driven by batteries. For this reason, it is desirable to operate the control circuit of the constant voltage power supply apparatus with as low a current as possible.

Therefore, there has been a technique for improving the response speed of the output voltage in the constant voltage power supply device as shown in FIG. 7 (see, for example, Patent Document 1).
In FIG. 7, a current supply circuit 130 and a current suction circuit 140 are connected to the voltage output terminal TO of the feedback voltage supply source 110.
The power supply circuit 130 includes a voltage source 131 that generates a voltage VL slightly lower than a steady voltage at the voltage output terminal TO, a first diode 133 having a cathode connected to the voltage output terminal TO, and a cathode connected to the voltage source 131. The connected second diode 134 and a current source 132 having a current output terminal connected to the connection point of the anode of each of the first and second diodes.

  The current suction circuit 140 includes a voltage source 141 that outputs a voltage VH that is slightly higher than the steady voltage of the voltage output terminal TO, a third diode 143 that has an anode connected to the voltage output terminal TO, and an anode that is a voltage source. 141 and a fourth diode 144 connected to 141, and a current source 142 whose current output terminal is connected to the connection point of the respective cathodes of the third and fourth diodes.

While the voltage Vo of each voltage source 131, 141 and the voltage output terminal TO maintains the relationship of VH>Vo> VL, the output current of the current source 132 flows to the voltage source 131, and the output current of the current source 142 is The current flows to the voltage source 141, and no current flows to the voltage output terminal TO. Here, when the voltage Vo at the voltage output terminal TO decreases and Vo <VL, current is supplied from the current source 132 to the voltage output terminal TO, and the voltage Vo at the voltage output terminal TO becomes equal to or lower than the voltage VL. To prevent. Similarly, when the voltage Vo at the voltage output terminal TO rises and VH <Vo, the current source 142 draws current from the voltage output terminal TO, and the voltage Vo at the voltage output terminal TO becomes equal to or higher than the voltage VH. To prevent. In this way, voltage fluctuation due to response delay of the voltage Vo can be suppressed.
JP-A-10-124159

  However, with the widespread use of devices such as portable information terminals that are driven by a battery and have a central processing unit (CPU) inside, there is a need for a low-consumption type constant voltage power supply, which simply increases the drive current. It is not practical to take such a method of increasing the consumption current. Other than this method, a method of increasing the amplification factor by increasing the number of amplification stages of the error amplifier is known. However, in such a method, if the error amplifier drive current is decreased, the phase delay in the high-frequency region is increased against the increase in the amplification factor. Therefore, negative feedback with sufficient closed-loop phase margin is provided. It has been difficult to obtain a circuit, that is, a stable constant voltage circuit. Therefore, as a result, it is necessary to increase the current consumption of the constant voltage power supply device, and the current consumption of the constant voltage power supply device cannot be reduced.

  The present invention has been made in order to solve the above-described problems, and does not increase the current consumption by simply increasing the amplification factor of the differential amplifier circuit, but without increasing the current consumption. An object of the present invention is to obtain a constant voltage power supply device capable of improving the response speed to fluctuations in the consumption current of a load without increasing the driving current.

In the constant voltage power supply device according to the present invention, the voltage Vbat input to the input terminal IN is converted into a predetermined voltage and output from the output terminal OUT.
A driver transistor for controlling a current output from the input terminal IN to the output terminal OUT;
An output voltage detection circuit unit that detects the output voltage Vout of the output terminal OUT, generates a voltage Vd proportional to the detected voltage Vout, and outputs the voltage Vd;
A reference voltage generation circuit unit that generates and outputs a predetermined reference voltage Vr;
An error amplifier circuit unit having a differential amplifier for controlling the operation of the driver transistor so that the proportional voltage Vd from the output voltage detection circuit unit becomes the reference voltage Vr;
A drive current control circuit that controls the drive current flowing through the differential amplifier according to the current value of the output current io from the output terminal OUT to control the response speed of the differential amplifier;
With
The drive current control circuit unit includes:
An output current monitor circuit that detects the output current io, converts the detected output current io into a voltage, and outputs the voltage;
A coupling capacitor for AC coupling the output terminal of the output current monitor circuit and the control electrode of the current source;
Is provided.

  The error amplifier circuit unit includes at least one stage of an amplifier circuit that amplifies the output signal of the differential amplifier and outputs the amplified signal to the control electrode of the driver transistor, and the drive current control circuit unit receives the output current io. When it increases, the drive current flowing through the amplifier circuit is increased.

  In this case, the drive current control circuit unit may reduce the drive current flowing through the amplifier circuit when the output current io decreases.

  The differential amplifier may include a second current source that supplies a predetermined drive current to the differential pair.

The constant voltage power supply device according to the present invention is a constant voltage power supply device that converts the voltage Vbat input to the input terminal IN into a predetermined voltage and outputs the voltage from the output terminal OUT.
A driver transistor for controlling a current output from the input terminal IN to the output terminal OUT;
An output voltage detection circuit unit that detects the voltage Vout of the output terminal OUT, generates and outputs a voltage Vd that is proportional to the detected voltage Vout;
A reference voltage generation circuit unit that generates and outputs a predetermined reference voltage Vr;
A differential amplifier for controlling the operation of the driver transistor so that the proportional voltage Vd from the output voltage detection circuit unit becomes the reference voltage Vr, and a control electrode of the driver transistor by amplifying an output signal of the differential amplifier An error amplification circuit unit having at least one stage of amplification circuit that outputs to
A drive current control circuit unit that controls the drive current flowing through the amplifier circuit according to the current value of the output current io from the output terminal OUT to control the response speed of the error amplifier circuit unit;
With
The drive current control circuit unit increases the response speed of the error amplifier circuit unit by increasing the drive current flowing through the amplifier circuit when the output current io increases.

  The drive current control circuit unit decreases the response speed of the error amplifier circuit unit by decreasing the drive current flowing through the amplifier circuit when the output current io decreases.

  Specifically, the amplification circuit includes an amplification circuit unit that amplifies and outputs an input signal, and a current source that supplies a drive current corresponding to the signal input to the control electrode to the amplification circuit unit, The drive current control circuit unit controls the drive current supplied from the current source according to the current value of the output current io.

In this case, the drive current control circuit unit is
An output current monitor circuit that detects the output current io, converts the detected output current io into a voltage, and outputs the voltage;
A coupling capacitor for AC coupling the output terminal of the output current monitor circuit and the control electrode of the current source;
I was prepared to.

  According to the constant voltage power supply device of the present invention, the drive current of the differential amplifier or amplifier circuit that controls the driver transistor is changed according to the change of the current io output from the output terminal OUT. The power consumption of the constant voltage power supply device can be reduced during operation, and the recovery response time when the output current increases or decreases sharply can be shortened, and the recovery response can be speeded up. Can do.

Next, the present invention will be described in detail based on the embodiments shown in the drawings.
First embodiment.
FIG. 1 is a circuit diagram showing an example of a constant voltage power supply device according to the first embodiment of the present invention.
In the constant voltage power supply device 1 of FIG. 1, a power supply voltage Vbat is input as a power supply from a DC power supply 10 such as a battery, and a load 11 is connected to an output terminal OUT. The constant voltage power supply device 1 converts the input voltage Vbat into a predetermined constant voltage and supplies it to the load 11.

  The constant voltage power supply device 1 includes a reference voltage generation circuit 2, a constant current bias circuit 3, a constant voltage control circuit 4, an output current monitor circuit 5, and a coupling capacitor C1. The reference voltage generation circuit 2 generates a predetermined reference voltage Vr and outputs it to the constant voltage control circuit 4, and the constant current bias circuit 3 controls the constant voltage control circuit 4 so that a predetermined drive current is supplied. . The constant voltage control circuit 4 generates a voltage Vd proportional to the output voltage Vout output from the output terminal OUT, and outputs a current corresponding to the voltage difference between the proportional voltage Vd and the reference voltage Vr to the output terminal OUT. The output voltage Vout is made constant at a predetermined voltage. The output current monitor circuit 5 detects the current io output from the output terminal OUT, and controls the current value of the drive current flowing in the constant voltage control circuit 4 according to the detected current value of the output current io. . The constant voltage control circuit 4 changes the response characteristic to the fluctuation of the output voltage Vout, that is, the response speed, according to the current value of the drive current.

  The constant current bias circuit 3 includes a constant current source 7 and an NMOS transistor M1, and the constant voltage control circuit 4 includes a differential amplifier 8 including NMOS transistors M2 to M4 and PMOS transistors M5 and M6, and the differential amplifier. A driver transistor M7 composed of a PMOS transistor that outputs a current corresponding to the output signal of the amplifier 8 from the input terminal IN to the output terminal OUT, and resistors R1 and R2 that divide the output voltage Vout to generate and output the proportional voltage Vd. It consists of and. The output current monitor circuit 5 includes PMOS transistors M8 to M11 and M13, NMOS transistors M12 and M14, and a resistor R3.

In the constant current bias circuit 3, a constant current source 7 and an NMOS transistor M1 are connected in series between the power supply voltage Vbat and the ground voltage. In the NMOS transistor M1, the drain and the gate are connected, and the gate is connected to the gate of the NMOS transistor M2. The NMOS transistors M1 and M2 form a current mirror circuit.
In the constant voltage control circuit 4, a series circuit of a PMOS transistor M5 and an NMOS transistor M3 and a series circuit of a PMOS transistor M6 and an NMOS transistor M4 are connected in parallel between the power supply voltage Vbat and the drain of the NMOS transistor M2. The source of the NMOS transistor M2 is connected to the ground voltage.

  The PMOS transistors M5 and M6 form a current mirror circuit, and the NMOS transistors M3 and M4 form a differential pair. The gates of the PMOS transistors M5 and M6 are connected, and the connection is connected to the drain of the PMOS transistor M6. A driver transistor M7 and resistors R1 and R2 are connected in series between the power supply voltage Vbat and the ground voltage. A connection portion between the driver transistor M7 and the resistor R1 is connected to the output terminal OUT, and the load 11 is connected between the output terminal OUT and the ground voltage. The connection between the resistors R1 and R2 is connected to the gate of the NMOS transistor M4, the proportional voltage Vd is input to the gate of the NMOS transistor M4, and the reference voltage Vr is input to the gate of the NMOS transistor M3. Further, the gate of the driver transistor M7 is connected to a connection portion between the PMOS transistor M5 and the NMOS transistor M3 that form the output terminal of the differential amplifier 8.

  In the output current monitor circuit 5, PMOS transistors M10 and M11 and an NMOS transistor M12 are connected in series between the power supply voltage Vbat and the ground voltage, and the PMOS transistor is connected between the output terminal OUT and the ground voltage. M13 and NMOS transistor M14 are connected in series. Further, PMOS transistors M8 and M9 and a resistor R3 are connected in series between the power supply voltage Vbat and the ground voltage, and a connection portion A between the PMOS transistor M9 and the resistor R3 is an NMOS transistor via a coupling capacitor C1. It is connected to the gate of M2.

  The gates of the PMOS transistors M8 and M10 are connected to the gate of the driver transistor M7, respectively. The PMOS transistors M9, M11 and M13 form a current mirror circuit, the gates of the PMOS transistors M9, M11 and M13 are connected, and the connection is connected to the drain of the PMOS transistor M13. The NMOS transistors M12 and M14 form a current mirror circuit, the gates of the NMOS transistors M12 and M14 are connected, and the connection is connected to the drain of the NMOS transistor M12. In each PMOS transistor and each NMOS transistor, the substrate gate is connected to the source.

  The resistors R1 and R2 are the output voltage detection circuit unit, the reference voltage generation circuit 2 is the reference voltage generation circuit unit, the constant current bias circuit 3 and the differential amplifier 8 are the error amplification circuit unit, the output current monitor circuit 5 and The coupling capacitor C1 forms a drive current control circuit unit. The NMOS transistor M2 forms a current source for the differential amplifier.

  In such a configuration, the current generated by the constant current source 7 of the constant current bias circuit 3 is driven to the differential amplifier 8 of the constant voltage control circuit 4 through the current mirror circuit composed of the NMOS transistors M1 and M2. Supplied as current. The differential amplifier 8 amplifies the voltage difference between the gate voltage of the NMOS transistor M3 and the gate voltage of the NMOS transistor M4 and outputs the amplified voltage difference to the gate of the driver transistor M7. In the case of the circuit of FIG. 1, when the gate voltage of the NMOS transistor M4 becomes smaller than the gate voltage of the NMOS transistor M3, the differential amplifier 8 operates in a direction to lower the gate voltage of the driver transistor M7, and the driver transistor M7 further The on-resistance decreases, and as a result, the output voltage Vout increases.

Further, when the gate voltage of the NMOS transistor M4 becomes higher than the gate voltage of the NMOS transistor M3, the gate voltage of the driver transistor M7 operates to increase, the driver transistor M7 increases on-resistance, and the output voltage Vout decreases. . As a result, since negative feedback is applied so that the gates of the NMOS transistors M3 and M4 have the same voltage, the output voltage Vout is stabilized as shown in the following equation (1). In the following formula (1), R1 and R2 indicate resistance values of the resistors R1 and R2, respectively.
Vout = Vr × (R1 + R2) / R2 (1)

  In the output current monitor circuit 5, the ratio of the width W × length L of each transistor in the PMOS transistors M11 and M13 and the ratio of the width W × length L of each transistor in the NMOS transistors M12 and M14 are the same or arbitrary magnification. Thus, the current value flowing from the PMOS transistor M11 to the NMOS transistor M12 and the current value flowing from the PMOS transistor M13 to the NMOS transistor M14 can be set to the same or an arbitrary magnification. At this time, the gate-source voltage of the PMOS transistor M13 and the gate-source voltage of the PMOS transistor M11 are the same, and the respective gate voltages are the same.

  Therefore, the output voltage Vout, which is the source voltage of the PMOS transistor M13, and the drain voltage of the PMOS transistor M10, that is, the source voltage of the PMOS transistor M11 are equal, and the drain voltage of the PMOS transistor M8, that is, the source voltage of the PMOS transistor M9 is also It is the same. Therefore, the source voltage, gate voltage, and drain voltage of the driver transistor M7 and PMOS transistors M8 and M10 are equal, and the current flowing between the drain and source is the same as the transistor size ratio.

  Therefore, each current flowing between the source and drain of the PMOS transistors M8 and M10 is a current obtained by multiplying the current flowing through the driver transistor M7 by a transistor size ratio, and the resistor R3 is connected between the source and drain of the PMOS transistor M8. The flowing current is converted to voltage. A voltage proportional to the current output from the driver transistor M7 is output from the connection portion A between the PMOS transistor M9 and the resistor R3. The connection portion A is AC coupled to the gate of the NMOS transistor M2 of the differential amplifier 8 by a coupling capacitor C1. For this reason, the fluctuation of the output current of the driver transistor M7 becomes the voltage fluctuation of the connection portion A, and the AC component of the connection portion A is transmitted to the gate of the NMOS transistor M2.

  That is, when the output current of the driver transistor M7 fluctuates in the increasing direction, the voltage at the connection portion A fluctuates in the increasing direction, and transiently increases the gate voltage of the NMOS transistor M2. When the gate voltage of the NMOS transistor M2 rises, the drive current of the differential amplifier 8 increases transiently, and the response characteristics of the differential amplifier 8 with respect to fluctuations in the output voltage Vout are improved. On the other hand, when the output current of the driver transistor M7 fluctuates in a decreasing direction, the drive current of the differential amplifier 8 decreases transiently, and the response characteristic of the differential amplifier 8 with respect to the fluctuation of the output voltage Vout deteriorates. Usually, in the case of a constant voltage circuit, the response characteristic when the output current increases is important, and the response characteristic of the differential amplifier 8 when the output current increases can be improved.

  As shown in FIG. 2, the PMOS transistors M8 and M9 and the resistor R3 in FIG. 1 are deleted, and the connection B between the PMOS transistor M11 and the NMOS transistor M12 is connected to the gate of the NMOS transistor M2 via the coupling capacitor C1. You may make it connect to. In this case, the output current of the driver transistor M7 is not proportional to the voltage of the connection B, and the voltage fluctuation of the connection B with respect to the change of the output current of the driver transistor M7 is determined by the Vgs-Ids characteristic of the NMOS transistor M12. . In FIG. 2, the output current monitor circuit 5a and the coupling capacitor C1 form a drive current control circuit unit.

Second embodiment.
In the first embodiment, the constant voltage control circuit 4 is a two-stage amplification type. However, the constant voltage control circuit 4 may be a three-stage amplification type, and this is the second embodiment of the present invention. The form is as follows.
FIG. 3 is a circuit diagram showing an example of a constant voltage power supply device according to the second embodiment of the present invention. In FIG. 3, the same or similar parts as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted here, and only differences from FIG. 1 will be described.
3 is different from FIG. 1 in that an amplifier circuit formed of an NMOS transistor M15 and a PMOS transistor M16 is added to the constant voltage control circuit 4 of FIG. Therefore, the constant voltage control circuit 4 of FIG. 1 is changed to the constant voltage control circuit 4b and the constant voltage power supply device 1 of FIG. 1 is changed to the constant voltage power supply device 1b.

  In FIG. 3, the constant voltage power supply device 1b includes a reference voltage generation circuit 2, a constant current bias circuit 3, a constant voltage control circuit 4b, an output current monitor circuit 5, and a coupling capacitor C1. The reference voltage generation circuit 2 generates a predetermined reference voltage Vr and outputs it to the constant voltage control circuit 4b, and the constant current bias circuit 3 controls the constant voltage control circuit 4b so that a predetermined drive current is supplied. . The constant voltage control circuit 4b generates a voltage Vd proportional to the output voltage Vout output from the output terminal OUT, and outputs a current corresponding to the voltage difference between the proportional voltage Vd and the reference voltage Vr to the output terminal OUT. The output voltage Vout is made constant at a predetermined voltage.

The output current monitor circuit 5 detects the current io output from the output terminal OUT, and controls the current value of the drive current flowing through the constant voltage control circuit 4b according to the detected current value of the output current io. . In the constant voltage control circuit 4b, the response characteristic to the fluctuation of the output voltage Vout, that is, the response speed changes according to the current value of the drive current.
The constant voltage control circuit 4b includes a differential amplifier 8, a driver transistor M7, resistors R1 and R2, and an NMOS transistor M15 constituting an amplifier circuit that amplifies the output signal of the differential amplifier 8 and outputs the amplified signal to the driver transistor M7. And a PMOS transistor M16. The differential amplifier 8, the NMOS transistor M15, and the PMOS transistor M16 form an error amplification circuit.

  In the constant voltage control circuit 4b, a PMOS transistor M16 and an NMOS transistor M15 are connected in series between the power supply voltage Vbat and the ground voltage. The gate of the PMOS transistor M16 is connected to the connection portion between the PMOS transistor M6 and the NMOS transistor M4, which is the output terminal of the differential amplifier 8, and the gate of the NMOS transistor M15 is connected to the gate of the NMOS transistor M1 of the constant current bias circuit 3. It is connected. The connection portion between the PMOS transistor M16 and the NMOS transistor M15 is connected to the gates of the driver transistor M7 and the PMOS transistors M8 and M10, respectively.

  The constant current bias circuit 3, the differential amplifier 8, the NMOS transistor M15, and the PMOS transistor M16 form an error amplification circuit unit. The NMOS transistor M15 and the PMOS transistor M16 form an amplification circuit, the NMOS transistor M15 forms a current source of the amplification circuit, and the PMOS transistor M16 forms an amplification unit of the amplification circuit.

  In such a configuration, the constant voltage power supply 1b basically operates with the same logic as that of the constant voltage power supply 1 of FIG. However, in the constant voltage power supply device 1b, the response speed of the constant voltage control circuit 4b in the direction of increasing the gate voltage of the driver transistor M7 in the direction in which the driver transistor M7 is turned off is increased by the amplification effect of the differential amplifier 8 and the PMOS transistor M16. However, the response speed of the constant voltage control circuit 4b with respect to the gate voltage decreasing direction of the driver transistor M7 in the direction in which the driver transistor M7 is turned on depends on the constant current value supplied by the NMOS transistor M15.

  Therefore, when the drive current of the NMOS transistor M15 is increased by the output current monitor circuit 5 and the coupling capacitor C1 in response to the change in the output current of the driver transistor M7, the response speed of the constant voltage power supply device 1b is increased. Further, the drive currents of the NMOS transistors M2 and M15 decrease with respect to the change in the output current decrease direction of the driver transistor M7. However, in the direction in which the gate voltage of the driver transistor M7 rises, the differential amplifier 8 and the PMOS transistor M16 have an amplification effect. Therefore, the influence on the response speed of the constant voltage power supply device 1b is small, and the gate of the driver transistor M7 As a result, when the current value driven by the NMOS transistor M15 decreases, the impedance toward the ground voltage direction increases, and the decrease in the response speed with respect to the voltage increase direction of the output voltage Vout can be offset or accelerated.

  As shown in FIG. 4, also in the case of FIG. 3, the PMOS transistors M8 and M9 and the resistor R3 in FIG. 3 are deleted as shown in FIG. 2, and the connection B between the PMOS transistor M11 and the NMOS transistor M12 is provided. You may make it connect to each gate of NMOS transistor M2 and M15 via the coupling capacitor | condenser C1, respectively. In this case, the output current of the driver transistor M7 is not proportional to the voltage of the connection B, and the voltage fluctuation of the connection B with respect to the change of the output current of the driver transistor M7 is determined by the Vgs-Ids characteristic of the NMOS transistor M12. . In FIG. 4, the output current monitor circuit 5a and the coupling capacitor C1 form a drive current control circuit unit.

Third embodiment.
FIG. 5 is a circuit diagram showing an example of a constant voltage power supply device according to the third embodiment of the present invention. In FIG. 5, the same or similar elements as those in FIG. 3 are denoted by the same reference numerals, and description thereof is omitted here, and only differences from FIG. 3 are described.
5 differs from FIG. 3 in that NMOS transistors M17 and M20 and PMOS transistors M18 and M19 are added to the constant voltage control circuit 4b of FIG. 3, and the PMOS transistors M8 and M8 of the output current monitor circuit 5 of FIG. This is because M9 and the resistor R3 are omitted, that is, the output current monitor circuit 5a of FIG. 4 is used. Therefore, the constant voltage control circuit 4b of FIG. 3 is replaced with the constant voltage control circuit 4d, the output current monitor circuit 5 of FIG. 3 is replaced with the output current monitor circuit 5a, and the constant voltage power supply 1b of FIG. It was set as the power supply device 1d.

  In FIG. 5, the constant voltage power supply device 1d includes a reference voltage generation circuit 2, a constant current bias circuit 3, a constant voltage control circuit 4d, an output current monitor circuit 5a, and a coupling capacitor C1. The reference voltage generation circuit 2 generates a predetermined reference voltage Vr and outputs it to the constant voltage control circuit 4d, and the constant current bias circuit 3 controls the constant voltage control circuit 4d to be supplied with a predetermined drive current. . The constant voltage control circuit 4d generates a voltage Vd proportional to the output voltage Vout output from the output terminal OUT, and outputs a current corresponding to the voltage difference between the proportional voltage Vd and the reference voltage Vr to the output terminal OUT. The output voltage Vout is made constant at a predetermined voltage.

The output current monitor circuit 5a detects the current io output from the output terminal OUT, and controls the current value of the drive current flowing through the constant voltage control circuit 4d according to the detected current value of the output current io. . In the constant voltage control circuit 4d, the response characteristic to the fluctuation of the output voltage Vout, that is, the response speed changes according to the current value of the drive current.
The constant voltage control circuit 4d includes a differential amplifier 8, a driver transistor M7, resistors R1 and R2, NMOS transistors M15, M17, and M20, and PMOS transistors M16, M18, and M19. The differential amplifier 8, the NMOS transistors M15, M17, and M20 and the PMOS transistors M16, M18, and M19 form an error amplification circuit.

  In the constant voltage control circuit 4d, the NMOS transistor M17 forms a current mirror circuit with the NMOS transistor M15, and the PMOS transistors M18 and M19 form a current mirror circuit. The NMOS transistor M20 forms a current mirror circuit with the NMOS transistor M1 and the NMOS transistor M2. Between the power supply voltage Vbat and the ground voltage, a PMOS transistor M18 and an NMOS transistor M17 are connected in series, and a PMOS transistor M19 and an NMOS transistor M20 are connected in series. The gates of the NMOS transistors M15 and M17 are connected, and the connection is connected to the drain of the NMOS transistor M17. The gates of the PMOS transistors M18 and M19 are connected, and the connection is connected to the drain of the PMOS transistor M19. The gate of the NMOS transistor M20 is connected to a connection portion between the gates of the NMOS transistors M1 and M2.

On the other hand, the output current monitor circuit 5a is composed of PMOS transistors M10, M11, M13 and NMOS transistors M12, M14.
In the output current monitor circuit 5a, PMOS transistors M10 and M11 and an NMOS transistor M12 are connected in series between the power supply voltage Vbat and the ground voltage, and the PMOS transistor M13 and NMOS are connected between the drain of the driver transistor M7 and the ground voltage. Transistor M14 is connected in series. The gates of the PMOS transistors M11 and M13 are connected, and the connection is connected to the drain of the PMOS transistor M13. The gates of the NMOS transistors M12 and M14 are connected, and the connection is connected to the drain of the NMOS transistor M12 and to the gate of the NMOS transistor M15 through the coupling capacitor C1.

  The constant current bias circuit 3, the differential amplifier 8, the NMOS transistors M15, M17, and M20 and the PMOS transistors M16, M18, and M19 form an error amplification circuit unit. The NMOS transistors M15, M17, and M20 and the PMOS transistors M16, M18, and M19 form an amplification circuit, the PMOS transistor M16 forms an amplification unit, and the NMOS transistors M15, M17, and M20 and the PMOS transistors M18 and M19 form a current source.

  In such a configuration, the gate of the NMOS transistor M15 that drives the current of the gate node of the driver transistor M7 is divided from the gate of the NMOS transistor M2 that drives the driving current of the differential amplifier 8, and the NMOS transistors M17 and M20 and the PMOS are divided. The transistors M18 and M19 convert the current set in the constant current bias circuit 3 into a drive current for the NMOS transistor M15 by the current mirror circuit.

  The connection portion B of the output current monitor circuit 5a is AC-connected to the gates of the NMOS transistors M15 and M17 via the coupling capacitor C1. Response characteristics with respect to fluctuations in the output voltage Vout are improved by the same operating principle as in FIG. In addition, since the drive current of the differential amplifier 8, that is, the drive current does not decrease even when the driver transistor M7 changes in the direction of decreasing the output current, there is no deterioration in the response characteristics with respect to the fluctuation of the output voltage Vout. In this way, the response speed when the driver transistor M7 changes in the direction of decreasing the output current can be improved as compared with the case of FIG.

Fourth embodiment.
In each of the first and second embodiments, the decrease in the drive current of the error amplifier 8 when the driver transistor M7 fluctuates in the direction of decreasing the output current may be suppressed to a certain decrease or less. This is the fourth embodiment of the present invention.
FIG. 6 is a circuit diagram showing an example of a constant voltage power supply device according to the fourth embodiment of the present invention. Note that FIG. 6 shows the case of FIG. 2 as an example, and the same applies to the cases of FIGS. In FIG. 6, the same or similar parts as those in FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted here, and only differences from FIG. 2 will be described.

  6 differs from FIG. 2 in that an NMOS transistor M25 and a second constant current bias circuit 9 for controlling the operation of the NMOS transistor M25 so that a predetermined constant current is supplied from the NMOS transistor M25 are added. is there. Accordingly, the differential amplifier 8 of FIG. 2 is changed to the differential amplifier 8e, the constant voltage control circuit 4 of FIG. 2 is changed to the constant voltage control circuit 4e, and the constant voltage power supply device 1 of FIG. 2 is changed to the constant voltage power supply device 1e. did.

  In FIG. 6, the NMOS transistor M25 is connected in parallel to the NMOS transistor M2, and the gate of the NMOS transistor M25 is connected to the second constant current bias circuit 9. By connecting the connection between the output terminal of the constant current bias circuit 3 and the gate of the NMOS transistor M2 with a coupling capacitor C1, the differential amplifier can be used even when the output voltage Vout of the driver transistor M7 varies in the direction of decreasing the output current. In 8e, since the drive current is supplied from the NMOS transistor M25 to compensate the drive current, it is possible to prevent the drive current from being reduced more than necessary. The second constant current bias circuit 9 and the NMOS transistor M25 form a second current source.

It is the circuit diagram which showed the example of the constant voltage power supply device in the 1st Embodiment of this invention. It is the circuit diagram which showed the other example of the constant voltage power supply device in the 1st Embodiment of this invention. It is the circuit diagram which showed the example of the constant voltage power supply device in the 2nd Embodiment of this invention. It is the circuit diagram which showed the other example of the constant voltage power supply device in the 2nd Embodiment of this invention. It is the circuit diagram which showed the example of the constant voltage power supply device in the 3rd Embodiment of this invention. It is the circuit diagram which showed the example of the constant voltage power supply device in the 4th Embodiment of this invention. It is the figure which showed the example of the conventional constant voltage power supply device.

Explanation of symbols

1, 1a to 1e constant voltage power supply device 2 reference voltage generation circuit 3 constant current bias circuit 4, 4b, 4d, 4e constant voltage control circuit 5, 5a output current monitor circuit 7 constant current source 8, 8e differential amplifier 9 second Constant current bias circuit 10 DC power supply 11 Load M7 Driver transistor C1 Coupling capacitor

Claims (8)

In the constant voltage power supply apparatus that converts the voltage Vbat input to the input terminal IN into a predetermined voltage and outputs the voltage from the output terminal OUT.
A driver transistor for controlling a current output from the input terminal IN to the output terminal OUT;
An output voltage detection circuit unit that detects the voltage Vout of the output terminal OUT, generates and outputs a voltage Vd that is proportional to the detected voltage Vout;
A reference voltage generation circuit unit that generates and outputs a predetermined reference voltage Vr;
An error amplifier circuit unit having a differential amplifier for controlling the operation of the driver transistor so that the proportional voltage Vd from the output voltage detection circuit unit becomes the reference voltage Vr;
A drive current control circuit that controls the drive current flowing through the differential amplifier according to the current value of the output current io from the output terminal OUT to control the response speed of the differential amplifier;
With
The drive current control circuit unit includes:
An output current monitor circuit that detects the output current io, converts the detected output current io into a voltage, and outputs the voltage;
A coupling capacitor for AC coupling the output terminal of the output current monitor circuit and the control electrode of the current source;
A constant voltage power supply device comprising:   The error amplifier circuit unit includes at least one stage of amplifier circuit that amplifies the output signal of the differential amplifier and outputs the amplified signal to the control electrode of the driver transistor, and the drive current control circuit unit increases the output current io. 2. The constant voltage power supply device according to claim 1, wherein a driving current flowing through the amplifier circuit is increased.   3. The constant voltage power supply device according to claim 2, wherein the drive current control circuit unit reduces the drive current flowing through the amplifier circuit when the output current io decreases.   4. The constant voltage power supply apparatus according to claim 1, wherein the differential amplifier includes a second current source that supplies a predetermined drive current to the differential pair. In the constant voltage power supply apparatus that converts the voltage Vbat input to the input terminal IN into a predetermined voltage and outputs the voltage from the output terminal OUT.
A driver transistor for controlling a current output from the input terminal IN to the output terminal OUT;
An output voltage detection circuit unit that detects the voltage Vout of the output terminal OUT, generates and outputs a voltage Vd that is proportional to the detected voltage Vout;
A reference voltage generation circuit unit that generates and outputs a predetermined reference voltage Vr;
A differential amplifier for controlling the operation of the driver transistor so that the proportional voltage Vd from the output voltage detection circuit unit becomes the reference voltage Vr, and a control electrode of the driver transistor by amplifying an output signal of the differential amplifier An error amplification circuit unit having at least one stage of amplification circuit that outputs to
A drive current control circuit unit that controls the drive current flowing through the amplifier circuit according to the current value of the output current io from the output terminal OUT to control the response speed of the error amplifier circuit unit;
With
The drive current control circuit unit increases the response speed of the error amplifier circuit unit by increasing the drive current flowing through the amplifier circuit when the output current io increases.   6. The constant voltage power supply device according to claim 5, wherein when the output current io decreases, the drive current control circuit unit reduces the drive current flowing through the amplifier circuit to reduce the response speed of the error amplifier circuit unit. .   The amplification circuit includes an amplification unit that amplifies and outputs an input signal, and a current source that supplies a drive current corresponding to the signal input to the control electrode to the amplification unit, and the drive current control circuit unit includes: 7. The constant voltage power supply apparatus according to claim 5, wherein a drive current supplied from the current source is controlled in accordance with a current value of the output current io. The drive current control circuit unit includes:
An output current monitor circuit that detects the output current io, converts the detected output current io into a voltage, and outputs the voltage;
A coupling capacitor for AC coupling the output terminal of the output current monitor circuit and the control electrode of the current source;
The constant voltage power supply device according to claim 7, further comprising:

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