JP2005142434A - Silicon single crystal wafer and method for manufacturing same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for easily manufacturing a wafer at high throughput capable of suppressing the growth of a grown-in failure of a CZ silicon single crystal wafer and having a stabilized low failure density, a certain decrease in failure of the surface part, a satisfactory IG effect in a bulk part, an extremely good crystallinity which never exists, a high heat dissipation effect, and high operating speed, and to provide a silicon single crystal wafer. <P>SOLUTION: The method for manufacturing a silicon single crystal wafer comprises the steps of: growing the silicon single crystal rod under CZ process so as to make a carbon concentration of 0.1 to 5 ppma by the CZ method with the use of the silicon polycrystal raw material including not less than 92.3 % of an isotope<SP>28</SP>Si; slicing the grown silicon single crystal rod to manufacturing the wafer; and heat treating the manufactured wafer at the temperature between 900°C and a melting point of the silicon before the manufacturing process of a semiconductor element. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for producing a silicon single crystal wafer and a silicon single crystal wafer, and in particular, has excellent gettering ability obtained from a silicon single crystal grown by the Czochralski method, has a good defect-free layer, and The present invention relates to a method for manufacturing a silicon single crystal wafer having a high heat dissipation effect and high carrier mobility with high productivity, and a silicon single crystal wafer manufactured by this method.

  As a wafer for producing a semiconductor device such as a semiconductor integrated circuit, a wafer produced from a silicon single crystal grown mainly by the Czochralski method (hereinafter referred to as CZ method) is used. When crystal defects exist in such a silicon single crystal wafer, a pattern defect or the like is caused when a semiconductor device is manufactured. In particular, since the pattern width in a highly integrated device in recent years has become very fine, such as 0.35 μm or less, a pattern defect or the like may occur even in the presence of a crystal defect of 0.1 μm size when such a pattern is formed. Cause a significant decrease in device production yield or quality characteristics. Therefore, crystal defects existing in the silicon single crystal wafer must be reduced as much as possible.

In particular, recently, it has been reported that, in silicon single crystals grown by the CZ method, crystal defects introduced during crystal growth, which are called “grown-in” defects, are found by various measurement methods. ing. For example, these crystal defects are caused by a Secco solution (K ₂ Cr ₂ O ₇ and hydrofluoric acid) in a single crystal pulled at a general growth rate (eg, about 1 mm / min or more) produced at a commercial level. The surface can be detected as a pit by selectively etching the surface with a mixed solution of water (Secco etching) (see, for example, Patent Document 1).

  The main cause of this pit is considered to be oxygen precipitates that are aggregates of atomic vacancies that aggregate during the production of a single crystal or oxygen atoms (interstitial oxygen) that are mixed from a quartz crucible. If these crystal defects exist in the surface layer (0 to 5 μm) of the wafer on which the device is formed, they become harmful defects that degrade the device characteristics, so various methods for reducing such crystal defects have been studied. Has been.

  For example, in order to reduce the density of the cluster of atomic vacancies, it is known that the crystal growth rate may be extremely reduced (for example, 0.4 mm / min or less) to grow the crystal ( For example, Patent Document 2). However, if this method is used, a new crystal defect, which is thought to be a dislocation loop formed by excessive silicon interstitial silicon, is generated, and this dislocation loop significantly degrades the device characteristics, so it does not solve the problem. I understand. In addition, since the crystal growth rate is reduced from about 1.0 mm / min or more to 0.4 mm / min or less, the productivity of single crystals is significantly reduced and the cost is increased.

  In addition, as a wafer with reduced crystal defects, an epitaxial wafer in which a silicon layer is newly epitaxially grown on a normal silicon wafer, an annealed wafer that has been heat-treated at high temperature in a hydrogen or argon atmosphere, and a CZ single crystal A full-surface N region (region without an atomic vacancy cluster or dislocation loop) wafer manufactured by improving the growth conditions has also been developed.

  On the other hand, in the device manufacturing process, there is a process that is easily contaminated by impurities such as heavy metals. Since such impurities also deteriorate device characteristics, there is a demand for additional gettering capability in order to remove contamination by impurities. In response to this, a wafer having an IG (Intrinsic Gettering) effect has been developed by adding heat treatment or by doping impurities such as nitrogen and carbon to promote oxygen precipitation in the bulk.

  Among these, a wafer obtained by annealing a nitrogen-doped wafer (hereinafter referred to as a nitrogen-doped annealed wafer) has a reduced grain-in defect in the surface portion of the wafer, and is an oxygen precipitate in the bulk, contributing to gettering. BMD (Bulk Micro Defect) is also very useful as a wafer having a high density. This is a wafer developed using the effect of suppressing the growth of grown-in defects by nitrogen doping and the effect of promoting oxygen precipitation, and the defect size is smaller than that of normal crystals. It is a wafer having an effective gettering ability with a high BMD density.

  However, it can be seen that even when these silicon wafers called low defects are used with a high-precision defect evaluation apparatus such as MO-601 (manufactured by Mitsui Metal Mining Co., Ltd.), defects exist even though the density is low. Here, the MO-601 is a high-precision defect evaluation apparatus that can measure very fine defects having a size of about 50 nm and has a function capable of evaluating defects in the depth direction up to 5 μm.

When such a defect evaluation apparatus evaluates a defect having a size of 50 nm or more (LSTD, Laser Scattering Tomography Defect) to a depth of 5 μm, for example, on a wafer having a diameter of 150 mm, a normal epitaxial wafer and a nitrogen-doped wafer are obtained. Epitaxially grown wafers were about 40/150 mm wafers (0.23 / cm ² ), annealed wafers were about 3000/150 mm wafers (17 / cm ² ), N-area wafers and nitrogen-doped. The entire N region wafer has defects of about 70/150 mm wafers (0.40 / cm ² ). These defects are very small in size and often do not pose a problem in the current normal level device process, but they will surely become a problem for current state-of-the-art devices or future devices.

  By the way, with respect to interstitial oxygen, such oxygen atoms are usually electrically neutral alone, but when a heat treatment at about 350 to 500 ° C. is performed in a semiconductor device manufacturing process or the like, a plurality of oxygen atoms are formed. Collected electrons are emitted and become an electrically active oxygen donor. Therefore, in a wafer manufactured by the CZ method, there is a problem that due to the formation of this oxygen donor, the resistivity of the wafer increases when it is p-type and decreases when it is n-type.

With regard to the suppression of such oxygen donors, the composition ratio of ²⁸ Si, ²⁹ Si, and ³⁰ Si, which are stable isotopes of silicon, is 92.3% of ²⁸ Si, which is the composition ratio in natural silicon, ²⁹ Si is 4.67% 30 ^Si is by changing from 3.10%, possibly mass of generation of oxygen donors, and silicon isotope can control the generation of oxygen precipitates which are thought to be caused at the core Is shown (for example, refer to Patent Document 3).

  On the other hand, in recent years, when attention is focused on rapid high integration, high speed operation and high power in silicon integrated circuit elements, heat generation of the elements themselves has become a problem. Since heat generation in an integrated circuit causes a reduction in device speed due to a decrease in carrier mobility or causes malfunction or destruction, countermeasures against heat generation are an important issue, and a solution to that is required. This applies not only to integrated circuit elements but also to power devices using a silicon substrate.

In order to solve the problem of heat generation, a technique is disclosed in which the thermal conductivity of silicon is improved by increasing the content of isotope ²⁸ Si to 98% higher than that of natural silicon, and heat dissipation is improved (for example, (See Patent Document 4). It is said that Si with an increased content of one kind of isotope can be produced by a gas diffusion method, a centrifugal separation method, a laser separation method, or the like (see, for example, Patent Document 5).

JP-A-4-192345 JP-A-2-267195 Japanese Patent No. 2701809 US Pat. No. 5,144,409 JP 2001-199792 A

  The present invention suppresses the growth of crystal defects (grow-in defects) in a silicon single crystal wafer produced by using the CZ method, and the defect density is stably low, even if a small crystal defect occurs. Defects in the surface layer portion are reliably reduced by heat treatment, and in the bulk portion of the wafer, it has a sufficient IG effect by promoting the precipitation of oxygen, and has excellent crystallinity and heat dissipation effect that did not exist in the past. The main object of the present invention is to provide a manufacturing method for easily and easily producing a silicon single crystal wafer having a high operation speed.

In order to achieve the above object, the present invention provides a method for producing a silicon single crystal wafer, comprising at least a silicon polycrystal raw material having a content of isotope ²⁸ Si of 92.3% or more, and a Czochralski method. The silicon single crystal rod is grown so that the carbon concentration becomes 0.1 to 5 ppma, the grown silicon single crystal rod is sliced and processed into a wafer, and the processed wafer is at least a semiconductor element manufacturing process A method for producing a silicon single crystal wafer, characterized in that heat treatment is performed at a temperature between 900 ° C. and the melting point of silicon before (claim 1).

Thus, if a silicon single crystal is grown by the CZ method using a silicon polycrystal having a content of isotope ²⁸ Si exceeding that of natural silicon as a raw material, the crystal defect density is stably low because the crystallinity is extremely high, A silicon single crystal having high thermal conductivity and high carrier mobility and suppressed generation of oxygen precipitates can be grown. Then, a silicon single crystal wafer processed by slicing the silicon single crystal is subjected to, for example, a resistance heating furnace capable of mass processing in a temperature range of 900 ° C. to the melting point of silicon, more preferably 1100 ° C. to 1250 ° C. By performing heat treatment in a rapid heating furnace capable of short-time processing, carbon and oxygen are diffused outward in the surface layer portion near the wafer surface, and a high-quality defect-free layer (hereinafter, referred to as a DZ layer) that has no crystal defects. Is obtained). Moreover, since carbon is doped and grown at a concentration of 0.1 to 5 ppma, oxygen precipitation is sufficiently accelerated by heat treatment in the bulk portion. Thus, the electrical characteristics of the device are good due to the low crystal defect density, the heat dissipation effect is high due to the high thermal conductivity, and the device operating speed is high due to the high carrier mobility, and the device operates because the heat dissipation effect is high. It becomes possible to manufacture a silicon single crystal wafer that has a sufficient IG effect with little decrease in speed. At this time, since the carbon concentration is 0.1 ppma or more, the effect of promoting oxygen precipitation can be sufficiently obtained, and since it is 5 ppma or less, the concentration does not hinder the single crystallization of the silicon single crystal.
In order to further improve the crystallinity of the single crystal and increase the heat dissipation effect and operation speed of the device, the content ratio of ²⁸ Si is more preferably 94% or more, and more preferably 98% or more. Is more preferable.

In this case, it is preferable that the silicon single crystal rod to be grown is doped with nitrogen, and the silicon single crystal is grown so that the nitrogen concentration is 1 × 10 ^{13 to} 5 × 10 ¹⁵ atoms / cm ^3. .
Thus, by doping nitrogen into a silicon single crystal rod grown by the CZ method, growth of grow-in defects introduced during the crystal growth can be suppressed and the size can be reduced. Further, since growth of grow-in defects is suppressed, the crystal growth rate can be increased, so that crystal productivity can be greatly improved. At this time, since the nitrogen concentration doped into the single crystal rod is 1 × 10 ¹³ atoms / cm ³ or more, growth of grow-in defects can be effectively suppressed, and since it is 5 × 10 ¹⁵ atoms / cm ³ or less, silicon It does not interfere with single crystallization of single crystals.
And if heat treatment is applied to a wafer processed from silicon single crystal doped with nitrogen as well as carbon like this, carbon, oxygen and nitrogen in the wafer surface layer will be diffused outward, and crystal defects will be eliminated efficiently. I can do it. Therefore, a silicon single crystal wafer having a DZ layer with fewer crystal defects can be obtained. On the other hand, in the bulk portion of the wafer, oxygen precipitation is further promoted by the presence of nitrogen and carbon, so that a wafer having a sufficient IG effect can be manufactured.

The silicon single crystal is preferably grown so that the initial interstitial oxygen concentration of the grown silicon single crystal is 20 ppma or less.
Thus, if the silicon single crystal is grown so that the initial interstitial oxygen concentration of the silicon single crystal grown by the CZ method is less than 20 ppma (JEIDA: Japan Electronics Industry Promotion Association standard) or less, the OSF (crystal defect) Occurrence of Oxidation Induced Stacking Fault) nuclei can be reliably controlled, crystal defect growth can be further suppressed, and formation of oxygen precipitates in the surface layer can be further suppressed. Further, it is preferable to set the initial interstitial oxygen concentration to 8 ppma or more because it is possible to reliably have oxygen precipitates in the wafer bulk portion and to sufficiently exhibit the gettering effect.

The heat treatment is preferably performed in an atmosphere of oxygen, hydrogen, nitrogen, argon, or a mixed gas thereof (Claim 4).
In this way, by performing heat treatment of the wafer in an atmosphere of oxygen, hydrogen, nitrogen, argon or a mixed gas thereof, oxygen, nitrogen, and carbon in the wafer surface layer portion are effectively diffused outwardly, and crystal defects are eliminated. Can be extinguished. In particular, hydrogen, nitrogen, argon, or a mixed gas thereof is preferable because a surface oxide film is not formed on the wafer surface and a step of removing the oxide film is not necessary.

In this case, the heat treatment is preferably performed for at least 10 minutes in a resistance heating furnace or for at least 5 seconds in a rapid heating furnace.
As described above, if the heat treatment is performed in the resistance heating furnace, the heat treatment time is somewhat longer, but since it is a batch type, a large number of wafers (for example, 100 wafers) can be heat treated at a time. If this heat treatment is performed for at least 10 minutes, the oxygen, carbon, and nitrogen in the wafer surface layer portion can be sufficiently diffused outward, so that crystal defects can be reliably eliminated. Moreover, it is preferable that the heat treatment does not exceed 4 hours in consideration of the effect of eliminating crystal defects and the productivity.
On the other hand, if the heat treatment is performed in a rapid heating furnace, the temperature can be raised and lowered rapidly, so that crystal defects due to oxygen precipitation or the like are not newly generated during the temperature raising and lowering, and the time required for the heat treatment is greatly increased. Can be shortened. Then, by performing this heat treatment for at least 5 seconds, oxygen, carbon, and nitrogen in the wafer surface layer portion can be sufficiently diffused outward, so that crystal defects can be reliably eliminated, and the heat treatment time does not exceed 60 seconds. The time can be extremely shortened. The heat treatment temperature at this time is particularly preferably 1100 ° C. to a melting point of silicon or lower.

Moreover, this invention provides the silicon single crystal wafer manufactured by said manufacturing method (Claim 6).
As described above, the silicon single crystal wafer manufactured by the above-described manufacturing method has excellent electrical characteristics of the device because the surface layer portion has very few crystal defects, has a high heat conductivity, and has a high heat dissipation effect, and carrier movement. The silicon single crystal wafer has a high device operation speed and a high heat dissipation effect, and the operation speed hardly decreases due to a high heat dissipation effect, and also has a sufficient IG effect.
In order to further improve the crystallinity of the single crystal and increase the heat dissipation effect and operation speed of the device, the content ratio of ²⁸ Si is more preferably 94% or more, and more preferably 98% or more. Is more preferable.

Next, the present invention relates to a wafer made from a silicon single crystal grown by the Czochralski method, comprising at least an isotope ²⁸ Si content of 92.3% or more, and having a carbon concentration of Provided is a silicon single crystal wafer characterized by having a density of LSTD of 50 nm or more in a region of 0.1 to 5 ppma and at least a depth of 5 μm from the wafer surface of 0.03 pieces / cm ² or less. (Claim 7).

Thus, an LSTD having a content of isotope ²⁸ Si exceeding that of natural silicon, a carbon concentration of 0.1 to 5 ppma, and a size in a region from the wafer surface to at least a depth of 5 μm is 50 nm or more. Is 0.03 piece / cm ² or less, it has a sufficient IG effect, has a DZ layer with extremely low crystal defect density to a depth sufficient to form a device, and has good electrical characteristics of the device. There is a silicon single crystal wafer suitable for manufacturing a device that has high heat conductivity and high heat dissipation effect, and high carrier mobility and high device operation speed, and high heat dissipation effect and low operation speed. It becomes possible to do.
Also in this case, in order to further complete the crystallinity of the single crystal and to further increase the heat dissipation effect and operation speed of the device, the content ratio of ²⁸ Si is more preferably 94% or more, and further 98% or more. More preferably.

In this case, it is preferable that the nitrogen concentration in the silicon single crystal wafer is 1 × 10 ^{13 to} 5 × 10 ¹⁵ atoms / cm ³ .
Thus, since the nitrogen concentration is 1 × 10 ¹³ atoms / cm ³ or more, the growth of grow-in defects is sufficiently suppressed, the size is small, and the silicon single crystal that can be grown at high speed is produced. Since it can be a wafer, the productivity is high, and since it is 5 × 10 ¹⁵ atoms / cm ³ or less, it does not hinder single crystallization, has good crystallinity, and has a high manufacturing yield. Can be a silicon wafer.

The initial interstitial oxygen concentration in the silicon single crystal wafer is preferably 20 ppma or less.
Thus, by setting the oxygen concentration in the silicon single crystal wafer to 20 ppma or less, the nuclei of OSF are reliably controlled, the growth of crystal defects is further suppressed, and oxygen precipitation in the surface layer is achieved. The formation of the product can be suppressed. Moreover, it is preferable that the initial interstitial oxygen concentration is 8 ppma or more because oxygen precipitates in the wafer bulk portion are surely sufficient.

In the bulk portion of the silicon single crystal wafer, the BMD density is preferably 1.0 × 10 ⁸ pieces / cm ³ or more.
Thus, since the BMD density is 1.0 × 10 ⁸ pieces / cm ³ or more in the bulk portion of the silicon single crystal wafer, an ideal wafer having a high IG effect can be obtained.

The diameter of the silicon single crystal wafer is preferably 200 mm or more.
Thus, if the diameter of the silicon wafer is 200 mm or more, it becomes possible to produce a device with good electrical characteristics, high heat dissipation efficiency and high response speed, with good yield. It is preferable to use a large-diameter silicon wafer.

Hereinafter, the present invention will be described in more detail, but the present invention is not limited thereto.
The present inventors have determined that the content of silicon isotope ²⁸ Si contained in a silicon wafer (the content in natural silicon is 92.23% for ²⁸ Si, 4.67% for ²⁹ Si, and 3.41 for ³⁰ Si. DZ-IG for forming a DZ layer and giving an IG effect is the relationship between this content and interstitial oxygen and crystal defects (BMD) such as oxygen precipitates in the wafer bulk. The inventors have conceived that there is a possibility of affecting various properties of the processed silicon single crystal wafer, and as a result of earnest research, they have come up with the present invention.

Then, when growing a silicon single crystal by the CZ method, a technique for adding the isotope ²⁸ Si beyond the ratio of natural silicon, a technique for doping carbon, a heat treatment on the silicon single crystal wafer, and the wafer surface By combining the technology to eliminate the crystal defects and the technology to give the IG effect, there are few crystal defects in the surface layer of the wafer forming the device, which is unprecedented, the IG effect is high, the heat dissipation effect and the operating speed It has been found that a silicon single crystal wafer having a high thickness can be obtained with high productivity, and the present invention has been completed by examining various conditions.

As described above, the content of isotopes ^{28 Si} contained in the silicon single crystal, if higher than the content of isotopes ^{28 Si} in natural silicon, it is possible to enhance the thermal conductivity of the silicon single crystal Further, it is possible to promote the heat radiation of the heat generated in the semiconductor device integrated circuit or power device using such a silicon single crystal wafer as a substrate. As a result, a decrease in carrier mobility can be prevented.

On the other hand, among the low-defect wafers described above, the nitrogen-doped annealing wafer has the benefits of the above-described growth-in-defect aggregation suppression effect and oxygen precipitation promotion effect, as well as annealing that eliminates defects not found in epi-wafers and improved CZ wafers. Because there is a process, it is possible that the grow-in defects can be significantly reduced. However, in the case of the current nitrogen-doped annealed wafer, the defect density varies greatly from production lot to production lot. According to the measurement using the MO-601, about 140/150 mm wafers (0.79 / It was found that there were defects of about cm ² ).

  In order to further reduce such variation in defect density, it is conceivable to eliminate more defects by high-temperature and long-time annealing to make extremely low defects, but such annealing is expensive and undesirable. Therefore, defects should be controlled under the crystal pulling conditions. However, as described above, the crystal growth conditions have not been sufficiently studied. Until now, the wafers were pulled up under appropriate growth conditions, annealed, and then annealed. As a result, ad hoc development such as checking whether a free-in-growth defect (mainly void defect consisting mainly of vacancies) free area has been secured has been carried out, the development cost is high, and the quality is stable It wasn't.

  Furthermore, the annealing conditions may change because the thermal history varies depending on the diameter of the crystal. In this case, it is necessary to optimize the crystal with respect to the annealing condition, but this is also thoroughly investigated. It wasn't.

As described above, in the conventional silicon single crystal wafer, even if the DZ-IG treatment is performed, defects remain in the DZ layer, the gettering effect is insufficient, and there are variations in characteristics and deterioration. was there.
Therefore, the present inventors have heretofore made a high-quality silicon single crystal growth condition with a high content of isotope ²⁸ Si and few crystal defects in a silicon single crystal wafer that has been subjected to DZ-IG processing. It was not disclosed and attention was paid to the fact that no consideration was given to the content of isotope ²⁸ Si.

The inventors of the present invention increase the content of the silicon isotope ²⁸ Si so that the silicon crystal is highly purified, and the strain field formed by the silicon lattice of different silicon isotopes ²⁹ Si and ³⁰ Si is reduced. It is thought that the decrease of the strain field also reduces the number of precipitation nuclei for oxygen atoms to become precipitates, which affects the amount of oxygen precipitation. For crystal defects that remain in the DZ layer on the wafer surface, I thought that would work effectively.
In addition, by increasing the content of the silicon isotope ²⁸ Si in this way, oxygen precipitation in the bulk portion may be reduced and the IG effect may not be obtained, but doping with carbon having an effect of promoting oxygen precipitation is performed. I thought about making up for this.

  As described above, in recent years, the heat generation of the element itself due to rapid high integration, high speed operation, and high power in the silicon integrated circuit element has been a problem, and the heat generation of the integrated circuit is caused by the decrease in carrier mobility. Since this causes a reduction in speed or causes malfunction or destruction, countermeasures against heat generation have become an important issue, and a solution has been demanded. This seemed irrelevant in the silicon single crystal wafer subjected to the DZ-IG process, but in order to further improve the performance, reliability, and yield of the electrical characteristics of the device, the DZ-IG process The present invention has been completed as a result of studying various conditions based on such a basic idea.

According to the present invention, a crystal defect (grow-in defect) in a silicon single crystal wafer produced by using the CZ method by subjecting a silicon single crystal wafer having a silicon isotope ²⁸ Si content exceeding the ratio of natural silicon to IG heat treatment. ), The defect density is stable and low, and even if small crystal defects occur, defects in the surface layer of the wafer are reliably reduced by heat treatment, and oxygen is precipitated in the bulk part of the wafer. By promoting it, a silicon single crystal wafer having a sufficient IG effect, excellent crystallinity that has not existed in the past, and having a high heat dissipation effect and high operating speed can be easily produced with high productivity.

Hereinafter, embodiments of the present invention will be described, but the present invention is not limited thereto.
In the present invention, a silicon single crystal rod is first grown by the CZ method. The CZ method is a method in which a seed crystal is brought into contact with a melt of a silicon polycrystalline raw material housed in a horizontally rotating quartz crucible, and a silicon single crystal rod having a desired diameter is grown by slowly pulling the seed crystal while rotating the seed crystal. is there. At this time, in the present invention, a silicon polycrystal raw material having an isotope ²⁸ Si content of 92.3% or more is used. Such a polycrystalline raw material can be produced by a conventional gas diffusion method or the like. Moreover, 94% or more is preferable to make the thermal conductivity and carrier mobility sufficiently high, and 98% or more is more preferable. Since the isotope content of the single crystal to be grown is almost determined by the isotope content of the raw material polycrystal, the quartz crucible and the seed crystal can be made of silicon having a natural isotope content. and if even seed crystal content of isotopes ^{28 Si} using the more than 92.3%, can be the content of isotopes ^{28 Si} single crystal is grown as reliably high.

Even when the content of the isotope ²⁸ Si is 92.3% or more by doping carbon during the growth of the single crystal, the oxygen precipitation heat treatment, which is a subsequent step, is performed in the silicon single crystal. Oxygen precipitation is further promoted, and the oxygen precipitate density can be further increased. The carbon concentration is doped in the range of 0.1 to 5 ppma. This is because a concentration of 0.1 ppma or more is required to obtain the effect of promoting oxygen precipitation, and if it exceeds 5 ppma, single crystallization is hindered during single crystal growth. That is, when the carbon concentration is 0.1 to 5 ppma, a single crystal having sufficient oxygen precipitation effect and high crystallinity can be obtained. In order to dope carbon at such a predetermined concentration, when pulling up a normal CZ single crystal, a carbon rod is introduced at the same time as the silicon polycrystalline raw material, or a silicon melt is brought into contact with a silicon melt for a predetermined time, A method of mixing a gas containing carbon such as CO with the atmosphere gas at the time of crystal growth may be used, and the calculation can be performed in consideration of the segregation coefficient of carbon, and the concentration can be controlled to a desired level. At this time, in order to make the silicon single crystal have a desired resistivity, a resistivity adjusting dopant such as boron or phosphorus can be doped together.

At this time, it is preferable that the silicon single crystal rod to be grown is doped with nitrogen at a concentration of 1 × 10 ^{13 to} 5 × 10 ¹⁵ atoms / cm ³ . By doping nitrogen in this manner, growth of grown-in defects introduced during crystal growth can be suppressed, and the density of oxygen precipitates can be increased as in the case of carbon. In addition, since growth of grow-in defects can be suppressed, the crystal growth rate can be increased. Therefore, there is no need to reduce the pulling rate of the single crystal, for example, 0.4 mm / min or less as in the prior art. Productivity can be greatly improved.

Doping nitrogen into a silicon single crystal promotes the aggregation of oxygen atoms in the silicon, promotes oxygen precipitation, and increases the density of oxygen precipitates. This is thought to be due to the shift to non-uniform formation with nuclei. Therefore, the concentration of nitrogen to be doped is preferably 1 × 10 ¹³ atoms / cm ³ or more in order to sufficiently cause heterogeneous nucleation.

On the other hand, when the nitrogen concentration exceeds 5 × 10 ¹⁵ atoms / cm ³ , which is the solid solution limit in the silicon single crystal, the single crystallization of the silicon single crystal itself is inhibited, so that this concentration is not exceeded. Is preferred. Furthermore, it is more preferable that the nitrogen concentration to be doped is 1 × 10 ¹³ to 1 × 10 ¹⁴ atoms / cm ³ . This is because if the nitrogen concentration is 1 × 10 ¹³ atoms / cm ³ or more, oxygen precipitation nuclei stable at high temperatures are reliably formed in the as-grown state, and the nitrogen concentration is 1 × 10 ¹⁴ atoms / cm 3. If it is ³ or less, crystal defects such as SF formed in the epitaxial layer are remarkably suppressed when the epitaxial layer is grown on the surface of the wafer produced from now.

  Nitrogen can be easily doped by introducing a nitride such as a silicon wafer having a silicon nitride film formed on the surface thereof into a raw material polycrystal of a quartz crucible. Nitride may be introduced into the substrate, or the atmosphere gas during crystal growth may be an atmosphere containing nitrogen or the like. Further, the concentration of nitrogen doped in the crystal to be grown can be obtained by calculation from the amount of nitride introduced into the raw material polycrystal or the crucible, the concentration of nitrogen gas or the like, the introduction time, and the nitrogen segregation coefficient. .

  Further, it is preferable to grow the silicon single crystal so that the initial interstitial oxygen concentration of the silicon single crystal is 20 ppma or less. In this way, by making the oxygen concentration in the silicon single crystal 20 ppma or less, the OSF nuclei are reliably controlled and the growth of crystal defects is further suppressed, and oxygen precipitates in the surface layer are reduced. The formation of can be suppressed. Moreover, it is preferable that the initial interstitial oxygen concentration is 8 ppma or more because oxygen precipitates are reliably generated in the wafer bulk portion, and a sufficient IG effect can be obtained.

  A conventional method may be used to set the interstitial oxygen concentration to the above value. For example, the amount of oxygen melted from the crucible can be adjusted by appropriately adjusting the rotation speed of the crucible, increasing the flow rate of introduced atmosphere gas, lowering the atmospheric pressure, and the temperature distribution and convection of the silicon melt. Therefore, a desired low oxygen concentration crystal can be obtained.

  At this time, the diameter of the silicon single crystal rod to be grown is preferably 200 mm or more. In this way, it is possible to manufacture a silicon single crystal wafer having a diameter of 200 mm or more suitable for manufacturing a desired semiconductor device with a high yield, and in particular, 200 mm, 300 mm, or more, whose demand has been increasing in recent years. Large-diameter silicon wafers can be manufactured.

Thus, it is possible to grow a silicon single crystal rod having a content of isotope ²⁸ Si of 92.3% or more and having desired carbon, nitrogen, and oxygen concentrations. This single crystal rod is sliced with a cutting device such as an inner peripheral slicer or a wire saw according to a normal method, and then processed into a silicon single crystal wafer through processes such as chamfering, lapping, etching, and polishing. Of course, these steps are merely exemplified and enumerated, and there are various other steps such as washing and heat treatment. Changing the order of steps and omitting some steps can be appropriately performed according to the purpose. The silicon single crystal wafer thus obtained has an isotope ²⁸ Si content of 92.3% or more, high thermal conductivity, good heat dissipation, and the generation of oxygen precipitates on the surface is suppressed. Therefore, it becomes a high-quality silicon single crystal wafer with no deterioration of crystallinity caused by it.

Next, before forming a semiconductor element on the silicon single crystal wafer thus obtained, the silicon single crystal wafer is subjected to heat treatment at a temperature between 900 ° C. and the melting point of silicon, preferably 1100 ° C. to 1250 ° C. Apply. By performing heat treatment in such a temperature range, carbon, nitrogen, and oxygen in the surface layer portion of the silicon single crystal wafer can be diffused outward, so that generation of defects due to oxygen precipitates in the surface layer can be prevented and ensured. A DZ layer can be formed. This heat treatment may be performed in a single step or a plurality of steps at different temperatures as long as the temperature is between 900 ° C. and the melting point of silicon. In particular, the silicon single crystal wafer of the present invention has a content of isotope ²⁸ Si of 92.3% or more, and can suppress generation of oxygen precipitation nuclei particularly in a region where oxygen is outwardly diffused. Even when an epitaxial layer is formed on a wafer, it is possible to effectively prevent an adverse effect on the crystallinity of the epitaxial layer.

And since carbon is doped at 0.1 ppma or more in the bulk part of the wafer, even if the device is formed at a high temperature of 1000 ° C. or more, for example, oxygen precipitation nuclei do not disappear and oxygen precipitation after the oxygen precipitation heat treatment A silicon single crystal wafer having a value sufficient to realize a high IG effect with an object (BMD) density of 1 × 10 ⁸ pieces / cm ³ or more can be more reliably produced. If the oxygen precipitate density is too high, the wafer may be warped, deformed, cracked, etc., and it is preferable not to exceed 5 × 10 ⁹ pieces / cm ³ .
In addition, although the oxygen precipitation nucleus in an as-grown state cannot be measured directly, it can evaluate indirectly by measuring the oxygen precipitation density after performing oxygen precipitation heat processing.

  In addition, as an apparatus used for the heat treatment, if a rapid heating / cooling apparatus using a heating method such as a lamp heater known as an RTA (Rapid Thermal Annealing) apparatus is used, the apparatus can be processed with high productivity. In addition, since the temperature can be raised and lowered rapidly, no crystal defects due to oxygen precipitation or the like are newly generated during the raising or lowering temperature. If the heat treatment time at this time is 5 seconds or more, oxygen, carbon, and nitrogen in the wafer surface layer portion can be sufficiently diffused outward, so that crystal defects can be surely eliminated. For example, if it is performed in a resistance heating furnace such as a heater heating method, the heat treatment time is somewhat longer, but since it is a batch method, a large number of wafers (for example, 100 wafers) can be heat treated at a time. The heat treatment time at this time is preferably 10 minutes or longer.

  The atmosphere for the heat treatment can be performed in oxygen, hydrogen, nitrogen, argon, or a mixed gas thereof. When the atmosphere is oxygen, OSF nuclei on the wafer surface may grow depending on the heat treatment conditions, and an oxide film is formed on the surface. If an oxide film is formed on the surface, a step for removing the oxide film is required. Therefore, an atmosphere in which no film is formed, such as hydrogen or argon, is more preferable.

FIG. 1 is a schematic view showing an example of a rapid heating / rapid cooling apparatus for a silicon wafer used in the present invention. The heat treatment by the heat treatment apparatus 10 is performed as follows.
First, a wafer (not shown) disposed adjacent to the heat treatment apparatus 10 while maintaining the inside of the bell jar 1 at a desired temperature from 900 ° C. to the melting point of silicon in an atmosphere such as argon gas by the heaters 2 and 2 ′. A silicon wafer to be processed by the handling apparatus is inserted from the insertion port of the water cooling chamber 4, and the wafer is placed on the stage 7 which is kept waiting at the lowermost position via, for example, a SiC boat. At this time, since the water cooling chamber 4 and the base plate 5 are water cooled, the wafer is not heated at this position.
When the placement of the wafer on the stage 7 is completed, the stage 7 is raised to the position of the desired temperature by immediately inserting the support shaft 6 into the furnace by the motor 9, and the silicon on the stage 7. High temperature heat treatment is applied to the wafer. At this time, since the rise takes only about 20 seconds, for example, the silicon wafer is rapidly heated.
Then, after the heat treatment is stopped at a desired temperature position for a desired heat treatment time of, for example, 5 seconds or more, the support shaft 6 is immediately pulled out of the furnace by the motor 9 and rapidly cooled. Finally, the wafer is taken out by the wafer handling apparatus and the heat treatment is completed. Further, when there is a wafer to be heat-treated, since the temperature of the heat treatment apparatus 10 is not lowered, the wafers can be successively put into the heat treatment.

The silicon single crystal wafer thus heat-treated can be a wafer having very few crystal defects in the surface layer portion, good device electrical characteristics, high heat dissipation effect, high device operation speed, and almost no deterioration. In particular, an ultra-low defect DZ layer having a LSTD of 50 nm or more in a region from the surface to a depth of at least 5 μm and having a size of 0.05 / cm ² or less can be obtained, while in the wafer bulk portion, after oxygen precipitation heat treatment It becomes a value sufficient to realize a high IG effect of oxygen precipitate density of 1 × 10 ⁸ pieces / cm ³ or more, and it becomes a silicon single crystal wafer having high heat dissipation and high carrier mobility.

Hereinafter, the present invention will be described more specifically with reference to examples and comparative examples, but the present invention is not limited to these examples.
(Example 1, Comparative Example 1)
As Example 1, a silicon polycrystalline material having an isotope ²⁸ Si content of 98% or more in which a predetermined concentration of boron is added to a quartz crucible having a diameter of 450 mm is introduced, and at the same time, a silicon wafer having a carbon rod and a silicon nitride film. And put it in. Then, a crystal rod having a diameter of 200 mm, P-type, and orientation <100> was pulled at a normal pulling speed of 1.0 mm / min by the CZ method. Further, as Comparative Example 1, a silicon polycrystal raw material having a normal content of isotope ²⁸ Si (92.23%, which is the same as that existing in nature) was used, and the same crystal as in Example 1 was pulled up under other conditions. In both the crystals of Example 1 and Comparative Example 1, the rotational speed of the crucible being pulled was adjusted so that the interstitial oxygen concentration in the single crystal was 16 ppma (JEIDA). It should be noted that the silicon isotope content is changed from a natural one only by using a silicon polycrystalline raw material, and ordinary crucibles, seed crystals and the like whose isotopic contents are not changed are used.

The carbon and nitrogen concentrations in the tail of the crystal rod were measured by FT-IR, respectively, and found to be 3 ppma and 1.0 × 10 ¹⁴ atoms / cm ³ (since the segregation coefficients of carbon and nitrogen are small, the straight cylinder of the crystal rod The density of the part is below this value). Moreover, when oxygen concentration was measured by FT-IR, it was confirmed that both the crystals of Example 1 and Comparative Example 1 had an oxygen concentration of 16 ppma.

  A wafer was cut out from the two single crystal rods of Example 1 and Comparative Example 1 using a wire saw, and chamfering, lapping, etching, and mirror polishing were performed to prepare 10 silicon single crystal mirror wafers. When the resistivity of this silicon single crystal wafer was measured, both were about 10 Ω · cm.

  Next, the wafer was subjected to a rapid heating / cooling heat treatment at 1200 ° C. for 10 seconds using a rapid heating / rapid cooling apparatus (AST-2, SHS-2800) as shown in FIG. The atmosphere gas was a 100% argon gas atmosphere. The wafer after heat treatment was subjected to measurement of grown-in defects (LSTD) having a size of 50 nm or more existing up to a depth of 5 μm by MO-601.

As a result, the wafers produced in Example 1 were 4 to 8 pieces / 200 mm wafers (about 0.012 to 0.024 pieces / cm ² ), and the wafers produced in Comparative Example 1 were 12 to 22 pieces / 200 mm. Wafers with extremely low defects were obtained compared to wafers (about 0.038 to 0.069 / cm ² ).

  Next, the wafer was subjected to a heat treatment at 1000 ° C. for 10 hours to diffuse out the carbon, nitrogen or oxygen on the wafer surface and grow oxygen precipitates in the bulk. The atmosphere gas was a 100% argon gas atmosphere.

The wall of the wafer after the heat treatment was opened, and the density of oxygen precipitates in the bulk portion of the wafer on the wall opening surface (wafer cross section) was measured by MO-601. As a result, the oxygen precipitate density of the wafer manufactured according to Example 1 is about 4 to 8 × 10 ⁸ pieces / cm ³ , and the density of the wafer manufactured according to Comparative Example 1 is 6 to 11 × 10 ⁸ pieces / cm 3. ^Although it was slightly lower than about ^3, it was found that a silicon single crystal wafer having a sufficient IG effect can be produced even with the method and wafer of the present invention. That is, a wafer with very few wafer surface defects and a large BMD in the bulk part could be produced.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

  For example, when growing a silicon single crystal rod doped with carbon by the Czochralski method in the present invention, it does not matter whether a magnetic field is applied to the melt, and the Czochralski method of the present invention. Includes an MCZ method in which a so-called magnetic field is applied.

It is the schematic which showed an example of the apparatus which can rapidly heat and cool a silicon wafer.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Berja, 2, 2 '... Heating heater, 3 ... Housing, 4 ... Water cooling chamber,
5 ... Base plate, 6 ... Support shaft, 7 ... Stage, 8 ... Silicon wafer,
9 ... motor, 10 ... heat treatment apparatus.

Claims (11)

A method for producing a silicon single crystal wafer, wherein at least a silicon polycrystal raw material having a content of isotope ²⁸ Si of 92.3% or more is used, and a carbon concentration is 0.1 to 5 ppma by a Czochralski method. The silicon single crystal rod is grown so that the grown silicon single crystal rod is sliced and processed into a wafer, and the processed wafer is at least between 900 ° C. and the melting point of silicon at least before the semiconductor element manufacturing process. A method for producing a silicon single crystal wafer, characterized by performing a heat treatment at a temperature of The silicon single crystal rod to be grown is doped with nitrogen, and the silicon single crystal is grown so that the nitrogen concentration is 1 × 10 ^{13 to} 5 × 10 ¹⁵ atoms / cm ^3. A method for manufacturing a silicon single crystal wafer.   3. The method for producing a silicon single crystal wafer according to claim 1, wherein the silicon single crystal is grown so that an initial interstitial oxygen concentration of the silicon single crystal to be grown is 20 ppma or less.   The method for manufacturing a silicon single crystal wafer according to any one of claims 1 to 3, wherein the heat treatment is performed in an atmosphere of oxygen, hydrogen, nitrogen, argon, or a mixed gas thereof.   5. The method for producing a silicon single crystal wafer according to claim 1, wherein the heat treatment is performed in a resistance heating furnace for at least 10 minutes or in a rapid heating furnace for at least 5 seconds.   A silicon single crystal wafer manufactured by the manufacturing method according to any one of claims 1 to 5. It is a wafer made from a silicon single crystal grown by the Czochralski method, comprising at least an isotope ²⁸ Si content of 92.3% and a carbon concentration of 0.1 to 5 ppma And a density of LSTDs having a size of 50 nm or more in a region from the wafer surface to a depth of at least 5 μm is 0.03 pieces / cm ² or less. 8. The silicon single crystal wafer according to claim 7, wherein a nitrogen concentration in the silicon single crystal wafer is 1 × 10 ^{13 to} 5 × 10 ¹⁵ atoms / cm ³ .   9. The silicon single crystal wafer according to claim 7, wherein an initial interstitial oxygen concentration in the silicon single crystal wafer is 20 ppma or less. The bulk part of the silicon single crystal wafer has a BMD density of 1.0 × 10 ⁸ pieces / cm ³ or more, and is described in any one of claims 7 to 9. Silicon single crystal wafer.   The silicon single crystal wafer according to any one of claims 7 to 10, wherein the silicon single crystal wafer has a diameter of 200 mm or more.

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