[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

JP2005072084A5 - - Google Patents

Download PDF

Info

Publication number
JP2005072084A5
JP2005072084A5 JP2003209311A JP2003209311A JP2005072084A5 JP 2005072084 A5 JP2005072084 A5 JP 2005072084A5 JP 2003209311 A JP2003209311 A JP 2003209311A JP 2003209311 A JP2003209311 A JP 2003209311A JP 2005072084 A5 JP2005072084 A5 JP 2005072084A5
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003209311A
Other versions
JP2005072084A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2003209311A priority Critical patent/JP2005072084A/ja
Priority claimed from JP2003209311A external-priority patent/JP2005072084A/ja
Priority to US10/699,676 priority patent/US7049661B2/en
Publication of JP2005072084A publication Critical patent/JP2005072084A/ja
Publication of JP2005072084A5 publication Critical patent/JP2005072084A5/ja
Priority to US11/331,316 priority patent/US7095081B2/en
Priority to US11/455,700 priority patent/US7323748B2/en
Pending legal-status Critical Current

Links

JP2003209311A 2003-08-28 2003-08-28 半導体装置及びその製造方法 Pending JP2005072084A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2003209311A JP2005072084A (ja) 2003-08-28 2003-08-28 半導体装置及びその製造方法
US10/699,676 US7049661B2 (en) 2003-08-28 2003-11-04 Semiconductor device having epitaxial layer
US11/331,316 US7095081B2 (en) 2003-08-28 2006-01-13 Semiconductor device and manufacturing method thereof
US11/455,700 US7323748B2 (en) 2003-08-28 2006-06-20 Semiconductor device having epitaxial layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003209311A JP2005072084A (ja) 2003-08-28 2003-08-28 半導体装置及びその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2008110539A Division JP2008182281A (ja) 2008-04-21 2008-04-21 半導体装置

Publications (2)

Publication Number Publication Date
JP2005072084A JP2005072084A (ja) 2005-03-17
JP2005072084A5 true JP2005072084A5 (ja) 2005-11-17

Family

ID=34209027

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003209311A Pending JP2005072084A (ja) 2003-08-28 2003-08-28 半導体装置及びその製造方法

Country Status (2)

Country Link
US (3) US7049661B2 (ja)
JP (1) JP2005072084A (ja)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3943932B2 (ja) * 2001-12-27 2007-07-11 株式会社東芝 半導体装置の製造方法
JP4322706B2 (ja) * 2004-02-27 2009-09-02 株式会社東芝 半導体装置の製造方法
US6995456B2 (en) * 2004-03-12 2006-02-07 International Business Machines Corporation High-performance CMOS SOI devices on hybrid crystal-oriented substrates
JP4177775B2 (ja) * 2004-03-16 2008-11-05 株式会社東芝 半導体基板及びその製造方法並びに半導体装置
US7118986B2 (en) * 2004-06-16 2006-10-10 International Business Machines Corporation STI formation in semiconductor device including SOI and bulk silicon regions
JP3998677B2 (ja) * 2004-10-19 2007-10-31 株式会社東芝 半導体ウェハの製造方法
US7105897B2 (en) * 2004-10-28 2006-09-12 Taiwan Semiconductor Manufacturing Company Semiconductor structure and method for integrating SOI devices and bulk devices
US8012847B2 (en) * 2005-04-01 2011-09-06 Micron Technology, Inc. Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry
JP4231909B2 (ja) * 2005-07-22 2009-03-04 セイコーエプソン株式会社 半導体装置の製造方法
US7608515B2 (en) * 2006-02-14 2009-10-27 Taiwan Semiconductor Manufacturing Company, Ltd. Diffusion layer for stressed semiconductor devices
JP5145691B2 (ja) * 2006-02-23 2013-02-20 セイコーエプソン株式会社 半導体装置
US7285480B1 (en) * 2006-04-07 2007-10-23 International Business Machines Corporation Integrated circuit chip with FETs having mixed body thicknesses and method of manufacture thereof
US7777275B2 (en) * 2006-05-18 2010-08-17 Macronix International Co., Ltd. Silicon-on-insulator structures
FR2910700B1 (fr) * 2006-12-21 2009-03-20 Commissariat Energie Atomique PROCEDE DE FABRICATION D'UN SUBSTRAT SOI ASSOCIANT DES ZONES A BASE DE SILICIUM ET DES ZONES A BASE DE GaAs
US7772048B2 (en) * 2007-02-23 2010-08-10 Freescale Semiconductor, Inc. Forming semiconductor fins using a sacrificial fin
JP4737255B2 (ja) * 2007-11-20 2011-07-27 株式会社デンソー Ｓｏｉ基板を用いた半導体装置
US8278731B2 (en) * 2007-11-20 2012-10-02 Denso Corporation Semiconductor device having SOI substrate and method for manufacturing the same
US8211786B2 (en) * 2008-02-28 2012-07-03 International Business Machines Corporation CMOS structure including non-planar hybrid orientation substrate with planar gate electrodes and method for fabrication
US20100102393A1 (en) * 2008-10-29 2010-04-29 Chartered Semiconductor Manufacturing, Ltd. Metal gate transistors
JP4987918B2 (ja) * 2009-08-27 2012-08-01 株式会社東芝 不揮発性半導体記憶装置および不揮発性半導体記憶装置の製造方法
US8105956B2 (en) 2009-10-20 2012-01-31 Micron Technology, Inc. Methods of forming silicon oxides and methods of forming interlevel dielectrics
JP5841752B2 (ja) * 2010-07-02 2016-01-13 株式会社半導体エネルギー研究所 半導体装置
CN102376551B (zh) * 2010-08-19 2015-12-16 中国科学院微电子研究所 半导体器件结构的制造方法及其结构
US8329051B2 (en) 2010-12-14 2012-12-11 Lam Research Corporation Method for forming stair-step structures
JP5736296B2 (ja) * 2011-10-03 2015-06-17 セイコーインスツル株式会社 半導体装置の製造方法
DE102011087681A1 (de) * 2011-12-02 2013-06-27 Ihp Gmbh - Innovations For High Performance Microelectronics / Leibniz-Institut Für Innovative Mikroelektronik Hetero-Substrat zur Herstellung von integrierten Schaltkreisen mit optischen, opto-elektronischen und elektronischen Komponenten
JP5944149B2 (ja) * 2011-12-05 2016-07-05 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US8664050B2 (en) 2012-03-20 2014-03-04 International Business Machines Corporation Structure and method to improve ETSOI MOSFETS with back gate
US8975168B2 (en) * 2013-05-28 2015-03-10 Stmicroelectronics, Inc. Method for the formation of fin structures for FinFET devices
US20150041820A1 (en) * 2013-08-12 2015-02-12 Philippe Renaud Complementary gallium nitride integrated circuits and methods of their fabrication
KR102203033B1 (ko) * 2013-12-18 2021-01-14 인텔 코포레이션 평면형 이종 디바이스
US20150263040A1 (en) * 2014-03-17 2015-09-17 Silicon Storage Technology, Inc. Embedded Memory Device With Silicon-On-Insulator Substrate, And Method Of Making Same
US9431407B2 (en) * 2014-09-19 2016-08-30 Silicon Storage Technology, Inc. Method of making embedded memory device with silicon-on-insulator substrate
US9673057B2 (en) 2015-03-23 2017-06-06 Lam Research Corporation Method for forming stair-step structures
CN104952734B (zh) * 2015-07-16 2020-01-24 矽力杰半导体技术(杭州)有限公司 半导体结构及其制造方法
US9634020B1 (en) 2015-10-07 2017-04-25 Silicon Storage Technology, Inc. Method of making embedded memory device with silicon-on-insulator substrate
US9691787B2 (en) * 2015-10-08 2017-06-27 Globalfoundries Inc. Co-fabricated bulk devices and semiconductor-on-insulator devices
US9741563B2 (en) 2016-01-27 2017-08-22 Lam Research Corporation Hybrid stair-step etch
US10109638B1 (en) * 2017-10-23 2018-10-23 Globalfoundries Singapore Pte. Ltd. Embedded non-volatile memory (NVM) on fully depleted silicon-on-insulator (FD-SOI) substrate
JP7163175B2 (ja) * 2018-12-26 2022-10-31 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
CN113629144B (zh) 2020-05-08 2023-07-07 长鑫存储技术有限公司 半导体器件及其制备方法

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07106434A (ja) 1993-10-05 1995-04-21 Mitsubishi Electric Corp 半導体記憶装置及びその製造方法
US5399507A (en) 1994-06-27 1995-03-21 Motorola, Inc. Fabrication of mixed thin-film and bulk semiconductor substrate for integrated circuit applications
JPH08316431A (ja) 1995-05-22 1996-11-29 Hitachi Ltd 半導体装置とその製造方法
JPH10303385A (ja) 1997-04-25 1998-11-13 Texas Instr Inc <Ti> Ｓｉｍｏｘまたは貼り合わせｓｏｉ基板上に作成したハイブリッド素子及びその製造方法
US5894152A (en) 1997-06-18 1999-04-13 International Business Machines Corporation SOI/bulk hybrid substrate and method of forming the same
JPH11238860A (ja) 1998-02-19 1999-08-31 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP4258034B2 (ja) * 1998-05-27 2009-04-30 ソニー株式会社 半導体装置及び半導体装置の製造方法
JP2000091534A (ja) 1998-09-11 2000-03-31 Mitsubishi Electric Corp 半導体装置
US6214694B1 (en) * 1998-11-17 2001-04-10 International Business Machines Corporation Process of making densely patterned silicon-on-insulator (SOI) region on a wafer
US6180486B1 (en) 1999-02-16 2001-01-30 International Business Machines Corporation Process of fabricating planar and densely patterned silicon-on-insulator structure
US6214653B1 (en) * 1999-06-04 2001-04-10 International Business Machines Corporation Method for fabricating complementary metal oxide semiconductor (CMOS) devices on a mixed bulk and silicon-on-insulator (SOI) substrate
JP3984014B2 (ja) * 2001-09-26 2007-09-26 株式会社東芝 半導体装置用基板を製造する方法および半導体装置用基板
JP4322453B2 (ja) * 2001-09-27 2009-09-02 株式会社東芝 半導体装置およびその製造方法
JP3943932B2 (ja) * 2001-12-27 2007-07-11 株式会社東芝 半導体装置の製造方法
US6630714B2 (en) * 2001-12-27 2003-10-07 Kabushiki Kaisha Toshiba Semiconductor device formed in semiconductor layer arranged on substrate with one of insulating film and cavity interposed between the substrate and the semiconductor layer
JP2003203967A (ja) * 2001-12-28 2003-07-18 Toshiba Corp 部分ｓｏｉウェーハの製造方法、半導体装置及びその製造方法
JP2003243528A (ja) * 2002-02-13 2003-08-29 Toshiba Corp 半導体装置
JP3944087B2 (ja) * 2003-01-21 2007-07-11 株式会社東芝 素子形成用基板の製造方法
JP3974542B2 (ja) * 2003-03-17 2007-09-12 株式会社東芝 半導体基板の製造方法および半導体装置の製造方法
JP3998677B2 (ja) 2004-10-19 2007-10-31 株式会社東芝 半導体ウェハの製造方法

Similar Documents

Publication Publication Date Title
BE2014C055I2 (ja)
BE2014C027I2 (ja)
BE2014C003I2 (ja)
BE2013C075I2 (ja)
BE2013C069I2 (ja)
BE2013C067I2 (ja)
BE2013C038I2 (ja)
BE2013C036I2 (ja)
JP2003235880A5 (ja)
BE2013C034I2 (ja)
JP2004054935A5 (ja)
BE2015C005I2 (ja)
JP2004197741A5 (ja)
JP2004003828A5 (ja)
JP2004028096A5 (ja)
JP2004222069A5 (ja)
JP2004002012A5 (ja)
JP2004006871A5 (ja)
JP2004140808A5 (ja)
JP2003241881A5 (ja)
JP2004041706A5 (ja)
JP2004005517A5 (ja)
JP2003283926A5 (ja)
AU2002239060A1 (ja)
AU2002245368A1 (ja)