JP2004006644A - Semiconductor device and its fabricating method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device comprising semiconductor elements or semiconductor element groups capable of high speed operation and having large current drive power in which variations are suppressed between the elements by forming a crystalline semiconductor film where a crystal grain field does not exist as much as possible at least in the channel forming region on an insulating surface. <P>SOLUTION: An insulation film having an opening is formed on a substrate having an insulating surface, and a polycrystalline semiconductor film where an amorphous semiconductor film or a crystal grain boundary exists arbitrarily on the insulation film and over the opening is formed. Subsequently, molten semiconductor is poured into the opening of the insulation film which is thereby melted and crystallized or recrystallized thus forming a crystalline semiconductor film. The crystalline semiconductor film extending to a region other than the opening is then removed and the crystalline semiconductor film is left at the opening thus forming a gate insulation film and a gate electrode touching the upper surface part of the crystalline semiconductor film. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device formed using a semiconductor film having a crystal structure and a method for manufacturing the same, particularly including a field-effect transistor in which a channel formation region is formed using a crystalline semiconductor film formed over an insulating surface. The present invention relates to a semiconductor device and a manufacturing method thereof.
[0002]
[Prior art]
There is known a technique in which an amorphous semiconductor film is formed on an insulating substrate made of glass or the like and crystallized by irradiation with a laser beam. A thin film transistor (hereinafter, referred to as a TFT) manufactured using a semiconductor film having a crystal structure (a crystalline semiconductor film) is applied to a flat display device (flat panel display) represented by a liquid crystal display device.
[0003]
The application of laser light in the semiconductor manufacturing process is a technique for recrystallizing a damaged layer or an amorphous layer formed on a semiconductor substrate or a semiconductor film, and a technique for crystallizing an amorphous semiconductor film formed on an insulating surface. Has been expanded to. As a laser oscillation device to be applied, a gas laser typified by an excimer laser or a solid laser typified by a YAG laser is usually used.
[0004]
One example of crystallization of an amorphous semiconductor film by irradiation with laser light is to set the scanning speed of laser light to a beam spot diameter × 5000 / sec or more without bringing the amorphous semiconductor film into a completely molten state by high-speed scanning. There are known a method of polycrystallization (for example, see Patent Document 1) and a method of processing and irradiating a linear beam with an optical system using a laser processing apparatus (for example, see Patent Document 2). ).
[0005]
Further, Nd: YVO ₄ A solid-state laser oscillator such as a laser is used to irradiate the amorphous semiconductor film with laser light that is the second harmonic thereof to form a crystalline semiconductor film having a larger crystal grain size as compared with the conventional one, thereby manufacturing a TFT. A technique is disclosed (for example, refer to Patent Document 3).
[0006]
[Patent Document 1]
JP-A-62-104117
[Patent Document 2]
JP-A-8-195357
[Patent Document 3]
JP 2001-144027 A
[0007]
[Problems to be solved by the invention]
However, in order to form a high-quality crystalline semiconductor film with a small number of defects, crystal grain boundaries or crystal sub-grain boundaries, and a uniform orientation on an insulating surface, as is known as a zone melting method or the like. The mainstream method has been to recrystallize a semiconductor film on a single crystal substrate by heating the semiconductor film to a high temperature to obtain a molten state.
[0008]
Since the step of the base is used as in the known graphoepitaxy technique, it is considered that the problem is that crystals grow along the step and the step remains on the surface of the formed single crystal semiconductor film. Have been. Furthermore, a single crystal semiconductor film cannot be formed on a glass substrate having a relatively low strain point by using graphoepitaxy.
[0009]
On the other hand, when an amorphous semiconductor film formed on a flat surface is crystallized by irradiating a laser beam with a laser beam, the crystal becomes polycrystalline, and defects such as crystal grain boundaries are formed arbitrarily and crystals with uniform alignment are formed. I couldn't get it.
[0010]
It is considered that a large number of crystal defects are generated at the crystal grain boundaries and serve as carrier traps, which cause a decrease in the mobility of electrons or holes. Further, a semiconductor film free from defects such as volume shrinkage of a semiconductor caused by crystallization, thermal stress with a base, lattice mismatch, and the like, and a crystal grain boundary or a sub-grain boundary cannot be formed. Therefore, except for the bonded SOI (Silicon on Insulator), the same quality as a MOS transistor formed on a single crystal substrate can be obtained with a crystalline semiconductor film formed on an insulating surface and crystallized or recrystallized. I couldn't do that.
[0011]
In any case, it was impossible to form a crystalline semiconductor film having no volume shrinkage of the semiconductor caused by crystallization, defects due to thermal stress or lattice mismatch with the base, and no grain boundaries or sub-grain boundaries. Therefore, except for the bonded SOI (Silicon on Insulator), the same quality as a MOS transistor formed on a single crystal substrate can be obtained with a crystalline semiconductor film formed on an insulating surface and crystallized or recrystallized. I couldn't do that.
[0012]
For example, when a TFT is formed by forming a semiconductor film on a glass substrate, the TFT is arranged independently of an arbitrarily formed crystal grain boundary, and the crystallinity of a channel forming region of the TFT is strictly controlled. However, the characteristics are degraded due to arbitrarily interposed crystal grain boundaries and crystal defects, and individual element characteristics are varied.
[0013]
The present invention has been made in view of the above problems, and forms a crystalline semiconductor film in which a crystal grain boundary does not exist as much as possible in at least a channel formation region on an insulating surface, enables high-speed operation, and has a high current driving capability. It is another object of the present invention to provide a semiconductor device including a semiconductor element or a semiconductor element group having small variations among a plurality of elements.
[0014]
[Means for Solving the Problems]
In order to solve the above problems, the present invention forms an insulating film provided with an opening over a substrate having an insulating surface, and an amorphous semiconductor film or a crystal grain boundary is arbitrarily formed over the insulating film and the opening. An existing semiconductor film having a polycrystalline structure is formed, and a crystalline semiconductor film is formed so as to fill an opening thereof. That is, the semiconductor film is melted and then crystallized or recrystallized so that the melted semiconductor flows into the opening of the insulating film to form a crystalline semiconductor film. Then, the crystalline semiconductor film extending to a region other than the opening is removed to leave the crystalline semiconductor film in the opening, and a gate insulating film and a gate electrode in contact with the upper surface of the crystalline semiconductor film are formed. It is characterized by the following.
[0015]
The opening may be formed by directly etching the surface of the insulating substrate, or may be formed by using a silicon oxide, silicon nitride, silicon oxynitride film, or the like and etching the film. The opening is preferably formed in accordance with the arrangement of the island-shaped semiconductor film including the channel forming region of the TFT, and is preferably formed so as to match at least the channel forming region. The opening extends in the channel length direction. The width of the opening (channel width direction in the case of forming a channel formation region) is 0.01 μm or more and 2 μm or less, preferably 0.1 to 1 μm, and the depth is 0.01 μm or more and 1 μm or less, preferably 0 μm or less. It is formed in a thickness of not less than 0.05 μm and not more than 0.2 μm.
[0016]
In the first stage, a semiconductor film formed over the insulating film and over the opening is formed by an amorphous semiconductor film or a polycrystalline semiconductor film formed by a plasma CVD method, a sputtering method, a low-pressure CVD method, or a solid phase growth. A polycrystalline semiconductor film or the like is used. Note that the term “amorphous semiconductor film” in the present invention means not only a film having a completely amorphous structure in a narrow sense, but also a state containing fine crystal grains, or a so-called microcrystalline semiconductor film, Includes a semiconductor film having a crystal structure. Typically, an amorphous silicon film is applied. In addition, an amorphous silicon germanium film, an amorphous silicon carbide film, or the like can be used. The polycrystalline semiconductor film is obtained by crystallizing these amorphous semiconductor films by a known method.
[0017]
As a means for melting and crystallizing the crystalline semiconductor film, a pulsed or continuous wave laser beam using a gas laser oscillator or a solid laser oscillator as a light source is used. The laser light to be irradiated is linearly condensed by an optical system, and its intensity distribution has a uniform region in the longitudinal direction and may have a distribution in the lateral direction. As the oscillation device, a rectangular beam solid laser oscillation device is applied, and particularly preferably, a slab laser oscillation device is applied. Alternatively, it is a solid-state laser oscillation device using a rod doped with Nd, Tm, and Ho, and in particular, YAG, YVO ₄ , YLF, YAlO ₃ A solid-state laser oscillation device using a crystal in which Nd, Tm, and Ho are doped into a crystal such as the above may be combined with a slab structure amplifier. As the slab material, crystals such as Nd: YAG, Nd: GGG (gadolinium / gallium / garnet), and Nd: GsGG (gadolinium / scandium / gallium / garnet) are used. In the slab laser, the laser beam travels in a zigzag optical path in this plate-shaped laser medium while repeating total reflection.
[0018]
Further, strong light corresponding thereto may be applied. For example, the light emitted from a halogen lamp, a xenon lamp, a high-pressure mercury lamp, a metal halide lamp, or an excimer lamp may be a light having a high energy density collected by a reflecting mirror or a lens.
[0019]
The laser light or intense light that is condensed linearly and extended in the longitudinal direction irradiates the crystalline semiconductor film, and relatively moves the irradiation position of the laser light and the substrate on which the crystalline semiconductor film is formed, The crystalline semiconductor film is melted by scanning a part or the entire surface of the crystalline semiconductor film with the laser light, and crystallization or recrystallization is performed through the state. The scanning direction of the laser light is along the longitudinal direction of the opening or the channel length direction of the transistor. Thereby, the crystal grows along the scanning direction of the laser light, and it is possible to prevent the crystal grain boundary or the crystal sub-grain boundary from intersecting with the channel length direction.
[0020]
The semiconductor device of the present invention manufactured as described above is provided with an insulating film having an opening formed on a substrate having an insulating surface, and a crystalline semiconductor film formed on the substrate is a region filling the opening. And the filling region is provided with a channel forming region. In addition, it is formed on the insulating surface, is connected between the pair of one conductivity type impurity regions, has a plurality of crystal orientations, and extends in a direction parallel to the channel length direction without forming crystal grain boundaries. A crystalline semiconductor film in which a plurality of existing crystal grains are aggregated, and the crystalline semiconductor film is embedded in an opening having a depth equal to or substantially equal to the thickness of the crystalline semiconductor film.
[0021]
In another structure, an insulating film provided with an opening extending in a channel length direction is provided over a substrate having an insulating surface, and a crystalline semiconductor film formed over the substrate has a region filling the opening. And a channel formation region is provided in the filling region, and the opening has a depth equal to or greater than that of the crystalline semiconductor film.
[0022]
That is, it is formed on the insulating surface, has a plurality of crystal orientations connected to a pair of one conductivity type impurity regions, and extends in a direction parallel to the channel length direction without forming a crystal grain boundary. A channel formation region is formed by a crystalline semiconductor film in which a plurality of crystal grains are aggregated and a conductive layer overlapping with the crystalline semiconductor film with an insulating layer interposed therebetween, and the crystalline semiconductor film is formed in a channel width direction. Is 0.01 μm to 2 μm, preferably 0.1 to 1 μm, and the thickness is 0.01 μm or more and 1 μm, preferably 0.05 to 0.2 μm, and the crystalline semiconductor film has the same or the same thickness. It is characterized by being buried in the opening.
[0023]
When the depth of the opening is substantially equal to the thickness of the semiconductor film, the semiconductor melted by irradiation with laser light or strong light is aggregated and solidified in the opening (that is, the concave portion) by surface tension. As a result, the thickness of the semiconductor film in the opening (ie, the projection) becomes thin, and stress strain can be concentrated there. The side surfaces of the opening have the effect of defining the crystal orientation to some extent. The angle of the side surface of the opening is 5 to 90 degrees with respect to the substrate surface, preferably 30 to 90 degrees. By scanning the laser light in a direction parallel to the channel length direction, a specific crystal orientation can be preferentially oriented along an opening extending in the direction.
[0024]
After the semiconductor film is melted by irradiation with laser light or strong light, solidification starts from a region where the bottom surface and the side surface of the opening intersect, from which crystal growth starts. For example, as a result of performing a thermal analysis simulation at points A to D in a system in which a stepped shape is formed by the insulating film (1) and the insulating film (2) as shown in FIG. 39, characteristics as shown in FIG. 40 are obtained. ing. Since there is both the insulating film (2) immediately below {circle around (1)} and the insulating film (1) existing on the side surface as a place where heat escapes, the temperature decreases at point B most quickly. Hereinafter, point A, point C, and point D are in that order. This simulation result is for the case where the angle of the side wall is 45 degrees, but the same phenomenon can be qualitatively observed when the angle is 90 degrees. That is, the semiconductor film is once brought into a molten state, aggregated in an opening formed on an insulating surface by surface tension, and crystal is grown from a substantially intersection of a bottom and a side wall of the opening, thereby causing distortion generated by crystallization to occur in the opening. Can be concentrated in other areas. That is, the crystalline semiconductor film formed so as to fill the opening can be free from distortion.
[0025]
The semiconductor film is brought into a molten state, aggregated in an opening formed on the insulating surface by surface tension, and crystal is grown from a general intersection of the bottom and the side of the opening, thereby distorting a strain caused by crystallization in other than the opening. You can concentrate on the area. That is, the crystalline semiconductor film formed so as to fill the opening can be released from distortion. Then, the crystalline semiconductor film which remains on the insulating film and includes crystal grain boundaries and crystal defects is removed by etching.
[0026]
According to the present invention, it is possible to form a crystalline semiconductor film having no crystal grain boundary by specifying the location of a channel formation region of a semiconductor element such as a transistor, particularly a TFT. As a result, it is possible to eliminate a factor in which the characteristics vary due to crystal grain boundaries or crystal defects that are inadvertently interposed, and it is possible to form a TFT or a TFT element group with small characteristic variations.
[0027]
BEST MODE FOR CARRYING OUT THE INVENTION
Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of the embodiments below.
[0028]
The present invention provides an insulating film in which an opening is provided over a substrate having an insulating surface, and an amorphous semiconductor film or a semiconductor film having a polycrystalline structure in which a crystal grain boundary exists arbitrarily over the insulating film and the opening. Is formed, and a crystalline semiconductor film is formed by filling the opening. First, the mode will be described with reference to FIG.
[0029]
The perspective view shown in FIG. 27 shows a mode in which a first insulating film 102 and second insulating films 103 to 105 patterned in a belt shape are formed on a substrate 101. Here, three strip-shaped patterns made of the second insulating film are shown, but the number is not limited to the number. As the substrate, a commercially available alkali-free glass substrate, a quartz substrate, a sapphire substrate, a substrate in which the surface of a single crystal or polycrystalline semiconductor substrate is covered with an insulating film, and a substrate in which the surface of a metal substrate is covered with an insulating film can be used.
[0030]
The width W1 of the band-shaped second insulating film is 0.1 to 10 μm (preferably 0.5 to 1 μm), and the interval W2 between adjacent second insulating films is 0.1 to 5 μm (preferably 0.5 to 1 μm). ), And the thickness d of the second insulating film is formed to be equal to or greater than the thickness of the non-single-crystal semiconductor film formed thereon. The step shape does not need to be a regular periodic pattern, and may be formed according to the arrangement and shape of the island-shaped semiconductor region including the channel formation region of the TFT. Therefore, the length L of the second insulating film is not limited, and may be any length that can form a channel formation region of a TFT, for example.
[0031]
The first insulating film is formed using silicon nitride or silicon oxynitride. Further, the second insulating film is formed using silicon oxide or silicon oxynitride. Silicon oxide is composed of tetraethyl orthosilicate (TEOS) and O ₂ Can be mixed and formed by a plasma CVD method. Silicon oxynitride film is SiH ₄ , NH ₃ , N ₂ O or SiH ₄ , N ₂ It can be formed by a plasma CVD method using O as a raw material.
[0032]
In the case where the unevenness due to the opening is formed by the first insulating film and the second insulating film as in the form of FIG. 27, the etching rate of the second insulating film is reduced in order to secure a selectivity in the etching process. It is desirable to appropriately adjust the material and the film forming conditions so as to be relatively fast. Further, it is desirable to have a blocking effect on alkali metal ions such as sodium. The angle of the side wall of the opening formed by the second insulating film may be appropriately set in the range of 5 to 90 degrees, preferably 30 to 90 degrees.
[0033]
As shown in FIG. 28, an amorphous semiconductor film 106 formed on the surface of the first insulating film 102 and the second insulating films 103 to 105 and covering the openings is formed to a thickness of 50 to 200 nm. As the amorphous semiconductor film, silicon, a compound or alloy of silicon and germanium, or a compound or alloy of silicon and carbon can be used.
[0034]
Then, the amorphous semiconductor film 106 is irradiated with continuous wave laser light to perform crystallization. The applied laser light is linearly condensed and expanded by an optical system, and its intensity distribution has a uniform region in the longitudinal direction and may have a distribution in the lateral direction. As the laser oscillation device used as the device, a rectangular beam solid laser oscillation device is applied, and particularly preferably, a slab laser oscillation device is applied. Alternatively, it is a solid-state laser oscillation device using a rod doped with Nd, Tm, and Ho, and in particular, YAG, YVO ₄ , YLF, YAlO ₃ A solid-state laser oscillation device using a crystal in which Nd, Tm, and Ho are doped into a crystal such as the above may be combined with a slab structure amplifier. Then, scanning is performed in a direction crossing the linear longitudinal direction. At this time, it is most desirable to scan in a direction parallel to the longitudinal direction of the band-shaped pattern formed on the base insulating film. Here, the term “linear” means that the ratio of the length in the longitudinal direction to the length in the lateral direction is 1:10 or more.
[0035]
As the slab material, crystals such as Nd: YAG, Nd: GGG (gadolinium / gallium / garnet), and Nd: GsGG (gadolinium / scandium / gallium / garnet) are used. In the slab laser, the laser beam travels in a zigzag optical path in this plate-shaped laser medium while repeating total reflection.
[0036]
The wavelength of the continuous wave laser light is preferably 400 to 700 nm in consideration of the light absorption coefficient of the amorphous semiconductor film. Light in such a wavelength band is obtained by extracting the second harmonic and the third harmonic of the fundamental wave using a wavelength conversion element. ADP (ammonium dihydrogen phosphate), Ba ₂ NaNb ₅ O _Fifteen (Sodium barium niobate), CdSe (selenium cadmium), KDP (potassium dihydrogen phosphate), LiNbO ₃ (Lithium niobate), Se, Te, LBO, BBO, KB5 and the like are applied. It is particularly desirable to use LBO. A typical example is Nd: YVO ₄ A second harmonic (532 nm) of a laser oscillation device (fundamental wave 1064 nm) is used. The laser oscillation mode is TEM ₀₀ Apply the single mode that is the mode.
[0037]
For silicon, which is chosen as the most suitable material, the absorption coefficient is 10 ³ -10 ⁴ cm ^-1 Is substantially in the visible light range. When crystallizing a substrate having a high visible light transmittance such as glass and an amorphous semiconductor film formed of silicon with a thickness of 30 to 200 nm, irradiation with light in a visible light region having a wavelength of 400 to 700 nm is performed. By selectively heating the semiconductor region, crystallization can be performed without damaging the base insulating film. Specifically, the penetration length of light having a wavelength of 532 nm is approximately 100 nm to 1000 nm with respect to the amorphous silicon film, and sufficiently reaches the inside of the amorphous semiconductor film 106 having a thickness of 30 nm to 200 nm. it can. That is, heating can be performed from the inside of the semiconductor film, and substantially the entire semiconductor film in the laser light irradiation region can be uniformly heated.
[0038]
The semiconductor melted by the irradiation of the laser beam is gathered in the opening (recess) due to the surface tension. In the solidified state, the surface becomes substantially flat as shown in FIG. Further, a crystal growth end, a crystal grain boundary, or a crystal sub-grain boundary is formed on the second insulating film (on the convex portion) (a region 110 shown by hatching in the figure). Thus, the crystalline semiconductor film 107 is formed.
[0039]
Thereafter, as shown in FIG. 30, the crystalline semiconductor film 107 is etched to form island-shaped semiconductor regions 108 and 109. At this time, as shown in FIG. 29, the high-quality semiconductor region can be left by removing the region 110 where the growth edge, crystal grain boundary, or crystal sub-grain boundary is concentrated by etching. Then, a gate insulating film and a gate electrode are formed so that a channel formation region is located using a crystalline semiconductor which fills the opening portions (concave portions) of the island-shaped semiconductor regions 108 and 109. Through these steps, the TFT can be completed.
[0040]
FIG. 2 is a conceptual diagram showing the knowledge of crystallization obtained from the experimental results by the present inventors. FIGS. 2A to 2E schematically illustrate the relationship between the depth and spacing of openings (recesses) formed by the first insulating film and the second insulating film and the crystal growth.
[0041]
Note that, with respect to the reference numerals related to the length shown in FIG. 2, t01: the thickness of the amorphous semiconductor film on the second insulating film (convex portion), t02: the thickness of the amorphous semiconductor film on the opening portion (concave portion), t11: thickness of the crystalline semiconductor film on the second insulating film (convex portion), t12: thickness of the crystalline semiconductor film on the opening portion (concave portion), d: thickness of the second insulating film (depth of the opening portion) W), W1: width of the second insulating film, W2: width of the opening. Reference numeral 201 denotes a first insulating film, 202 denotes a second insulating film, and 203 denotes a third insulating film.
[0042]
FIG. 2A shows a case where d <t02, W1 and W2 are equal to or smaller than 1 μm, and when the depth of the groove of the opening is smaller than the amorphous semiconductor film 204, the molten crystal Since the opening is shallow even after the formation process, the surface of the crystalline semiconductor film 205 is not sufficiently flattened. That is, the uneven shape of the base of the crystalline semiconductor film 205 is left almost preserved.
[0043]
FIG. 2B shows a case where d ≧ t02 and W1 and W2 are equal to or smaller than 1 μm, and when the depth of the groove of the opening is substantially equal to or larger than that of the amorphous semiconductor film 204. Are gathered in the openings (recesses) due to surface tension. As a result, in the solidified state, the surface becomes almost flat as shown in FIG. In this case, t11 <t12, and stress concentrates on the thinner portion 220 on the second insulating film 202, where distortion is accumulated and a crystal grain boundary is formed.
[0044]
FIG. 2C shows a case where d >> t02, W1, and W2 are equal to or smaller than 1 μm. In this case, the crystalline semiconductor film 205 is formed so as to fill the opening, and the second insulating film is formed. It is also possible to make it hardly remain on the film 202.
[0045]
FIG. 2D shows a case where d ≧ t02 and W1 and W2 are approximately the same or slightly larger than 1 μm. When the width of the opening is widened, the crystalline semiconductor film 205 fills the opening, and there is an effect of flattening. However, a crystal grain boundary or a crystal sub-grain boundary is generated near the center of the opening. In addition, stress is similarly concentrated on the second insulating film, where strain is accumulated, and a crystal grain boundary is formed. It is presumed that this is because the effect of stress relaxation is reduced by increasing the interval.
[0046]
FIG. 2E shows a case where d ≧ t02 and W1 and W2 are larger than 1 μm, and the state of FIG. 2D becomes more apparent.
[0047]
A scanning electron microscope (SEM) photograph shown in FIG. 22 shows one example, in which a 150 nm step is provided, and a 150 nm amorphous silicon film is formed on a base insulating film provided with a 1.8 μm convex width and interval. Shows the result of crystallization. The surface of the crystalline semiconductor film is etched with a Seco solution in order to make crystal grain boundaries visible. As is clear from the comparison with FIG. 21, the crystal grain boundary is not a step-shaped protrusion but spreads over the whole. Therefore, with such a structure, a crystalline semiconductor film without a crystal grain boundary cannot be selectively extracted.
[0048]
As described above with reference to FIG. 2, when forming a semiconductor element, particularly when forming a TFT, the form of FIG. 2B is considered to be most suitable. In addition, here, the unevenness of the base for forming the crystalline semiconductor film is described as an example in which the base is formed of the first insulating film and the second insulating film; however, the present invention is not limited to this embodiment and has a similar shape. If there is, it can be replaced. For example, an opening may be directly formed by etching the surface of a quartz substrate to form an uneven shape.
[0049]
FIG. 13 illustrates an example of a configuration of a laser processing apparatus that can be used for crystallization. FIG. 13 shows laser oscillators 401a and 401b, shutter 402, high conversion mirrors 403 to 406, cylindrical lenses 407 and 408, slit 409, mounting table 411, and driving means 412 and 413 for displacing mounting table 411 in the X and Y directions. A front view and a side view of a configuration of a laser processing apparatus including a control means 414 for controlling the driving means, an information processing means 415 for sending a signal to the laser oscillation apparatus 401 and the control means 414 based on a program stored in advance. This is shown in the figure.
[0050]
As the laser oscillation device, a rectangular beam solid laser oscillation device is applied, and particularly preferably, a slab laser oscillation device is applied. Or YAG, YVO ₄ , YLF, YAlO ₃ A solid-state laser oscillation device using a crystal in which Nd, Tm, and Ho are doped into a crystal such as the above may be combined with a slab structure amplifier. As the slab material, crystals such as Nd: YAG, Nd: GGG (gadolinium / gallium / garnet), and Nd: GsGG (gadolinium / scandium / gallium / garnet) are used. In addition, a gas laser oscillation device and a solid laser oscillation device capable of continuous oscillation can be applied. YAG, YVO as continuous wave solid-state laser oscillators ₄ , YLF, YAlO ₃ A laser oscillation device using a crystal in which Cr, Nd, Er, Ho, Ce, Co, Ti, or Tm is doped into such a crystal is applied. The fundamental wave of the oscillation wavelength varies depending on the material to be doped, but oscillates at a wavelength of 1 μm to 2 μm. In order to obtain a higher output of 5 W or more, a diode-pumped solid-state laser oscillator may be cascaded.
[0051]
The circular or rectangular laser light output from such a laser oscillation device is condensed linearly by the cylindrical lenses 407 and 408 in the cross-sectional shape of the irradiation surface. Further, in order to prevent interference on the irradiation surface, the high conversion mirror is appropriately adjusted so that the light enters from an oblique direction at an angle of 10 to 80 degrees. If the cylindrical lenses 407 and 408 are made of synthetic quartz, a high transmittance can be obtained, and a coating applied to the lens surface is applied to achieve a transmittance of 99% or more with respect to the wavelength of laser light. Of course, the cross-sectional shape of the irradiation surface is not limited to a linear shape, and may be an arbitrary shape such as a rectangular shape, an elliptical shape, or an oval shape. In any case, the ratio of the short axis to the long axis is in the range of 1:10 to 1: 1100. Further, the wavelength conversion element 410 is provided for obtaining a harmonic with respect to the fundamental wave.
[0052]
In addition, laser processing of the substrate 420 is enabled by moving the mounting table 411 in two axial directions by the driving units 412 and 413. In one direction, the substrate 420 can be continuously moved at a constant speed of 1 to 200 cm / sec, preferably 5 to 75 cm / sec over a distance longer than the length of one side of the substrate 420, and linearly moved to the other. It is possible to step-discontinuously move the same distance as the longitudinal direction of the shaped beam. The oscillation of the laser oscillation devices 401a and 401b and the mounting table 411 are operated in synchronization by the information processing means 415 equipped with a microprocessor.
[0053]
The mounting table 411 makes a linear motion in the X direction shown in the drawing, thereby enabling the entire surface of the substrate to be processed by laser light emitted from a fixed optical system. The position detecting means 416 detects that the substrate 420 is at the irradiation position of the laser light, transmits the signal to the information processing means 415, and synchronizes the irradiation timing of the laser light by the information processing means 415. That is, when the substrate 420 is not at the laser light irradiation position, the shutter 402 is closed to stop the laser light irradiation.
[0054]
The laser light applied to the substrate 420 by the laser irradiation apparatus having such a structure can process a desired region or the entire surface of the semiconductor film by relatively moving in the X direction or the Y direction shown in the drawing.
[0055]
As described above, in the crystallization of irradiating a continuous wave laser beam to an amorphous semiconductor film, by providing a stepped shape in the base insulating film, it is possible to concentrate strain or stress due to crystallization in that portion, The strain or the stress can be prevented from being applied to the crystalline semiconductor used as the active layer. By forming a TFT such that a channel formation region is provided in a crystalline semiconductor film which is released from distortion or stress, current driving capability can be improved at high speed, and device reliability can be improved. Is also possible.
[0056]
(Embodiment 1)
The above embodiment of the present invention will be described with reference to FIG. FIG. 1 is a longitudinal sectional view for explaining a step of forming a crystalline semiconductor film of the present invention.
[0057]
In FIG. 1A, a first insulating film 201 formed using silicon nitride, silicon oxynitride, aluminum nitride, or aluminum oxynitride in which the nitrogen content is higher than the oxygen content is formed to have a thickness of 30 to 300 nm. . A second insulating film 202 having a thickness of 10 to 1000 nm, preferably 50 to 200 nm and an opening formed in a predetermined shape is formed thereover with silicon oxide or silicon oxynitride. The predetermined shape may be a rectangle, a circle, a polygon, a strip, or a shape that matches the shape of the island-shaped semiconductor film (active layer) of the TFT to be manufactured. Silicon oxide is composed of tetraethyl orthosilicate (TEOS) and O ₂ Can be mixed and formed by a plasma CVD method. Silicon oxynitride film is SiH ₄ , N ₂ O or SiH ₄ , NH ₃ , N ₂ It can be formed by a plasma CVD method using O as a raw material.
[0058]
The first insulating film 201 and the second insulating film are selectively processed by etching using buffered hydrofluoric acid or CHF ₃ This is performed by dry etching using. In any case, in order to secure a selectivity in the etching process, it is desirable to appropriately adjust the material and the film forming conditions so that the etching rate of the second insulating film is relatively faster than that of the first insulating film. . The angle of the side surface of the opening formed by the second insulating film may be appropriately set in the range of 5 to 90 degrees, preferably 30 to 90 degrees.
[0059]
As a member used as a substrate, a commercially available alkali-free glass substrate, a quartz substrate, a sapphire substrate, a substrate in which the surface of a single crystal or polycrystalline semiconductor substrate is covered with an insulating film, or a substrate in which the surface of a metal substrate is covered with an insulating film, must be used. Is possible.
[0060]
There is no limitation on the width W1 of the second insulating film 202 remaining after the etching, and the second insulating film 202 is formed to have a width of about 0.1 to 10 μm. The width W2 of the opening formed in the second insulating film 202 is 0.01 to 2 μm (preferably 0.1 to 1 μm), and the thickness d of the second insulating film is 0.01 to 1 μm (preferably). (0.05-0.2 μm). The length of the opening (the direction perpendicular to the plane of the paper) is not particularly limited, and the opening may be formed linearly or with a curved portion. For example, the length is such that a channel forming region of a TFT can be formed. I just want it.
[0061]
As shown in FIG. 1B, the amorphous semiconductor film 204 covering the surface of the first insulating film 201 and the second insulating film 202 and covering the opening is 0.2 to 3 μm (preferably 0.5 to 3 μm). 1.5 μm), that is, it is desirable to form the second insulating film so as to have a thickness equal to or greater than the depth of the opening formed by the second insulating film. As the amorphous semiconductor film, silicon, a compound or alloy of silicon and germanium, or a compound or alloy of silicon and carbon can be used. As shown, the amorphous semiconductor film is formed over the underlying insulating film and over the opening, and is deposited reflecting the irregularities of the underlying layer. In addition, the influence of chemical contamination such as boron attached to the surfaces of the first insulating film and the second insulating film is eliminated, and the amorphous semiconductor film is formed so that silicon nitride does not directly contact the amorphous semiconductor film. It is preferable that a silicon oxynitride film be continuously formed as the third insulating film 203 on the lower layer side without being exposed to the air in the same film forming apparatus.
[0062]
Then, the amorphous semiconductor film 204 is instantaneously melted and crystallized. In this crystallization, laser light or radiation light from a lamp light source is condensed by an optical system to an energy density at which the semiconductor film is melted and irradiated. In this step, it is particularly preferable to apply laser light using a continuous wave laser oscillation device as a light source. The applied laser light is linearly condensed by the optical system and expanded in the longitudinal direction, and its intensity distribution has a uniform region in the longitudinal direction and has a distribution in the lateral direction. It is desirable.
[0063]
As the laser oscillation device, a rectangular beam solid laser oscillation device is applied, and particularly preferably, a slab laser oscillation device is applied. As the slab material, crystals such as Nd: YAG, Nd: GGG (gadolinium / gallium / garnet), and Nd: GsGG (gadolinium / scandium / gallium / garnet) are used. In the slab laser, the laser beam travels in a zigzag optical path in this plate-shaped laser medium while repeating total reflection. Alternatively, it is a solid-state laser oscillation device using a rod doped with Nd, Tm, and Ho, and in particular, YAG, YVO ₄ , YLF, YAlO ₃ A solid-state laser oscillation device using a crystal in which Nd, Tm, and Ho are doped into a crystal such as the above may be combined with a slab structure amplifier. Then, as shown by an arrow in the drawing, scanning is performed in a direction intersecting the linear longitudinal direction. Here, the term “linear” means that the ratio of the length in the longitudinal direction to the length in the lateral direction is 1:10 or more.
[0064]
The wavelength of the continuous wave laser light is preferably 400 to 700 nm in consideration of the light absorption coefficient of the amorphous semiconductor film. Light in such a wavelength band is obtained by extracting the second harmonic and the third harmonic of the fundamental wave using a wavelength conversion element. ADP (ammonium dihydrogen phosphate), Ba ₂ NaNb ₅ O _Fifteen (Sodium barium niobate), CdSe (selenium cadmium), KDP (potassium dihydrogen phosphate), LiNbO ₃ (Lithium niobate), Se, Te, LBO, BBO, KB5 and the like are applied. It is particularly desirable to use LBO. A typical example is Nd: YVO ₄ A second harmonic (532 nm) of a laser oscillation device (fundamental wave 1064 nm) is used. The laser oscillation mode is TEM ₀₀ Apply the single mode that is the mode.
[0065]
For silicon, which is chosen as the most suitable material, the absorption coefficient is 10 ³ -10 ⁴ cm ^-1 Is substantially in the visible light range. When crystallizing a substrate having a high visible light transmittance such as glass and an amorphous semiconductor film formed with silicon to have a thickness of 30 to 200 nm, irradiation with light in a visible light region having a wavelength of 400 to 700 nm is performed. By selectively heating the semiconductor film, crystallization can be performed without damaging the base insulating film. Specifically, the penetration length of light having a wavelength of 532 nm is approximately 100 nm to 1000 nm with respect to the amorphous silicon film, and sufficiently reaches the inside of the amorphous semiconductor film 106 having a thickness of 30 nm to 200 nm. it can. That is, heating can be performed from the inside of the semiconductor film, and substantially the entire semiconductor film in the laser light irradiation region can be uniformly heated.
[0066]
Semiconductors that are instantaneously melted by the irradiation of laser light are gathered in openings (concave portions) due to surface tension. Thus, the crystalline semiconductor film 205 formed by solidification has a substantially flat surface as shown in FIG. A crystal growth end and a crystal grain boundary are formed on the second insulating film (on the convex portion) (region 220 shown in FIG. 1C).
[0067]
After that, heat treatment is preferably performed at 500 to 600 ° C. as shown in FIG. 1D to remove strain accumulated in the crystalline semiconductor film. This distortion is caused by volume shrinkage of the semiconductor caused by crystallization, thermal stress with the base, lattice mismatch, and the like. This heat treatment may be performed for 1 to 10 minutes using, for example, a gas heating type instantaneous thermal annealing (RTA) method. This step is not an essential requirement in the present invention, and may be appropriately selected and performed.
[0068]
As shown in FIG. 1E, the surface of the crystalline semiconductor film 205 is etched to selectively extract the crystalline semiconductor film 206 embedded in the opening (recess). This is intended to remove the crystalline semiconductor film remaining on the second insulating film 202 and including the crystal grain boundaries and crystal defects, and to leave only high-quality crystals in the openings (recesses). The crystalline semiconductor film 206 has a plurality of crystal orientations and has a feature that no crystal grain boundary is formed.
[0069]
In particular, a TFT can be completed by forming a gate insulating film and a gate electrode so that a channel formation region is positioned by using a crystalline semiconductor filling an opening (recess). At this time, by forming an opening in a direction parallel to the channel length direction of the TFT and scanning laser light in that direction, crystal growth can be performed in that direction, and a specific crystal orientation can be preferentially given. Crystals can be grown. The details are the same as those shown in FIG. 2. W1 and W2 are about the same as or smaller than 1 μm, and the depth of the opening groove is substantially equal to or larger than the thickness of the amorphous semiconductor film 203. The most suitable shape is most suitable.
[0070]
A scanning electron microscope (SEM) photograph shown in FIG. 21 shows an example thereof, in which a step of 170 nm is provided by a second insulating film formed of silicon oxide on a quartz substrate, and the width (W1) and the interval of the protrusion of 0.5 μm are provided. The results show that an amorphous silicon film of 150 nm is formed on the base provided with (W2) and then crystallized by irradiating laser light. The surface of the crystalline semiconductor film is etched with a Seco solution in order to make crystal grain boundaries visible. Seco solution is HF: H ₂ O = 2: 1 K as additive ₂ Cr ₂ O ₇ It is a drug solution prepared using As is clear from this photograph, it can be seen that the crystal grain boundaries are concentrated on the step-shaped protrusions.
[0071]
FIG. 23 shows the result of obtaining the orientation of a crystalline semiconductor film formed in an opening (concave portion) by a backscattered electron diffraction pattern (EBSP: Electron Back Scatter diffraction Pattern). The EBSP is provided with a dedicated detector in a scanning electron microscope (SEM), irradiates the crystal surface with an electron beam, and allows the computer to recognize the crystal orientation from the Kikuchi line using a computer to recognize the microscopic image. The crystallinity is measured not only in the surface orientation but also in all directions of the crystal (hereinafter, this method is referred to as EBSP method for convenience).
[0072]
The data in FIG. 23 shows that the crystal grows in the opening (recess) in a direction parallel to the scanning direction of the laser light condensed linearly. Regarding the plane orientation of the growth, especially in the vicinity of the surface where the channel is formed, it can be considered that the <110> orientation is predominant, but there is also the <100> orientation.
[0073]
As described above, in the crystallization of irradiating a continuous wave laser beam to an amorphous semiconductor film, an opening (or a concavo-convex shape accompanying the opening) is provided on the base side of the semiconductor film, so that a region other than the opening is formed. Strain or stress due to crystallization can be concentrated, and a region with poor crystallinity such as a crystal grain boundary can be selectively formed. That is, it is possible to leave a crystalline semiconductor film in which a plurality of crystal grains having a plurality of crystal orientations in the opening and having a plurality of crystal grains extending in a direction parallel to the growth direction are formed without forming a crystal grain boundary. it can. By forming a TFT such that a channel formation region is provided with such a crystalline semiconductor film, it is possible to improve current driving capability at high speed and to improve the reliability of an element. .
[0074]
(Embodiment 2)
In the formation of the crystalline semiconductor film of the present invention, the amorphous semiconductor film may be irradiated with laser light to be crystallized as described in Embodiment Mode 1. It may be melted and recrystallized.
[0075]
FIG. 3 shows an example thereof. First, a first insulating film 201, a second insulating film 202, a silicon oxynitride film 203, and an amorphous semiconductor film 204 are formed in the same manner as in Embodiment 1. Ni is added to the amorphous semiconductor film 204 as a metal element having a catalytic action to promote crystallization, such as lowering the crystallization temperature of silicon to improve the orientation. The method for adding Ni is not limited, and a spin coating method, an evaporation method, a sputtering method, or the like can be applied. In the case of using the spin coating method, an aqueous solution containing 5 to 10 ppm of nickel acetate is applied to form the metal element-containing layer 210. Of course, the catalyst element is not limited to Ni, and other known materials may be used.
[0076]
Next, as shown in FIG. 3B, the amorphous semiconductor film 204 is crystallized by heat treatment at 550 to 580 ° C. for 4 to 8 hours, so that a crystalline semiconductor film 211 is formed. The crystalline silicon film 511 is made up of a collection of rod-shaped or needle-shaped crystals, each of which is macroscopically grown in a specific direction, and thus has uniform crystallinity. Another feature is that the orientation ratio in a specific direction is high.
[0077]
As shown in FIG. 3C, the crystalline semiconductor film crystallized by the heat treatment is irradiated with a continuous wave laser beam or an intense light equivalent thereto to be melted and recrystallized. Thus, the crystalline semiconductor film 212 whose surface is almost flattened can be obtained. Similarly, the crystalline semiconductor film 212 has a crystal growth end and a crystal grain boundary formed on the second insulating film (on the convex portion). Further, the amorphous region remaining in the crystalline semiconductor film 211 can be crystallized by this process. The advantage of using a crystalline semiconductor film as an object to be irradiated with laser light is the fluctuation rate of the light absorption coefficient of the semiconductor film. Even if the crystallized semiconductor film is irradiated with the laser light and melted, the light absorption coefficient hardly changes. do not do. Therefore, the margin of the laser irradiation condition can be widened.
[0078]
After that, a gettering treatment for removing a metal element remaining in the crystalline semiconductor film 212 is preferably performed. A barrier film 213 made of thin silicon oxide or the like is formed in contact with the crystalline semiconductor film 212, and a rare gas element is ²⁰ / Cm ³ The amorphous silicon film 214 containing the above concentration is formed as a gettering site. The heat treatment may be performed at 500 to 700 ° C. For details of this technique, refer to Japanese Patent Application No. 2001-019367 (or Japanese Patent Application No. 2002-020801). In addition, the heat treatment accompanying the gettering treatment also has an effect of reducing distortion of the crystalline semiconductor film 212.
[0079]
After that, as shown in FIG. 3E, the amorphous silicon film 214 and the barrier film 213 are removed, and the surface of the crystalline semiconductor film 212 is etched to form openings (recesses) as in Embodiment 1. The crystalline semiconductor film 215 embedded in the substrate is selectively extracted. Thus, a crystalline semiconductor film 215 having a plurality of crystal orientations and having no crystal grain boundary can be obtained. Such two-stage crystallization enables formation of a crystalline semiconductor film having relatively less distortion as compared with the first embodiment.
[0080]
(Embodiment 3)
Next, an embodiment of manufacturing a TFT in which a crystalline silicon film is formed over a base insulating film having an opening in this embodiment, and a channel formation region is provided in a filling region filling the opening. This will be described with reference to FIGS. In each of the drawings, (A) is a top view, and (B) and subsequent drawings are longitudinal sectional views of corresponding portions.
[0081]
In FIG. 4, a first insulating film 302 made of a silicon nitride film or an aluminum oxynitride film having a thickness of 30 to 300 nm is formed over a glass substrate 301. A silicon oxide film or a silicon oxynitride film is formed thereon, and a second insulating film 303 having a rectangular pattern is formed by photolithography. The silicon oxide film is made of TEOS and O by plasma CVD. ₂ At a reaction pressure of 40 Pa, a substrate temperature of 400 ° C., and a high frequency (13.56 MHz) power density of 0.6 W / cm. ² And deposit the film to a thickness of 1000 nm. Thereafter, an opening 304 is formed by etching. In this case, the opening has a depth substantially equal to the thickness of the second insulating film and has a thickness of 0.01 to 1 μm, preferably 0.05 to 0.2 μm.
[0082]
Then, as shown in FIG. 5, a third insulating film 305 made of an oxide film or a silicon oxynitride film and an amorphous semiconductor film 306 are formed on the first insulating film 302 and the second insulating film 303 by using the same plasma CVD apparatus. Is continuously formed without touching the surface. The amorphous silicon film 605 is formed of a semiconductor film containing silicon as a main component, and is made of SiH by a plasma CVD method. ₄ Is formed as a source gas. At this stage, as shown, the bottom and side surfaces of the opening 304 are covered to form an uneven surface shape.
[0083]
Then, as shown in FIG. 6, continuous oscillation laser light is irradiated to crystallize. Crystallization conditions are YVO in continuous oscillation mode. ₄ Using a laser oscillator, the output of the second harmonic (wavelength: 532 nm) of 2 to 10 W is condensed by an optical system into a linear laser beam having a ratio of the longitudinal direction to the transverse direction of 10 or more, and the longitudinal direction. Light is condensed so as to have a uniform energy density distribution, and is crystallized by scanning at a speed of 10 to 200 cm / sec. Uniform energy density distribution does not exclude anything that is completely constant, and the allowable range of energy density distribution is ± 10%. For such laser light irradiation, a laser processing apparatus having a configuration shown in FIG. 13 can be applied.
[0084]
FIG. 14 shows the relationship between the scanning direction of the laser light 360 condensed linearly and the arrangement of the openings. It is desirable that the intensity distribution of the laser light 360 condensed linearly has a region where the intensity distribution is uniform in the longitudinal direction. The purpose of this is to make the temperature of the semiconductor to be heated keep the temperature of the irradiation area constant. This is because if a temperature distribution occurs in the longitudinal direction (direction intersecting the scanning direction) of the laser light condensed linearly, the crystal growth direction cannot be limited to the scanning direction of the laser light. The arrangement of the openings 304 is aligned with the scanning direction of the laser light 360 condensed linearly as shown in the figure, so that the crystal growth direction and the channel length direction of all TFTs are aligned. Can be. Thus, variation in characteristics between TFT elements can be reduced.
[0085]
By irradiating a laser beam under these conditions, the amorphous semiconductor film is instantaneously melted and crystallized. The crystallization proceeds while the melting zone moves substantially. The molten silicon is aggregated and solidified in the openings (concave portions) due to the surface tension. As a result, a crystalline semiconductor film 307 having a flat surface is formed so as to fill the opening 604 as shown in FIG.
[0086]
Thereafter, as shown in FIG. 7, an etching process is performed so that the crystalline semiconductor film 307 remains at least in the opening 304. By this etching treatment, the crystalline semiconductor film over the second insulating film 303 is removed, and an island-shaped semiconductor film 308 including the crystalline semiconductor film is obtained according to the shape of the opening. The crystalline semiconductor film can be etched with selectivity to the underlying oxide film by using a fluorine-based gas and oxygen as an etching gas. For example, as an etching gas, CF ₄ And O ₂ Is applied. As described in Embodiment 1, the island-shaped semiconductor film 308 has a plurality of crystal orientations and has a feature that no crystal grain boundary is formed. Alternatively, the upper surface may be etched by chemical mechanical polishing (CMP). The thickness of the island-shaped semiconductor film 308 is 0.01 to 1 μm, preferably 0.05 to 0.2 μm.
[0087]
FIG. 7 does not limit the shape of the island-shaped semiconductor film 308, that is, the shape of the opening 304 formed by the first insulating film and the second insulating film. As described above, there is no particular limitation as long as the design rules are followed. For example, the shape of the island-shaped semiconductor film in FIG. 7 is such that a plurality of strip-shaped crystalline semiconductor films are connected to a pair of rectangular crystalline semiconductor films. The channel-forming region of the TFT is arranged in the strip-shaped crystalline semiconductor film.
[0088]
In FIG. 8, a fourth insulating film 310 which covers the top and side surfaces of the island-shaped semiconductor film 308 and is used as a gate insulating film and a conductive film 311 which is used as a gate electrode are formed. As the fourth insulating film 310, a silicon oxide film or a silicon oxynitride film having a thickness of 30 to 200 nm is formed. The conductive film 311 is formed using tungsten or an alloy containing tungsten.
[0089]
FIG. 9 illustrates a step of forming one-conductivity-type impurity regions 313 in the island-shaped semiconductor film 308. This impurity region 313 may be formed in a self-aligned manner using the conductive film 311 used as a gate electrode as a mask, or may be formed by masking with a photoresist or the like. The impurity region 313 forms a source and a drain region, and a low-concentration drain region can be provided as needed.
[0090]
For the impurity region 313, an ion implantation method or an ion doping method in which impurity ions are accelerated by an electric field and implanted into a semiconductor film is applied. In this case, the presence or absence of mass separation of the ion species to be implanted is not an essential problem in applying the present invention.
[0091]
Then, as shown in FIG. 10, a fifth insulating film 314 of a silicon nitride film or a silicon oxynitride film containing hydrogen of about 50 to 100 nm is formed. By performing a heat treatment at 400 to 450 ° C. in this state, hydrogen contained in the silicon nitride film or the silicon oxynitride film is released, so that the island-shaped semiconductor film can be hydrogenated. A sixth insulating film formed of a silicon oxide film or the like is formed, and a wiring 316 in contact with the impurity region 313 forming the source and drain regions is formed.
[0092]
Thus, a TFT can be manufactured. The configuration of the TFT described with reference to FIGS. 4 to 10 shows a multi-channel TFT in which a plurality of channel formation regions are provided in parallel and provided in connection with a pair of impurity regions. In this configuration, the number of channel forming regions arranged in parallel is not limited, and a plurality of channel forming regions may be arranged as needed. The channel formation region has a plurality of crystal orientations, and is formed of a crystalline semiconductor film in which a plurality of crystal grains extending in a direction parallel to a channel length direction are aggregated without forming a crystal grain boundary. I have.
[0093]
(Embodiment 4)
FIG. 11 shows an example in which an n-channel type multi-channel TFT having a low concentration drain (LDD) structure and a p-channel type multi-channel TFT constitute an inverter circuit which is a basic circuit having a CMOS structure. 11, the second insulating film 320, the opening 321 and the island-shaped semiconductor films 322 and 323 are formed in the same manner as in the third embodiment.
[0094]
FIG. 11A is a top view, in which a first n-type impurity region 333 which forms source and drain regions is formed in the island-shaped semiconductor film 322, and a source and drain region is formed in the island-shaped semiconductor film 323. A first p-type impurity region 334 is formed, and in addition, a conductive layer 330 forming a gate electrode, and source and drain wirings 337 to 339 are formed. The thickness of the island-shaped semiconductor film 323 is 0.01 to 1 μm, preferably 0.05 to 0.2 μm.
[0095]
FIGS. 11B and 11C are longitudinal sectional views corresponding to the GG ′ line and the HH ′ line. In the n-channel TFT, an LDD region is provided adjacent to the first n-type impurity region 333. A second n-type impurity region to be formed is formed. The gate electrode 330 has a two-layer structure, and the first n-type impurity region 322, the second n-type impurity region, and the first p-type impurity region can be formed in a self-aligned manner. 331 is a channel formation region. For details of such a gate electrode and an impurity region and a manufacturing method thereof, refer to Japanese Patent Application Laid-Open No. 2002-14337 or Japanese Patent Application No. 2001-011085.
[0096]
In addition, the fifth insulating film 314 and the sixth insulating film 315 shown in FIG. 11 are the same as those in the third embodiment, and thus description thereof is omitted here.
[0097]
(Embodiment 5)
An example in which the structure of the gate electrode is different in the multi-channel TFT described in Embodiment 3 is shown in FIG. Except for the configurations of the gate electrode and the LDD region, the configuration is the same as that of the third embodiment, and is denoted by the same reference numerals, and detailed description is omitted.
[0098]
The structure of the TFT shown in FIG. 12 is an example in which a gate electrode is formed of a nitride metal 350a such as titanium nitride or tantalum nitride and a high melting point metal 351b such as tungsten or a tungsten alloy, and a spacer 351 is provided on a side surface of the gate electrode 350b. . The spacer 351 may be formed of an insulator such as silicon oxide, may be formed of n-type polycrystalline silicon for imparting conductivity, and may be formed by anisotropic dry etching. By forming the LDD region 352 before forming the spacer, the LDD region 352 can be formed in a self-aligned manner with respect to the gate electrode 350b. When the spacer is formed of a conductive material, a gate-overlapped LDD (Gate-Overlapped LDD) structure in which the LDD region substantially overlaps with the gate electrode can be obtained.
[0099]
Such a structure in which the LDD region is formed in a self-aligned manner by providing the spacer is effective particularly when the design rule is miniaturized. Although a unipolar TFT structure is shown here, a CMOS structure can be formed as in the fourth embodiment.
[0100]
(Embodiment 6)
This embodiment mode describes an example of manufacturing a TFT in which a crystalline silicon film is formed over a base insulating film having an opening and a channel formation region is provided in a filling region filling the opening.
[0101]
In FIG. 31, a first insulating film 602 made of a 100-nm-thick silicon oxynitride film is formed over a glass substrate 601. A silicon oxide film is formed thereon, and a second insulating film 603 having a rectangular pattern is formed by photolithography. The silicon oxide film is made of TEOS and O by plasma CVD. ₂ At a reaction pressure of 40 Pa, a substrate temperature of 400 ° C., and a high frequency (13.56 MHz) power density of 0.6 W / cm. ² And deposit the film to a thickness of 150 nm. Thereafter, openings 604a and 604b are formed by etching.
[0102]
In FIG. 31, (A) is a top view, (B) is a longitudinal sectional view corresponding to line AA ', and (C) is a longitudinal sectional view corresponding to line BB'. Hereinafter, FIGS. 32 to 36 are treated similarly.
[0103]
Then, as shown in FIG. 32, an amorphous silicon film 605 covering the first insulating film 602 and the second insulating film 603 is formed with a thickness of 150 nm. The amorphous silicon film 605 is made of SiH by a plasma CVD method. ₄ Is formed as a source gas.
[0104]
Then, as shown in FIG. 33, a continuous wave laser beam is irradiated to crystallize. Crystallization conditions are YVO in continuous oscillation mode. ₄ Using a laser oscillator, the output of 5.5 W of the second harmonic (wavelength: 532 nm) was collected to 400 μm in the longitudinal direction and 50 to 100 μm in the lateral direction so that the optical system had a uniform energy density distribution in the longitudinal direction. Light is applied for scanning at a speed of 50 cm / sec for crystallization. Uniform energy density distribution does not exclude anything that is completely constant, and the allowable range of energy density distribution is ± 5%. For such laser light irradiation, a laser processing apparatus having a configuration shown in FIG. 13 can be applied. The laser light condensed by the optical system may have a region where the intensity distribution is uniform in the longitudinal direction and may have a distribution in the lateral direction. The crystallization allows this intensity distribution to be formed in a uniform region in the longitudinal direction, thereby increasing the effectiveness of crystal growth in a direction parallel to the scanning direction of the laser beam.
[0105]
By irradiating a laser beam under these conditions, the amorphous silicon film is instantaneously melted and the crystallization proceeds while the molten zone moves. The molten silicon is aggregated and solidified in the openings (concave portions) due to the surface tension. Thus, the crystalline semiconductor film 606 is formed so as to fill the openings 604a and 604b.
[0106]
Thereafter, as shown in FIG. 34, a mask pattern is formed so that the crystalline semiconductor film remains in at least the openings 604a and 604b, and etching is performed to form island-shaped semiconductor regions 607 and 608 including a channel formation region. I do.
[0107]
FIG. 35 shows a state where a gate insulating film 609 and gate electrodes 610 and 611 are formed on the upper layer side of the semiconductor regions 607 and 608. As the gate insulating film, an 80-nm-thick silicon oxide film may be formed by a plasma CVD method. The gate electrodes 610 and 611 are formed using tungsten or an alloy containing tungsten. With such a structure, a channel formation region can be provided in an island-shaped semiconductor region which fills the openings 604a and 604b.
[0108]
Thereafter, a TFT can be completed by appropriately forming source and drain regions, a low-concentration drain region, and the like.
[0109]
(Embodiment 7)
Although it is formed in the same process as in the sixth embodiment, as shown in FIG. 36, the shape of the opening formed in the second insulating film 603 is changed between the elongated strip-shaped region and the region connected thereto. A single-gate multi-channel TFT is formed by forming an island-shaped semiconductor region 620 made of a crystalline silicon film in accordance with the opening 604 c and forming a gate insulating film 621 and a gate electrode 622. can do.
[0110]
(Embodiment 8)
In the seventh embodiment, the second insulating film is formed to be thicker than the thickness of the amorphous semiconductor film, for example, to have a thickness of 350 nm, so that an island-shaped semiconductor formed of a crystalline semiconductor film as shown in FIG. The region 620 can be completely embedded in the opening 604d. Then, by forming the gate insulating film 621 and the gate electrode 622 in the same manner, a single-gate multi-channel TFT can be formed.
[0111]
(Embodiment 9)
FIG. 38 shows another example of a single-gate multi-channel TFT. A first insulating film 602, a second insulating film 603, an island-shaped semiconductor region 630, a gate insulating film 631, and a gate electrode 632 are formed on a substrate 601 in the same manner as in the first to third embodiments. 38 is different from the opening 604e formed by the second insulating film 603, in addition to the opening 604e formed in the second insulating film 603, after the island-shaped semiconductor region 630 is formed. 2 is that the second opening 625 is formed by removing the insulating film.
[0112]
FIG. 38D shows an enlarged view of the vicinity of the channel formation region. A gate insulating film 631 is formed in contact with a side surface and an upper surface of the island-shaped semiconductor region 630, and a gate electrode 632 is formed to cover the gate insulating film 631. In this case, the channel formation region is formed on both the upper portion 634 and the side surface portion 635 of the semiconductor region 630. As a result, the depletion region can be increased, and the current driving capability of the TFT can be improved.
[0113]
(Embodiment 10)
The present invention can be applied to various semiconductor devices, and a mode of a display panel manufactured based on Embodiment Modes 1 to 5 will be described.
[0114]
In FIG. 15, a substrate 900 is provided with a pixel portion 902, gate signal side driver circuits 901a and 901b, data signal side driver circuit 901c, an input / output terminal portion 908, and a wiring or a wiring group 917. The seal pattern 940 may partially overlap with the gate signal side driver circuits 901a and 901b, the data signal side driver circuit 901c, and a wiring or a wiring group 917 connecting the driver circuit portion and an input terminal. With this configuration, the area of the frame region (the peripheral region of the pixel portion) of the display panel can be reduced. An FPC 936 is fixed to the external input terminal.
[0115]
Further, a chip on which a microprocessor, a memory, a media processor / DSP (Digital Signal Processor), or the like is formed using the TFT of the present invention may be mounted. These functional circuits are formed with design rules different from those of the pixel portion 902, the gate signal side drive circuits 901a and 901b, and the data signal side drive circuit 901c. Specifically, a design rule of 1 μm or less is applied. You. The mounting method is not limited, and a COG method or the like is applied.
[0116]
For example, the TFT described in any of Embodiments 3 to 5 can be applied as a switching element of the pixel portion 902 and as an active element included in the gate signal driver circuits 901a and 901b and the data signal driver circuit 901c.
[0117]
FIG. 19 illustrates an example of a configuration of one pixel of the pixel portion 902, in which TFTs 801 to 803 are provided. These are switching, reset, and drive TFTs for controlling the light emitting element and the liquid crystal element provided in the pixel, respectively. The manufacturing steps of these TFTs are shown in FIGS. Note that the details of the process are the same as those in Embodiment 3, and the detailed description is omitted.
[0118]
FIG. 16 shows a stage where the second insulating film 503 and the openings 504 and 505 are formed therein. FIG. 17 shows a step of forming the crystalline semiconductor film 508 by forming the openings 504 and 505, depositing the amorphous semiconductor film 506, and irradiating the amorphous semiconductor film 506 with linearly focused laser light 507. ing.
[0119]
FIG. 18 shows a state where the crystalline semiconductor film over the second insulating film 503 is selectively removed by etching, and island-like semiconductor films 509 and 510 made of the crystalline semiconductor film are formed so as to fill the openings. Is shown.
[0120]
Further, a gate insulating film (not shown) and gate electrodes (or gate wirings) 514 to 516 are formed. The openings 511 to 513 are formed at positions where the island-shaped semiconductor films 509 and 510 intersect with the gate electrodes (or gate wirings) 514 to 516. Thereby, a gate structure similar to that of the third embodiment can be obtained. After that, an n-type or p-type impurity region is formed, and a power supply line 819, various other wirings 820 and 821, and a pixel electrode 517 are formed with an insulating film interposed therebetween, whereby a pixel structure shown in FIG. 19 can be obtained. .
[0121]
FIG. 20A is a longitudinal sectional view corresponding to the line AA ′ in FIG. Further, as shown in FIG. 20B, an organic light-emitting element can be formed using the pixel electrode 517.
[0122]
FIG. 20B illustrates a mode in which light emitted from the light emitting element 33 is emitted to the side opposite to the substrate side (upward emission type). The pixel electrode 517 forms a cathode which is one electrode of the light emitting element 33 connected to the wiring 520. The organic compound layer 27 is formed in the order of the electron injection / transport layer, the light emitting layer, and the hole injection / transport layer from the cathode side. A thin translucent metal layer 28 is provided between an anode 29 formed on the upper layer side. The anode 29 is formed of a light-transmitting conductive film such as indium tin oxide (ITO), zinc oxide (ZnO), or indium zinc oxide (IZO) by a resistance heating evaporation method. The metal layer 28 prevents the organic compound layer 27 from being damaged when the anode 29 is formed, and the element characteristics from being deteriorated. Thereafter, a protective film 24 and a passivation film 25 are formed.
[0123]
When the organic compound layer 21 is formed of a low molecular weight organic compound, a hole injection / transport layer formed of copper phthalocyanine (CuPc) and aromatic amine-based materials MTDATA and α-NPD, and tris-8-quinolino Rat aluminum complex (Alq ₃ ) Can be formed by stacking the electron-injection layer and the light-emitting layer formed in the step (1). Alq ₃ Enables light emission (fluorescence) from the singlet excited state.
[0124]
In order to increase the luminance, it is preferable to use light emission (phosphorescence) from a triplet excited state. In this case, a carbazole-based CBP + Ir (ppy) is formed on the hole injection / transport layer formed of CuPc, which is a phthalocyanine-based material, and α-NPD, which is an aromatic amine-based material, as the organic compound layer 21. ₃ To form a light emitting layer, and further, using bathocuproine (BCP), a hole blocking layer, Alq. ₃ And a structure in which electron injection / transport layers are laminated.
[0125]
Although the above two structures are examples using a low molecular weight organic compound, an organic light emitting device in which a high molecular weight organic compound and a low molecular weight organic compound are combined can also be realized. For example, as the organic compound layer 21, from the anode side, a hole injection / transport layer using a polythiophene derivative (PEDOT) of a high molecular weight organic compound, a hole injection / transport layer using α-NPD, CBP + Ir (ppy) ₃ Light emitting layer, hole blocking layer by BCP, Alq ₃ May be laminated. By changing the hole injection layer to PEDOT, hole injection characteristics are improved, and luminous efficiency can be improved.
[0126]
In any case, light emission (phosphorescence) from the triplet excited state has higher luminous efficiency than light emission (fluorescence) from the singlet excited state, and an operating voltage (light emission from the organic light emitting element) is required to obtain the same light emission luminance. (The voltage required to perform this) can be reduced.
[0127]
As described above, a display panel using an organic light-emitting element can be manufactured by using the present invention. Although not illustrated here, a display panel using the electro-optical characteristics of liquid crystal can also be manufactured.
[0128]
(Embodiment 11)
In this embodiment, an example in which a glass substrate is used as an etching stopper in forming the second insulating film 202 illustrated in FIG. 1 and an insulating film corresponding to the first insulating film 201 is formed over the second insulating film 202 Is shown.
[0129]
In FIG. 26A, first, a second insulating film 702 is formed over a glass substrate 701 using silicon oxide or silicon oxynitride and having a thickness of 10 to 3000 nm, preferably 100 to 2000 nm and an opening formed in a predetermined shape. I do. Details are the same as in the first embodiment. The opening may be formed by either wet etching or dry etching. ₃ Dry etching using gas is used. In this case, the gas flow rate is 30 to 40 sccm, the reaction pressure is 2.7 to 4.0 kPa, the applied power is 500 W, and the substrate temperature is 20 ° C.
[0130]
In this embodiment, as the glass substrate 701, a material having a high selectivity to a silicon oxide film (for example, a 1737 glass substrate manufactured by Corning Incorporated) is preferably used. This is because if the selectivity is high, the glass substrate 701 can be used as it is as an etching stopper when the second insulating film 702 is formed.
[0131]
Then, after the second insulating film 702 is formed, the second insulating film 702 is covered thereon with a first insulating film 703 formed of silicon nitride, silicon oxynitride having a nitrogen content larger than the oxygen content, or a laminate thereof, and further having an amorphous film thereon. A high quality semiconductor film 704 is formed to obtain the state shown in FIG. For the details of the first insulating film 703 and the amorphous semiconductor film 704, the description in Embodiment 1 can be referred to. Steps after FIG. 26B may be performed in accordance with the first embodiment, and a description thereof will not be repeated.
[0132]
According to the present embodiment, it is possible to ensure a sufficiently high selectivity between the glass substrate 701 and the second insulating film 702, so that the process margin in forming the opening of the second insulating film 702 is improved. I do. In addition, a problem such as scuffing at the lower end of the second insulating film 702 does not occur. Further, a portion where the second insulating film 702 is not provided has a structure of a silicon nitride film, a silicon oxynitride having a nitrogen content larger than the oxygen content or a stacked film thereof on a glass substrate. It is not necessary to use a simple insulating film.
[0133]
Note that this embodiment can be implemented by freely combining with any of the structures of Embodiments 1 to 10.
[0134]
(Embodiment 12)
Various devices can be completed using the present invention. One example is a portable information terminal (electronic notebook, mobile computer, mobile phone, etc.), video camera, digital camera, personal computer, television receiver, mobile phone, projection display device, and the like. Examples of these are shown in FIGS.
[0135]
FIG. 24A illustrates an example in which a television receiver is completed by applying the present invention, which includes a housing 3001, a support base 3002, a display portion 3003, and the like. In the TFT manufactured by the present invention, in addition to the display portion 3003, various integrated circuits such as various logic circuits, high-frequency circuits, memories, microprocessors, media processors, and graphics LSIs can be formed and incorporated on glass. According to the invention, a television receiver can be completed.
[0136]
FIG. 24B is an example in which a video camera is completed by applying the present invention, and includes a main body 3011, a display portion 3012, an audio input portion 3013, operation switches 3014, a battery 3015, an image receiving portion 3016, and the like. . In addition to the display portion 3012, various integrated circuits such as various logic circuits, high-frequency circuits, memories, microprocessors, media processors, and LSIs for graphics can be formed on glass and incorporated in the TFT manufactured by the present invention. According to the invention, a video camera can be completed.
[0137]
FIG. 24C illustrates an example in which a notebook personal computer is completed by applying the present invention, which includes a main body 3021, a housing 3022, a display portion 3023, a keyboard 3024, and the like. In addition to the display portion 3023, the TFT manufactured by the present invention can form and integrate various integrated circuits such as various logic circuits, high-frequency circuits, memories, microprocessors, media processors, graphics LSIs, cryptographic LSIs, etc. on glass. According to the present invention, a personal computer can be completed.
[0138]
FIG. 24D shows an example in which a PDA (Personal Digital Assistant) is completed by applying the present invention, and includes a main body 3031, a stylus 3032, a display portion 3033, operation buttons 3034, an external interface 3035, and the like. In addition to the display portion 3033, various integrated circuits such as various logic circuits, high-frequency circuits, memories, microprocessors, media processors, graphics LSIs, cryptographic LSIs, and the like can be formed and incorporated in a TFT manufactured by the present invention. According to the present invention, a PDA can be completed.
[0139]
FIG. 24E illustrates an example in which a sound reproduction device is completed by applying the present invention, specifically, an audio device for a vehicle, which includes a main body 3041, a display portion 3042, operation switches 3043, 3044, and the like. Have been. In addition to the display portion 3042, various integrated circuits such as various logic circuits, high-frequency circuits, memories, microprocessors, media processors, graphics LSIs, amplifier circuits, and the like can be formed and incorporated on glass in the TFT manufactured by the present invention. According to the present invention, an audio device can be completed.
[0140]
FIG. 24F illustrates an example in which a digital camera is completed by applying the present invention. A main body 3051, a display portion (A) 3052, an eyepiece portion 3053, operation switches 3054, a display portion (B) 3055, and a battery 3056 And so on. TFTs manufactured by the present invention include various integrated circuits such as various logic circuits, high-frequency circuits, memories, microprocessors, media processors, graphics LSIs, cryptographic LSIs, in addition to the display portion (A) 3052 and the display portion (B) 3055. Can be formed and incorporated on glass, and a digital camera can be completed according to the present invention.
[0141]
FIG. 24G illustrates an example in which a mobile phone is completed by applying the present invention, which includes a main body 3061, an audio output portion 3062, an audio input portion 3063, a display portion 3064, operation switches 3065, an antenna 3066, and the like. I have. The TFT manufactured by the present invention forms various integrated circuits such as various logic circuits, high frequency circuits, memories, microprocessors, media processors, graphics LSIs, cryptographic LSIs, and mobile phone LSIs on a glass in addition to the display portion 3064. And a mobile phone can be completed by the present invention.
[0142]
FIG. 25A illustrates a front type projector, which includes a projection device 2601, a screen 2602, and the like. FIG. 25B illustrates a rear projector, which includes a main body 2701, a projection device 2702, a mirror 2703, a screen 2704, and the like.
[0143]
Note that FIG. 25C is a diagram showing an example of the structure of the projection devices 2601 and 2702 in FIGS. 25A and 25B. The projection devices 2601 and 2702 include a light source optical system 2801, mirrors 2802 and 2804 to 2806, a dichroic mirror 2803, a prism 2807, a liquid crystal display device 2808, a phase difference plate 2809, and a projection optical system 2810. The projection optical system 2810 is configured by an optical system including a projection lens. In this embodiment, an example of a three-plate type is shown, but there is no particular limitation, and for example, a single-plate type may be used. Further, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarizing function, a film for adjusting a phase difference, and an IR film in an optical path indicated by an arrow in FIG. Good.
[0144]
FIG. 25D illustrates an example of the structure of the light source optical system 2801 in FIG. In this embodiment, the light source optical system 2801 includes a reflector 2811, a light source 2812, lens arrays 2813 and 2814, a polarization conversion element 2815, and a condenser lens 2816. Note that the light source optical system shown in FIG. 25D is an example and is not particularly limited. For example, a practitioner may appropriately provide an optical system such as an optical lens, a film having a polarizing function, a film for adjusting a phase difference, and an IR film in the light source optical system.
[0145]
It should be noted that the device shown here is merely an example, and the present invention is not limited to these applications.
[0146]
【The invention's effect】
As described above, the strain caused by crystallization by causing the semiconductor film to be in a molten state, agglomerating into the opening formed on the insulating surface by surface tension, and causing the crystal to grow from the approximate intersection of the bottom and the side of the opening. Can be concentrated in a region other than the opening. By etching away the crystalline semiconductor film in a region other than the opening, a region having good crystallinity can be selectively extracted.
[0147]
Further, by specifying the location of a channel formation region of a semiconductor element such as a transistor, particularly a TFT, a crystalline semiconductor film having no crystal grain boundary can be formed. As a result, it is possible to eliminate a factor in which the characteristics vary due to crystal grain boundaries or crystal defects that are inadvertently interposed, and it is possible to form a TFT or a TFT element group with small characteristic variations.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a crystallization method according to the present invention.
FIG. 2 is a vertical cross-sectional view illustrating details of the relationship between the shape of an opening and the form of a crystalline semiconductor film in crystallization.
FIG. 3 is a diagram illustrating a crystallization method according to the present invention.
4A and 4B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a TFT manufactured according to the present invention.
5A and 5B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a TFT manufactured according to the present invention.
6A and 6B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a TFT manufactured according to the present invention.
7A and 7B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a TFT manufactured according to the present invention.
8A and 8B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a TFT manufactured according to the present invention.
9A and 9B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a TFT manufactured according to the present invention.
10A and 10B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a TFT manufactured according to the present invention.
11A and 11B are a top view and a vertical cross-sectional view illustrating a structure of a TFT manufactured according to the present invention.
12A and 12B are a top view and a vertical cross-sectional view illustrating a structure of a TFT manufactured according to the present invention.
FIG. 13 is a layout view showing one embodiment of a laser irradiation apparatus applied to the present invention.
FIG. 14 is a diagram illustrating laser light condensed linearly and a scanning direction thereof according to the present invention.
FIG. 15 is an example of an external view of a semiconductor device manufactured using the present invention.
16 is a top view illustrating a manufacturing process of a pixel portion of the semiconductor device illustrated in FIGS.
FIG. 17 is a top view illustrating a manufacturing process of a pixel portion of the semiconductor device illustrated in FIGS.
18 is a top view illustrating a manufacturing process of a pixel portion of the semiconductor device illustrated in FIGS.
FIG. 19 is a top view illustrating a structure of a pixel portion of the semiconductor device illustrated in FIG.
20 is a longitudinal sectional view illustrating the structure of a pixel portion corresponding to FIG.
FIG. 21 shows a scanning electron beam representing a surface state when a 150 nm amorphous silicon film is formed and crystallized on a base insulating film provided with a step of 170 nm and a width and an interval of a convex portion of 0.5 μm. Microscope (SEM) photograph (after Secoetch).
FIG. 22 is a scanning electron showing a surface state when a 150 nm amorphous silicon film is formed and crystallized on a base insulating film provided with a step of 170 nm and a width and an interval of a protrusion of 1.8 μm. Microscope (SEM) photograph (after Secoetch).
FIG. 23 is EBSP mapping data showing the orientation of a crystal formed in a concave portion.
FIG 24 illustrates an example of a semiconductor device.
FIG. 25 illustrates an example of a projector.
FIG. 26 is a diagram illustrating a crystallization method according to the present invention.
FIG. 27 is a perspective view illustrating a crystallization method according to the present invention.
FIG. 28 is a perspective view illustrating a crystallization method according to the present invention.
FIG. 29 is a perspective view illustrating a crystallization method according to the present invention.
FIG. 30 is a perspective view illustrating a crystallization method according to the present invention.
31A and 31B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a TFT manufactured according to the present invention.
32A and 32B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a TFT manufactured according to the present invention.
33A and 33B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a TFT manufactured according to the present invention.
34A and 34B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a TFT manufactured according to the present invention.
35A and 35B are a top view and a vertical cross-sectional view illustrating a manufacturing process of a TFT manufactured according to the present invention.
36A and 36B are a top view and a vertical cross-sectional view illustrating an example of a TFT manufactured according to the present invention.
37A and 37B are a top view and a vertical cross-sectional view illustrating an example of a TFT manufactured according to the present invention.
38A and 38B are a top view and a vertical cross-sectional view illustrating an example of a TFT manufactured according to the present invention.
FIG. 39 is a cross-sectional view showing a structure used for a simulation of thermal analysis.
FIG. 40 is a graph showing a result of a thermal analysis simulation.

Claims (11)

A plurality of conductive layers formed on the insulating surface and connected to each other between the pair of one conductivity type impurity regions and having a plurality of crystal orientations and extending in a direction parallel to the channel length direction without forming crystal grain boundaries; A crystalline semiconductor film in which crystal grains are aggregated, wherein the crystalline semiconductor film is buried in an opening having the same depth as the thickness thereof. A plurality of conductive layers formed on the insulating surface and connected to each other between the pair of one conductivity type impurity regions and having a plurality of crystal orientations and extending in a direction parallel to the channel length direction without forming crystal grain boundaries; A channel is formed in the crystalline semiconductor film by a crystalline semiconductor film in which crystal grains are aggregated and a conductive layer overlapping with the crystalline semiconductor film via an insulating layer; Is characterized in that the channel width direction is 0.01 μm or more and 2 μm or less, the thickness is 0.01 μm or more and 1 μm or less, and the crystalline semiconductor film is embedded in an opening having the same depth as the thickness. Semiconductor device. A plurality of conductive layers formed on the insulating surface and connected to each other between the pair of one conductivity type impurity regions and having a plurality of crystal orientations and extending in a direction parallel to the channel length direction without forming crystal grain boundaries; The channel formation region is formed on the side surface and the upper surface of the crystalline semiconductor film by the gate electrode which overlaps with the crystalline semiconductor film in which the crystal grains are aggregated via the gate insulating film in contact with the upper surface of the crystalline semiconductor film. The crystalline semiconductor film has a channel width direction of 0.01 μm or more and 2 μm or less, a thickness of 0.01 μm or more and 1 μm or less, and the crystalline semiconductor film has the same depth as the thickness thereof. A semiconductor device buried in the opening. Formed on the insulating surface, the side surface is connected between a pair of one conductivity type impurity regions in contact with the insulating film, has a plurality of crystal orientations, and is parallel to the channel length direction without forming crystal grain boundaries. A channel is formed on the upper surface of the crystalline semiconductor film by a crystalline semiconductor film in which a plurality of crystal grains extending in the direction are aggregated and a gate electrode overlapping with a gate insulating film in contact with the upper surface of the crystalline semiconductor film. The crystalline semiconductor film has a structure in which a channel width direction is 0.01 μm or more and 2 μm or less, a thickness is 0.01 μm or more and 1 μm or less, and the crystalline semiconductor film has a thickness A semiconductor device buried in an opening having the same depth as that of the semiconductor device, and one or a plurality thereof are provided between the pair of one-conductivity-type impurity regions. 5. The semiconductor device according to claim 1, wherein the crystalline semiconductor film is grown with a <110> orientation preferentially oriented in a direction parallel to a channel length direction. . An insulating film having an opening is formed over a substrate having an insulating surface, an amorphous semiconductor film is formed over the insulating film and over the opening, and a molten semiconductor is poured into the opening of the insulating film. The amorphous semiconductor film is melted and crystallized to form a crystalline semiconductor film, and the crystalline semiconductor film extending to a region other than the opening is removed to remove the crystalline semiconductor film in the opening. And forming a gate insulating film and a gate electrode in contact with an upper surface portion of the crystalline semiconductor film. Forming an insulating film provided with an opening over a substrate having an insulating surface, forming an amorphous semiconductor film over the insulating film and over the opening, and irradiating a laser beam to the opening of the insulating film; The crystalline semiconductor film is formed by melting and crystallizing the amorphous semiconductor film so as to pour the molten semiconductor, removing the crystalline semiconductor film extending to a region other than the opening, and removing the crystalline semiconductor film. Forming a gate insulating film and a gate electrode in contact with an upper surface portion of the crystalline semiconductor film while leaving a portion of the crystalline semiconductor film. An insulating film provided with an opening extending in a channel length direction is formed over a substrate having an insulating surface, an amorphous semiconductor film is formed over the insulating film and over the opening, and laser light irradiation is performed. And scanning in a direction parallel to the channel length direction to melt and crystallize the amorphous semiconductor film so that the melted semiconductor flows into the opening of the insulating film to form a crystalline semiconductor film. Forming a gate insulating film and a gate electrode in contact with the upper surface of the crystalline semiconductor film by removing the crystalline semiconductor film extending in a region other than the opening to leave the crystalline semiconductor film in the opening; A method for manufacturing a semiconductor device. An insulating film having an opening is formed over a substrate having an insulating surface in accordance with the arrangement of an island-shaped semiconductor film including a channel formation region of a thin film transistor, and an amorphous semiconductor is formed over the insulating film and over the opening. Forming a film, irradiating a laser beam, and scanning in a direction parallel to the channel length direction of the thin film transistor, melting the amorphous semiconductor film so that the melted semiconductor flows into the opening of the insulating film; To form a crystalline semiconductor film, and remove the crystalline semiconductor film extending to a region other than the opening to leave the crystalline semiconductor film in the opening. A method for manufacturing a semiconductor device, comprising forming a gate insulating film and a gate electrode in contact with an upper surface portion. 10. The method for manufacturing a semiconductor device according to claim 7, wherein the laser light is emitted using a continuous wave laser oscillation device as a light source. 10. The method for manufacturing a semiconductor device according to claim 7, wherein the laser light is emitted using a continuous wave laser oscillation device as a light source.

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