JP2003234430A - Semiconductor device and its manufacturing method - Google Patents
Semiconductor device and its manufacturing methodInfo
- Publication number
- JP2003234430A JP2003234430A JP2002030579A JP2002030579A JP2003234430A JP 2003234430 A JP2003234430 A JP 2003234430A JP 2002030579 A JP2002030579 A JP 2002030579A JP 2002030579 A JP2002030579 A JP 2002030579A JP 2003234430 A JP2003234430 A JP 2003234430A
- Authority
- JP
- Japan
- Prior art keywords
- columnar electrode
- semiconductor device
- sealing film
- recess
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】この発明は、柱状電極を有す
る半導体装置およびその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a columnar electrode and a method of manufacturing the same.
【0002】[0002]
【従来の技術】例えばCSP(chip size package)と呼
ばれる半導体装置には、一例として、図20に示すよう
なものがある。この半導体装置では、シリコンなどから
なる半導体基板1の上面に接続パッド2が形成され、そ
の上面の接続パッド2の中央部を除く部分に絶縁膜3が
形成され、絶縁膜3に形成された開口部4を介して露出
された接続パッド2の上面から絶縁膜3の上面の所定の
箇所にかけて下地金属層5が形成され、下地金属層5の
上面に再配線6が形成され、再配線6の先端のパッド部
上面に柱状電極7が形成され、柱状電極7を除く上面全
体に封止膜8がその上面が柱状電極7の上面と面一とな
るように形成され、柱状電極7の上面に半田ボール9が
形成された構造となっている。2. Description of the Related Art For example, as a semiconductor device called CSP (chip size package), there is one shown in FIG. In this semiconductor device, the connection pad 2 is formed on the upper surface of the semiconductor substrate 1 made of silicon or the like, the insulating film 3 is formed on a portion of the upper surface except the central portion of the connection pad 2, and the opening formed in the insulating film 3 is formed. The base metal layer 5 is formed from the upper surface of the connection pad 2 exposed through the portion 4 to a predetermined position on the upper surface of the insulating film 3, and the rewiring 6 is formed on the upper surface of the base metal layer 5 to form the rewiring 6. The columnar electrode 7 is formed on the upper surface of the pad portion at the tip, and the sealing film 8 is formed on the entire upper surface excluding the columnar electrode 7 so that the upper surface thereof is flush with the upper surface of the columnar electrode 7. The structure is such that the solder balls 9 are formed.
【0003】[0003]
【発明が解決しようとする課題】ところで、上記従来の
半導体装置では、封止膜8の上面と面一である柱状電極
7の上面に半田ボール9を形成しているので、この半導
体装置を回路基板(図示せず)上に実装した後におい
て、温度サイクル試験などを行ったとき、半導体基板1
と回路基板との間の熱膨張係数差に起因して発生する応
力により、柱状電極7と半田ボール9との界面にクラッ
クが発生することがあるという問題があった。このよう
なことは、柱状電極7上に半田ボール9を予め形成する
のではなく、回路基板の接続端子上に半田ボールあるい
は半田層を予め形成しておく場合においても同様であ
る。この発明の課題は、柱状電極と半田ボールなどの低
融点金属接合材との界面にクラックが発生しにくいよう
にすることである。By the way, in the conventional semiconductor device described above, the solder ball 9 is formed on the upper surface of the columnar electrode 7 which is flush with the upper surface of the sealing film 8. After mounting on a substrate (not shown), the semiconductor substrate 1 is subjected to a temperature cycle test or the like.
There is a problem that cracks may occur at the interface between the columnar electrode 7 and the solder ball 9 due to the stress generated due to the difference in thermal expansion coefficient between the columnar electrode 7 and the circuit board. This also applies to the case where the solder balls 9 or the solder layer is previously formed on the connection terminals of the circuit board, instead of preliminarily forming the solder balls 9 on the columnar electrodes 7. An object of the present invention is to prevent cracks from easily occurring at the interface between a columnar electrode and a low melting point metal bonding material such as a solder ball.
【0004】[0004]
【課題を解決するための手段】請求項1に記載の発明に
係る半導体装置は、半導体基板上に形成された柱状電極
と、前記半導体基板上の前記柱状電極を除く領域に形成
された封止膜とを具備する半導体装置において、前記封
止膜の上面に前記柱状電極の上面および上端部の外周面
を露出する凹部が形成されていることを特徴とするもの
である。請求項2に記載の発明に係る半導体装置は、請
求項1に記載の発明において、前記封止膜の上面と前記
柱状電極の上面とはほぼ面一であることを特徴とするも
のである。請求項3に記載の発明に係る半導体装置は、
請求項1に記載の発明において、前記前記封止膜の上面
は前記柱状電極の上面よりも高いことを特徴とするもの
である。請求項4に記載の発明に係る半導体装置は、請
求項1に記載の発明において、前記凹部内および前記柱
状電極の上面を含むその上側に低融点金属ボールが形成
されていることを特徴とするものである。請求項5に記
載の発明に係る半導体装置の製造方法は、半導体基板上
に柱状電極を形成し、前記柱状電極を含む前記半導体基
板上に封止膜を形成し、前記封止膜に、前記柱状電極の
上面および上端部の外周面を露出する凹部を形成するこ
とを特徴とするものである。請求項6に記載の発明に係
る半導体装置の製造方法は、請求項5に記載の発明にお
いて、前記封止膜を形成した後、前記封止膜の上面と前
記柱状電極の上面とをほぼ面一にする研磨を行うことを
特徴とするものである。請求項7に記載の発明に係る半
導体装置の製造方法は、請求項5に記載の発明におい
て、前記封止膜は、その上面が前記柱状電極の上面より
も高くなるように形成して、その状態で、前記封止膜に
前記凹部を形成することを特徴とするものである。請求
項8に記載の発明に係る半導体装置の製造方法は、請求
項5に記載の発明において、前記凹部の形成はレーザ光
の照射により行うことを特徴とするものである。請求項
9に記載の発明に係る半導体装置の製造方法は、請求項
5に記載の発明において、前記凹部の形成は掘削加工に
より行うことを特徴とするものである。請求項10に記
載の発明に係る半導体装置の製造方法は、半導体基板上
に柱状電極を形成し、前記柱状電極の上端部に該上端部
を覆うように凹部形成用ボールを形成し、前記柱状電極
を含む前記半導体基板上に、その上面が前記柱状電極の
上面よりも高くなるように封止膜を形成し、少なくと
も、前記柱状電極の上端部周囲に前記凹部形成用ボール
の一部が残存するように前記封止膜の上面側および前記
凹部形成用ボールを研磨することを特徴とするものであ
る。請求項11に記載の発明に係る半導体装置の製造方
法は、請求項10に記載の発明において、前記封止膜の
上面側および前記凹部形成用ボールの研磨を、前記柱状
電極の上面が露出しない位置まで行い、前記柱状電極上
およびその上端部の周囲に前記凹部形成用ボールの一部
を残存させることを特徴とするものである。請求項12
に記載の発明に係る半導体装置の製造方法は、請求項1
0または11に記載の発明において、残存する前記凹部
形成用ボールの一部を除去して、前記封止膜に凹部を形
成することを特徴とするものである。請求項13に記載
の発明に係る半導体装置の製造方法は、請求項10また
は11に記載の発明において、前記凹部形成用ボールを
低融点金属によって形成し、残存する前記凹部形成用ボ
ールの一部の上面に、前記低融点金属と同一の材料から
なる低融点金属ボールを形成することを特徴とするもの
である。そして、この発明によれば、少なくとも柱状電
極の周囲における封止膜の上面に凹部を形成しているの
で、この凹部内に半田ボールなどの低融点金属接合材が
入り込み、柱状電極の上端部を半田ボールなどの低融点
金属接合材で覆うことになり、従って柱状電極と半田ボ
ールなどの低融点金属接合材との界面にクラックが発生
しにくいようにすることができる。According to a first aspect of the present invention, there is provided a semiconductor device comprising a columnar electrode formed on a semiconductor substrate and a sealing formed on the semiconductor substrate in a region excluding the columnar electrode. In the semiconductor device including a film, a recess exposing the upper surface of the columnar electrode and the outer peripheral surface of the upper end is formed on the upper surface of the sealing film. A semiconductor device according to a second aspect of the present invention is the semiconductor device according to the first aspect, wherein the upper surface of the sealing film and the upper surface of the columnar electrode are substantially flush with each other. A semiconductor device according to the invention of claim 3 is
In the invention according to claim 1, the upper surface of the sealing film is higher than the upper surface of the columnar electrode. A semiconductor device according to a fourth aspect of the present invention is the semiconductor device according to the first aspect, wherein a low melting point metal ball is formed in the recess and on an upper side thereof including an upper surface of the columnar electrode. It is a thing. According to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein a columnar electrode is formed on a semiconductor substrate, a sealing film is formed on the semiconductor substrate including the columnar electrode, and It is characterized in that a recess is formed to expose the upper surface and the outer peripheral surface of the upper end of the columnar electrode. According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fifth aspect, after forming the sealing film, the upper surface of the sealing film and the upper surface of the columnar electrode are substantially flush with each other. It is characterized by performing uniform polishing. According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor device according to the fifth aspect, the sealing film is formed so that an upper surface of the sealing film is higher than an upper surface of the columnar electrode. In this state, the recess is formed in the sealing film. According to an eighth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fifth aspect, the recess is formed by irradiating a laser beam. According to a ninth aspect of the present invention, in the method of manufacturing the semiconductor device according to the fifth aspect, the recess is formed by excavation. According to a tenth aspect of the present invention, in a method of manufacturing a semiconductor device, a columnar electrode is formed on a semiconductor substrate, a recess forming ball is formed at an upper end portion of the columnar electrode so as to cover the upper end portion, and the columnar electrode is formed. A sealing film is formed on the semiconductor substrate including the electrodes so that its upper surface is higher than the upper surface of the columnar electrode, and at least part of the recess forming ball remains around the upper end of the columnar electrode. Thus, the upper surface side of the sealing film and the recess forming balls are polished. According to an eleventh aspect of the present invention, in the method of manufacturing a semiconductor device according to the tenth aspect, polishing of the upper surface side of the sealing film and the recess forming ball does not expose the upper surface of the columnar electrode. It is characterized in that it is performed up to the position, and a part of the recess forming ball is left on the columnar electrode and around the upper end thereof. Claim 12
A method of manufacturing a semiconductor device according to the invention described in claim 1,
The invention according to 0 or 11 is characterized in that a part of the remaining recess-forming balls is removed to form a recess in the sealing film. According to a thirteenth aspect of the present invention, in the method of manufacturing a semiconductor device according to the tenth or eleventh aspect, the recess forming balls are formed of a low melting point metal, and a part of the recess forming balls that remains is formed. A low melting point metal ball made of the same material as the low melting point metal is formed on the upper surface of the. Further, according to the present invention, since the recess is formed on at least the upper surface of the sealing film around the columnar electrode, the low melting point metal bonding material such as a solder ball enters the recess and the upper end of the columnar electrode is Since it is covered with a low melting point metal bonding material such as a solder ball, it is possible to prevent cracks from easily occurring at the interface between the columnar electrode and the low melting point metal bonding material such as a solder ball.
【0005】[0005]
【発明の実施の形態】(第1実施形態)図1はこの発明
の第1実施形態としての半導体装置の断面図を示したも
のである。この半導体装置では、シリコンなどからなる
半導体基板11の上面に接続パッド12が形成され、そ
の上面の接続パッド12の中央部を除く部分に絶縁膜1
3が形成され、絶縁膜13に形成された開口部14を介
して露出された接続パッド12の上面から絶縁膜13の
上面の所定の箇所にかけて下地金属層15が形成され、
下地金属層15の上面に再配線16が形成され、再配線
16の先端のパッド部上面に柱状電極17が形成され、
柱状電極17を除く上面全体に封止膜18がその上面が
柱状電極17の上面と面一となるように形成され、柱状
電極17の周囲における封止膜18の上面に凹部19が
形成され、凹部19内および柱状電極17の上面を含む
その上側に半田ボール(低融点金属ボール)20が形成
された構造となっている。DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention. In this semiconductor device, the connection pad 12 is formed on the upper surface of the semiconductor substrate 11 made of silicon or the like, and the insulating film 1 is formed on the upper surface of the connection pad 12 except the central portion.
3 is formed, and the base metal layer 15 is formed from the upper surface of the connection pad 12 exposed through the opening 14 formed in the insulating film 13 to a predetermined position on the upper surface of the insulating film 13.
The rewiring 16 is formed on the upper surface of the base metal layer 15, and the columnar electrode 17 is formed on the upper surface of the pad portion at the tip of the rewiring 16.
A sealing film 18 is formed on the entire upper surface excluding the columnar electrode 17 such that the upper surface is flush with the upper surface of the columnar electrode 17, and a recess 19 is formed on the upper surface of the sealing film 18 around the columnar electrode 17. The structure is such that solder balls (low melting point metal balls) 20 are formed in the recesses 19 and above the columnar electrodes 17 including the upper surfaces thereof.
【0006】このように、この半導体装置では、柱状電
極17の上面が封止膜18の上面と面一であっても、柱
状電極17の周囲における封止膜18の上面に凹部19
を形成し、凹部19内および柱状電極17の上面を含む
その上側に半田ボール20を形成しているので、柱状電
極17の上端部を半田ボール20で覆うことができる。
この結果、この半導体装置を回路基板(図示せず)上に
実装した後において、温度サイクル試験などを行ったと
き、半導体基板11と回路基板との間の熱膨張係数差に
起因して応力が発生しても、柱状電極17と半田ボール
20との界面にクラックが発生しにくいようにすること
ができる。As described above, in this semiconductor device, even if the upper surface of the columnar electrode 17 is flush with the upper surface of the sealing film 18, the recess 19 is formed in the upper surface of the sealing film 18 around the columnar electrode 17.
Since the solder balls 20 are formed in the recesses 19 and on the upper side thereof including the upper surfaces of the columnar electrodes 17, the upper ends of the columnar electrodes 17 can be covered with the solder balls 20.
As a result, when this semiconductor device is mounted on a circuit board (not shown) and then subjected to a temperature cycle test or the like, stress is generated due to the difference in thermal expansion coefficient between the semiconductor substrate 11 and the circuit board. Even if it occurs, it is possible to prevent cracks from easily occurring at the interface between the columnar electrode 17 and the solder ball 20.
【0007】次に、この半導体装置の製造方法の一例に
ついて、図2〜図6を順に参照して説明する。まず、図
2に示すように、ウエハ状態の半導体基板11の上面に
接続パッド12が形成され、その上面の接続パッド12
の中央部を除く部分に絶縁膜13が形成され、絶縁膜1
3に形成された開口部14を介して露出された接続パッ
ド12の上面から絶縁膜13の上面の所定の箇所にかけ
て下地金属層15が形成され、下地金属層15の上面に
再配線16が形成され、再配線16の先端のパッド部上
面に柱状電極17が形成されたものを用意する。Next, an example of a method of manufacturing this semiconductor device will be described with reference to FIGS. First, as shown in FIG. 2, the connection pads 12 are formed on the upper surface of the semiconductor substrate 11 in a wafer state, and the connection pads 12 on the upper surface are formed.
The insulating film 13 is formed on the portion except the central portion of the insulating film 1.
3, the underlying metal layer 15 is formed from the upper surface of the connection pad 12 exposed through the opening 14 formed in 3 to a predetermined position on the upper surface of the insulating film 13, and the rewiring 16 is formed on the upper surface of the underlying metal layer 15. Then, the electrode having the columnar electrode 17 formed on the upper surface of the pad portion at the tip of the rewiring 16 is prepared.
【0008】次に、図3に示すように、柱状電極17お
よび再配線16を含む絶縁膜13の上面全体にエポキシ
系樹脂からなる封止膜18をトランスファモールド法、
ディスペンサ法、ディッピング法、印刷法などにより厚
さが柱状電極17の高さよりもやや厚くなるように形成
する。従って、この状態では、柱状電極17の上面は封
止膜18によって覆われている。次に、図4に示すよう
に、封止膜18の上面側を研磨することにより、柱状電
極17の上面を露出させるとともに、この露出された柱
状電極7の上面を封止膜8の上面と面一とする。Next, as shown in FIG. 3, a sealing film 18 made of epoxy resin is formed on the entire upper surface of the insulating film 13 including the columnar electrodes 17 and the rewirings 16 by the transfer molding method,
It is formed by a dispenser method, a dipping method, a printing method or the like so that the thickness thereof is slightly larger than the height of the columnar electrodes 17. Therefore, in this state, the upper surface of the columnar electrode 17 is covered with the sealing film 18. Next, as shown in FIG. 4, the upper surface of the sealing film 18 is polished to expose the upper surface of the columnar electrode 17, and the exposed upper surface of the columnar electrode 7 is replaced with the upper surface of the sealing film 8. Be flush
【0009】次に、図5に示すように、柱状電極17の
周囲における封止膜18の上面に、紫外線レーザやエキ
シマレーザなどのレーザ光を照射することにより、ある
いは掘削加工を行うことにより、凹部19を形成する。
次に、図6に示すように、凹部19内および柱状電極1
7の上面を含むその上側に半田ボール20を形成する。
この場合、半田ボール20は、直接、柱状電極17の上
面に搭載してリフローするか、あるいは、印刷法やデイ
スペンサなどにより、半田ペーストを柱状電極17の上
面に塗布した後リフローするなどの方法によればよい。
リフローにより、凹部19内に溶融した半田ボール20
または半田ペーストの一部が入り込むとともに、表面張
力により半田ボール20または半田ペーストがボール状
となり、柱状電極17の上面のみでなく、図1に図示さ
れる如く、柱状電極17の外周部を含んだ上端部全体が
半田ボール20によって覆われる。柱状電極17は角柱
状でもよいが、内部歪みを小さくするには、円柱状がよ
り適切である、次に、ダイシング工程を経ると、図1に
示す半導体装置が得られる。Next, as shown in FIG. 5, the upper surface of the sealing film 18 around the columnar electrodes 17 is irradiated with laser light such as an ultraviolet laser or an excimer laser, or by excavation processing. The recess 19 is formed.
Next, as shown in FIG.
The solder balls 20 are formed on the upper surface of the solder ball 7 including the upper surface thereof.
In this case, the solder ball 20 is directly mounted on the upper surface of the columnar electrode 17 and reflowed, or a method of applying solder paste to the upper surface of the columnar electrode 17 by a printing method or a dispenser and then reflowing the solder paste is used. You can follow.
Solder balls 20 melted in the recesses 19 by reflow
Alternatively, as a part of the solder paste enters, the solder balls 20 or the solder paste becomes ball-shaped due to the surface tension, and includes not only the upper surface of the columnar electrode 17 but also the outer peripheral portion of the columnar electrode 17 as shown in FIG. The entire upper end is covered with the solder balls 20. The columnar electrode 17 may be a prism, but a column is more suitable for reducing the internal strain. Next, the semiconductor device shown in FIG. 1 is obtained after a dicing process.
【0010】(第2実施形態)図7はこの発明の第2実
施形態としての半導体装置の断面図を示したものであ
る。この図において、図1と同一名称部分には同一の符
号を付し、その説明を適宜省略する。この半導体装置に
おいて、図1に示す場合と異なる点は、封止膜18の上
面が柱状電極17の上面よりも高くなっていることであ
る。(Second Embodiment) FIG. 7 is a sectional view of a semiconductor device according to a second embodiment of the present invention. In this figure, the same reference numerals are given to the same names as those in FIG. 1, and the description thereof will be omitted as appropriate. This semiconductor device is different from the case shown in FIG. 1 in that the upper surface of the sealing film 18 is higher than the upper surface of the columnar electrode 17.
【0011】次に、この半導体装置の製造方法の一例に
ついて説明する。この場合、図3に示す工程までは上記
第1実施形態の場合と同じである。すなわち、柱状電極
17および再配線16を含む絶縁膜13の上面全体に封
止膜18をその厚さが柱状電極17の高さよりもやや厚
くなるように形成する。Next, an example of a method of manufacturing this semiconductor device will be described. In this case, the steps up to the step shown in FIG. 3 are the same as those in the first embodiment. That is, the sealing film 18 is formed on the entire upper surface of the insulating film 13 including the columnar electrodes 17 and the redistribution lines 16 so that the thickness thereof is slightly larger than the height of the columnar electrodes 17.
【0012】次に、図8に示すように、柱状電極17上
およびその周囲における封止膜18の上面に、紫外線レ
ーザやエキシマレーザなどのレーザ光を照射することに
より、凹部19を形成して、柱状電極17の上端部を露
出させる。次に、図9に示すように、凹部19内および
柱状電極17の上面を含むその上側に半田ボール20を
形成する。半田ボール20の形成方法は、第1実施形態
と同様である。次に、ダイシング工程を経ると、図7に
示す半導体装置が得られる。この場合、図4に示す研磨
工程を省略することができる。Next, as shown in FIG. 8, a concave portion 19 is formed by irradiating the upper surface of the sealing film 18 on and around the columnar electrode 17 with a laser beam such as an ultraviolet laser or an excimer laser. The upper end of the columnar electrode 17 is exposed. Next, as shown in FIG. 9, solder balls 20 are formed in the recesses 19 and on the upper side including the upper surfaces of the columnar electrodes 17. The method of forming the solder balls 20 is the same as in the first embodiment. Next, after a dicing process, the semiconductor device shown in FIG. 7 is obtained. In this case, the polishing process shown in FIG. 4 can be omitted.
【0013】(第3実施形態)図10はこの発明の第3
実施形態としての半導体装置の断面図を示したものであ
る。この図において、図1と同一名称部分には同一の符
号を付し、その説明を適宜省略する。この半導体装置に
おいて、図1に示す場合と異なる点は、柱状電極17の
周囲における封止膜18の上面に形成される凹部19が
球面の一部となるように形成されている点であり、この
ため、柱状電極17の上端部に形成される半田ボール2
0が、凹部19内も含めて球状に形成されていることで
ある。これにより、半田ボール20の内部歪みが更に小
さくなる。(Third Embodiment) FIG. 10 shows a third embodiment of the present invention.
1 is a cross-sectional view of a semiconductor device as an embodiment. In this figure, the same reference numerals are given to the same names as those in FIG. 1, and the description thereof will be omitted as appropriate. This semiconductor device is different from the case shown in FIG. 1 in that the recess 19 formed on the upper surface of the sealing film 18 around the columnar electrode 17 is formed so as to be a part of the spherical surface. Therefore, the solder ball 2 formed on the upper end of the columnar electrode 17
0 means that the inside of the concave portion 19 is formed into a spherical shape. As a result, the internal strain of the solder ball 20 is further reduced.
【0014】次に、この半導体装置の製造方法の一例に
ついて説明する。この場合も、まず、図2に示すものを
用意する。次に、図2に示すものの上下を反転させて柱
状電極17の先端部(図2では上端部)を、図示してい
ないが、凹部形成用槽内のレジスト、ポリイミド、高融
点フラックスなどからなる凹部形成用液中に浸漬し、次
いで引き上げて表面張力による作用と熱風を吹き付ける
ことにより、図11に示すように、柱状電極17の上端
部に凹部形成用ボール21を形成する。この状態では、
柱状電極17の上端部は凹部形成用ボール21によって
覆われている。Next, an example of a method of manufacturing this semiconductor device will be described. Also in this case, first, the one shown in FIG. 2 is prepared. Next, although not shown, the tip end portion (upper end portion in FIG. 2) of the columnar electrode 17 is made up of the resist, polyimide, high melting point flux, etc. in the recess forming tank by turning upside down the one shown in FIG. By immersing in the recess forming liquid and then pulling it up and acting by surface tension and blowing hot air, the recess forming balls 21 are formed on the upper ends of the columnar electrodes 17, as shown in FIG. In this state,
The upper end of the columnar electrode 17 is covered with the recess forming ball 21.
【0015】次に、図12に示すように、凹部形成用ボ
ール21および再配線16を含む絶縁膜13の上面全体
にエポキシ系樹脂からなる封止膜18をトランスファモ
ールド法、ディスペンサ法、ディッピング法、印刷法な
どにより厚さが少なくとも柱状電極17の高さよりも厚
くなるように形成する。次に、図13に示すように、封
止膜18の上面側および凹部形成用ボール21を研磨す
ることにより、柱状電極17の上面を露出させるととも
に、この露出された柱状電極7の上面を封止膜8の上面
と面一とする。この場合、柱状電極17の上端部の周囲
に凹部形成用ボール21の一部を残存させる。Next, as shown in FIG. 12, a sealing film 18 made of epoxy resin is formed on the entire upper surface of the insulating film 13 including the recess forming balls 21 and the rewiring 16 by a transfer molding method, a dispenser method, or a dipping method. It is formed by a printing method or the like so that the thickness is at least larger than the height of the columnar electrodes 17. Next, as shown in FIG. 13, by polishing the upper surface side of the sealing film 18 and the recess forming balls 21, the upper surface of the columnar electrode 17 is exposed and the exposed upper surface of the columnar electrode 7 is sealed. It is flush with the upper surface of the stop film 8. In this case, a part of the recess forming ball 21 is left around the upper end of the columnar electrode 17.
【0016】次に、柱状電極17の上端部の周囲に残存
する凹部形成用ボール21を除去すると、図14に示す
ように、柱状電極17の周囲における封止膜18の上面
にボールの一部からなる凹部19が形成される。次に、
図15に示すように、凹部19内および柱状電極17の
上面を含むその上側に半田ボール20を形成する。次
に、ダイシング工程を経ると、図10に示す半導体装置
が得られる。Next, when the recess forming ball 21 remaining around the upper end of the columnar electrode 17 is removed, a part of the ball is formed on the upper surface of the sealing film 18 around the columnar electrode 17 as shown in FIG. A concave portion 19 made of is formed. next,
As shown in FIG. 15, solder balls 20 are formed in the recesses 19 and on the upper side thereof including the upper surfaces of the columnar electrodes 17. Next, after a dicing process, the semiconductor device shown in FIG. 10 is obtained.
【0017】(第4実施形態)図16はこの発明の第4
実施形態としての半導体装置の断面図を示したものであ
る。この図において、図10と同一名称部分には同一の
符号を付し、その説明を適宜省略する。この半導体装置
において、図10に示す場合と異なる点は、封止膜18
の上面が柱状電極17の上面よりも高くなっていること
である。(Fourth Embodiment) FIG. 16 shows a fourth embodiment of the present invention.
1 is a cross-sectional view of a semiconductor device as an embodiment. In this figure, parts having the same names as in FIG. 10 are assigned the same reference numerals and explanations thereof are omitted as appropriate. This semiconductor device is different from the case shown in FIG. 10 in that the sealing film 18
That is, the upper surface of is higher than the upper surface of the columnar electrode 17.
【0018】次に、この半導体装置の製造方法の一例に
ついて説明する。この場合、図12に示す工程までは上
記第3実施形態の場合と同じである。すなわち、凹部形
成用ボール21および再配線16を含む絶縁膜13の上
面全体にエポキシ系樹脂からなる封止膜18をその厚さ
が少なくとも柱状電極17の高さよりも厚くなるように
形成する。Next, an example of a method of manufacturing this semiconductor device will be described. In this case, the steps up to the step shown in FIG. 12 are the same as those in the third embodiment. That is, the sealing film 18 made of epoxy resin is formed on the entire upper surface of the insulating film 13 including the recess forming balls 21 and the rewirings 16 so that the thickness thereof is at least larger than the height of the columnar electrodes 17.
【0019】次に、図17に示すように、封止膜18の
上面側および凹部形成用ボール21の上側半分以上を、
柱状電極17の上面が露出しない程度に研磨する。従っ
て、この状態では、柱状電極17の上面は、残存する凹
部形成用ボール21によって覆われている。次に、残存
する凹部形成用ボール21を除去すると、図18に示す
ように、柱状電極17上およびその周囲における封止膜
18の上面に凹部19が形成される。Next, as shown in FIG. 17, the upper surface side of the sealing film 18 and the upper half or more of the recess forming ball 21 are
The polishing is performed so that the upper surface of the columnar electrode 17 is not exposed. Therefore, in this state, the upper surface of the columnar electrode 17 is covered with the remaining recess forming balls 21. Next, when the remaining recess forming balls 21 are removed, recesses 19 are formed on the upper surface of the sealing film 18 on and around the columnar electrodes 17, as shown in FIG.
【0020】次に、図19に示すように、凹部19内お
よび柱状電極17の上面を含むその上側に半田ボール2
0を形成する。次に、ダイシング工程を経ると、図16
に示す半導体装置が得られる。この場合、図17に示す
研磨工程は上記第3実施形態の場合よりも短縮すること
ができる。Next, as shown in FIG. 19, the solder ball 2 is formed in the recess 19 and on the upper side thereof including the upper surface of the columnar electrode 17.
Form 0. Next, after going through a dicing process, FIG.
The semiconductor device shown in is obtained. In this case, the polishing process shown in FIG. 17 can be shortened as compared with the case of the third embodiment.
【0021】(その他の実施形態)なお、上記第3およ
び第4実施形態において、凹部形成用ボール21を半田
などの低融点金属によって形成するようにしてもよい。
この場合、特に、凹部形成用ボール21を半田によって
形成すると、残存する凹部形成用ボール21を除去せず
に、半田ボール20を形成するようにすることもでき
る。また、上記各実施形態において、半田ボール20を
形成せず、その代わりに、図示していないが、回路基板
の接続端子上に半田ボールあるいは半田層を形成するよ
うにしてもよい。(Other Embodiments) In the third and fourth embodiments, the recess forming balls 21 may be formed of a low melting point metal such as solder.
In this case, in particular, when the recess forming balls 21 are formed of solder, the solder balls 20 can be formed without removing the remaining recess forming balls 21. Further, in each of the above-described embodiments, the solder balls 20 may not be formed, and instead, although not shown, solder balls or a solder layer may be formed on the connection terminals of the circuit board.
【0022】[0022]
【発明の効果】以上説明したように、この発明によれ
ば、少なくとも柱状電極の周囲における封止膜の上面に
凹部を形成しているので、この凹部内に半田ボールなど
の低融点金属接合材が入り込み、柱状電極の上端部を半
田ボールなどの低融点金属接合材で覆うことになり、従
って柱状電極と半田ボールなどの低融点金属接合材との
界面にクラックが発生しにくいようにすることができ
る。As described above, according to the present invention, since the recess is formed at least on the upper surface of the sealing film around the columnar electrodes, the low melting point metal bonding material such as a solder ball is formed in the recess. And the upper end of the columnar electrode is covered with a low melting point metal bonding material such as a solder ball, so that cracks are unlikely to occur at the interface between the columnar electrode and the low melting point metal bonding material such as a solder ball. You can
【図面の簡単な説明】[Brief description of drawings]
【図1】この発明の第1実施形態としての半導体装置の
断面図。FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention.
【図2】図1に示す半導体装置の製造に際し、当初用意
したものの断面図。FIG. 2 is a cross-sectional view of an initially prepared item in manufacturing the semiconductor device shown in FIG.
【図3】図2に続く工程の断面図。FIG. 3 is a sectional view of a step following FIG. 2;
【図4】図3に続く工程の断面図。FIG. 4 is a sectional view of a step following FIG. 3;
【図5】図4に続く工程の断面図。5 is a sectional view of a step following FIG. 4; FIG.
【図6】図5に続く工程の図。FIG. 6 is a diagram of a step that follows FIG.
【図7】この発明の第2実施形態としての半導体装置の
断面図。FIG. 7 is a sectional view of a semiconductor device as a second embodiment of the present invention.
【図8】図7に示す半導体装置の製造に際し、所定の工
程の断面図。FIG. 8 is a cross-sectional view of a predetermined process in manufacturing the semiconductor device shown in FIG.
【図9】図8に続く工程の図。FIG. 9 is a diagram of a step following FIG. 8;
【図10】この発明の第3実施形態としての半導体装置
の断面図。FIG. 10 is a sectional view of a semiconductor device as a third embodiment of the present invention.
【図11】図10に示す半導体装置の製造に際し、所定
の工程の断面図。11 is a sectional view of a predetermined process in manufacturing the semiconductor device shown in FIG.
【図12】図11に続く工程の断面図。12 is a sectional view of a step following FIG. 11. FIG.
【図13】図12に続く工程の断面図。FIG. 13 is a sectional view of a step following FIG. 12;
【図14】図13に続く工程の断面図。FIG. 14 is a sectional view of a step following FIG. 13;
【図15】図14に続く工程の断面図。FIG. 15 is a sectional view of a step following FIG. 14;
【図16】この発明の第4実施形態としての半導体装置
の断面図。FIG. 16 is a sectional view of a semiconductor device as a fourth embodiment of the present invention.
【図17】図16に示す半導体装置の製造に際し、所定
の工程の断面図。17 is a sectional view of a predetermined process in manufacturing the semiconductor device shown in FIG.
【図18】図17に続く工程の断面図。FIG. 18 is a sectional view of a step following FIG. 17;
【図19】図18に続く工程の断面図。FIG. 19 is a sectional view of a step following FIG. 18;
【図20】従来の半導体装置の一例の断面図。FIG. 20 is a sectional view of an example of a conventional semiconductor device.
11 半導体基板 12 接続パッド 13 絶縁膜 15 下地金属層 16 再配線 17 柱状電極 18 封止膜 19 凹部 20 半田ボール 11 Semiconductor substrate 12 connection pads 13 Insulating film 15 Base metal layer 16 Rewiring 17 Columnar electrode 18 Sealing film 19 recess 20 solder balls
Claims (13)
前記半導体基板上の前記柱状電極を除く領域に形成され
た封止膜とを具備する半導体装置において、前記封止膜
の上面に前記柱状電極の上面および上端部の外周面を露
出する凹部が形成されていることを特徴とする半導体装
置。1. A columnar electrode formed on a semiconductor substrate,
In a semiconductor device including a sealing film formed on a region of the semiconductor substrate excluding the columnar electrode, a recess exposing the upper surface of the columnar electrode and the outer peripheral surface of the upper end is formed on the upper surface of the sealing film. A semiconductor device characterized by being provided.
止膜の上面と前記柱状電極の上面とはほぼ面一であるこ
とを特徴とする半導体装置。2. The semiconductor device according to claim 1, wherein an upper surface of the sealing film and an upper surface of the columnar electrode are substantially flush with each other.
記封止膜の上面は前記柱状電極の上面よりも高いことを
特徴とする半導体装置。3. The semiconductor device according to claim 1, wherein an upper surface of the sealing film is higher than an upper surface of the columnar electrode.
部内および前記柱状電極の上面を含むその上側に低融点
金属ボールが形成されていることを特徴とする半導体装
置。4. The semiconductor device according to claim 1, wherein a low-melting-point metal ball is formed in the recess and on an upper side of the columnar electrode including an upper surface thereof.
柱状電極を含む前記半導体基板上に封止膜を形成し、前
記封止膜に、前記柱状電極の上面および上端部の外周面
を露出する凹部を形成することを特徴とする半導体装置
の製造方法。5. A columnar electrode is formed on a semiconductor substrate, a sealing film is formed on the semiconductor substrate including the columnar electrode, and an upper surface of the columnar electrode and an outer peripheral surface of an upper end portion are formed on the sealing film. A method for manufacturing a semiconductor device, which comprises forming an exposed recess.
止膜を形成した後、前記封止膜の上面と前記柱状電極の
上面とをほぼ面一にする研磨を行うことを特徴とする半
導体装置の製造方法。6. The invention according to claim 5, wherein after forming the sealing film, polishing is performed so that an upper surface of the sealing film and an upper surface of the columnar electrode are substantially flush with each other. Manufacturing method of semiconductor device.
止膜は、その上面が前記柱状電極の上面よりも高くなる
ように形成して、その状態で、前記封止膜に前記凹部を
形成することを特徴とする半導体装置の製造方法。7. The invention according to claim 5, wherein the sealing film is formed so that its upper surface is higher than the upper surface of the columnar electrode, and in this state, the recess is formed in the sealing film. A method of manufacturing a semiconductor device, which comprises forming the semiconductor device.
部の形成はレーザ光の照射により行うことを特徴とする
半導体装置の製造方法。8. The method of manufacturing a semiconductor device according to claim 5, wherein the recess is formed by irradiation with laser light.
部の形成は掘削加工により行うことを特徴とする半導体
装置の製造方法。9. The method for manufacturing a semiconductor device according to claim 5, wherein the recess is formed by excavation.
記柱状電極の上端部に該上端部を覆うように凹部形成用
ボールを形成し、前記柱状電極を含む前記半導体基板上
に、その上面が前記柱状電極の上面よりも高くなるよう
に封止膜を形成し、少なくとも、前記柱状電極の上端部
周囲に前記凹部形成用ボールの一部が残存するように前
記封止膜の上面側および前記凹部形成用ボールを研磨す
ることを特徴とする半導体装置の製造方法。10. A columnar electrode is formed on a semiconductor substrate, a recess forming ball is formed at an upper end portion of the columnar electrode so as to cover the upper end portion, and an upper surface thereof is formed on the semiconductor substrate including the columnar electrode. Is formed so that it is higher than the upper surface of the columnar electrode, and at least the upper surface side of the sealing film is formed so that at least a part of the recess forming ball remains around the upper end of the columnar electrode. A method of manufacturing a semiconductor device, comprising: polishing the recess forming ball.
記封止膜の上面側および前記凹部形成用ボールの研磨
を、前記柱状電極の上面が露出しない位置まで行い、前
記柱状電極上およびその上端部の周囲に前記凹部形成用
ボールの一部を残存させることを特徴とする半導体装置
の製造方法。11. The invention according to claim 10, wherein the upper surface side of the sealing film and the recess forming ball are polished until the upper surface of the columnar electrode is not exposed, and the upper surface of the columnar electrode and the upper end thereof are polished. A method of manufacturing a semiconductor device, characterized in that a part of the recess forming ball is left around the portion.
おいて、残存する前記凹部形成用ボールの一部を除去し
て、前記封止膜に凹部を形成することを特徴とする半導
体装置の製造方法。12. The method of manufacturing a semiconductor device according to claim 10, wherein a part of the remaining recess forming ball is removed to form a recess in the sealing film. .
おいて、前記凹部形成用ボールを低融点金属によって形
成し、残存する前記凹部形成用ボールの一部の上面に、
前記低融点金属と同一の材料からなる低融点金属ボール
を形成することを特徴とする半導体装置の製造方法。13. The invention according to claim 10 or 11, wherein the recess forming balls are formed of a low melting point metal, and an upper surface of a portion of the remaining recess forming balls is formed.
A method of manufacturing a semiconductor device, comprising forming a low melting point metal ball made of the same material as the low melting point metal.
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JP2006165393A (en) * | 2004-12-09 | 2006-06-22 | Rohm Co Ltd | Semiconductor device and manufacturing method of semiconductor device |
JP2006269804A (en) * | 2005-03-24 | 2006-10-05 | Mitsumi Electric Co Ltd | Semiconductor device |
JP2007281236A (en) * | 2006-04-07 | 2007-10-25 | Oki Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
US7944064B2 (en) | 2003-05-26 | 2011-05-17 | Casio Computer Co., Ltd. | Semiconductor device having alignment post electrode and method of manufacturing the same |
JP7319808B2 (en) | 2019-03-29 | 2023-08-02 | ローム株式会社 | Semiconductor equipment and semiconductor packages |
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2002
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JP2005109496A (en) * | 2003-09-29 | 2005-04-21 | Phoenix Precision Technology Corp | Semiconductor package substrate for forming pre-solder structure, the semiconductor package substrate in which pre-solder structure is formed, and the manufacturing methods |
JP4660643B2 (en) * | 2003-09-29 | 2011-03-30 | 欣興電子股▲分▼有限公司 | Semiconductor package substrate for forming pre-solder structure, semiconductor package substrate on which pre-solder structure is formed, and manufacturing method thereof |
JP2006080267A (en) * | 2004-09-09 | 2006-03-23 | Oki Electric Ind Co Ltd | Method of manufacturing semiconductor device |
JP4653447B2 (en) * | 2004-09-09 | 2011-03-16 | Okiセミコンダクタ株式会社 | Manufacturing method of semiconductor device |
JP2006165393A (en) * | 2004-12-09 | 2006-06-22 | Rohm Co Ltd | Semiconductor device and manufacturing method of semiconductor device |
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JP2007281236A (en) * | 2006-04-07 | 2007-10-25 | Oki Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
JP7319808B2 (en) | 2019-03-29 | 2023-08-02 | ローム株式会社 | Semiconductor equipment and semiconductor packages |
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