JP2002175984A - Method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To use an inexpensive glass substrate, form a crystalline silicon layer having proper semiconductor physical properties and further improve the throughput, in a method of manufacturing a semiconductor device which uses crystalline silicon layers. SOLUTION: An amorphous silicon layer on an insulating substrate 101 is subjected to ultraviolet-ray irradiation and heat treatment to allow crystal growth, and the crystal growth is stopped in a state with amorphous silicon remaining. The remaining amorphous silicon is further crystallized by laser beams or the like. Since the insulating substrate receives a small amount of heat by the heat treatment, an inexpensive glass substrate, having low heat resistance and high heat shrinkability, can be used as the insulating substrate. Since time required for heat treatment is shortened, the throughput is improved. Since the remaining amorphous silicon is crystallized after the crystal growth has temporarily stopped, a semiconductor device having proper characteristics can be manufactured.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device using a crystalline silicon layer. More specifically, the present invention relates to a method for manufacturing a semiconductor device such as an active matrix type liquid crystal display device, a contact type image sensor, and a thin film transistor (TFT) used for a three-dimensional IC.

[0002]

2. Description of the Related Art In recent years, a substrate having an insulating surface such as a glass plate or a quartz plate (hereinafter also referred to as an insulating substrate) has been developed for use in a large or high resolution active matrix type liquid crystal display device or a high resolution image sensor. )), There is a need for a technique for forming a high-performance semiconductor device. As a semiconductor device, a thin film transistor (TFT) is known, and a thin film silicon semiconductor is generally used as an element material.

[0003] Thin-film silicon semiconductors are broadly classified into those made of an amorphous silicon semiconductor and those made of a crystalline silicon semiconductor. Amorphous silicon semiconductors are most commonly used because they have a low manufacturing temperature, can be manufactured relatively easily by a gas phase method, and have high mass productivity. However, physical properties such as conductivity are inferior to crystalline silicon semiconductors. In order to further improve the characteristics of the semiconductor device, a method for manufacturing a semiconductor device using a crystalline silicon semiconductor as an element material is required. Need to be established.

[0004] Silicon semiconductors having crystallinity include:
Polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystalline component, semi-amorphous silicon having an intermediate state between crystalline and amorphous are known. As a method for obtaining a thin film silicon semiconductor having such crystallinity, there is known a method in which a silicon layer having crystallinity is directly formed on a substrate during film formation.

[0005] In this method, crystallization proceeds simultaneously with the film formation step. Therefore, in order to obtain a crystalline silicon layer having a large grain size, it is essential to increase the thickness of the silicon layer. It is difficult to uniformly form the conductive silicon layer on the entire surface of the substrate. When the film formation temperature is 60
Since the temperature is 0 ° C. or higher, there is a problem that an inexpensive glass substrate having low heat resistance and high heat shrinkage cannot be used. Further, since a long time is required for film formation, there is a problem that manufacturing efficiency (hereinafter, also referred to as throughput) is low.

As another method for obtaining a crystalline silicon semiconductor in the form of a thin film, an amorphous silicon layer is formed on a substrate, and the amorphous silicon layer is subjected to a heat treatment to form the amorphous silicon layer. There is a method of solid-phase crystallization (Japanese Patent Laid-Open No. 62-1).
22172, JP-A-3-290924 and JP-A-4-165613). This solid-phase crystallization method has an advantage that a thin-film crystalline silicon layer can be uniformly formed on a large-area substrate, as compared with the above-described method in which a crystalline silicon layer is directly formed on a substrate. is there. However, in the solid-phase crystallization method, heat treatment at a high temperature of 600 ° C. or more for several tens of hours is required for crystallization. Therefore, there is a problem that an inexpensive glass substrate cannot be used and the throughput is low.

Japanese Patent Application Laid-Open No. 7-58338 discloses a method for crystallizing an amorphous silicon layer by heat treatment in the presence of a metal element such as nickel. The crystallization can be performed at such a temperature, so that there is an advantage that an inexpensive glass substrate can be used. However, since crystallization requires about 4 hours, further improvement is required in terms of throughput.

[0008]

SUMMARY OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device using a crystalline silicon layer, which uses an inexpensive glass substrate and forms a crystalline silicon layer having good semiconductor properties. And to further improve the throughput.

[0009]

According to the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: forming an amorphous silicon layer on a substrate having an insulating surface; A first crystallization step of performing a heat treatment to perform crystal growth and stopping the crystal growth in a state where the amorphous silicon remains, and a second crystallization step of crystallizing the remaining amorphous silicon. including.

In the method for manufacturing a semiconductor device according to the present invention,
It is preferable that the crystal growth is stopped in the first crystallization step in a state where the crystallinity is 90 to 95%. Preferably, the step of forming the amorphous silicon layer is performed by a plasma CVD method.

In the method for manufacturing a semiconductor device according to the present invention,
The second crystallization step omits dehydrogenation annealing on the amorphous silicon layer that has passed through the first crystallization step,
The method may be a step of crystallizing the remaining amorphous silicon by laser processing.

In the method for manufacturing a semiconductor device according to the present invention,
Preferably, before the second crystallization step, a step of introducing a metal element that promotes crystallization of the amorphous silicon layer into the amorphous silicon layer is further included. Further, it is preferable that the metal element is at least one metal element selected from the group consisting of Ni, Co, Pd, and Pt.

A liquid crystal display device according to the present invention includes a semiconductor device manufactured by the above-described method for manufacturing a semiconductor device.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a semiconductor device according to the present invention comprises the steps of: forming an amorphous silicon layer on an insulating substrate;
A first crystallization step of subjecting the amorphous silicon layer to ultraviolet irradiation and heating to cause crystal growth, and stopping crystal growth in a state where the amorphous silicon remains; A second crystallization step of crystallizing silicon.

As a method for forming an amorphous silicon layer on an insulating substrate, there are a sputtering method and a plasma CVD (Chemical V) method.
apor Deposition) method. In the present invention, a plasma CVD method is preferable. According to the plasma CVD method, an amorphous silicon layer can be formed at a low temperature and at a high speed. The thickness of the amorphous silicon layer formed on the insulating substrate is about 50 to 150 nm.

The irradiation of the amorphous silicon layer with ultraviolet rays is performed by irradiating the amorphous silicon layer on the insulating substrate with ultraviolet rays using a xenon lamp or the like.
By using an ultraviolet lamp such as a xenon lamp, there is an advantage that the processing time for a large-area substrate is reduced. The irradiation conditions for the ultraviolet irradiation treatment are not particularly limited. For example, when an ultraviolet lamp is used, the lamp power is 5 to 20 kW and the irradiation time is about 10 to 30 seconds.
The heat treatment for the amorphous silicon layer is performed using an infrared heater or the like in a nitrogen atmosphere before and / or after the ultraviolet irradiation treatment. Preferably, heat treatment is performed before and after the ultraviolet irradiation treatment.

The conditions of the heat treatment are not particularly limited. For example, when the ultraviolet irradiation is performed at a lamp power of 5 to 20 kW for 10 to 30 seconds, 500 to 7 seconds before the ultraviolet irradiation.
20 to 200 seconds at 50 ° C., 50
Heat treatment is performed at 0 to 750 ° C for 20 to 200 seconds. Note that the above temperature of the heat treatment is a temperature at the surface of the substrate, not a temperature of the entire substrate. Therefore, even when the temperature of the heat treatment is 600 ° C. or higher, if the heat treatment is performed for a short time, the temperature of the entire substrate can be lower than 600 ° C., and an inexpensive glass substrate can be used.

According to the present invention, the time required for the heat treatment can be reduced to about several minutes by combining the ultraviolet irradiation treatment and the heat treatment in the first crystallization step. Therefore, even when the temperature of the heat treatment is 600 ° C. or higher, an inexpensive glass substrate having low heat resistance and high heat shrinkage can be used as the insulating substrate because the amount of heat received by the insulating substrate is small. Further, since the time required for the heat treatment is reduced, the throughput is improved.

The amorphous silicon layer formed by the above-mentioned plasma CVD method contains a large amount of hydrogen, and when performing laser annealing with a laser beam described later, the hydrogen in the silicon layer is reduced to a certain level or less. It is necessary to keep. This is because if the concentration of hydrogen is too high, hydrogen may be rapidly generated from within the silicon layer during laser irradiation, damaging the silicon layer. Conventionally, a dehydrogenation annealing step is required before the laser annealing after forming the amorphous silicon layer by the plasma CVD method, so that the throughput in the semiconductor device manufacturing process has been reduced.

According to the study of the present inventors, hydrogen can be removed from the amorphous silicon layer by the ultraviolet irradiation treatment. Therefore, even when an amorphous silicon layer is formed on an insulating substrate by a plasma CVD method,
Since it is not necessary to separately execute the dehydrogenation annealing step, the time for the manufacturing process of the semiconductor device can be reduced.

By subjecting the amorphous silicon layer to the ultraviolet irradiation treatment and the heat treatment, the amorphous silicon layer on the substrate grows in crystal (first crystallization step). However, in the present invention, the crystal growth by the ultraviolet irradiation treatment and the heat treatment is stopped in a state where the amorphous silicon remains.

In the method for manufacturing a semiconductor device according to the present invention,
It is preferable to stop the crystal growth in the first crystallization step in a state where the crystallinity is 90 to 95%. In other words, 5 to 10% of amorphous silicon is contained in the silicon layer.
Preferably, it remains. In the first crystallization step, if the degree of crystallinity exceeds 95%, characteristics of the semiconductor device such as TFT characteristics deteriorate, and in particular, the field effect mobility slightly deteriorates. When the crystallinity is less than 90%,
Even in the second crystallization step to be described later, the crystallization is not completely performed, and there is a possibility that problems such as failure to obtain good TFT characteristics may be caused.

The degree of crystallinity is a planar area ratio of the crystallized region obtained after the first crystallization step to the entire silicon layer, and is obtained by using an optical microscope or the like to determine the area of the crystallized region or the area of the amorphous region. Can be determined by measuring

After the first crystallization step, the remaining amorphous silicon is crystallized (second crystallization step). The method for crystallizing the remaining amorphous silicon is not particularly limited, and examples thereof include a heat treatment method such as RTA (Rapid Thermal Annealing) using laser light, infrared light, or a flash lamp. Examples of the laser used include a pulse laser such as a KrF excimer laser, a continuous wave Ar laser, and the like, and an excimer laser having a wavelength of 400 nm or less is particularly preferable. For example, a wavelength of 248 nm
KrF excimer laser, XeCl excimer laser having a wavelength of 308 nm, and ArF excimer laser having a wavelength of 198 nm.

With an excimer laser having a wavelength of 400 nm or less, only a silicon layer on an insulating substrate can be heated in a short time without thermally damaging an insulating substrate such as a glass substrate. An excimer laser has a large oscillation output and is suitable for processing a large-area substrate.
Surface energy density of laser light is 200-400mJ
/ Cm ² is preferred, and 2 per one surface of the silicon layer.
Laser irradiation of 10 to 10 shots is performed. It is preferable to heat the insulating substrate to about 200 to 450 ° C. at the time of laser light irradiation.

According to the present invention, since the crystal growth is temporarily stopped in the first crystallization step and the remaining amorphous silicon is crystallized in the second crystallization step, a semiconductor having good characteristics The device can be manufactured.

In the present invention, before the first crystallization step,
It is preferable that the method further includes a step of introducing a metal element which promotes crystallization of the amorphous silicon layer into the amorphous silicon layer. Metal elements that promote crystallization of the amorphous silicon layer include Ni, Co, Pd, Pt, Cu, Ag, Au, and I.
Examples include n, Sn, Al and Sb.
At least one metal element selected from the group consisting of Co, Pd and Pt is preferably used.

As a method for introducing a metal element, there are a sputtering method, a vapor deposition method, a plating method, an ion doping method, and a CVD method.
And a spin coating method. Spin coating is a method in which a solution or dispersion of a metal element is applied to an insulating substrate and dried, and is introduced into an amorphous silicon layer by adjusting the concentration of the metal element in the solution or dispersion. There is an advantage that the amount of the metal element can be adjusted. The introduction amount of the metal element is 1 × 10 ¹² to 1 × in the surface concentration.
It is about 10 ¹³ atoms / cm ² . The surface concentration of the metal element can be measured by, for example, total reflection X-ray fluorescence (TRXRF).

The step of introducing the metal element into the amorphous silicon layer may be performed before or after the formation of the amorphous silicon layer on the insulating substrate, before the first crystallization step. . Note that usually, before forming an amorphous silicon layer on an insulating substrate, a base layer made of silicon oxide is formed on the insulating substrate so that impurities in the insulating substrate diffuse into the amorphous silicon layer. prevent. Since the surface of the amorphous silicon layer is hydrophobic while the surface of the underlayer is hydrophilic,
When spin-coating is performed using a hydrophilic solvent, coating on the underlayer can be performed more stably than coating on the amorphous silicon layer.

A semiconductor device manufactured by the manufacturing method of the present invention includes a switching device for controlling a voltage applied to a pixel electrode in a liquid crystal display device, and a periphery provided around a display region for driving the switching device. It can be used as a driving circuit. For example, a TFT manufactured by the manufacturing method of the present invention can be used as a switching device for driving a pixel of a liquid crystal display device. In addition to a semiconductor device for a liquid crystal display device, for example, a contact-type image sensor, a thermal head with a built-in driver, an optical writing element or display element with a built-in driver using an organic EL or the like as a light emitting element, a three-dimensional IC, etc. The semiconductor device according to the present invention can be used.

The liquid crystal display device of the present invention is manufactured using a semiconductor device manufactured by the manufacturing method of the present invention. For example, a liquid crystal material is sealed by a TFT substrate manufactured according to the present invention and a substrate facing the TFT substrate to manufacture a liquid crystal display device.

Hereinafter, embodiments of the present invention will be described with reference to the drawings, taking a TFT as an example. The manufacturing method of the present invention is not limited to the MOS transistor described in the present embodiment, but can be widely applied to all semiconductor processes including a bipolar transistor using a crystalline semiconductor as an element material and an electrostatic induction transistor. .

[Embodiment 1] FIGS. 1 (a) to 1 (d)
4A to 4C show manufacturing steps of an N-type TFT in the order of steps. First, a plasma CV is placed on an insulating substrate 101 such as a glass substrate.
A 200-nm-thick silicon oxide base layer 102 is formed by Method D. Next, an intrinsic (I-type) amorphous silicon layer having a thickness of 100 nm is formed by a plasma CVD method. As the CVD apparatus, a parallel plate type plasma CVD apparatus is used, and SiH ₄ gas and H ₂ gas can be used as material gases. RF power density of 1
Set to 0~100mW / cm ² (e.g., 80mW / cm ^2). Note that the insulating substrate is preferably heated to 400 ° C. or less when the amorphous silicon layer is formed.

Unnecessary portions of the amorphous silicon layer are removed to perform element isolation, and thereafter, an element forming region 103 to be a source region, a drain region and a channel region of a TFT is formed, and a number of island regions are formed. . When manufacturing an active matrix liquid crystal display device, a large number of island regions are formed in a matrix.

Next, the amorphous silicon layer in the element forming region 103 is crystallized by performing an ultraviolet irradiation process and a heating process (FIG. 1A). However, it does not completely crystallize,
About 10% of an amorphous portion is left. Specifically, 6
After preheating at 00 ° C. for 90 seconds, ultraviolet rays are generated using a xenon lamp, and ultraviolet rays are irradiated at a power of 8 kW for 20 seconds. After that, heat treatment is performed at 600 ° C. for 60 seconds.

The amorphous silicon remaining in the element forming region 103 is crystallized by laser irradiation (FIG. 1).
(B)). As the laser light, a KrF excimer laser having a wavelength of 248 nm and a pulse width of 20 nsec can be used. The laser light has an energy density of 250 mJ / c
m ^2, and irradiation of two shots is performed per one place. It is useful to heat the insulating substrate 101 to about 200 to 450 ° C. during laser light irradiation.

Thereafter, the film thickness of 1 was formed by plasma CVD.
Forming a 100 nm silicon oxide layer to form a gate insulating layer 10
4 is formed. Subsequently, a film thickness of 40
An aluminum layer having a thickness of 0 to 800 nm, for example, 600 nm is formed. The gate electrode 105 is formed by patterning the aluminum layer. The surface of the gate electrode 105 is anodized to form an oxide layer 106 having a thickness of about 200 nm on the surface.
To form The anodic oxidation is performed in an ethylene glycol solution containing tartaric acid at 1 to 5% by weight. The oxide layer 1
By adjusting the film thickness of No. 06, the length of the offset gate region can be adjusted.

Then, impurities such as phosphorus or boron are implanted into the active region by ion doping using the gate electrode 105 and the oxide layer 106 as a mask. Phosphine (PH ₃ ) is used as a doping gas, the acceleration voltage is 60 to 90 kV, for example, 80 kV, and the dose is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 2 × 10 ¹⁵ c.
m ^-2 . The region into which impurities are implanted in this step becomes a source region 107 and a drain region 109 later, and the region which is masked by the gate electrode 105 and the oxide layer 106 and into which impurities are not implanted is later formed by a TFT.
(FIG. 1C). On this occasion,
In the case of manufacturing a circuit in which an N-type TFT and a P-type TFT are formed in a complementary manner, the respective regions are selectively doped by covering a region where impurity doping is required with a photoresist, thereby forming an N-type TFT. An impurity region and a P-type impurity region are separately formed.

Thereafter, by performing a heat treatment at 550 ° C. for 4 hours in an inert atmosphere, for example, a nitrogen atmosphere, the ion-implanted impurities are activated. Subsequently, as shown in FIG. 1D, a silicon oxide layer 110 having a thickness of 600 nm is formed as an interlayer insulating film by a plasma CVD method. A contact hole is formed in the silicon oxide layer 110, and a source electrode (wiring) 111 of the TFT is formed of a multilayer of a metal material, for example, titanium nitride and aluminum.
And a drain electrode (wiring) 112 is formed. In addition,
When this TFT is used as a pixel switch element of a liquid crystal display device or the like, a pixel electrode made of ITO is formed instead of the drain electrode (wiring) 112. Then, heat treatment is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm to manufacture a TFT.

Embodiment 2 Another embodiment of the manufacturing method of the present invention will be described with reference to FIG. First, in the same manner as in the first embodiment, an underlayer 202 made of silicon oxide having a thickness of 200 nm is formed on an insulating substrate 201 such as a glass substrate, and an intrinsic (I-type) non-conductive layer having a thickness of 50 to 150 nm, for example, 100 nm is formed. A crystalline silicon layer is formed. Unnecessary portions of the amorphous silicon layer are removed to perform element isolation, and an element formation region 203 to be a source region, a drain region, and a channel region of a TFT is formed later, and a number of island regions are formed.

Thereafter, a film thickness of 0.5
A nickel silicide layer (not shown) having a thickness of ２０20 nm, for example, 2 nm is formed (FIG. 2A). The insulating substrate 201 is placed in a hydrogen reducing atmosphere, preferably with a partial pressure of hydrogen of 0.1 to 1.
A heat treatment is performed at 600 ° C. for 5 hours while maintaining the atmosphere in a hydrogen reducing atmosphere or an inert atmosphere (atmospheric pressure).

Next, in the same manner as in the first embodiment, the amorphous silicon layer in the element forming region 203 is crystal-grown by performing ultraviolet irradiation and heat treatment. However, it is not completely crystallized, and an amorphous portion of about 10% is left. Specifically, after preheating at 600 ° C. for 70 seconds, ultraviolet rays are generated using a xenon lamp, and ultraviolet rays are irradiated at a power of 8 kW for 10 seconds. After that, heat treatment is performed at 600 ° C. for 50 seconds. According to this embodiment, since the nickel silicide layer containing nickel for promoting crystallization is formed on the amorphous silicon layer, the processing time of the ultraviolet irradiation and the heat treatment is longer than that of the first embodiment. Be shortened.

Thereafter, as in the first embodiment, crystallization is performed by laser irradiation (FIG. 2B). Further, a gate insulating layer 204, a gate electrode 205, and an oxide layer 206 are formed, and a source region 207,
A channel region 208 and a drain region 209 are formed (FIG. 2C). After activation of the impurities, FIG.
As shown in (d), a silicon oxide layer 210 is formed,
A TFT is manufactured by forming a source electrode (wiring) 211 and a drain electrode (wiring) 212 of the TFT.

Third Embodiment In the second embodiment, a case has been described in which nickel as a metal element that promotes crystallization of an amorphous silicon layer is introduced by a sputtering method. However, the introduction of a metal element is performed by a spin coating method. Can also be done. Specifically, a base layer made of silicon oxide is formed on an insulating substrate, a metal element-containing solution is held on the base layer, and the solution is uniformly spread by a spinner and dried. For example, using nickel acetate as a solute and ethanol as a solvent, the nickel concentration is 1 to 10%.
A nickel-containing solution of about ppm is prepared, and this solution is spin-coated.

In the second and third embodiments, the case where the metal element is introduced before the formation of the amorphous silicon layer on the insulating substrate has been described. It may be performed after forming the silicon layer. Further, in the above embodiment, the case where the crystallization of the amorphous silicon layer is performed after the isolation between the elements has been described. However, the isolation between the elements is performed after the crystallization of the amorphous silicon layer is completed. You may. However, in the case where amorphous silicon is crystallized by laser irradiation, it is preferable that separation between elements be performed before laser irradiation to remove unnecessary portions of the silicon layer. By removing unnecessary portions of the silicon layer in advance, laser irradiation can be performed only on necessary portions, so that the time required for laser irradiation is shortened, and throughput is improved.

[0046]

According to the present invention, when an amorphous silicon layer is crystallized, an insulative substrate receives a small amount of heat by heat treatment, so that an inexpensive glass substrate having low heat resistance and high heat shrinkage is insulated. It can be used as a substrate. Further, since the time required for the heat treatment is reduced, the throughput is improved.

When the amorphous silicon layer is formed by the plasma CVD method, it is not necessary to separately perform a dehydrogenation annealing step on the amorphous silicon layer, so that the throughput is improved.

According to the present invention, after temporarily stopping the crystal growth in the first crystallization step and then crystallizing the remaining amorphous silicon in the second crystallization step, a semiconductor having good characteristics The device can be manufactured.

[Brief description of the drawings]

FIG. 1 is a view schematically showing a manufacturing process of an N-type TFT according to a first embodiment.

FIG. 2 is a view schematically showing a manufacturing process of an N-type TFT according to a second embodiment.

[Explanation of symbols]

 101, 201 Insulating substrate 102, 202 Underlayer 103, 203 Element formation region 104, 204 Gate insulating layer 105, 205 Gate electrode 106, 206 Oxide layer 107, 207 Source region 108, 208 Channel region 109, 209 Drain region 110, 210 silicon oxide layer 111, 211 source electrode 112, 212 drain electrode

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Claims (7)

[Claims] A step of forming an amorphous silicon layer on a substrate having an insulating surface; and performing an ultraviolet irradiation treatment and a heat treatment on the amorphous silicon layer to cause crystal growth. A method of manufacturing a semiconductor device, comprising: a first crystallization step of stopping crystal growth in a state where silicon remains; and a second crystallization step of crystallizing the remaining amorphous silicon. 2. The method according to claim 1, wherein the stopping of the crystal growth in the first crystallization step is performed with a degree of crystallinity of 90 to 95%. 3. The method according to claim 1, wherein the step of forming the amorphous silicon layer is performed by a plasma CVD method. 4. The second crystallization step omits dehydrogenation annealing on the amorphous silicon layer that has undergone the first crystallization step, and crystallizes the remaining amorphous silicon by laser processing. 4. The method for manufacturing a semiconductor device according to claim 3, which is a step. 5. The method according to claim 1, further comprising, before the second crystallization step, introducing a metal element that promotes crystallization of the amorphous silicon layer into the amorphous silicon layer. 13. A method for manufacturing a semiconductor device according to 6. The method according to claim 5, wherein the metal element is at least one metal element selected from the group consisting of Ni, Co, Pd, and Pt. 7. A liquid crystal display device including a semiconductor device manufactured by the method of manufacturing a semiconductor device according to claim 1.