JP3859516B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
This invention relates to a method of manufacturing a semiconductor equipment. More particularly, a method of manufacturing a semiconductor equipment which the crystalline silicon film amorphous silicon film is crystallized with the active region. In particular, the present invention is effective for a semiconductor device using a thin film transistor (TFT) provided on a base slope having an insulating surface, and is an active matrix liquid crystal display device, a contact image sensor, or a three-dimensional IC (integrated circuit). Can be used for etc.
[0002]
[Prior art]
In recent years, high-performance semiconductor elements have been formed on insulating substrates such as glass for the realization of large-sized, high-resolution liquid crystal display devices, high-speed, high-resolution contact image sensors, and three-dimensional ICs. Has been tried. Usually, a thin film silicon semiconductor is generally used for a semiconductor element used in the above-described apparatus. The thin-film silicon semiconductor is roughly classified into two types, that is, an amorphous silicon semiconductor (a-Si) and a crystalline silicon film.
[0003]
The amorphous silicon semiconductor can be produced relatively easily by a vapor phase method because of its low production temperature, and is most commonly used because of its high productivity. However, since the physical properties such as conductivity are inferior to silicon semiconductors having crystallinity, in order to realize the higher speed characteristics of the liquid crystal display device, the contact image sensor, or the three-dimensional IC in the future, Establishment of a method for manufacturing a thin-film semiconductor device made of a silicon semiconductor having a high demand is strongly demanded. Note that polycrystalline silicon, microcrystalline silicon, and the like are known as crystalline silicon semiconductors.
[0004]
As a method of obtaining a thin film silicon semiconductor having the above crystallinity,
(1) Method of directly forming a film having crystallinity during film formation
(2) A method of forming an amorphous semiconductor film, irradiating the amorphous semiconductor film with intense light, and crystallizing with the energy
(3) A method is known in which an amorphous semiconductor film is formed and crystallized by applying thermal energy to the amorphous semiconductor film.
[0005]
However, in the method (1), since crystallization proceeds simultaneously with the film forming step, it is indispensable to increase the film thickness in order to obtain crystalline silicon having a large particle size, and a film having good semiconductor physical properties is required. It is technically difficult to form a film over the entire surface of the substrate. In addition, the film formation temperature is as high as 600 ° C. or higher, and there is a problem in cost that an inexpensive glass substrate cannot be used.
[0006]
In the method (2), since the crystallization phenomenon in the melting and solidifying process is used, the grain boundary is satisfactorily processed with a small particle diameter, and high-quality crystalline silicon is obtained. However, taking the case of using an excimer laser that is currently most commonly used as an example, the stability of the laser beam is not sufficient, so that the entire surface of a large area substrate is uniformly processed to have uniform crystallinity. There is a problem that it is difficult to obtain a silicon film and it is difficult to obtain a plurality of semiconductor elements having uniform characteristics on the same base slope. Furthermore, there is a problem that the irradiation area of the laser beam is small and the throughput is low.
[0007]
In addition, the method (3) has an advantage that it can cope with a large area as compared with the methods (1) and (2), but the crystallization takes several tens of hours at a high temperature of 600 ° C. or higher. Heat treatment is required. That is, in order to use an inexpensive glass substrate and improve the throughput, it is necessary to simultaneously solve the conflicting problems of lowering the heating temperature and crystallizing in a short time. Further, in the method (3), in order to utilize the solid phase crystallization phenomenon, the crystal grains spread in parallel with the substrate surface and even have a grain size of several μm. However, since the grown crystal grains collide with each other to form a grain boundary, the grain boundary acts as a trap level for carriers and causes a decrease in TFT mobility.
[0008]
By applying the method (3) above, a method for producing a silicon film having high quality and uniform crystallinity by heat treatment at a lower temperature and in a shorter time is disclosed in JP-A-6-333824 and JP-A-Hei. 6-333825 and JP-A-8-330602. In these publications, a metallic element such as nickel is introduced into the surface of an amorphous silicon film, and then heat treatment is performed, so that the processing time is as low as 600 ° C. and several hours. Crystallization is performed.
[0009]
The mechanism of crystallization is understood by firstly generating crystal nuclei with a metal element as a nucleus, and then promoting the crystal growth by using the metal element as a catalyst to rapidly advance crystallization. In that sense, these metal elements will be called catalyst elements in the future. Crystallization is facilitated by these catalytic elements, and the crystalline silicon film that has grown is a columnar crystal, whereas the silicon film crystallized by the usual solid phase growth method has a twin structure. The inside of each columnar crystal is in a state close to a single crystal.
[0010]
If the catalyst element that promotes the crystallization remains in the silicon film, normal TFT characteristics cannot be obtained. Therefore, gettering using P ions or the like is performed as disclosed in JP-A-6-333824 and JP-A-8-236471. A PSG (phosphorus silicide glass) film is provided on the surface of the silicon film containing the catalytic element, a method of gettering the catalytic element with phosphorus contained therein, and phosphorus ions are implanted into the silicon film containing the catalytic element by an ion doping method And a method of providing a film having phosphorus or boron and gettering a catalytic element there has been proposed.
[0011]
In a TFT using a crystalline silicon film obtained by a method of promoting crystallization with the above catalyst element, the performance of a high ratio of on-current and off-current (leakage current) and high withstand voltage is required. As a method for reducing the off-current, a dual gate structure, a polysilicon thin film, and an LDD (Lightly Doped Drain) structure are considered, but all have advantages and disadvantages. The dual gate structure is a method in which two or more transistors are connected in parallel and the gate electrode is shared, and the off-current is reduced by relaxing the drain region electric field when the transistors are turned off. However, forming two or more transistors in a limited space leads to a decrease in the aperture ratio of the picture element, which is not desirable.
[0012]
Polysilicon thinning is a very simple method, and by reducing the thickness, the resistance between the source region and the drain region is increased to reduce the off-current. However, the expected reduction effect is not obtained. In the LDD (Lightly Doped Drain) structure, for example, when the source region and the drain region are n + layers, n − layers are provided between the channel region and the source region and between the channel region and the drain region. In general, after forming a gate electrode on a polysilicon film, low concentration ions are implanted using the gate electrode as a mask to form an n− layer. Next, a sidewall insulator is formed on the sidewall of the gate electrode, and then ion implantation is performed again to form an n + layer.
[0013]
As another method, after forming an n − layer by oblique rotation ion implantation using the gate electrode as a mask, an n + layer is formed by a normal ion implantation method. This method is called a gate overlap LDD structure because the n − layer deeply enters the channel region and the gate electrodes greatly overlap.
[0014]
In either structure, the off-current can be reduced by relaxing the drain region electric field and improving the breakdown voltage. However, when a voltage is applied to the gate electrode, the parasitic resistance of the source region n − layer is reduced. As a result, the current driving capability decreases. On the other hand, in the gate overlap LDD structure, since the n − layer exists under the gate electrode, the current driving capability is not impaired.
[0015]
[Problems to be solved by the invention]
However, in the above semiconductor device, in the method of forming the source region, the drain region (high concentration portion) and the LDD region (low concentration portion) by ion implantation, fluctuations in ion implantation conditions and the film thickness distribution of the gate insulating film Due to the influence, there is a problem that the resistance of the LDD region varies widely and is difficult to control. In addition, ion implantation is required a plurality of times, and the manufacturing process such as formation of a sidewall insulator or oblique rotation ion implantation is complicated, so that there is a problem that the process is not efficient.
[0016]
It is an object of the present invention, the resistance control of the source region, drain region and LDD region can be accurately, it is possible to improve reliability, and simplify the manufacturing process to provide a method of manufacturing a semiconductor equipment which can improve the productivity There is.
[0017]
[Means for Solving the Problems]
[0018]
[0019]
[0020]
[0021]
[0022]
[0023]
[0024]
[0025]
[0026]
[0027]
[0028]
[0029]
[0030]
[0031]
[0032]
[0033]
[0034]
[0035]
In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention includes a step of forming an amorphous silicon film on a substrate having an insulating surface, and a crystal of the amorphous silicon film on the amorphous silicon film. A step of introducing a catalyst element that promotes crystallization, and a heat treatment of the amorphous silicon film into which the catalyst element that promotes crystallization is introduced, whereby the amorphous silicon film is crystal-grown and crystallized. A step of forming a silicon film, a step of forming an amorphous silicon film having a conductivity type so as to form two island regions at a predetermined interval on the crystalline silicon film, and the crystalline silicon film And a step of forming a gate insulating film covering the amorphous silicon film having the conductivity type, and after forming the gate insulating film, two island regions are formed on the gate insulating film at a predetermined interval. like A step of forming a gate electrode so that a part of the inner side of the amorphous silicon film having the conductive type overlaps, and after forming the gate electrode, an interlayer is formed on the gate insulating film and on the gate electrode. A step of forming an insulating film; and a step of crystallizing the amorphous silicon film having the above conductivity type by energy beam irradiation using the gate electrode as a mask after forming the interlayer insulating film. .
[0036]
According to the method for manufacturing a semiconductor device, an amorphous silicon film having a predetermined impurity concentration (phosphorus, boron, etc.) is formed on the crystalline silicon film, and the gate electrode is used as a mask. By crystallization and activation by energy beam irradiation, the resistance of the source region, the drain region, and the LDD region (source side high resistance region, drain side high resistance region) can be easily controlled. The LDD region (source side high resistance region, drain side high resistance region) that overlaps the gate electrode of the amorphous silicon film is shielded by the gate electrode when activated by irradiation with an energy beam (for example, a laser or a lamp). By reducing the activation rate, a high resistance region is formed. Since an impurity concentration (phosphorus or boron) is determined in advance and an energy beam (for example, laser or lamp) is irradiated with a constant energy, the source region, drain region and LDD region (source side high resistance region, drain side high resistance region) ) Resistance control can be easily performed. Further, the amorphous silicon film having the conductivity type can be easily controlled by forming an amorphous silicon film having the above conductivity type on the silicon film having crystallinity by using a CVD method or the like, and the amorphous silicon film having the conductivity type. The peak of the concentration profile of impurity elements (phosphorus, boron, etc.) in the source region, drain region and LDD region formed from the substrate is selectively brought to the upper side of the crystalline silicon film where the current path is formed. it can. Further, since the source region, the drain region and the LDD region (source side high resistance region, drain side high resistance region) can be formed at the same time, the process can be shortened.
[0037]
In one embodiment of the method for manufacturing a semiconductor device, the amorphous silicon film having the above-described conductivity type is a mixed gas of silane gas, hydrogen gas, PH ₃ gas, or a mixed gas of silane gas, hydrogen gas, B ₂ H ₆ gas. It is characterized by being formed by a plasma CVD method using
[0038]
According to the method for manufacturing a semiconductor device of the above embodiment, the amorphous silicon film having the above conductivity type is formed by plasma CVD using silane gas, hydrogen gas, PH ₃ gas, or B ₂ H ₆ gas. By adjusting the gas amount, the impurity element (phosphorus or boron) can be doped with higher accuracy than the ion implantation method.
[0039]
Also, in one embodiment of the method for manufacturing a semiconductor device, the amorphous silicon film in which the catalyst element for promoting crystallization is introduced is formed in the step of forming the crystalline silicon film by crystal growth of the amorphous silicon film. After the silicon film is crystallized by heat treatment, the crystallized silicon film is completely crystallized by any one of heat treatment in a furnace, lamp annealing, laser irradiation, or a combination thereof. It is characterized by.
[0040]
According to the method for manufacturing a semiconductor device of the above embodiment, the amorphous silicon layer into which the catalytic element is introduced is sufficiently obtained by any one method among heat treatment using a furnace, lamp annealing, and laser irradiation, or a combination thereof. It is possible to crystallize. In the heat treatment or lamp irradiation, it is particularly desirable that the amorphous silicon film is not completely crystallized but is completely crystallized by a subsequent laser. In other words, it is particularly desirable to perform crystallization by a combination of heat treatment and laser, or a combination of lamp annealing and laser, which dramatically improves transistor characteristics.
[0041]
In one embodiment of the method of manufacturing a semiconductor device, in the step of growing the amorphous silicon film to form a crystalline silicon film, the heat treatment after the introduction of the catalytic element is performed at 540 ° C. to 600 ° C. It is characterized by being performed within the temperature range.
[0042]
According to the method for manufacturing the semiconductor device of the above embodiment, when the heat treatment is performed within the temperature range of 540 ° C. to 600 ° C. after the introduction of the catalytic element, the amorphous silicon film may be completely crystallized. Absent. Accordingly, after introducing the catalyst element for promoting crystallization, the crystallization is incomplete when crystallization is performed by heat treatment, and the transistor characteristics are improved by complete crystallization by laser annealing.
[0043]
In one embodiment of the method for manufacturing a semiconductor device, at least nickel is used as the catalyst element.
[0044]
According to the method for manufacturing a semiconductor device of the above embodiment, the catalyst element usually promotes crystal growth of the amorphous silicon film by silicidation. For example, the crystal structure of NiSi ₂ which is a silicide compound of nickel as the catalyst element is most similar to the crystal structure of single crystal silicon among the silicide compounds of various catalyst elements, and its lattice constant is also the lattice of crystal silicon. Very close to a constant. Therefore, the NiSi ₂ acts as the best template for crystallization of the amorphous silicon film, and the crystallization of the amorphous silicon film is greatly promoted.
[0045]
Also, in one embodiment of the method for manufacturing a semiconductor device, the amorphous silicon film having the above-described conductivity type is crystallized by one of lamp annealing or laser irradiation or a combination thereof, and at the same time, the crystallinity It is characterized in that the catalytic element contained in the silicon film is gettered.
[0046]
According to the method for manufacturing a semiconductor device of the above-described embodiment, it is possible to increase the resistance by shielding the portion desired to be the LDD region with the gate electrode, lowering the activation rate.
[0047]
DETAILED DESCRIPTION OF THE INVENTION
It will be described in detail below by semiconductor equipment manufacturing method illustrated embodiment of the present invention.
[0048]
1 and 2 are process diagrams showing a method of manufacturing a semiconductor device according to an embodiment of the present invention. The semiconductor device manufacturing method of the present invention is applied to a process of forming an N-type TFT on a glass substrate. The TFT in this embodiment can be used as an element constituting a thin film integrated circuit as well as an active matrix driver circuit and a pixel portion. In this embodiment, a pixel TFT of an active matrix base slope for a liquid crystal display device in which hundreds of thousands to millions of N-type TFTs need to be particularly uniformly formed on the base slope will be described as representatives thereof. To do.
[0049]
1 (a) to 1 (e) and FIGS. 2 (a) to 2 (d) show the manufacturing process of the N-type thin film transistor according to the present invention in the order of steps. Actually, it is composed of several hundreds of thousands or more TFTs, but in this embodiment, the description is simplified to one TFT.
[0050]
First, as shown in FIG. 1A, a base film 102 made of silicon oxide having a thickness of 200 nm is formed on an insulating substrate 101 such as a glass substrate by a plasma CVD method. Next, an intrinsic amorphous silicon film having a thickness of 25 to 80 nm (for example, 40 nm) is formed by plasma CVD. Thereafter, unnecessary portions of the amorphous silicon film are removed and element isolation is performed, and a crystalline silicon film 103 which is an element formation region which later becomes a source region, a drain region, and a channel region of a thin film transistor is formed. The island area. When the present invention is applied to an active matrix liquid crystal display device, island regions are arranged in a matrix.
[0051]
Next, Ni is added to the crystalline silicon film 103 by sputtering so that the surface concentration becomes l × 10 ^{13 to} l × 10 ¹⁵ atoms / cm ² (for example, 7 × 10 ¹³ atoms / cm ² ). . After that, heat treatment is performed at 540 ° C. to 620 ° C. for several hours under an inert atmosphere. In this embodiment, heat treatment was performed at 580 ° C. for 4 hours in a nitrogen atmosphere. However, the method of adding Ni is not limited to the sputtering method, and a method of forming a coating film using a coating solution made of a Ni compound may be used.
[0052]
Subsequently, crystallization is performed by laser irradiation. As the laser light, a KrF excimer laser having a wavelength of 248 nm and a pulse width of 20 nsec is used, but other lasers may be used. The laser light irradiation conditions are an energy density of 200 to 400 mJ / cm ² (for example, 250 mJ / cm ² ) and 2 to 10 shots (for example, 2 shots) at one place. It is useful to heat the substrate to about 200 to 450 ° C. during the laser light irradiation. Thereafter, a resist film 104 is provided and patterning is performed to form an n-type amorphous silicon film.
[0053]
Next, after resist patterning, n-type amorphous silicon films 105 and 105 are formed by plasma CVD as shown in FIG. The conditions at this time are a substrate temperature of 170 ° C., a power of 0.5 W / cm ² , a pressure of 0.2 torr, a SiH ₄ gas flow rate of 100 sccm, a H ₂ gas flow rate of 300 sccm, and a PH ₃ gas flow rate of 20 sccm. The film thickness of the n-type amorphous silicon films 105 and 105 was set to 30 nm. Then, after the n-type amorphous silicon films 105 and 105 are formed, the resist film 104 is removed as shown in FIG.
[0054]
Thereafter, as shown in FIG. 1D, a gate insulating film 106 is formed by forming a silicon oxide film having a thickness of 50 nm to 250 nm (for example, 100 nm) by plasma CVD.
[0055]
Subsequently, as shown in FIG. 1 (e), an aluminum film having a thickness of 400 to 800 nm (for example, 600 nm) is formed by sputtering, and then the aluminum film is patterned to form an n-type amorphous silicon film 105, A gate electrode 107 is formed so as to overlap with 105. The width of this overlap is 0.5 to 2 μm. In this embodiment, the thickness is 1.5 μm. Note that the gate electrode 107 is not limited to aluminum, and a laminated film made of any one of tungsten, tantalum, molybdenum, and silver or a combination thereof may be used.
[0056]
Next, as shown in FIG. 2A, the n-type amorphous silicon films 105 and 105 are crystallized and activated using the gate electrode 107 as a mask by irradiating a laser beam as an energy beam. As the laser light at this time, a KrF excimer laser having a wavelength of 248 nm and a pulse width of 20 nsec is used, but other lasers may be used. The laser light irradiation conditions are an energy density of 200 to 400 mJ / cm ² , for example, 250 mJ / cm ^2, and ² to 10 shots (for example, 2 shots) per place. In addition to the laser, an ultraviolet lamp may be used, or a combination of a laser and a lamp may be used.
[0057]
As a result, as shown in FIG. 2B, the portion irradiated with the laser light has a high activation rate and becomes a low resistance region (source region 109a, drain region 109b), and the light is blocked by the gate electrode 107. The portion to be formed becomes an LDD region (source side high resistance region 108a, drain side high resistance region 108b) which is a high resistance region. Further, the catalytic element in the crystalline silicon film 103 is gettered to the n-type silicon region (source region 109a, drain region 109b).
[0058]
Next, as shown in FIG. 2C, an interlayer insulating film 110 is formed by forming a silicon nitride film having a thickness of 600 nm by plasma CVD. Subsequently, heat treatment is performed in a nitrogen atmosphere at 400 ° C. and 20 atm or less for 1 hour to hydrogenate the crystalline silicon film 103.
[0059]
Next, as shown in FIG. 2D, contact holes are formed in the silicon nitride film 110 on the source region 109a and the drain region 109b, respectively, and a thin film transistor is formed by a multilayer film of metal materials (eg, titanium nitride and aluminum). Metal wiring 111 is formed. Further, when this thin film transistor is used as a pixel switching element of a liquid crystal display device or the like, a pixel electrode (not shown) made of ITO (Indium-Tin-Oxide) is formed instead of the metal electrode 111, A thin film transistor is completed.
[0060]
In the above embodiment, nickel is added as a catalyst element for promoting crystallization, but one or more of nickel, cobalt, palladium, platinum, copper, silver, gold, indium, tin, aluminum and antimony are used. These elements may be used in combination.
[0061]
【The invention's effect】
As apparent from the above, according to the manufacturing method of the semiconductor equipment of the present invention, the active region is formed in the silicon film having a crystallinity which is formed over a substrate having an insulating surface, part of the source region, the drain region Is formed by deposition, and the LDD region is formed by a resist work, a gate formation method, and a crystallization method, whereby resistance control of the LDD region is facilitated and reliability such as off-current can be improved. Further, the source region, the drain region, and the LDD region can be formed at the same time, the manufacturing process can be simplified, and the productivity can be improved.
[Brief description of the drawings]
FIG. 1 is a process sectional view showing a method of manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 2 is a process cross-sectional view subsequent to FIG. 1;
[Explanation of symbols]
101: Insulating substrate,
102: base film,
103 ... a crystalline silicon film,
104 ... resist,
105 ... n-type amorphous silicon film,
106: gate insulating film,
107 ... Gate electrode,
108a ... high resistance region on the source side,
108b ... Drain side high resistance region,
109a ... source region,
109b ... drain region,
110 ... interlayer insulating film,
111: Metal electrode.

Claims (6)

Forming an amorphous silicon film over a substrate having an insulating surface;
Introducing a catalyst element that promotes crystallization of the amorphous silicon film into the amorphous silicon film;
Heat-treating the amorphous silicon film into which the catalyst element for promoting crystallization is introduced, thereby crystal-growing the amorphous silicon film to form a crystalline silicon film;
Forming an amorphous silicon film having a conductivity type on the crystalline silicon film so as to form two island regions at a predetermined interval;
Forming a gate insulating film covering the crystalline silicon film and the amorphous silicon film having the conductivity type;
After the gate insulating film is formed, a part of the inside of the amorphous silicon film having the conductivity type formed on the gate insulating film so as to be two island regions with a predetermined interval is formed. Forming a gate electrode so as to overlap;
Forming an interlayer insulating film on the gate insulating film and on the gate electrode after forming the gate electrode;
And a step of crystallizing the amorphous silicon film having the above conductivity type by energy beam irradiation using the gate electrode as a mask after forming the interlayer insulating film. In the manufacturing method of the semiconductor device according to claim 1 ,
The amorphous silicon film having the above conductivity type is formed by a plasma CVD method using a mixed gas of silane gas, hydrogen gas, PH ₃ gas or a mixed gas of silane gas, hydrogen gas, B ₂ H ₆ gas. A method of manufacturing a semiconductor device. In the manufacturing method of the semiconductor device according to claim 1 or 2 ,
In the step of forming the crystalline silicon film by crystal growth of the amorphous silicon film, the amorphous silicon film into which the catalytic element for promoting crystallization is introduced is crystallized by heat treatment, A method of manufacturing a semiconductor device, wherein a crystallized silicon film is completely crystallized by any one method of heat treatment using a furnace, lamp annealing, laser irradiation, or a combination thereof. In the manufacturing method of the semiconductor device according to any one of claims 1 to 3 ,
In the step of forming a crystalline silicon film by crystal growth of the amorphous silicon film, the heat treatment after the introduction of the catalytic element is performed within a temperature range of 540 ° C. to 600 ° C. Production method. In the manufacturing method of the semiconductor device according to any one of claims 1 to 4 ,
A method of manufacturing a semiconductor device, wherein at least nickel is used as the catalyst element. In the manufacturing method of the semiconductor device according to claim 1 ,
Crystallizing the amorphous silicon film having the conductivity type by one of lamp annealing or laser irradiation or a combination thereof, and simultaneously gettering the catalytic element contained in the crystalline silicon film; A method of manufacturing a semiconductor device.

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