JP2002155268A - Slurry for chemical and mechanical polishing and method for producing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a slurry for chemical and mechanical polishing, capable of achieving both of a high polishing rate and low erosion and so capable of forming high-performance wiring at a low cost, and to provide a method for producing semiconductor devices using CMP(Chemical Mechanical Polishing) utilizing the slurry. SOLUTION: This method comprises chemical mechanical polishing using a slurry for CMP, the slurry comprising a solvent, polishing particles dispersed in the solvent, at least one kind of first surfactant and at least one kind of second surfactant. A high polishing rate and low erosion are achieved by using the slurry. Moreover, the polishing rate is not significantly decreased after long polishing. The above mentioned first surfactant increases dispersibility of the polishing particles and density of the surface-protecting film formed on the surface of a metal film i.e., a film for being polished in polishing and the above mentioned second surfactant increase dispersibility of the polishing particles, density and hydrophilicity of the surface-protecting film and hydrophilicity of a polishing pad used in the polishing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor substrate mounted on a DRAM or a high-speed logic LSI.
The present invention relates to a slurry for chemical mechanical polishing (CMP) for forming a damascene wiring such as the above, and a method for manufacturing a semiconductor device using the slurry.

[0002]

2. Description of the Related Art In recent years, in semiconductor device manufacturing technology, LS
With the increase in performance of I, finer wiring, higher density, and multi-layered wiring are rapidly progressing. Not only are design rules shrinking, but new materials are being actively introduced. For example, as a wiring material, development of a material containing Cu as a main component, an interlayer insulating film of a low dielectric constant such as an organic or porous material, and the like are progressing. In particular, when the CMP technique is applied to a dual damascene process in which a wiring or a connection wiring is buried in an insulating film, the number of steps can be reduced, and the focus margin of the lithography process can be secured by reducing unevenness on the outermost surface of the wafer. You can also. In addition, the CMP technique is an indispensable important technique because it is possible to form a wiring using a material such as Cu which is difficult to dry-etch.

In the current metal damascene wiring process,
High polishing rate is desired to improve throughput,
Further, in order to form a high-performance wiring, low erosion (Erosio) such as a metal part of a wiring or an interlayer insulating film is required.
n) There is a demand for a CMP process that can achieve low scratches on metal parts such as wiring and interlayer insulating films. C
In the MP method, metal loss due to dishing due to overpolishing of wiring and metal loss due to thinning due to overpolishing of an insulating film easily occur, and these are collectively referred to as erosion. The inventors believe that the CMP characteristics are mainly determined by the slurry and the polishing pad. The polishing pad needs some hardness to obtain low erosion. Currently, Rod
Hard Pad (IC1000-P
We believe that controlling the erosion with something softer than ad) is difficult with any slurry. However, although the hard Pad can achieve low erosion, it is difficult to eliminate coarse particles contained in the slurry, scratches due to excessive agglomerates or film peeling due to scratches, and therefore, at present, low erosion and low scratch Has a trade-off relationship.

[0004] Therefore, in order to realize both low erosion and low scratch, it is necessary to improve the slurry side so that no scratch occurs even when the hard pad is used. In general, when designing a slurry, it is necessary to pay attention to the surface state of the polished surface, in particular, an altered layer or a protective film formed on the surface and abrasive particles for polishing the surface. The deteriorated layer or the protective film is formed from a metal oxide, a complex compound, or the like. However, these materials have a high polishing rate, a low erosion, and a scratch on the metal portion having a surface on which the protective film is formed. Is an important factor. When forming a damascene wiring, care must be taken for the interlayer insulating film. That is, low polishing rate, low erosion, and low scratch are desirable.

[0005]

As described above, CMP is an essential process in the field of manufacturing semiconductor devices such as current LSIs. In particular, in the process of forming wiring, the conventional RIE (Reactive Ion Ething) process is indispensable for next-generation LSIs such as processing of extremely difficult Cu and processing of metal having a thickness of 1 μm or more, particularly processing of aluminum (Al) on aluminum. It is becoming impossible to cope with the formation of a wiring structure that cannot be performed. In order to solve these problems, research and development of a damascene wiring process for embedding wiring in an interlayer insulating film using CMP is rapidly progressing. The problem of the current CMP technology is to achieve both a high polishing rate and a low erosion, which are in a trade-off relationship. The present invention has been made under such circumstances, and both a high polishing rate and low erosion can be realized, and as a result, a slurry for chemical mechanical polishing that can form a high-performance wiring at low cost. And a method for manufacturing a semiconductor device using CMP using the slurry.

[0006]

The present invention comprises a solvent, abrasive particles dispersed in the solvent, at least one first surfactant, and at least one second surfactant. The present invention is characterized in that chemical mechanical polishing is performed using a CMP slurry. By using this slurry, a high polishing rate and low erosion can be realized. In addition, the polishing rate is not remarkably reduced even if the polishing is performed for a long time. The insulating film in which the metal film to be polished is embedded is an inorganic insulating film formed using a silane-based or TEOS-based (TEOS) gas, and contains fluorine (F) for the purpose of lowering the dielectric constant. Soft, brittle, easily peelable, hydrophobic, low dielectric constant insulating film (Low-K film) like insulating film, organic insulating film, and porous insulating film
It is characterized in that it hardly causes damage to. Further, it is characterized in that friction between the polishing surface and the polishing pad (Pad) is small, scratches on the polishing surface are reduced, and peeling is reduced.

That is, the slurry for chemical mechanical polishing of the present invention comprises a solvent, abrasive particles dispersed in the solvent, at least one first surfactant, and at least one second surfactant. And an agent. The first surfactant enhances the dispersibility of the abrasive particles and the hydrophobicity of a surface protection film formed on the surface of a metal film to be polished during polishing, and the second surfactant includes The dispersibility of the abrasive particles and the denseness of the surface protective film may be increased, and the denseness and hydrophilicity of the polishing pad surface used during polishing may be enhanced. The first surfactant and the second surfactant are at the same potential as each other, or at least one of them is nonionic, and the abrasive particles are the same as the first and second surfactants. May have the same potential. The first surfactant and the second surfactant are at the same potential as each other, or at least one of them is nonionic, and the abrasive particles are the same as the first and second surfactants. May have the opposite potential. The metal film is made of Cu, Al, W, Ti, Mo, N
It may be a film selected from b, Ta, V, Ru, and Ag, or a laminated film of these films. The first surfactant is an anionic or cationic surfactant,
The second surfactant may be a non-ionic surfactant.

[0008] The anionic or cationic surfactant is
It may have an aromatic ring. The anionic or cationic surfactant is potassium dodecylbenzenesulfonate,
The material may be selected from any of ammonium dodecylbenzenesulfonate, alkyldimethylbenzylammonium chloride, and potassium alkylnaphthalenesulfonate. A complexing agent that forms a complex with the metal that is the polishing film may be further included. The complex may be hardly soluble or insoluble in the slurry or water. The complex may be an amine having a carboxyl group. The amine may be either quinolinic acid or quinaldic acid. The second surfactant includes polyoxyethylene lauryl ether, sugar ester, sorbitan ester, glycerin ester, polyethoxyethylene alkyl allyl ether, fatty acid salt, alkyl sulfate, polyoxyethylene alkylamine, alkyl phosphate, alkyl phosphate It may be made of a material selected from a trimethylammonium salt and an alkylamine salt. Each of the first and second surfactants may be 0.001 wt% or more, and the total of both may be 0.5 wt% or less.

The abrasive particles include Al, Cu, Si, C
It may be selected from oxides, carbides, nitrides, or mixtures or mixed crystals of these, which contain an element selected from r, Ce, Ti, C, and Fe as a main component. Further comprising an oxidizing agent,
This oxidizing agent includes ammonium persulfate, potassium persulfate,
The aqueous hydrogen peroxide, ferric nitrate, and ferric nitrate may be any of um-cerium. As additives quinaldic acid, quinolinic acid, nicotinic acid, picolinic acid,
Malonic acid, oxalic acid, succinic acid, glycine, alanine,
At least one selected from tryptophan may be added. A method for manufacturing a semiconductor device according to the present invention includes the steps of forming a wiring groove on a surface of an insulating film formed on a semiconductor substrate;
Depositing a metal film on the insulating film including the inside of the wiring groove, and performing chemical mechanical polishing on the surface of the metal film using the slurry for chemical mechanical polishing, thereby embedding the metal film in the wiring groove. Removing a metal film other than the metal film.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. First, referring to FIG. 1 to FIG.
An example will be described. FIG. 1 is a process cross-sectional view illustrating a process of forming a wiring embedded in an insulating film on a semiconductor substrate by using CMP (forming dual damascene wiring).
First, an insulating film 101 made of a silicon oxide film or the like is formed on a semiconductor substrate 100 made of silicon or the like on which a semiconductor element (not shown) is formed. The surface of the insulating film 101 is flattened, and a wiring is buried in the surface to a depth of 600 n.
A contact hole 105 having a depth of 500 nm for making contact with the wiring groove 104 of m and the semiconductor substrate 100 is formed on the bottom surface of the wiring groove. Next, the TaN liner 102 is placed 20n inside the contact hole 105 and inside the wiring groove 104.
Deposit about m thickness. And this TaN liner 102
A Cu film 103 is deposited to a thickness of about 1200 nm on the substrate. C
The u film 103 is formed by forming a seed layer by sputtering and forming a plating layer on the seed layer (see FIG. 1).
(A)).

Next, the Cu film 103 is polished by a CMP method to remove portions other than those in the wiring groove 104 and the contact hole 105 (FIG. 1B). The polishing (polishing) performed here is stopped by the TaN liner 102.
This is because the erosion is kept small and the insulating film 1
It is intended to reduce damage to 01. Such a step of performing the CMP process in two stages is called a two-step process. This example illustrates this process (FIG. 1).
(B)), the CM of the present invention is included in the first step.
Apply slurry for P treatment. The slurry in this example was prepared by using ammonium persulfate (1 wt%) as an oxidizing agent, quinaldic acid (0.5 wt%) as a complexing agent, and alanine (0.5 wt%).
1 wt%) and silica (1 wt%) as abrasive particles are added to pure water as a solvent. Further, this slurry contains potassium dodecylbenzenesulfonate (anion) (0.05 wt%) as a first surfactant and polyoxyethylene lauryl ether (nonionic) as a second surfactant.
(0.025 wt%). Finally, the pH of the slurry is controlled at 9.2 with aqueous ammonia. Potassium dodecylbenzenesulfonate mainly modifies the surface protective film of the Cu film, and polyoxyethylene lauryl ether aims at modifying and hydrophilizing the surface protective film of the Cu film and hydrophilizing the polishing pad surface. It is.

The polishing conditions are as follows: slurry flow: 200 cc /
min, IC1000 / SUBA400 on polishing pad
(Trade name of Rodel), load (DF): 300 g / c
m ² , a top ring (T
R) The number of revolutions was 100 rpm, and the turntable (TT) number of revolutions for rotating the polishing pad was 100 rpm. Under these conditions, the polishing treatment by CMP was performed for 130 seconds.
In this example, unnecessary metal was polished on the entire surface of the wafer by polishing (polishing) for 130 seconds. On the other hand, when no conventional surfactant is added or when only one of the first surfactant and the second surfactant is used, unnecessary metal is completely removed even after polishing for 200 seconds. I couldn't do that. Next, the effect of the present invention will be described with reference to FIG. FIG. 2 is a characteristic diagram for explaining the relationship between the Cu shaving amount and the polishing time according to the present invention by the CMP processing performed in this embodiment in comparison with the conventional CMP processing. The vertical axis of FIG. 2 represents the Cu shaving amount (nm),
The horizontal axis represents the polishing time (second). In the case of the related art (dotted line), the amount of shaving decreases after approximately 90 seconds. On the other hand, in the present invention, the shaving amount is linear with respect to time even if it exceeds 180 seconds, and the shaving amount does not decrease. In the case of a pattern having a wiring width of 50 μm and a wiring coverage of 80%, the erosion was 150 nm in the prior art, but 60 nm in the present invention.
Had been improved.

Such a characteristic is that the surface protective film is strengthened by the surfactant (that is, the manner of gathering the hydrophobic parts is such that the surface of the film to be polished is oriented toward CMP due to the presence of the benzene ring).
This is considered to be due to electrical neutralization of the polishing substrate surface, reaction products, and polishing pad surface. The relationship between the first surfactant and the second surfactant will be described in more detail. For example, only the second surfactant of the slurry component is ammonium lauryl sulfate as an anion and polyoxyethylene alkylamine as a cation is 0.02 each.
When examining the CMP characteristics by adding 5 wt%, the Cu polishing rate was about 800 nm / min, with no remarkable difference between nonionic, anionic and cation. However, about erosion, nonionic and anion are about 60n.
m, whereas the cation was significantly degraded by about 150 nm.

This is because the first surfactant, the second surfactant, and the abrasive particles have a reverse potential, so that coarse particles are formed, mechanical polishing power is increased, and as a result, erosion is increased. it is conceivable that. For this reason, when the first surfactant is an anion, the second surfactant uses the same anion or nonion, and the abrasive particles preferably have an anion. Conversely, when the first surfactant is a cation, the second surfactant uses the same cation or nonion, and the abrasive particles are preferably a cation. That is, it is desirable that the first surfactant, the second surfactant, and the abrasive particles all have the same potential. However, nonionics may be used as the second surfactant. Further, the concentrations of the first surfactant and the second surfactant are each 0.00
The effect is not exhibited unless it is added in an amount of 1 wt% or more, and when the total surfactant concentration of two or more kinds is 0.5 wt% or more, the polishing rate is remarkably reduced. reference). FIG. 3 is a characteristic diagram showing the relationship between the surfactant concentration in the slurry, the abrasive particle dispersibility, and the polishing rate balance. The horizontal axis represents the total surfactant concentration (wt%), and the vertical axis represents the Cu polishing rate (nm /
min) and the number of coarse particles (particles / m
l).

Finally, the unnecessary part of the TaN liner 102 is
For example, colloidal silica (particle diameter 30
nm) (3 wt%), ethylenediamine (0.05 wt%)
%) Using a conventionally used slurry of pH 10;
Slurry flow: 200cc / min, DF: 300g /
cm ² , TR rotation speed: 50 rpm, TT rotation speed: 50 r
It is removed by performing a CMP process for 70 seconds under the condition of pm (2nd step) (FIG. 1C). This gives C
u Dual damascene wiring is completed. As described above, in this embodiment, by adding the first and second surfactants to the slurry, it is possible to achieve both a high polishing rate and low erosion of the CMP, thereby improving the throughput and reducing the cost and the resistance. Of the high-performance Cu damascene wiring can be formed.

Next, a second embodiment will be described with reference to FIG. FIG. 4 is a process cross-sectional view illustrating a process of forming an Al wiring embedded in an insulating film on a semiconductor substrate by using CMP (forming an Al damascene wiring). In this embodiment, the slurry contains a third surfactant in addition to the first and second surfactants.
It is characterized by adding a surfactant. An Al buried wiring is formed using this slurry. C of this embodiment
The MP process uses a 2nd step process. First, a semiconductor substrate 200 of silicon or the like having a depth of 800 n
An insulating film 201 made of a silicon oxide film or the like in which the m wiring grooves 204 are patterned is formed. Here, the insulating film 20
Reference numeral 1 denotes a soft, brittle, and easily peelable film such as an organic film. Further, the insulating film 201 itself is hydrophobic. The hydrophobic semiconductor substrate also has a problem that particles are easily adsorbed. Next, an Nb liner 202 having a thickness of about 15 nm
Then, an Al film 203 having a thickness of about 1200 nm is deposited by sputtering (FIG. 4A). Next, the Al film 2
03 is polished by CMP to form wiring grooves 204
Unnecessary parts are removed except for the part embedded in (FIG. 4
(B)).

The slurry component used in this embodiment contains nitric acid (0.1 wt%) as an oxidizing agent, quinolinic acid (0.5 wt%) as a complexing agent, and alumina (2%) as abrasive particles. In. Pure water is used as the solvent. The slurry further comprises potassium dodecylbenzenesulfonate (anion) (0. 1) as the first surfactant of the present invention.
05 wt%) and polyoxyethylene lauryl ether (nonion) (0.0%) as a second surfactant.
25 wt%), potassium polyacrylate (0.001 wt%) is added as a third surfactant, and the slurry is controlled to pH 4 using potassium hydroxide. The role of each surfactant is that potassium dodecylbenzenesulfonate (anion) mainly modifies the surface protective film, and polyoxyethylene lauryl ether (nonionic) modifies the surface protective film and modifies the surface of the polishing pad. Hydrophilization is performed, and potassium polyacrylate, which is the third surfactant, aims at the effect of increasing the polishing power by aggregating the alumina, which is the abrasive particles. This embodiment is different from the first embodiment in that a surfactant having a potential opposite to that of the abrasive particles is added. The CMP is performed with a slurry flow of 200 cc / min.
The processing is performed under the polishing conditions of / SUBA400, DF: 300 g / cm ² , TR rotation speed: 100 rpm, and TT rotation speed: 100 rpm.

As a result, unnecessary Al film 203 could be polished on the entire surface of the wafer by polishing for 170 seconds. In contrast, one type of conventional surfactant, for example,
In the case of only potassium dodecyl sulfonate or only polyoxyethylene lauryl ether, 250
Unnecessary Al film 203 could not be completely removed even after a second polishing. In the first step polishing, it is also important that the Nb film 202 performs a firm polish stop. That is, it is preferable that the Nb film 202 is not polished even if the polishing rate of Al is high.
In the present invention, since the surfactant is adsorbed on the Nb film 202 and hinders polishing, the Nb polishing rate can be reduced to （(2 nm / min) as compared with 4 nm / min of the related art. Next, 2nd polishing is performed to remove unnecessary portions of the Nb liner 201 (FIG. 4).
(C)).

The slurry component is a conventional slurry. Ammonium persulfate (1 wt%) as an oxidizing agent, quinaldic acid (0.01 wt%) as an oxidation inhibitor, a cationic surfactant (0.05 wt%), polishing Silica (3 wt%) was added as particles, and politex was added to the polishing pad.
(Rodale product name), Slurry flow: 200cc /
min, DF: 300 g / cm ² , TR rotation speed: 60 r
Polishing is performed for 120 seconds under the conditions of pm and TT rotation speed: 100 rpm to complete Al damascene wiring. In the first step according to the present invention, even in a process using a hard pad for the purpose of suppressing erosion, damage is achieved by properly stopping the polishing of the Nb film against a soft, brittle and easily peelable film such as an organic or porous film. , CMP can be performed. As described above, even when the CMP is performed on the Al film, both high polishing rate and low erosion can be achieved. Also,
Even if the Nb film disappears, smooth polishing is performed because the surfactant hydrophilizes the surface of the organic insulating film. Also in this embodiment, erosion can be suppressed to a small value, and scratching or peeling can be avoided.

Here, when a defect inspection is performed, the number of scratches is reduced to 10 or less from the conventional number of scratches: 50 / wafer. The finished Al damascene wiring has a wiring width of 0.
The yield is 100 in a region of 4 μm and a length of 10 m.
%Met. On the other hand, in the CMP processing performed by the conventional technique, 5
It is about 0%. In addition, the above-mentioned embodiment is only an example,
The present invention is not limited to these. Various modifications can be made without departing from the spirit of the present invention. Next, a CMP process for implementing the present invention will be described with reference to FIG. C for performing CMP processing using the slurry of the present invention
The MP device is a rotatable polishing machine (turntable (T
T)) 1 is attached. A polishing pad 2 for polishing a wafer made of silicon or the like is attached on the polishing board 1. The wafer is placed at a position facing the polishing pad 2 and is suctioned (vacuum or water filled) with a suction disk (top ring (T ring)).
R)) It is fixed to the suction cloth and the template attached to 3). The top ring (TR) 3 is connected to a drive shaft 4, and the drive shaft 4 is rotated by a motor. A slurry is supplied between the wafer fixed to the top ring 3 and the polishing pad 2. Thus, the CMP of the wafer is performed.

FIG. 5 is a perspective view of a CMP apparatus for actually performing a CMP process on a wafer using the above slurry. For example,
For example, a wafer fixed to a top ring 3 attached to a drive shaft 4 rotating at about 30 rotations / minute is loaded on a polishing pad 2 attached to a polishing board 1 rotating at about 30 rotations / minute at a predetermined load ( DF), and CMP polishing is performed while dropping the slurry supplied from the slurry supply pipe 5 derived from the slurry tank onto the processing point.

[0022]

As described above, according to the present invention, both a high polishing rate and a low erosion can be realized by adding two or more kinds of surfactants. As a result, a low-cost and high-performance wiring is formed. be able to.

[Brief description of the drawings]

FIG. 1 is a manufacturing process cross-sectional view illustrating a method for manufacturing a semiconductor device to which a CMP method using a slurry of the present invention is applied.

FIG. 2 is a characteristic diagram showing a relationship between a Cu shaving amount and a polishing time in CMP.

FIG. 3 is a characteristic diagram showing a relationship between a surfactant concentration in a slurry, abrasive particle dispersibility, and a polishing rate balance.

FIG. 4 is a cross-sectional view of a manufacturing process illustrating a method of manufacturing a semiconductor device to which a CMP method using a slurry according to the present invention is applied.

FIG. 5 is a partial perspective view of a CMP apparatus illustrating a CMP method using a slurry of the present invention.

[Explanation of symbols]

1 ... polishing machine (turntable TT), 2 ...
Polishing pad, 3 ... top ring, 4 ... drive shaft, 5 ... slurry supply pipe, 100, 200
... semiconductor substrate, 101, 201 ... insulating film,
102 ... TaN liner, 103 ... Cu film,
104, 204: wiring groove, 105: contact hole, 202: Nb liner, 203: A
l membrane.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 21/306 H01L 21/306 MF Term (Reference) 3C058 CB01 CB02 CB05 DA02 DA12 DA17 5F043 AA21 AA26 AA31 DD16 FF07 GG03

Claims (16)

[Claims] 1. A solvent; abrasive particles dispersed in the solvent; at least one first surfactant;
A slurry for chemical mechanical polishing comprising a second surfactant of a kind. 2. The first surfactant increases the dispersibility of the abrasive particles and the denseness of a surface protective film formed on the surface of a metal film to be polished during polishing, and improves the second interface. The chemical agent according to claim 1, wherein the activator enhances the dispersibility of the abrasive particles, the density and hydrophilicity of the surface protective film, and enhances the hydrophilicity of a polishing pad surface used during polishing. Slurry for mechanical polishing. 3. The first surfactant and the second surfactant have the same potential as each other or are non-ionic, and the abrasive particles have the first and second surfactants. The slurry for chemical mechanical polishing according to claim 1 or 2, wherein the agent is at the same potential or nonionic. 4. The first surfactant and the second surfactant have the same potential as each other, or at least one of the surfactants is nonionic, and the abrasive particles include the first surfactant.
The slurry for chemical mechanical polishing according to claim 1 or 2, wherein the potential of the slurry is opposite to that of the second surfactant. 5. The first surfactant is an anionic or cationic surfactant, and the second surfactant is
2. A non-ionic surfactant.
The slurry for chemical mechanical polishing according to claim 4. 6. The slurry according to claim 5, wherein the anionic or cationic surfactant has an aromatic ring. 7. The method according to claim 1, wherein the anionic or cationic surfactant is selected from any of potassium dodecylbenzenesulfonate, ammonium dodecylbenzenesulfonate, alkyldimethylbenzylammonium chloride and potassium alkylnaphthalenesulfonate. A slurry for chemical mechanical polishing according to claim 6. 8. The method according to claim 1, further comprising a complexing agent for forming a complex with the metal as the polishing film.
A slurry for chemical mechanical polishing according to claim 7. 9. The method according to claim 8, wherein the complex is hardly soluble or insoluble in the slurry or water.
A slurry for chemical mechanical polishing according to claim 1. 10. The slurry for chemical mechanical polishing according to claim 9, wherein the complex is an amine having a carboxyl group. 11. The slurry according to claim 10, wherein the amine is one of quinolinic acid and quinaldic acid. 12. The second surfactant includes polyoxyethylene lauryl ether, sugar ester, sorbitan ester, glycerin ester, polyexethylene alkyl allyl ether, fatty acid salt, alkyl sulfate, polyoxyethylene alkylamine, and alkyloxyalkylamine. The slurry for chemical mechanical polishing according to any one of claims 1 to 11, comprising a material selected from a phosphate, an alkyltrimethylammonium salt, and an alkylamine salt. 13. The first and second surfactants are each 0.001 wt% or more, and the total of both surfactants is 0.1% by weight.
The slurry for chemical mechanical polishing according to any one of claims 1 to 12, wherein the amount is 5 wt% (note) (hereinafter, referred to as the following). 14. An oxidizing agent further comprising an oxidizing agent,
Ammonium persulfate, potassium persulfate, hydrogen peroxide,
The slurry for chemical mechanical polishing according to any one of claims 1 to 13, wherein the ferric nitrate or ferric nitrate is one of um-cerium. 15. The method according to claim 1, wherein at least one selected from quinaldic acid, quinolinic acid, nicotinic acid, picolinic acid, malonic acid, oxalic acid, succinic acid, glycine, alanine and tryptophan is added as an additive. The slurry for chemical mechanical polishing according to any one of claims 1 to 14. 16. A step of forming a wiring groove on a surface of an insulating film formed on a semiconductor substrate; a step of depositing a metal film on the insulating film including the inside of the wiring groove; Performing a chemical mechanical polishing using the slurry for chemical mechanical polishing according to any one of claims 1 to 15, and removing a metal film other than the metal film embedded in the wiring groove. A method for manufacturing a semiconductor device, comprising: