JP2002076024A - Iii-v nitride compound semiconductor device - Google Patents
Iii-v nitride compound semiconductor deviceInfo
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- JP2002076024A JP2002076024A JP2000266117A JP2000266117A JP2002076024A JP 2002076024 A JP2002076024 A JP 2002076024A JP 2000266117 A JP2000266117 A JP 2000266117A JP 2000266117 A JP2000266117 A JP 2000266117A JP 2002076024 A JP2002076024 A JP 2002076024A
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、窒化物系ＩＩＩ−
Ｖ族化合物半導体装置に関し、特に、チャネル層（電子
走行層）とバリア層（障壁層）のヘテロ接合の界面にお
ける組成や障壁高さのゆらぎのない窒化物系ＩＩＩ−Ｖ
族化合物半導体装置の構造に関する。TECHNICAL FIELD The present invention relates to a nitride III-
The present invention relates to a group III compound semiconductor device, particularly, a nitride III-V without fluctuation in composition or barrier height at an interface of a heterojunction between a channel layer (electron transit layer) and a barrier layer (barrier layer).
The present invention relates to a structure of a group III compound semiconductor device.
【０００２】[0002]
【従来の技術】ＨＦＥＴ（Hetero Field Effect Transi
stor）構造における材料の組合せとしては、ＧａＮをチ
ャネル層とし、ＡｌＧａＮをバリア層として、これらを
ヘテロ接合したものが最も一般的に用いられている（U.
S.Patent No.５１９２９８７および特開平１０−１８９
９４４号公報など）。2. Description of the Related Art HFET (Hetero Field Effect Transi)
As a combination of materials in a stor) structure, a material in which GaN is used as a channel layer and AlGaN is used as a barrier layer and a heterojunction of these is most commonly used (U.S.
S. Patent No. 592987 and JP-A-10-189
944).
【０００３】[0003]
【発明が解決しようとする課題】一般に、２つの元素か
ら成る二元化合物半導体（たとえば、ＡｌＮ、ＧａＮ、
ＩｎＮなど）と、この二元化合物半導体とは異なる二元
化合物半導体との接合界面は、成長条件にも依存する
が、急峻な界面が得られやすい。一方、二元化合物半導
体と３つの元素から成る三元混晶半導体（たとえば、Ａ
ｌＧａＮ，ＧａＩｎＮ，ＡｌＩｎＮなど）を組合せて接
合する場合において、三元混晶半導体の成分が二元化合
物半導体の成分と重なっている場合（たとえば、ＧａＮ
とＡｌＧａＮ、あるいはＧａＮとＧａＩｎＮなど）は、
急峻な界面は得られない。これは、たとえば図３に示す
ようなＧａＮとＡｌＧａＮとのヘテロ接合では、２つの
半導体の境界にまたがって同一の元素（Ｇａ）が存在す
るためである。このため、チャネル層であるはずのＧａ
Ｎとバリア層であるＡｌＧａＮの中のＧａＮが急峻な界
面の形成を阻害し、ヘテロ接合の特性に悪影響を与え、
移動度の低下などの問題が生じる。Generally, binary compound semiconductors composed of two elements (eg, AlN, GaN,
Although a junction interface between InN and a binary compound semiconductor different from this binary compound semiconductor depends on the growth conditions, a steep interface is easily obtained. On the other hand, a ternary mixed crystal semiconductor composed of a binary compound semiconductor and three elements (for example, A
In the case of bonding by combining lGaN, GaInN, AlInN, etc., when the component of the ternary mixed crystal semiconductor overlaps the component of the binary compound semiconductor (for example, GaN
And AlGaN or GaN and GaInN)
A steep interface cannot be obtained. This is because, for example, in a heterojunction of GaN and AlGaN as shown in FIG. 3, the same element (Ga) exists over the boundary between two semiconductors. For this reason, Ga, which should be a channel layer,
N and GaN in AlGaN which is a barrier layer inhibits formation of a steep interface, adversely affecting the characteristics of the heterojunction,
Problems such as a decrease in mobility occur.
【０００４】本発明の目的は、急峻な界面を有し、移動
度などの特性に優れた窒化物系ＩＩＩ−Ｖ族化合物半導
体装置を提供することである。An object of the present invention is to provide a nitride III-V compound semiconductor device having a steep interface and excellent characteristics such as mobility.
【０００５】[0005]
【課題を解決するための手段】本発明は、ヘテロ構造を
有する窒化物系ＩＩＩ−Ｖ族化合物半導体装置におい
て、チャネル層を構成する第１の二元化合物半導体層と
バリア層を構成する三元混晶半導体層との間に第２の二
元化合物半導体層が介在されることを特徴とする窒化物
系ＩＩＩ−Ｖ族化合物半導体装置である。According to the present invention, there is provided a nitride III-V compound semiconductor device having a heterostructure, wherein a first binary compound semiconductor layer forming a channel layer and a ternary compound semiconductor layer forming a barrier layer are formed. A nitride-based III-V compound semiconductor device, wherein a second binary compound semiconductor layer is interposed between the semiconductor device and the mixed crystal semiconductor layer.
【０００６】本発明に従えば、二元化合物半導体同士の
接合では、原子拡散がない限り界面は急峻となるため、
ヘテロ構造を有する窒化物系ＩＩＩ−Ｖ族化合物半導体
装置において、チャネル層を構成する第１の二元化合物
半導体層とバリア層を構成する三元混晶半導体層の間に
第２の二元化合物半導体層を介在させることにより、ヘ
テロ接合の界面における急峻性が改善される。According to the present invention, at the junction between binary compound semiconductors, the interface becomes steep unless atomic diffusion occurs.
In a nitride III-V compound semiconductor device having a hetero structure, a second binary compound is provided between a first binary compound semiconductor layer constituting a channel layer and a ternary mixed crystal semiconductor layer constituting a barrier layer. The steepness at the interface of the heterojunction is improved by interposing the semiconductor layer.
【０００７】また、窒化物系の半導体にこのような構造
を適用した場合、界面におけるピエゾ効果がさらに大き
くなり、２次元電子ガスのキャリアの濃度をより大きく
することができるといったＡｌＧａＡｓ／ＧａＡｓヘテ
ロ構造には現れない効果があり、より電気的特性を向上
させることができる。When such a structure is applied to a nitride-based semiconductor, the piezo effect at the interface is further increased, and the carrier concentration of the two-dimensional electron gas can be further increased. Has an effect that does not appear, and the electrical characteristics can be further improved.
【０００８】また本発明は、前記第２の二元化合物半導
体層のバンドギャップが、前記第１の二元化合物半導体
層のバンドギャップよりも大きいことを特徴とする。Further, the present invention is characterized in that the band gap of the second binary compound semiconductor layer is larger than the band gap of the first binary compound semiconductor layer.
【０００９】第２の二元化合物半導体層のバンドギャッ
プが第１の二元化合物半導体層のエネルギーギャップよ
りも小さいと、第２の二元化合物半導体が新たなチャネ
ル層となってしまい、また、第２の二元化合物半導体と
三元混晶半導体の接合の界面が急峻とならないが、本発
明に従えば、第２の二元化合物半導体層のバンドギャッ
プが、第１の二元化合物半導体層のバンドギャップより
も大きいので、これらの接合界面が急峻性が保たれる。If the band gap of the second binary compound semiconductor layer is smaller than the energy gap of the first binary compound semiconductor layer, the second binary compound semiconductor becomes a new channel layer, and Although the interface at the junction between the second binary compound semiconductor and the ternary mixed crystal semiconductor does not become steep, according to the present invention, the band gap of the second binary compound semiconductor layer is changed to the first binary compound semiconductor layer. Is larger than the band gap, the steepness of these junction interfaces is maintained.
【００１０】また本発明は、前記第１の二元化合物半導
体層は、ＩｎＮ、ＧａＮ、ＬａＮ、ＣｅＮ、ＰｒＮ、Ｎ
ｄＮ、ＰｍＮ、ＳｍＮ、ＥｎＮ、ＧｄＮ、ＴｂＮ、Ｄｙ
Ｎ、ＨｏＮ、ＥｒＮ、ＴｍＮ、ＹｂＮ、ＬｕＮのうちの
１つであることを特徴とする。Also, in the present invention, the first binary compound semiconductor layer is preferably made of InN, GaN, LaN, CeN, PrN, N
dN, PmN, SmN, EnN, GdN, TbN, Dy
N, HoN, ErN, TmN, YbN, or LuN.
【００１１】本発明に従えば、第１の二元化合物半導体
層として、バンドギャップが２〜３．４ｅＶの半導体で
あるＩｎＮ、ＧａＮ、ＬａＮ、ＣｅＮ、ＰｒＮ、Ｎｄ
Ｎ、ＰｍＮ、ＳｍＮ、ＥｎＮ、ＧｄＮ、ＴｂＮ、Ｄｙ
Ｎ、ＨｏＮ、ＥｒＮ、ＴｍＮ、ＹｂＮ、ＬｕＮのうちの
１つを用いることができる。また、バリア層を構成する
三元混晶半導体層のバンドギャップの大きさによって、
どの材料を用いるかが決まる。According to the present invention, as the first binary compound semiconductor layer, a semiconductor having a band gap of 2 to 3.4 eV, such as InN, GaN, LaN, CeN, PrN, Nd.
N, PmN, SmN, EnN, GdN, TbN, Dy
One of N, HoN, ErN, TmN, YbN, and LuN can be used. Further, depending on the size of the band gap of the ternary mixed crystal semiconductor layer constituting the barrier layer,
Which material to use is determined.
【００１２】また本発明は、前記第２の二元化合物半導
体層は、ＡｌＮ、ＩｎＮ、ＧａＮ、ＬａＮ、ＣｅＮ、Ｐ
ｒＮ、ＮｄＮ、ＰｍＮ、ＳｍＮ、ＥｎＮ、ＧｄＮ、Ｔｂ
Ｎ、ＤｙＮ、ＨｏＮ、ＥｒＮ、ＴｍＮ、ＹｂＮ、ＬｕＮ
のうちの１つであることを特徴とする。Further, in the present invention, the second binary compound semiconductor layer is preferably made of AlN, InN, GaN, LaN, CeN, P
rN, NdN, PmN, SmN, EnN, GdN, Tb
N, DyN, HoN, ErN, TmN, YbN, LuN
Is one of the above.
【００１３】本発明に従えば、第２の二元化合物半導体
層として、ＡｌＮ、ＩｎＮ、ＧａＮ、ＬａＮ、ＣｅＮ、
ＰｒＮ、ＮｄＮ、ＰｍＮ、ＳｍＮ、ＥｕＮ、ＧｄＮ、Ｔ
ｂＮ、ＤｙＮ、ＨｏＮ、ＥｒＮ、ＴｍＮ、ＹｂＮ、Ｌｕ
Ｎのうちの１つを用いることができる。また、チャネル
層を構成する第１の二元化合物半導体層のバンドギャッ
プの大きさによって、どの材料を用いるかが決まる。According to the present invention, as the second binary compound semiconductor layer, AlN, InN, GaN, LaN, CeN,
PrN, NdN, PmN, SmN, EuN, GdN, T
bN, DyN, HoN, ErN, TmN, YbN, Lu
One of N can be used. Further, which material is used depends on the band gap of the first binary compound semiconductor layer forming the channel layer.
【００１４】また本発明は、前記第２の二元化合物半導
体層は、層厚が１分子層以上４分子層以下のＡｌＮであ
ることを特徴とする。Further, the present invention is characterized in that the second binary compound semiconductor layer is made of AlN having a thickness of one to four molecular layers.
【００１５】第２の二元化合物半導体層にＡｌＮを用い
る場合、ＡｌＮは６．２ｅＶという極めて大きなバンド
ギャップを有しており、その層厚が厚くなり過ぎるとバ
リア層からチャネル層への電流注入が阻害され、ヘテロ
構造として機能しなくなる。本発明に従えば、膜厚が１
分子層以上４分子層以下のＡｌＮを第２の二元化合物半
導体層に用いることによって、接合界面の急峻性を維持
しつつ、トンネル効果によって充分なキャリア輸送が行
える。よって、電気的特性に優れた窒化物ＩＩＩ−Ｖ族
化合物半導体装置が得られる。In the case where AlN is used for the second binary compound semiconductor layer, AlN has an extremely large band gap of 6.2 eV. If the layer thickness is too large, current injection from the barrier layer to the channel layer is performed. Is inhibited, and does not function as a heterostructure. According to the present invention, when the film thickness is 1
By using AlN of at least a molecular layer and at most 4 molecular layers for the second binary compound semiconductor layer, sufficient carrier transport can be performed by a tunnel effect while maintaining the steepness of the junction interface. Therefore, a nitride III-V compound semiconductor device having excellent electric characteristics can be obtained.
【００１６】[0016]
【発明の実施の形態】次に、本発明の具体的形態を実施
例により説明するが、これら実施例により何ら制限を受
けるものではない。以下に、実施例を示す。Next, specific embodiments of the present invention will be described with reference to examples, but the present invention is not limited by these examples. An example is described below.
【００１７】（実施例１）図１は、本発明の実施例であ
る窒化物系ＩＩＩ−Ｖ族化合物半導体装置１０の概要を
示す断面図である。窒化物系ＩＩＩ−Ｖ族化合物半導体
装置１０は、半絶縁性ＳｉＣ基板１の（０００１）結晶
面に、ＡｌＮエピタキシャルバッファ層２、第１の二元
化合物半導体層でありキャリア濃度が１×１０16ｃｍ-3
のＧａＮチャネル層３、第２の二元化合物半導体層であ
るＡｌＮバリア特性改善層４、三元混晶半導体層であり
キャリア濃度が２×１０17ｃｍ-3のＡｌ0.2Ｇａ0.8Ｎバ
リア層５、がこの順に積層され、この上にソース電極６
ａ、ドレイン電極６ｂ、およびゲート電極７が形成され
構成される。(Embodiment 1) FIG. 1 is a sectional view showing an outline of a nitride III-V compound semiconductor device 10 according to an embodiment of the present invention. The nitride III-V compound semiconductor device 10 includes an AlN epitaxial buffer layer 2 and a first binary compound semiconductor layer on a (0001) crystal plane of a semi-insulating SiC substrate 1 and a carrier concentration of 1 × 10 16. cm -3
The GaN channel layer 3, the second AlN barrier properties improve layer 4 is a binary compound semiconductor layer, Al 0.2 Ga 0.8 carrier concentration is ternary mixed crystal semiconductor layer is 2 × 10 17 cm -3 N barrier layer 5 Are stacked in this order, and the source electrode 6 is formed thereon.
a, a drain electrode 6b, and a gate electrode 7 are formed.
【００１８】このような層構造を形成するための結晶成
長方法としては、有機金属気相成長法（Ｍetalorganic
Chemical Vapor Deposition−ＭＯＣＶＤ法）あるいは
プラズマ励起した窒素を用いた分子線エピタキシー法
（Radio Frequency−MolecularBeam Epitaxy、ＲＦ−Ｍ
ＢＥあるいはElectron Cyclotron Resonance−ＭＢＥ、
ＥＣＲ−ＭＢＥ）などを用いることができる。As a crystal growth method for forming such a layer structure, a metalorganic vapor phase epitaxy method (Metalorganic
Chemical Vapor Deposition-MOCVD method or molecular beam epitaxy method using plasma-excited nitrogen (Radio Frequency-Molecular Beam Epitaxy, RF-M)
BE or Electron Cyclotron Resonance-MBE,
ECR-MBE) can be used.
【００１９】本実施例では、ＭＯＣＶＤ法により、以下
のような工程で作製した。はじめに、水素雰囲気中にお
いて基板温度１０００℃で半絶縁性ＳｉＣ基板１の表面
のクリーニングを１０分間行った。次に、基板温度１１
００℃で厚さ２０ｎｍのＡｌＮエピタキシャルバッファ
層２を成長させ、引き続いて基板温度１０００℃で厚さ
１μｍのＧａＮチャネル層３を成長させた。その後、基
板温度１０００℃でＡｌＮバリア特性改善層４を成長さ
せた。前記ＡｌＮバリア特性改善層４を形成するＡｌＮ
のエネルギーバンドギャップは６．２ｅＶという極めて
大きなバンドギャップを有しているので、この層厚が厚
くなり過ぎるとバリア層からチャネル層への電流の注入
が阻害され、ヘテロ接合として機能しなくなる。つま
り、界面急峻性を維持しつつ、トンネル効果によって十
分なキャリア輸送を行える厚さにする必要がある。この
ため、ＡｌＮヘテロ特性性改善層４の膜厚は１分子層〜
４分子層にすることが好ましい。本実施例では、この膜
厚を２分子層〜５Åとしている。さらに、基板温度を１
１００℃に上げてＡｌ0.2Ｇａ0.8Ｎバリア層５を成長さ
せた。In this embodiment, the semiconductor device was manufactured by the MOCVD method in the following steps. First, the surface of the semi-insulating SiC substrate 1 was cleaned in a hydrogen atmosphere at a substrate temperature of 1000 ° C. for 10 minutes. Next, the substrate temperature 11
An AlN epitaxial buffer layer 2 having a thickness of 20 nm was grown at 00 ° C., and a GaN channel layer 3 having a thickness of 1 μm was subsequently grown at a substrate temperature of 1000 ° C. Thereafter, an AlN barrier characteristic improving layer 4 was grown at a substrate temperature of 1000 ° C. AlN for forming the AlN barrier characteristic improving layer 4
Has an extremely large energy band gap of 6.2 eV. If the layer thickness is too large, injection of current from the barrier layer to the channel layer is hindered, and the layer does not function as a heterojunction. That is, it is necessary to keep the interface steepness and the thickness so that sufficient carrier transport can be performed by the tunnel effect. For this reason, the thickness of the AlN hetero-characteristic improving layer 4 is from one molecular layer to
It is preferable to form a four molecular layer. In the present embodiment, the thickness is set to 2 molecular layers to 5 °. Further, when the substrate temperature is 1
The temperature was raised to 100 ° C., and the Al 0.2 Ga 0.8 N barrier layer 5 was grown.
【００２０】この後、フォトリソグラフィー法を用いて
ソース電極６ａ、ドレイン電極６ｂおよびゲート電極７
を形成して窒化物系ＩＩＩ−Ｖ族化合物半導体装置１０
を作製した。また、第２の二元化合物半導体層を介在さ
せた本実施形態の窒化物系ＩＩＩ−Ｖ族化合物半導体装
置１０の特性を従来型の化合物半導体装置の特性と比較
するためＡｌＮヘテロ特性改善層４を介在させない構造
の化合物半導体装置も同様な工程で作製した。Thereafter, the source electrode 6a, the drain electrode 6b and the gate electrode 7 are formed by photolithography.
Forming a nitride III-V compound semiconductor device 10
Was prepared. Further, in order to compare the characteristics of the nitride III-V compound semiconductor device 10 of the present embodiment with the second binary compound semiconductor layer interposed therebetween to the characteristics of the conventional compound semiconductor device, the AlN hetero characteristic improving layer 4 is used. A compound semiconductor device having no intervening structure was manufactured in the same process.
【００２１】デバイス特性の測定に先立ち、半導体層の
電気的特性をホール測定によって調べた。ＡｌＮヘテロ
特性改善層４をＧａＮチャネル層３とＡｌＧａＮバリア
層５との間に介在させた場合と介在させない場合の移動
度を表１に示す。Prior to the measurement of the device characteristics, the electrical characteristics of the semiconductor layer were examined by Hall measurement. Table 1 shows the mobility when the AlN hetero characteristic improving layer 4 is interposed between the GaN channel layer 3 and the AlGaN barrier layer 5 and when it is not interposed.
【００２２】[0022]
【表１】 [Table 1]
【００２３】表１から、測定温度が室温である３００Ｋ
では、ＡｌＮヘテロ特性改善層４を介在させた場合は、
ＡｌＮヘテロ特性改善層４を介在させない場合に比べ
て、移動度の改善が見られた。また、測定温度が液体窒
素（ＬＮ2）温度である７７Ｋにおいては、移動度の差
が顕著に現れており、ＡｌＮヘテロ特性改善層４によっ
て界面特性が改善されていることが判る。From Table 1, it is found that the measurement temperature is 300K at room temperature.
Then, when the AlN hetero characteristic improving layer 4 is interposed,
The mobility was improved as compared with the case where the AlN hetero characteristic improving layer 4 was not interposed. At 77 K, which is the measurement temperature of liquid nitrogen (LN 2 ), a significant difference in mobility appears, indicating that the AlN hetero characteristic improving layer 4 has improved the interface characteristics.
【００２４】次に、ゲート電極７の長さが１μｍ、ソー
ス電極６ａおよびドレイン６ｂ電極間の距離が５μｍの
ＨＦＥＴを作製し、その特性を評価した結果、ＡｌＮヘ
テロ特性改善層４を介在させた場合、最大発振周波数ｆ
max＝２５ＧＨｚ、トランスコンダクタンスｇm＝２００
ｍＳ／ｍｍ、介在させない場合はｆmax＝２０ＧＨｚ、
ｇm＝１５０ｍＳ／ｍｍであり、ＡｌＮヘテロ特性改善
層４の効果が見られた。Next, an HFET in which the length of the gate electrode 7 was 1 μm and the distance between the source electrode 6a and the drain electrode 6b was 5 μm was fabricated, and its characteristics were evaluated. As a result, the AlN hetero characteristic improving layer 4 was interposed. The maximum oscillation frequency f
max = 25 GHz, transconductance g m = 200
mS / mm, f max = 20 GHz when not interposed,
g m = 150 mS / mm, and the effect of the AlN hetero characteristic improving layer 4 was observed.
【００２５】以上のように、第１の二元化合物半導体お
よび３元混晶半導体のヘテロ接合面に第２の二元化合物
半導体を介在させることによって界面急峻性が改善で
き、また、界面におけるピエゾ効果がさらに大きくなる
ことによって、２次元電子ガスのキャリア濃度をより大
きくすることができため電気的特性に優れた窒化物系Ｉ
ＩＩ−Ｖ族化合物半導体装置が実現できる。As described above, the interfacial steepness can be improved by interposing the second binary compound semiconductor at the heterojunction surface of the first binary compound semiconductor and the ternary mixed crystal semiconductor, and the piezo at the interface can be improved. By further increasing the effect, the carrier concentration of the two-dimensional electron gas can be further increased, so that the nitride-based I
A II-V compound semiconductor device can be realized.
【００２６】（実施例２）図２は、本発明の他の実施形
態である窒化物系ＩＩＩ−Ｖ族化合物半導体装置２０の
概要を示す断面図である。窒化物系ＩＩＩ−Ｖ族化合物
半導体装置２０は、半絶縁性ＳｉＣ基板１１の（０００
１）結晶面に、ＡｌＮエピタキシャルバッファ層１２、
キャリア濃度が１×１０16ｃｍ-3のＧａＮ層１３、第１
の二元化合物半導体層でありキャリア濃度が５×１０16
ｃｍ-3のＧａＮチャネル層１４、第２の二元化合物半導
体層であるＧａＮヘテロ特性改善層１５、三元混晶半導
体層でありキャリア濃度が２×１０17ｃｍ-3のＡｌ0.2
Ｇａ0.8Ｎバリア層１６、がこの順に積層され、この上
にソース電極１７ａ、ドレイン電極１７ｂ、およびゲー
ト電極１８が形成され構成される。(Example 2) FIG. 2 is a sectional view showing an outline of a nitride-based III-V compound semiconductor device 20 according to another embodiment of the present invention. The nitride-based III-V compound semiconductor device 20 is made of the semi-insulating SiC substrate
1) AlN epitaxial buffer layer 12,
GaN layer 13 having a carrier concentration of 1 × 10 16 cm −3 ,
Having a carrier concentration of 5 × 10 16
cm −3 GaN channel layer 14, GaN hetero-characteristic improvement layer 15 as a second binary compound semiconductor layer, and ternary mixed crystal semiconductor layer as Al 0.2 with a carrier concentration of 2 × 10 17 cm −3 .
A Ga 0.8 N barrier layer 16 is stacked in this order, and a source electrode 17a, a drain electrode 17b, and a gate electrode 18 are formed thereon.
【００２７】このような層構造を形成するための結晶成
長方法としては、有機金属気相成長法（Ｍetalorganic
Chemical Vapor Deposition−ＭＯＣＶＤ法）あるいは
プラズマ励起した窒素を用いた分子線エピタキシ法（Ra
dio Frequency−MolecularBeam Epitaxy、ＲＦ−ＭＢＥ
あるいはElectron Cyclotron Resonance−ＭＢＥ、ＥＣ
Ｒ−ＭＢＥ）などを用いることができる。As a crystal growth method for forming such a layer structure, a metalorganic vapor phase epitaxy method (Metalorganic
Chemical Vapor Deposition-MOCVD) or molecular beam epitaxy using plasma-excited nitrogen (Ra
dio Frequency-MolecularBeam Epitaxy, RF-MBE
Or Electron Cyclotron Resonance-MBE, EC
R-MBE) can be used.
【００２８】本実施例では、ＲＦ−ＭＢＥ法により以下
の工程で作製した。はじめに、真空中で基板温度１００
０℃にて半絶縁性ＳｉＣ基板１１の表面のクリーニング
を１０分間行った。次に、基板温度８００℃で厚さ２０
ｎｍのＡｌＮエピタキシャルバッファ層１２を成長さ
せ、引き続いて基板温度７００℃で厚さ１μｍのＧａＮ
層１３を成長させた。その後、基板温度７００℃で厚さ
３０ｎｍのＧａＮチャネル層１４、ＧａＮヘテロ特性改
善層１５、Ａｌ0.2Ｇａ0.8Ｎバリア層１６を続けて成長
させた。In this example, the semiconductor device was manufactured by the following steps by the RF-MBE method. First, a substrate temperature of 100 in vacuum
The surface of the semi-insulating SiC substrate 11 was cleaned at 0 ° C. for 10 minutes. Next, at a substrate temperature of 800 ° C. and a thickness of 20
nm AlN epitaxial buffer layer 12 is grown, followed by a 1 μm thick GaN
Layer 13 was grown. Thereafter, a GaN channel layer 14, a GaN hetero characteristic improving layer 15, and an Al 0.2 Ga 0.8 N barrier layer 16 having a thickness of 30 nm were successively grown at a substrate temperature of 700 ° C.
【００２９】この後、フォトリソグラフィーを用いてソ
ース電極１７ａ、ドレイン電極１７ｂおよびゲート電極
１８を形成して窒化物系ＩＩＩ−Ｖ族化合物半導体装置
２０を作製した。また、第２の二元化合物半導体層を介
在させた本実施形態の窒化物系ＩＩＩ−Ｖ化合物半導体
装置２０の特性を従来型の化合物半導体装置の特性と比
較するためＡｌＮヘテロ特性改善層４を介在させない構
造の化合物半導体装置も同様な工程で作製した。Thereafter, the source electrode 17a, the drain electrode 17b, and the gate electrode 18 were formed by photolithography, and a nitride III-V compound semiconductor device 20 was manufactured. Further, in order to compare the characteristics of the nitride III-V compound semiconductor device 20 of the present embodiment with the second binary compound semiconductor layer interposed therebetween to the characteristics of the conventional compound semiconductor device, A compound semiconductor device having a structure with no interposition was also manufactured in the same process.
【００３０】デバイス特性の測定に先立ち、半導体層の
電気的特性をホール測定によって調べた。ＧａＮヘテロ
特性改善層１５をＧａＮチャネル層１４とＡｌＧａＮバ
リア層１６との間に介在させた場合と介在させない場合
の移動度を表２に示す。Prior to the measurement of the device characteristics, the electrical characteristics of the semiconductor layer were examined by Hall measurement. Table 2 shows the mobility when the GaN hetero characteristic improving layer 15 is interposed between the GaN channel layer 14 and the AlGaN barrier layer 16 and when it is not interposed.
【００３１】[0031]
【表２】 [Table 2]
【００３２】表２から、測定温度が室温である３００Ｋ
では、ＧａＮヘテロ特性改善層１５を介在された場合
は、ＧａＮヘテロ特性改善層１５を介在させない場合に
比べて、移動度の改善が見られた。また、測定温度が液
体窒素（ＬＮ2）温度である７７Ｋにおいては、移動度
の差が顕著に現れており、ＧａＮヘテロ特性改善層１５
によって界面特性が改善されていることが判る。From Table 2, it is found that the measurement temperature is 300K at room temperature.
In the example, when the GaN hetero characteristic improving layer 15 was interposed, the mobility was improved as compared with the case where the GaN hetero characteristic improving layer 15 was not interposed. At 77 K, which is the measurement temperature of liquid nitrogen (LN 2 ), a significant difference in mobility appears, and the GaN hetero-characteristic improving layer 15
It can be seen that the interface characteristics have been improved by this.
【００３３】次に、ゲート電極１８の長さを１μｍ、ソ
ース電極１７ａおよびドレイ電極１７ｂの間の距離が５
μｍのＨＦＥＴを作製し、その特性を評価した結果、Ｇ
ａＮヘテロ特性改善層１５を介在させた場合、最大発振
周波数ｆmax＝３０ＧＨｚ、トランスコンダクタンスｇm
＝２５０ｍＳ／ｍｍ、介在させない場合はｆmax＝２２
ＧＨｚ、ｇm＝１８０ｍＳ／ｍｍであり、ＧａＮヘテロ
特性改善層１５の効果が見られた。Next, the length of the gate electrode 18 is 1 μm, and the distance between the source electrode 17a and the drain electrode 17b is 5 μm.
μm HFET was fabricated and its characteristics were evaluated.
When the aN hetero characteristic improving layer 15 is interposed, the maximum oscillation frequency f max = 30 GHz and the transconductance g m
= 250 mS / mm, f max = 22 when not interposed
GHz, g m = 180 mS / mm, and the effect of the GaN hetero characteristic improving layer 15 was observed.
【００３４】以上のように、第１の二元化合物半導体お
よび３元混晶半導体のヘテロ接合面に第２の二元化合物
半導体を介在させることによって界面急峻性が改善で
き、また、界面におけるピエゾ効果がさらに大きくなる
ことによって、２次元電子ガスのキャリア濃度をより大
きくすることができため電気的特性に優れた窒化物系Ｉ
ＩＩ−Ｖ族化合物半導体装置が実現できる。As described above, the steepness of the interface can be improved by interposing the second binary compound semiconductor at the heterojunction surface of the first binary compound semiconductor and the ternary mixed crystal semiconductor, and the piezo at the interface can be improved. By further increasing the effect, the carrier concentration of the two-dimensional electron gas can be further increased, so that the nitride-based I
A II-V compound semiconductor device can be realized.
【００３５】また、前記実施例１および２では、第１の
二元化合物化合物半導体層にＧａＮを用いたが、バリア
層を構成する三元混晶半導体層のバンドギャップの大き
さによってＩｎＮ、ＬａＮ、ＣｅＮ、ＰｒＮ、ＮｄＮ、
ＰｍＮ、ＳｍＮ、ＥｎＮ、ＧｄＮ、ＴｂＮ、ＤｙＮ、Ｈ
ｏＮ、ＥｒＮ、ＴｍＮ、ＹｂＮ、ＬｕＮのいずれかを用
いてもよい。この場合、どの材料を用いるかはバリア層
を構成する三元混晶半導体層のバンドギャップの大きさ
によって決まる。また、前記第１および２では、第２の
二元化合物半導体層にＡｌＮおよびＧａＮを用いたが、
ＧａＮ、ＡｌＮ、ＩｎＮ、ＬａＮ、ＣｅＮ、ＰｒＮ、Ｎ
ｄＮ、ＰｍＮ、ＳｍＮ、ＥｎＮ、ＧｄＮ、ＴｂＮ、Ｄｙ
Ｎ、ＨｏＮ、ＥｒＮ、ＴｍＮ、ＹｂＮ、ＬｕＮのいずれ
かを用いてもよい。この場合、どの材料を用いるかはチ
ャネル層を構成する第１の二元化合物半導体層のバンド
ギャップの大きさによって決まる。In the first and second embodiments, GaN is used for the first binary compound semiconductor layer. However, depending on the band gap of the ternary mixed crystal semiconductor layer constituting the barrier layer, InN and LaN are used. , CeN, PrN, NdN,
PmN, SmN, EnN, GdN, TbN, DyN, H
Any of oN, ErN, TmN, YbN, and LuN may be used. In this case, which material is used depends on the size of the band gap of the ternary mixed crystal semiconductor layer forming the barrier layer. In the first and second embodiments, AlN and GaN are used for the second binary compound semiconductor layer.
GaN, AlN, InN, LaN, CeN, PrN, N
dN, PmN, SmN, EnN, GdN, TbN, Dy
Any of N, HoN, ErN, TmN, YbN, and LuN may be used. In this case, which material to use is determined by the band gap of the first binary compound semiconductor layer forming the channel layer.
【００３６】[0036]
【発明の効果】本発明によれば、ヘテロ構造を有する窒
化物系ＩＩＩ−Ｖ族化合物半導体装置において、チャネ
ル層を構成する第１の二元化合物半導体層とバリア層を
構成する三元混晶半導体層の間に第２の二元化合物半導
体層を介在させるので、ヘテロ接合の界面における急峻
性が改善される。According to the present invention, in a nitride III-V compound semiconductor device having a heterostructure, a ternary mixed crystal forming a first binary compound semiconductor layer forming a channel layer and a barrier layer is formed. Since the second binary compound semiconductor layer is interposed between the semiconductor layers, the steepness at the interface of the hetero junction is improved.
【００３７】また、接合の界面におけるピエゾ効果がさ
らに大きくなり、２次元電子ガスのキャリア濃度をより
大きくすることができるので、より電気的特性を向上さ
せることができる。Further, since the piezo effect at the junction interface is further increased and the carrier concentration of the two-dimensional electron gas can be further increased, the electrical characteristics can be further improved.
【００３８】また本発明によれば、第２の二元化合物半
導体層のバンドギャップが、第１の二元化合物半導体層
のバンドギャップよりも大きいので、これらの接合界面
が急峻性が保たれる。Further, according to the present invention, since the band gap of the second binary compound semiconductor layer is larger than the band gap of the first binary compound semiconductor layer, steepness of these junction interfaces is maintained. .
【００３９】また本発明によれば、第１の二元化合物半
導体層として、バンドギャップが２〜３．４ｅＶの半導
体であるＩｎＮ、ＧａＮ、ＬａＮ、ＣｅＮ、ＰｒＮ、Ｎ
ｄＮ、ＰｍＮ、ＳｍＮ、ＥｎＮ、ＧｄＮ、ＴｂＮ、Ｄｙ
Ｎ、ＨｏＮ、ＥｒＮ、ＴｍＮ、ＹｂＮ、ＬｕＮのうちの
１つを用いることができる。また、バリア層を構成する
三元混晶半導体層のバンドギャップの大きさによって、
どの材料を用いるかが決まる。According to the present invention, as the first binary compound semiconductor layer, a semiconductor having a band gap of 2 to 3.4 eV, such as InN, GaN, LaN, CeN, PrN, N
dN, PmN, SmN, EnN, GdN, TbN, Dy
One of N, HoN, ErN, TmN, YbN, and LuN can be used. Further, depending on the size of the band gap of the ternary mixed crystal semiconductor layer constituting the barrier layer,
Which material to use is determined.
【００４０】また本発明によれば、第２の二元化合物半
導体層として、ＡｌＮ、ＩｎＮ、ＧａＮ、ＬａＮ、Ｃｅ
Ｎ、ＰｒＮ、ＮｄＮ、ＰｍＮ、ＳｍＮ、ＥｕＮ、Ｇｄ
Ｎ、ＴｂＮ、ＤｙＮ、ＨｏＮ、ＥｒＮ、ＴｍＮ、Ｙｂ
Ｎ、ＬｕＮのうちの１つを用いることができる。また、
チャネル層を構成する第１の二元化合物半導体層のバン
ドギャップの大きさによって、どの材料を用いるかが決
まる。According to the invention, AlN, InN, GaN, LaN, Ce can be used as the second binary compound semiconductor layer.
N, PrN, NdN, PmN, SmN, EuN, Gd
N, TbN, DyN, HoN, ErN, TmN, Yb
One of N and LuN can be used. Also,
The material to be used is determined depending on the band gap of the first binary compound semiconductor layer included in the channel layer.
【００４１】また本発明によれば、膜厚が１分子層以上
４分子層以下のＡｌＮを第２の二元化合物半導体層に用
いることによって、接合界面の急峻性を維持しつつ、ト
ンネル効果によって充分なキャリア輸送が行える。よっ
て、電気的特性に優れた窒化物ＩＩＩ−Ｖ族化合物半導
体装置が得られる。Further, according to the present invention, by using AlN having a film thickness of not less than one molecular layer and not more than four molecular layers for the second binary compound semiconductor layer, the junction effect can be maintained by the tunnel effect while maintaining the steepness of the junction interface. Sufficient carrier transport can be performed. Therefore, a nitride III-V compound semiconductor device having excellent electric characteristics can be obtained.
【図１】本発明の実施例１における窒化物系ＩＩＩ−Ｖ
族半導体装置１０の構造を示す断面図である。FIG. 1 shows a nitride III-V in Example 1 of the present invention.
FIG. 1 is a cross-sectional view illustrating a structure of a group III semiconductor device 10.
【図２】本発明の実施例２における窒化物系ＩＩＩ−Ｖ
族半導体装置２０の構造を示す断面図である。FIG. 2 shows a nitride III-V in Example 2 of the present invention.
1 is a cross-sectional view illustrating a structure of a group III semiconductor device 20.
【図３】二元化合物半導体とこの二元化合物半導体の成
分を含む三元混晶半導体の接合界面を示す図である。FIG. 3 is a diagram showing a junction interface between a binary compound semiconductor and a ternary mixed crystal semiconductor containing a component of the binary compound semiconductor.
１，１１ 半絶縁性ＳｉＣ基板 ２，１２ ＡｌＮエピタキシャルバッファ層 ３，１４ ＧａＮチャネル層 ４ ＡｌＮヘテロ特性改善層 ５，１６ ＡｌＧａＮバリア層 ６ａ，１７ａ ソース電極 ６ｂ，１７ｂ ドレイン電極 ７，１８ ゲート電極 １０，２０ 窒化物系ＩＩＩ−Ｖ族化合物半導体装置 １３ ＧａＮ層 １５ ＧａＮヘテロ特性改善層 Reference Signs List 1,11 Semi-insulating SiC substrate 2,12 AlN epitaxial buffer layer 3,14 GaN channel layer 4 AlN hetero characteristic improving layer 5,16 AlGaN barrier layer 6a, 17a Source electrode 6b, 17b Drain electrode 7,18 Gate electrode 10, Reference Signs List 20 nitride-based III-V compound semiconductor device 13 GaN layer 15 GaN hetero characteristic improving layer
Claims (5)
族化合物半導体装置において、チャネル層を構成する第
１の二元化合物半導体層とバリア層を構成する三元混晶
半導体層との間に第２の二元化合物半導体層が介在され
ることを特徴とする窒化物系ＩＩＩ−Ｖ族化合物半導体
装置。1. A nitride III-V having a heterostructure
In a group III compound semiconductor device, a second binary compound semiconductor layer is interposed between a first binary compound semiconductor layer forming a channel layer and a ternary mixed crystal semiconductor layer forming a barrier layer. A nitride III-V compound semiconductor device.
ギャップが、前記第１の二元化合物半導体層のバンドギ
ャップよりも大きいことを特徴とする請求項１記載の窒
化物系ＩＩＩ−Ｖ族化合物半導体装置。2. The nitride III-V according to claim 1, wherein a band gap of the second binary compound semiconductor layer is larger than a band gap of the first binary compound semiconductor layer. Group compound semiconductor device.
Ｎ、ＧａＮ、ＬａＮ、ＣｅＮ、ＰｒＮ、ＮｄＮ、Ｐｍ
Ｎ、ＳｍＮ、ＥｎＮ、ＧｄＮ、ＴｂＮ、ＤｙＮ、Ｈｏ
Ｎ、ＥｒＮ、ＴｍＮ、ＹｂＮ、ＬｕＮのうちの１つであ
ることを特徴とする請求項１または２記載の窒化物系Ｉ
ＩＩ−Ｖ族化合物半導体装置。3. The method according to claim 1, wherein the first binary compound semiconductor layer is formed of In.
N, GaN, LaN, CeN, PrN, NdN, Pm
N, SmN, EnN, GdN, TbN, DyN, Ho
3. The nitride-based I according to claim 1, wherein the nitride-based I is one of N, ErN, TmN, YbN, and LuN.
II-V compound semiconductor devices.
Ｎ、ＩｎＮ、ＧａＮ、Ｌａｎ、ＣｅＮ、ＰｒＮ、Ｎｄ
Ｎ、ＰｍＮ、ＳｍＮ、ＥｎＮ、ＧｄＮ、ＴｂＮ、Ｄｙ
Ｎ、ＨｏＮ、ＥｒＮ、ＴｍＮ、ＹｂＮ、ＬｕＮのうちの
１つであることを特徴とする請求項１〜３のいずれか１
つに記載の窒化物系ＩＩＩ−Ｖ族化合物半導体装置。4. The method according to claim 1, wherein the second binary compound semiconductor layer is formed of Al.
N, InN, GaN, Lan, CeN, PrN, Nd
N, PmN, SmN, EnN, GdN, TbN, Dy
4. One of N, HoN, ErN, TmN, YbN, and LuN.
6. The nitride-based III-V compound semiconductor device according to any one of the above.
が１分子層以上４分子層以下のＡｌＮであることを特徴
とする請求項４記載の窒化物系ＩＩＩ−Ｖ族化合物半導
体装置。5. The nitride-based III-V compound semiconductor according to claim 4, wherein said second binary compound semiconductor layer is made of AlN having a layer thickness of not less than 1 molecular layer and not more than 4 molecular layers. apparatus.
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Cited By (36)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002359256A (en) * | 2001-05-31 | 2002-12-13 | Fujitsu Ltd | Field effect compound semiconductor device |
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