JP2002064178A - Method of manufacturing semiconductor module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer semiconductor module whereby the connection reliability can be improved. SOLUTION: An interlayer member 20 has through-holes 23, each having a downside opening 23B diameter larger than an upside opening 23A diameter as a tapered inner wall. As the result, a second conductive bump 25B formed on the lowerside has a larger diameter than that of a first conductive bump 25A formed on the upperside and is connected to a connecting bump 13 on a printed board 2. If a displacement occurs due to pressing during laminating, the displacement error can be absorbed to ensure a good connection between both bumps 13, 25B.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a method for manufacturing a semiconductor module.

[0002]

2. Description of the Related Art In recent years, in order to cope with high-density mounting of IC chips, a technique for manufacturing a semiconductor module in which IC chips are stacked has been developed. For example, JP-A-9-219490, JP-A-10-135267
Japanese Patent Application Laid-Open No. Hei 10-163414 discloses such a stacked package.

In such a conventional technique, TSOP (Th
in Small Outline Package), TCP (Tape Carrier P)
After assembling IC packages such as a package and a BGA (Ball Grid Array) for each layer, a plurality of IC packages are stacked. At this time, the respective layers are connected via external connection terminals provided in advance in the respective packages. As described above, in the conventional method, many manufacturing steps have to be performed, so that the processing cost has increased.

FIGS. 8 and 9 show a laminated package manufactured by the above-described conventional method. The one shown in FIG. 8 is a stack of packages molded with resin. FIG. 9 is a plan view of the module substrate of FIG. This IC package 100
A and 100B have an IC mounting portion 106, an IC chip 102 mounted on the upper surface thereof, leads 101 connecting the IC chip 102 and external components, and connecting the IC chip 102 and the leads 101 inside the resin. A bonding wire 103 is provided. Also, the IC chip 102
Is covered with the resin body 104.

[0005] The IC package 100A having such a structure.
On the upper side, another IC package 100B is stacked and mounted on the substrate 105.

[0006]

The above-mentioned IC packages 100A and 100B are stacked in the thickness direction to form a substrate 10
5, there is a problem that the total module thickness is increased due to the thickness of the resin body 104.
Further, when the IC packages 100A and 100B are mounted on the substrate 105 in the horizontal direction, there is a problem that the total module becomes large. Further, the upper and lower packages 100
A and 100B are connected to the substrate 105 by respective leads 101, so that the packages 100A and 100B
If the misalignment occurs during the stacking of 00B, there is a possibility that the leads 101 will be short-circuited.

[0007] In the future, with the miniaturization of electronic devices such as IC cards and mobile phones, for IC packages,
It is considered that further densification and thinning can be achieved, but it is difficult to achieve such high density and thinning by a conventional method.

In order to solve this problem, the configuration in which the IC chip 102 is molded with the resin body 104 is changed. For example, a configuration is adopted in which the printed circuit boards are stacked via interlayer members and the IC chips are mounted between the layers. Conceivable.
When such a configuration is employed, it is necessary to electrically connect the conductive circuits of the printed circuit boards arranged on the front and back sides by conductive bumps formed on the interlayer member.

Here, as the printed circuit board, there is a case where a wiring circuit is formed on one side and a bump is electrically connected to the conductor circuit on the other side. In this case, the lands formed on a part of the wiring circuit of the printed circuit board and the bumps connected to the wiring circuit are respectively connected to the conductive bumps of the interlayer member, thereby achieving conduction between the wiring circuits. .

However, when the printed circuit board having the above-described structure and the interlayer member are laminated and bonded to each other, there is a possibility that a displacement may occur due to pressing. At this time, in the connection between the bump and the land, since the land is formed with a larger diameter than the conductive bump, it is possible to absorb the positional deviation error and maintain the contact property. . However, in the connection between the bumps, since the diameters of the two bumps are substantially equal, the displacement error cannot be absorbed, and the connection reliability may be impaired.

The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a method for manufacturing a stacked semiconductor module capable of improving connection reliability.

[0012]

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor module, comprising: forming a predetermined wiring circuit on one surface side to mount a semiconductor chip; A plurality of printed boards, on the side of which a board-side bump connected to the wiring circuit protrudes, a conductive bump connectable to the wiring circuit and the board-side bump and an opening capable of accommodating the semiconductor chip. A method for manufacturing a semiconductor module to be laminated via an interlayer member provided, wherein (a) the opening on the other surface side than the opening on one surface side penetrates in the thickness direction of the insulating base material serving as the interlayer member. Step (b) of forming a through hole having a large diameter by filling the through hole with a conductive paste,
Forming a first conductive bump in the opening on the one surface side and forming a second conductive bump having a larger diameter than the first conductive bump in the opening on the other surface side
(c) a step of forming the opening in the insulating base material (d) the first conductive bump is connected to the wiring circuit, and the second conductive bump is connected to the substrate-side pump. And a step of alternately laminating the printed circuit board and the interlayer member.

At this time, the ratio of the diameter of the first conductive bump to the diameter of the second conductive bump is preferably 1: 2 to 1: 3.
And more preferably 1: 2 to 1: 2.5.

According to a second aspect of the present invention, there is provided the method of manufacturing a semiconductor module according to the first aspect, wherein the through-hole is formed by irradiating a laser from the opening on the other surface. I do.

According to a third aspect of the present invention, there is provided the method of manufacturing a semiconductor module according to the first aspect, wherein the through hole is provided with a concave portion having a predetermined depth from the opening on the other surface. It is characterized by being formed by opening a through hole having a diameter smaller than that of the concave portion while penetrating from the bottom surface of the concave portion to the opening side on the one surface side.

[0016]

According to the first aspect of the present invention, in the through hole, the opening on the other side is formed with a larger diameter than the opening on the one side, and the conductive hole formed in the opening of the through hole is formed. As for the conductive bump, the second conductive bump formed on the other surface side is formed with a larger diameter than the first conductive bump formed on the one surface side. By using this second conductive bump for connection with the substrate-side bump, even if a misalignment occurs during pressing,
A good connection between the two bumps can be secured by absorbing the displacement error.

According to the second aspect of the present invention, the through hole is formed by irradiating a laser from the opening on the other surface. In such a method, the through hole can be formed in a tapered shape. As described above, the through hole having a larger diameter can be easily formed in the opening on the other surface side than the opening on the one surface side, so that it is possible to avoid complicating the manufacturing process of the semiconductor module and to suppress the cost. be able to.

According to the third aspect of the present invention, the through hole is provided with a concave portion having a predetermined depth from the opening side on the other surface side, and penetrates from the bottom surface of the concave portion to the opening side on the one surface side. In addition, it is formed by opening a through hole having a smaller diameter than the concave portion. According to such a method, the through hole can be formed in a stepped shape in which the inner periphery of a predetermined depth from the opening on the other surface is enlarged radially outward along the entire periphery.

When forming the conductive bumps on the interlayer member, a protective film must be attached to both surfaces of the interlayer member in advance, a through hole is formed, and after the conductive paste is filled, the protective film is peeled off. By
In some cases, conductive bumps protrude from the front and back of the interlayer member. In such a case, if the through holes are formed in a tapered shape, the holes formed in the protective films attached to both surfaces are also formed in a tapered shape. For this reason, the first conductive bump is formed in a mortar shape narrowing toward the tip, which may impair the connection reliability. In addition, the second conductive bump is formed in a mortar shape that expands toward the tip, and the edge of the spread tip may collapse during pressing or the like. However, if the through hole is formed in a stepped shape, the conductive bump can be formed in a substantially columnar shape, so that the connection reliability can be stably secured.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS <First Embodiment>

Hereinafter, a first embodiment of the present invention will be described in detail with reference to FIGS. The semiconductor module 1 of this embodiment has a structure in which the printed board 2 on which the semiconductor chip 3 is mounted and the interlayer member 20 are alternately stacked, and the I / O wiring board 30 is stacked on the lowermost layer and hot-pressed to be integrated. (See FIG. 1).

First, a method of manufacturing the printed circuit board 2 on which the semiconductor chip 3 is mounted will be described.

The starting material of the printed circuit board 2 is a single-sided copper-clad laminate 4. The single-sided copper-clad laminate 4 is provided on one surface (upper surface in FIG. 2) of an insulating substrate 5 having a thickness of 75 μm and formed of, for example, a plate-like glass cloth epoxy resin. Is a well-known structure attached. In the single-sided copper-clad laminate 4, the surface opposite to the copper foil 6 is protected by a protective film 7 made of polyethylene terephthalate (PET) (FIG. 3A).

By irradiating a laser beam to a predetermined position from the surface on which the protective film 7 is applied (the lower surface side in FIG. 2) using, for example, a pulsed carbon dioxide laser processing device, the insulating film 5 is penetrated. 2 to form a via hole 8 having an inner diameter of 100 μm reaching the copper foil 6.
B). The processing conditions are such that the pulse energy is 0.5 to 10.
0 mJ, a pulse width of 1 to 100 μs, and a pulse interval of 0.
The number of shots is preferably in the range of 3 to 50 for 5 ms or more. Next, a desmear process for removing the resin remaining inside the via hole 8 is performed. afterwards,
The surface of the copper foil 6 is protected by a protective film 7, and a plated conductor 9 is formed in the via hole 8 by electrolytic plating using the copper foil 6 as one electrode (FIG. 2C). The filling depth of the plated conductor 9 is preferably such that the upper surface thereof is flush with the surface of the protective film 7.

Next, after the protective film 7 on the copper foil 6 side is peeled off, a photosensitive dry film 10 is attached. The hole 11 is formed by exposing and developing the dry film 10 in a predetermined pattern.
D). By applying electrolytic plating to the inside of the hole 11,
A plating layer serving as a mounting bump 12 for mounting the semiconductor chip 3 is formed (FIG. 2E).

Thereafter, the dry film 10 is peeled off, and the mounting bumps 12 are projected. At the same time, by peeling off the protective film 7 on the lower surface side, the tip of the plated conductor 9 protrudes from the surface of the insulating substrate 5 and becomes the connection bump 13 (corresponding to the substrate-side bump of the present invention) ( (FIG. 3F).

Next, a photoresist layer 14 is formed on the connection bumps 13 on the entire upper surface and the lower surface by an electrodeposition method (FIG. 3G). Next, the photoresist layer 1 on the upper surface side
4 is exposed and developed according to a predetermined pattern of the wiring circuit 15. Thereafter, the wiring circuit 15 is formed by etching the copper foil 6 that is not protected by the photoresist layer 14 (FIG. 3H). Wiring circuit 1
5 are electrically conductive bumps 25 of the interlayer member 20 described later.
And a connection land 15A for connection to the terminal. Finally, by removing the photoresist layer 14, the manufacture of the printed circuit board 2 is completed (FIG. 3I).

A semiconductor chip 3 is mounted on a central portion on the upper surface side of the printed board 2 (FIG. 3J). The semiconductor chip 3 is fixed to the center of the printed circuit board 2 with an adhesive 16, and connection terminals (not shown) formed on the lower surface side of the semiconductor chip 3 are embedded in the mounting bumps 12, so that the printed circuit board 2 It is electrically connected to the wiring circuit 15.

Next, a method of manufacturing the interlayer member 20 will be described.

The starting material of the interlayer member 20 is, for example, a prepreg 21 (corresponding to the insulating base material of the present invention) formed by impregnating a glass cloth base material with an epoxy resin and forming it in a semi-cured state by heating. (FIG. 4A). The thickness of the prepreg 21 is larger than the height from the upper surface of the printed circuit board 2 to the upper surface of the semiconductor chip 3 due to the necessity of accommodating the semiconductor chip 3 in a cavity 26 (corresponding to an opening of the present invention) described later. It is slightly thick, for example, 150 μm. The prepreg 21 has the same shape as the opposing printed circuit board 2.

Both sides of the prepreg 21 are protected by a protective film 22 made of PET (FIG. 4B), and the thickness of the prepreg 21 is set at a position corresponding to the connection land 15A and the connection bump 13 of the printed board 2 facing each other. A through hole 23 penetrating in the vertical direction is formed (FIG. 4C). This through hole 23 is formed in a tapered shape, for example, as shown in FIG.
, The upper surface side opening 23A (corresponding to the opening on the one surface side of the present invention) has an inner diameter of 100 μm, and the lower surface side opening 2
The inner diameter of 3B (corresponding to the multi-sided opening of the present invention) is 250 μm larger than that. Such a tapered through hole 23 can be easily formed by performing laser irradiation from the opening 23B side by, for example, a pulse oscillation type carbon dioxide laser processing apparatus. The processing conditions are as follows: pulse energy is 0.5 to 10 mJ, pulse width is 1 to 100 μs, pulse interval is 0.5 ms or more,
The number of shots is preferably in the range of 3 to 50.

Next, the conductive paste 24 is filled in the through holes 23 (FIG. 4D). The filling can be performed, for example, by printing the conductive paste 24 on the protective film 22 using a screen printing machine.
Then, when the protective film 22 is peeled off, the conductive paste 24 becomes the prepreg 21 by the thickness of the protective film 22.
4 are formed as conductive bumps 25 by protruding from the surface of FIG.
E). At this time, the through hole 23 is
Since the inner diameter of the opening 23B on the lower surface side is larger than that of A, the second conductive bump 25B formed on the lower surface side is the first conductive bump 25 formed on the upper surface side.
The diameter is larger than A.

Then, for example, laser irradiation is performed on the central portion of the prepreg 21 so as to penetrate the cavity 26 to complete the manufacture of the interlayer member 20 (FIG. 4F).
The size of the cavity 26 is slightly larger than the outer dimensions of the semiconductor chip 3 so that the semiconductor chip 3 can be accommodated therein.

The printed board 2 manufactured as described above and the interlayer member 20 are alternately overlapped (FIG. 5A). At this time, the printed board 2 is arranged on the uppermost layer such that the surface on which the semiconductor chip 3 is mounted is on the lower surface side, and the interlayer member 20 is arranged below the printed circuit board 2. The interlayer member 20 accommodates the semiconductor chip 3 of the printed circuit board 2 in the cavity 26 thereof. Then, below the printed circuit board 2
The I / O wiring board 30 is stacked on the lowermost layer. The I / O wiring board 30 is provided with a via hole 3 at a predetermined position on the insulating substrate 33.
4 are formed, and a predetermined wiring circuit (not shown) is formed above and below it.
And lands 31 are formed.

At this time, the first conductive bumps 25A of the interlayer member 20 are connected to the connection lands 15A of the printed circuit board 2.
And the second conductive bump 25 </ b> B is overlapped so as to be connected to the connection bump 13.

Then, pressurizing and heating by a press,
The prepreg 21 melts and flows once, hardens with the passage of time, and the upper and lower printed circuit boards 2 and the I / O
The semiconductor module 1 is formed by bonding to the O wiring substrate 30 (FIG. 5B). At this time, the connection lands 15A and the connection bumps 13 of each printed circuit board 2 and the lands 31 of the I / O wiring board 30 are connected to the conductive bumps 25A and 25B of the adjacent interlayer member 20. Thus, the wiring circuits of the upper and lower printed boards 2 and the I / O wiring board 30 are electrically connected. Further, solder balls 32 for connection to an external substrate are formed on the lands 31 on the lower surface side of the I / O wiring board 30.

As described above, according to this embodiment, in the interlayer member 20, the through hole 23 is
The opening 23 </ b> B on the lower surface side has a larger inner diameter than A. For this reason, the second conductive bump 25B formed on the lower surface side has a larger diameter than the first conductive bump 25A formed on the upper surface side, and the second conductive bump 25B is Is used for connection with the connection bump 13. Thereby, even when a displacement occurs due to pressing during the lamination, the displacement error can be absorbed and good connectivity between the two bumps 13 and 25B can be secured.

<Second Embodiment>

Hereinafter, a second embodiment of the present invention will be described in detail with reference to FIGS. Also in the present embodiment, the semiconductor module 40 is integrated by alternately stacking the printed board 2 on which the semiconductor chip 3 is mounted and the interlayer member 50, stacking the I / O wiring board 30 on the lowermost layer, and hot pressing. Structure. In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

The interlayer member 5 used in the present embodiment
The starting material No. 0 is an insulating base material 51 formed of, for example, a plate-like glass cloth base epoxy resin (FIG. 6A).
The thickness of the insulating base material 51 depends on the necessity of accommodating the semiconductor chip 3 in a cavity (corresponding to an opening of the present invention) 59 described later, and thus is from the upper surface of the printed circuit board 2 to the upper surface of the semiconductor chip 3. Slightly thicker than height, eg 130μ
m. The insulating base material 51 has the same shape as the opposing printed circuit board 2.

Adhesive layers 52 are formed on both sides of the insulating base material 51, and the upper surface thereof is protected with a protective film 53 made of PET (FIG. 6B). Next, a stepped through-hole 54 is formed at a position corresponding to the connection bump 13 of the opposing printed board 2 from above the protective film 53.
Is formed. First, a concave portion 55 having a substantially columnar shape and an inner diameter of 250 μm is formed by performing laser irradiation with, for example, a pulse oscillation type carbon dioxide laser processing device. The processing conditions are preferably such that the pulse energy is 5.0 to 15.0 mJ, the pulse width is 1 to 50 μs, the pulse interval is 2 ms or more, and the number of shots is 1 to 2. Next, from the bottom surface of the concave portion 55, a substantially cylindrical through hole 56 penetrating in the thickness direction of the insulating base material 51 is formed (FIG. 6C). The through hole 56 is concentric with the concave portion 55 and has a diameter of 100 μm, which is slightly smaller than the concave portion 55. The processing conditions for the through hole 56 are preferably such that the pulse energy is 0.5 to 5.0 mJ, the pulse width is 1 to 20 μs, the pulse interval is 2 ms or more, and the number of shots is 3 to 10. At this time, the opening 54B on the concave portion 55 side (corresponding to the opening on the other surface side of the present invention) has a larger diameter than the opening 54A on the through hole 56 side (corresponding to the opening on the one surface side of the present invention). Is formed.

Next, after performing a desmear process for removing the resin remaining inside the through hole 54, the conductive paste 57 is filled (FIG. 6D). The filling can be performed, for example, by printing the conductive paste 57 on the protective film 53 using a screen printing machine. Then, when the protective film 53 is peeled off, the conductive paste 57 becomes the adhesive layer 52 by the thickness of the protective film 53.
Of the through hole 54 protruding from the surface of the
A substantially columnar conductive bumps 58A and 58B having the same diameter as A and 54B are formed (FIG. 6E). At this time, the diameter of the second conductive bump 58B formed in the opening on the concave portion 55 side is larger than the diameter of the first conductive bump 58A formed in the opening on the through hole 56 side.

Then, for example, laser irradiation is performed on the central portion of the insulating base material 51 so as to penetrate the cavity 59 to complete the manufacture of the interlayer member 50 (FIG. 6F).
The size of the cavity 59 is slightly larger than the external dimensions of the semiconductor chip 3 so that the semiconductor chip 3 can be accommodated therein.

The printed board 2 manufactured as described above and the interlayer member 50 are alternately overlapped (FIG. 7A). At this time, the printed circuit board 2 is arranged on the uppermost layer such that the surface on which the semiconductor chip 3 is mounted is on the lower surface side, and the interlayer member 50 is arranged below it. The interlayer member 50 accommodates the semiconductor chip 3 of the printed circuit board 2 in its cavity 59, and is overlapped so that the conductive bump 58 can be connected to the connection land 15A and the connection bump 13 of the printed circuit board 2. . Then, the printed board 2 and the interlayer member 50 are further overlapped under the same, and the I / O wiring board 30 is stacked on the lowermost layer.

At this time, the first conductive bump 58A is connected to the connection land 15A of the printed circuit board 2 by the interlayer member 50.
And the second conductive bump 58 </ b> B is overlapped so as to be connected to the connection bump 13.

Then, the adhesive layer 52 is cured by heating and vacuum pressing, and the upper and lower printed circuit boards 2 and I / O
The semiconductor module 40 is formed by bonding with the O wiring substrate 30 (FIG. 7B). At this time, the upper and lower printed circuit boards 2 and the wiring circuits of the I / O wiring board 30 are electrically connected by the through holes 54 formed in the interlayer member 50. At this time, the connection lands 15A of each printed circuit board 2
And the lands 31 of the I / O wiring board 30 are connected to the conductive bumps 58A and 58B of the adjacent interlayer member 50, whereby the upper and lower printed boards 2 and the I / O
The wiring circuits of the wiring board 30 are electrically connected. The land 31 on the lower surface side of the I / O wiring board 30 has
A solder ball 32 for connection to an external substrate is formed.

As described above, according to the present embodiment, in the interlayer member 50, the through holes 54 are stepped. Therefore, the second conductive bump 58B is formed to have a larger diameter than the first conductive bump 58A, and the second conductive bump 58B is connected to the connection bump 13 of the printed circuit board 2. Thereby, even when a displacement occurs due to pressing during the lamination, the displacement error can be absorbed and the good connection between the two bumps 13 and 58B can be secured. Also, the conductive bumps 58A, 58B
Can be formed in a substantially columnar shape having the same diameter as the openings 54A and 54B of the through hole 54, so that the connection reliability can be secured stably.

Note that the technical scope of the present invention is not limited by the above-described embodiment, and for example, those described below are also included in the technical scope of the present invention.
In addition, the technical scope of the present invention extends to an equivalent range. (1) In the first embodiment, the through hole 23 is formed in a tapered shape. However, according to the present invention, the shape of the through hole is not limited to the above embodiment, and may be, for example, a stepped shape. . (2) In the second embodiment, the through hole 54 is formed in a stepped shape. However, according to the present invention, the shape of the through hole is not limited to the above embodiment, and may be, for example, a tapered shape. . (3) According to each of the above embodiments, the I / O wiring board 30 is formed by the lands 31 on the conductive bumps 2 of the interlayer members 20 and 50.
Although they are electrically connected to 5B and 58B, according to the present invention, the electrical connection with the interlayer member of the I / O wiring board is not limited to the above embodiment, and may be made by, for example, a bump. . (4) In each of the above embodiments, the cavities 26 and 59 are formed after the formation of the conductive bumps 25 and 58. However, according to the present invention, the formation of the cavities is not limited to the above embodiment. It may be performed simultaneously with the formation. Also, it may be performed before the formation of the through hole.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a state before manufacturing a multilayer printed wiring board by laminating a printed circuit board and an interlayer member according to a first embodiment.

FIG. 2 is a sectional view showing a method for manufacturing a printed circuit board-1.

FIG. 3 is a cross-sectional view illustrating a method of manufacturing a printed circuit board.

FIG. 4 is a cross-sectional view illustrating a method of manufacturing the interlayer member according to the first embodiment.

FIG. 5 is a cross-sectional view illustrating a semiconductor module formed by stacking a printed circuit board and an interlayer member according to the first embodiment.

FIG. 6 is a sectional view showing a method of manufacturing an interlayer member according to a second embodiment.

FIG. 7 is a cross-sectional view illustrating a semiconductor module formed by laminating a printed circuit board and an interlayer member according to the second embodiment.

FIG. 8 is a side sectional view of a conventional IC package.

9A is a side view of a substrate on which a conventional IC package is mounted. FIG. 9B is a plan view of a substrate on which a conventional IC package is mounted.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1, 40 ... Semiconductor module 2 ... Printed circuit board 3 ... Semiconductor chip 13 ... Connection bump (substrate side bump) 15 ... Wiring circuit 20, 50 ... Interlayer member 21 ... Prepreg (insulating base material) 23, 54 ... Through hole 23A , 54A ... opening (opening on one side) 23B, 54B ... opening (opening on the other side) 24, 57 ... conductive paste 25A, 58A ... first conductive bump 25B, 58B ... second conductive bump 26, 59: cavity (opening) 51: insulating base material 55: recess 56: through hole

Claims (3)

[Claims] A printed circuit board having a predetermined wiring circuit formed on one surface side and a semiconductor chip mounted thereon and a substrate-side bump connected to the wiring circuit protruding on the other surface side, the wiring board being connected to the wiring board. A method for manufacturing a semiconductor module, comprising laminating via an interlayer member having a conductive bump connectable to a circuit and a substrate-side bump and an opening capable of accommodating the semiconductor chip, wherein (a) the interlayer member is provided. A step of forming a through-hole having a larger diameter than the opening on one side and penetrating in the thickness direction of the insulating base material, and (b) filling the through-hole with a conductive paste. Forming a first conductive bump in the opening on the one surface side and forming a second conductive bump having a larger diameter than the first conductive bump in the opening on the other surface side ( c) the insulation Forming the opening in the conductive base material (d) the first conductive bump is connected to the wiring circuit,
A method for manufacturing a semiconductor module, comprising a step of alternately stacking the printed circuit board and the interlayer member so that the second conductive bump is connected to the substrate-side pump. 2. The method for manufacturing a semiconductor module according to claim 1, wherein the through hole is formed by irradiating a laser from the opening on the other surface. 3. A recess having a predetermined depth in the through hole from the opening on the other surface, penetrating from the bottom surface of the recess to the opening on the one surface, and having a smaller diameter than the recess. The method for manufacturing a semiconductor module according to claim 1, wherein the semiconductor module is formed by forming a through hole provided with: