JP2001110719A - Exposure method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize micronization of a pattern, while preventing deterioration of precision due to the aberration of a pattern. SOLUTION: In a process for manufacturing a photomask, a mask pattern 5 is divided into two in the scanning direction of a scanner, and a first divided pattern part 10, constituted of a Levenson-type phase shift mask pattern, is formed in one divided region, and a second divided pattern part 20, constituted of an auxiliary pattern type phase shift mask pattern, is formed in the other divided region so that a photomask 1 can be manufactured. In a first exposure process, the first divided pattern part 10 is exposed to a resist on a wafer. In a second exposure process, the second divided pattern part 20 is double exposed to the exposed region exposed in the first exposing process. Thus, deterioration of aberration with the transfer, by a scanner can be prevented. Also, a fine pattern can be realized by using both the Levenson-type and the auxiliary pattern type.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an exposure method,
The present invention relates to an exposure technique for repeatedly exposing a pattern formed on a photomask to the same resist on an object to be exposed, and for example, to an effective technique used in an exposure step of a method of manufacturing a semiconductor integrated circuit device.

[0002]

2. Description of the Related Art Generally, a semiconductor integrated circuit device (hereinafter referred to as I
Called C. The manufacturing method is a repetition of a process in which a pattern drawn on a photomask (hereinafter, referred to as a mask pattern) is transferred to a semiconductor wafer (hereinafter, referred to as a wafer) by lithography and etching. In the exposure step of transferring a mask pattern to a resist applied to a wafer in this lithography, a reduced projection exposure method is employed. The reduction projection exposure method is an exposure method that uses a photomask called a reticle on which a mask pattern enlarged with respect to a transfer pattern is drawn, and reduces and transfers the mask pattern to a resist on a wafer by a reduction projection lens.

[0003] Improvement in resolution in the reduced projection exposure method has been promoted by increasing the NA of the imaging optical system and shortening the wavelength of exposure light. In order to further meet the fine requirements for the minimum processing size of ICs, the development and application of so-called super-resolution exposure methods such as a modified illumination exposure method and a phase shift mask exposure method have been promoted.

[0004] Incidentally, in order to improve the yield and the performance of the IC in the method of manufacturing the IC, it is necessary to improve the dimensional accuracy, position accuracy and overlay accuracy of the pattern transferred to the wafer. Factors that affect the dimensional accuracy of the transfer pattern include variations in the dimensions of the mask pattern, errors (aberration) in the imaging optical system, variations in the resist process such as resist film thickness, development uniformity, and the like. Factors that affect the transfer pattern position accuracy and overlay accuracy include wafer stage drive accuracy, photomask accuracy, imaging optical system aberrations, and process variations.

[0005] Among these factors, the influence of the aberration of the imaging optical system on the transfer pattern has become more apparent with the miniaturization of the minimum processing size. For this reason, the quantification of the aberration amount by the development and application of the aberration measurement technique of the imaging optical system is being executed on the exposure apparatus user side. In response to this, reduction of the aberration amount has been promoted on the exposure apparatus maker side. As described above, reduction of the aberration amount of the imaging optical system is promoted as one of the higher transfer pattern accuracy.

Examples of the light exposure apparatus include “Electronic Materials Nov. 1998 Extra Edition”, pp. 76-81, issued on November 25, 1998 by the Industrial Research Council, Inc.
There is.

[0007]

As described above, the application of the super-resolution technique has been promoted in order to promote the miniaturization of the minimum processing size. However, when the super-resolution technique is applied, the layout of the mask pattern is reduced. Strict restrictions will be imposed on As a means of alleviating the layout limitation accompanying the application of the super-resolution technique, an exposure method for performing multiple exposure of a mask pattern on the same resist on a wafer has been proposed.

Since the multiple exposure method is a method of exposing a plurality of mask patterns onto the same resist on a wafer, exposure accuracy of the plurality of patterns greatly affects pattern transfer accuracy. On the other hand, the above-described aberration of the imaging optical system causes deterioration of the shape of the transfer pattern and shift of the position of the transfer pattern. For this reason, it has been clarified by the present inventor that the exposure method of performing multiple exposure has a problem in that accuracy of a transfer pattern is deteriorated due to aberration.

The present invention has been made based on this finding, and an object of the present invention is to provide an exposure method capable of preventing a transfer pattern from deteriorating in accuracy due to aberration.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0011]

The outline of a typical invention among the inventions disclosed in the present application is as follows.

That is, in an exposure method in which a pattern formed on a photomask is repeatedly exposed to the same resist on an exposure object by a scanning exposure method, the pattern is divided into a plurality of regions in the scanning direction of the scanning exposure method. Preparing a photomask in which each divided pattern portion is formed in each divided region; and forming one of the plurality of divided pattern portions of the photomask on the resist on the exposure object. The first exposure step is exposed, the other divided pattern portion of the plurality of divided pattern portions of the photomask in the exposure area exposed by the first exposure step in the resist on the exposure object And a second exposure step to be double-exposed, wherein the second exposure step is the remaining of the plurality of divided pattern portions. Characterized in that it is repeated by the number.

According to the above-described means, since the divided pattern portion of the photomask is multiplex-transferred onto the resist of the object to be exposed by the scanning exposure method, the transfer position shift between the multiple exposure patterns due to the aberration (distortion) of the projection lens. The prevention prevents the aberration of the projection lens for the exposure in the scanning direction from being deteriorated. In addition, since the first divided pattern portion and the second divided pattern portion are double-exposed on the same resist, the transfer portion of the first divided pattern portion and the second divided pattern portion transferred to the same resist. The two transfer portions are formed at a high density. In the transfer portion of the first divided pattern portion and the second transfer portion of the second divided pattern portion formed at a high density, the deterioration of the aberration in the scanning direction of the projection lens for the exposure is prevented. I have.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

In this embodiment, the minimum design dimension 15
This is an exposure step in a method of manufacturing a 1-gigabit DRAM-class IC of 0 nm. A case where exposure is performed using a scanner will be described as an example.

First, the photomask shown in FIG. 1 used in the exposure method according to this embodiment will be described. In this photomask, a contact hole pattern having a minimum arrangement pitch of 260 nm and a minimum design dimension of 180 nm is formed on a resist of a wafer, and the illumination condition of the scanner is set to a numerical aperture NA =
The exposure is performed under the condition of 0.68 and coherency (sigma) value = 0.3.

The photomask is manufactured in advance in a photomask manufacturing process and is supplied to an exposure process. The mask manufacturing process is a process of drawing a pattern described by circuit design data on a light-shielding film on a mask blank using an electron beam drawing device (not shown), and manufacturing a mask through lithography and etching.

As shown in FIGS. 1 (d) and 1 (e), the photomask 1 includes a mask blank 2 made of synthetic quartz glass and formed in a substantially square plate shape. A light-shielding film 3 made of a metal film such as chromium is adhered to one main surface of the second 2 (hereinafter, referred to as a first main surface). A light-transmitting portion 4 is formed in the light-shielding film 3 by patterning by lithography and etching, and a desired mask pattern 5 is formed by the light-shielding film 3 and the light-transmitting portion 4. 1 (a), (b),
In (c), the light-shielding film 3 is shown with diagonal solid lines.

In this embodiment, the mask pattern 5
Is a contact hole pattern, the light transmitting portion 4 is a substantially square through hole having a design dimension of 200 nm, and a plurality of light transmitting portions 4 are arranged with a minimum arrangement pitch of 260 nm.

As shown in FIG. 1A, the mask pattern 5 of the photomask 1 has a first divided pattern portion 10
And the second divided pattern unit 20, and the first divided pattern unit 10 and the second divided pattern unit 20 are arranged side by side in the Y direction. In other words, the first divided pattern unit 10 and the second divided pattern unit 20 are each set to be the same rectangle, and are arranged adjacent to each other such that the long sides are parallel to each other. The Y direction in which the first divided pattern unit 10 and the second divided pattern unit 20 are arranged corresponds to the scanning direction of the scanner.

As shown in FIGS. 1B and 1D, the first divided pattern section 10 is constituted by a Levenson-type phase shift mask pattern. That is,
The first divided pattern portion 10 includes a light-transmitting pattern portion (hereinafter, referred to as a normal portion) 11 including the light-transmitting portion 4 having no shifter attached thereto and a light-transmitting pattern portion including the light-transmitting portion 4 having the shifter 13 attached thereto. (Hereinafter, referred to as a shift unit) 12. A shift portion (indicated by a hatched dashed line) 12 is disposed at a position behind each of the regular portions 11 in the Y direction, and a pitch Py between the regular portion 11 and the shift portion 12 in the Y direction is arranged. Is set to 290 nm. The pitch Px in the X direction between the normal part 11 and the shift part 12 is set to 260 nm.

As shown in FIGS. 1C and 1E, the second divided pattern section 20 is constituted by an auxiliary pattern type phase shift mask pattern. That is, the second divided pattern section 20 is formed of a light transmitting section 4 having a regular size.
(Hereinafter, referred to as a second regular part)
21 and an auxiliary pattern part (hereinafter, referred to as a small through hole)
It is called an auxiliary unit. ) 22. A shifter 23 is formed in the second regular part 21. Auxiliary portions 22 are arranged at front and rear positions of each second regular portion 21 in the Y direction, and a pitch Py in the Y direction between the second regular portion 21 and the auxiliary portion 22 is set to 290 nm. The pitch Px between the second regular portion 21 and the auxiliary portion 22 in the X direction is 2
It is set to 60 nm. The auxiliary part 22 is set to a small hole of 100 nm square which is smaller than the resolution limit.

The exposure method according to the present embodiment uses a scanner (scanning KrF excimer laser reduction projection exposure apparatus) 70 shown in FIG. Here, the scanner 7
0 will be described.

As shown in FIG. 2, the light emitted from the light source 71 is supplied to the fly-eye lens 72 and the aperture 7.
7. The light is irradiated onto the photomask 1 supported on the mask stage 79 via the first condenser lens 73, the mirror 74, and the second condenser lens 75. The coherency of the optical conditions is adjusted by changing the size of the opening of the aperture 76. A pellicle 78 for preventing a pattern transfer failure due to the adhesion of foreign matter is provided on the photomask 1.
Is attached.

The mask pattern drawn on the photomask 1 is projected via a projection lens 80 onto a wafer 81 held on a sample table 82 by vacuum suction. The sample stage 82 is moved by the Z stage driving device 87 in the optical axis direction of the projection lens 80 (hereinafter, referred to as Z direction).
It is placed on. The Z stage 83 is mounted on an X stage 84X and a Y stage 84Y which are moved in the X and Y directions by an X stage driving device 88X and a Y stage driving device 88Y, respectively. Z stage driving device 87 and X, Y stage driving devices 88X, 8
8Y is connected to a main controller 89. The main controller 89 measures the position of a mirror 86 fixed to the Z stage 83 with a laser length measuring device 85, thereby monitoring the position of the sample table 82 and driving the Z stage. Device 87 and X, Y stage driving device 88X,
88Y is controlled.

The wafer 81 held on the sample stage 82
Is configured to be detected by a focus position detection device (not shown) including a detection light emitting unit and a light receiving unit, and the focus is automatically adjusted by this detection.

The main controller 89 is connected to a mask stage driving device 90 for driving the mask stage 79, and the mask stage driving device 90 determines the position of the mirror 92 fixed to the mask stage 79 by using the laser length measuring device 9.
The measurement is performed according to 1 to monitor the position of the mask stage 79 to control the mask stage driving device 90. That is, the mask stage 79 is controlled by the mask stage driving device 90 and the laser length measuring device 91 to accurately align the center of the photomask 1 with the optical axis of the projection lens 80.

An alignment optical system 93 is connected to the main controller 89 so that a circuit pattern formed on the wafer 81 is formed on the wafer 81 when the mask pattern of the photomask 1 is overlaid and exposed. The position of the mark pattern thus detected is detected by the alignment optical system 93, and the wafer 81 is positioned based on the result of the detection and the overlay exposure is performed.

The main controller 89 is connected to the network 94 so that remote monitoring of the scanner 70 and the like are executed.

Hereinafter, an exposure method using the scanner and the photomask according to the above configuration in the case of forming a contact hole of a memory cell of a DRAM will be described.

FIG. 3A shows a memory cell 30 of a DRAM.
FIG. 3B is a sectional view of a main part. FIG.
In (a), many word lines 31 are wired in the vertical direction (hereinafter, referred to as Y direction) on the paper surface, and many data lines 32 are arranged in the horizontal direction on the paper surface (hereinafter, referred to as X direction). Wired. Capacitor 33 is formed above word line 31 and data line 32. On the active region 34 formed in the gap between the adjacent word lines 31, 31, a plug electrode 35 is provided in an elongated shape so as to be in contact with the active region 34 and extend to a region other than the active region 34. In addition, the data line 32 is wired so as to partially overlap the plug electrode 35. An opening 36 is formed over the active region 34.
, And the lower electrode 33 a of the capacitor 33 is connected through a conductor layer filled in the opening 36.

The MISFET constituting the memory cell comprises a gate insulating film 37, a gate electrode 38, a source 39 which is an n-type high-concentration impurity region, and a drain 40. The plug electrode 35 penetrates the silicon oxide film 41 on the source 39, and the data line 32 is laid on the silicon oxide film 41. A lower electrode 33 a of the capacitor 33 is formed on the silicon oxide film 42 on the data line 32, and the lower electrode 33 a is connected to the drain 40. The capacitor 33 includes a lower electrode 33a, a dielectric film 33b, and an upper electrode 33c. An interlayer insulating film 43 made of a silicon oxide film and a wiring 44 made of aluminum are laid on the uppermost layer.

In the exposure method for the contact hole of the memory cell of the DRAM according to the above configuration, the scanner 70 is used under the following exposure conditions. The wavelength of the exposure light beam is 248 nm, and the NA of the projection lens 80 is 0.68.
It is. As the photomask, the photomask 1 for exposing the contact hole shown in FIG. 1 according to the above configuration is used.

In carrying out the method for exposing a contact hole, a photomask 1 for exposing the contact hole is used.
Is mounted on the mask stage 79 of the scanner 70. Further, the wafer 81 is mounted on the sample table 82. The main controller 89 detects the position of the mark pattern formed on the wafer 81 by the alignment optical system 93,
The wafer 81 is positioned based on the detection result, and the photomask 1 is positioned.
Perform alignment with.

Next, the exposure light beam emitted from the light source 71 is adjusted to a rectangular shape by the illumination shape adjusting aperture 77 and is applied to the photomask 1. The exposure light beam transmitted through the photomask 1 is transmitted through the projection lens 80 to the sample stage 82. Is irradiated on the wafer 81. At this time, the mask stage 79 and the Y stage 84Y are synchronized by the mask stage driving device 90 and the Y stage driving device 88Y and are scanned by one shot in the Y direction.

The mask pattern 5 of the photomask 1 is reduced and projected on the resist of the wafer 81 by irradiating the wafer 81 with one shot of a rectangular exposure light beam while scanning the mask stage 79 and the Y stage 84Y. (Hereinafter, referred to as scan exposure operation). By this scan exposure operation, the one-shot pattern portion (hereinafter, referred to as a shot portion) 50 shown in FIG. The shot portion 50 is formed by transferring a first transfer pattern portion (hereinafter, referred to as a first transfer portion) 51 formed by transferring the first divided pattern portion 10 of the mask pattern 5 and a second divided pattern portion 20. Second transfer pattern portion (hereinafter, second transfer portion) 5
2 is constituted.

When the shot section 50 is formed by the scanning exposure operation as described above, the X stage 84X is step-moved by one shot. Next, the next shot portion 50 is formed in the adjacent shot area of the wafer 81 by the scan exposure operation.

Thereafter, the wafer 81 is repeatedly moved in steps and the scanning exposure operation (step-and-scan) is repeated, as shown in FIG. Shot portions 50 including the second transfer portion 52 are formed in a matrix.

As described above, when the group of shot portions 50 is formed in a matrix on the entire surface of the wafer 81 by step-and-scan, the X and Y stages 84X, 8
4Y is returned to the position of the first shot portion 50, and is step-moved in the Y direction by a half pitch of one shot with respect to the first shot portion 50. This half pitch corresponds to the dimension in the Y direction of the first transfer unit 51 and the second transfer unit 52 by the previous step and scan as the first exposure process.

Thereafter, the second step-and-scan as the second exposure step is repeated as in the previous step. By the second step-and-scan, as shown in FIG. 5B, the first step-and-scan as the first exposure step places the first shot portion 50 on the first shot portion 50. The two shot portions 50 'are sequentially double-exposed with a shift of a half pitch.

At the time of the second step-and-scan, the second shot portion 50 'formed by one shot is shifted by a half pitch with respect to the first shot portion 50 of the first step-and-scan. 5A and 5B, the second shot portion 50 'is shifted from the first transfer portion 51'.
Is in a state where the second transfer section 52 of the first shot section 50 is double-exposed. Then, the second transfer section 52 'of the second shot section 50' is connected to the first shot section 50 adjacent in the Y direction.
Of the first transfer unit 51 is double-exposed. That is,
The second transfer unit 52 'of the second shot unit 50' is double-exposed to the first transfer unit 51 of the first shot unit 50, and the second transfer unit 52 of the first shot unit 50 is exposed. In this state, the first transfer section 51 'of the second shot section 50' is in a double-exposed state.

Here, the operation of exposing the first divided pattern portion composed of the Levenson-type phase shift mask pattern to the resist on the wafer will be described with reference to FIG.

In the case where the shifter 13 is not formed in the first divided pattern portion 10 shown in FIG. 6A, the intensity of the exposure light transmitted through the adjacent light transmitting portions 4, 4 is shown in FIG. 6B.
Q4 and Q4 shown in FIG. FIG.
As shown in (b), adjacent light intensities Q4 and Q4
In the region adjacent to No. 4, the bases overlap each other. When the exposed resist is developed in this manner, adjacent patterns are in a continuous state. This means that the adjacent light-transmitting portions 4, 4 need to be separated so that the bases of the intensity of the exposure light do not overlap. That is, there is a limit to the miniaturization of the pattern.

FIG. 6C shows the amplitude W11 and the amplitude W12 of the exposure light transmitted through the normal portion 11 and the shift portion 12 of the first divided pattern portion 10 shown in FIG. 6A, respectively. FIG. 6D shows the intensities Q11 and Q12 of the exposure light. As shown in FIG. 6C, the phase of the amplitude W12 of the shift unit 12 is shifted by 180 degrees with respect to the amplitude W11 of the normal unit 11. This phase shift (reversal)
As a result, as shown in FIG.
Since the base of the exposure light intensity Q11 and the base of the exposure light intensity Q12 of the shift unit 12 cancel each other, the intensity Q11 of the regular unit 11 and the intensity Q12 of the shift unit 12 are different from each other in FIG.
As shown in (d), they are independent of each other.

As described above, the first transfer portion 51 is formed on the resist of the wafer 81 as described above. When the resist of the first transfer portion 51 is developed, it is shown in FIG. Thus, the opening K11 corresponding to the regular part 11 and the opening K12 corresponding to the shift part 12 are completely separated from each other. This means that the normal part 11 and the shift part 12 can be arranged close to each other. That is, the pattern can be miniaturized.

Next, the operation of exposing the second divided pattern portion composed of the auxiliary pattern type phase shift mask pattern to the resist on the wafer will be described with reference to FIG.

In the case where there are no auxiliary portions 22 on both sides in the second divided pattern portion 20 shown in FIG.
The intensity distribution of the exposure light on the wafer is as indicated by Q21 shown in FIG.

FIG. 7C shows the second regular part 21 and the auxiliary parts 22, 22 of the second divided pattern part 20 shown in FIG. 7A.
7A and 7B show the amplitude W21 and the amplitudes W22 and W22 of the exposure light that has passed through FIG. 7, and FIG. 7D shows the intensity of the exposure light. Second regular part 2 of second divided pattern part 20
1 is provided with a shifter 23, so that the second regular part 2
The amplitude W21 of 1 is shifted by 180 degrees from the amplitude W22 of the auxiliary unit 22. As shown in FIG. 7C, the phase of the amplitude W21 of the second normal part 21 is shifted by 180 degrees with respect to the amplitude W22 of the auxiliary part 22. Due to this phase shift, the light intensity at the base of the light intensity Q21 of the second normal part 21 is canceled by the light intensities Q22 and Q22 of the auxiliary part 22, and as shown in FIG. Wafer 8
Only the second regular portion 21 is exposed to one resist.

As described above, the second transfer portion 52 is formed on the resist of the wafer 81 as described above. When the resist of the second transfer portion 52 is developed, it is shown in FIG. As described above, the opening K2 corresponding to the second regular portion 21
Only one will be formed. That is, the pattern of the contact hole can be miniaturized.

Next, a second transfer section 52 'using the auxiliary pattern type phase shift mask pattern of the second shot section 50' is added to the first transfer section 51 using the Levenson type phase shift mask pattern of the first shot section 50. The operation of double exposure in the case of double exposure will be described with reference to FIG.

As shown in FIGS. 8A and 8B, the first shot portion 50 is transferred to the first transfer portion 51 by the first divided pattern portion 10 constituted by the Levenson-type phase shift mask pattern. The first regular exposure section 53 exposed by each first regular section 11 and the shift exposure section 54 exposed by each shift section 12 are formed. The first regular exposure section 53 and the shift exposure section 54 arranged close to each other are adjacent to each other with a minimum arrangement pitch of 260 nm. However, an empty space portion 55 is formed on the side of the shift exposure portion 54 opposite to the side where the first regular exposure portion 53 is adjacent, and the size of the empty space portion 55 is larger than that of the first regular exposure portion 53. Is set.

When the second transfer portion 52 'of the auxiliary pattern type phase shift mask pattern is double-exposed to the first transfer portion 51 shown in FIGS. 8 (c) and (d), each second regular exposure unit 56 exposed by each second regular unit 21
Are formed in the respective empty space portions 55. As described with reference to FIG. 7, in the second exposure step, since the auxiliary portion 22 of the second divided pattern portion 20 is a minute pattern equal to or smaller than the resolution limit, only the second regular exposure portion 56 is formed in the empty space portion 55. State.

As shown in FIGS. 8C and 8D, a first regular exposure section 53 formed by the first exposure step, a shift exposure section 54, and a second regular exposure section 54 formed by the second exposure step. The regular exposure unit 56 has a minimum arrangement pitch of 260 n.
Since the arrangement is made with m, the first regular exposure unit 53, the shift exposure unit 54, and the second regular exposure unit 56 are arranged close to each other. In other words, the pattern of the contact hole is finer than when only a single exposure process is performed.

The wafer 81 which has been subjected to the step-and-scan of the first exposure step and the second exposure step for the photomask 1 as described above is lowered from the sample table 82 and is sequentially sent to the development step and the etching step. Can be

After the development step and the etching step, as shown in FIG.
In this case, a pair of chip portions 57 are formed for one shot portion 50 in a contact hole pattern constituted by the first regular exposure portion 53, the shift exposure portion 54, and the second regular exposure portion 56. 9B, a contact hole pattern 60 composed of a first regular exposure unit 53, a shift exposure unit 54, and a second regular exposure unit 56 is formed on the wafer 81 in each chip unit 57. .

According to the above embodiment, the following effects can be obtained.

1) By transferring the mask pattern of the photomask onto the resist of the wafer by the scanning exposure method, it is possible to prevent the aberration of the projection lens in the scanning direction from deteriorating, thereby preventing the accuracy of the transfer pattern from deteriorating. be able to.

2) Dividing the mask pattern of the photomask into a first divided pattern portion and a second divided pattern portion, and exposing the second divided pattern portion to the first divided pattern portion for the same resist. Accordingly, the transfer portion of the first divided pattern portion and the second transfer portion of the second divided pattern portion can be formed at a high density, so that the density of the IC can be increased.

3) The first divided pattern portion is constituted by a Levenson type phase shift mask pattern, and the second divided pattern portion is constituted by an auxiliary pattern type phase shift mask pattern. Since the second normal portion can be arranged on the side opposite to the shift portion, the density of the IC can be increased.

FIG. 10 shows a photomask used in an exposure method of an element isolation pattern according to another embodiment of the present invention. Note that the arrangement pitch of the element isolation patterns to be subjected to this photomask is 280 nm in the Y direction,
1040 nm in X direction, 520 in each row in Y direction
The arrangement is shifted by nm.

FIG. 10A shows the first divided pattern section 10A.
And is constituted by a Levenson-type phase shift mask pattern. That is, as shown in FIG. 10B, the first divided pattern portion 10A includes a light-transmitting pattern portion (hereinafter, referred to as a regular portion) 11A including the light-transmitting portion 4 to which no shifter is attached, and a shifter. The light transmission pattern portion (hereinafter, referred to as a shift portion) 12A is formed by the light transmission portion 4 to which 13 is attached, and each of the normal portion 11A and each of the shift portions 12A is a line that is arranged slightly obliquely. Each is formed in a shape. At the rear position in the Y direction of each normal portion 11A, a shift portion (shown by hatching with a broken line) 12A is arranged, and the pitch between the normal portion 11A and the shift portion 12A in the Y direction is arranged. Py is set to 259 nm, and the distance Dy between the normal part 11A and the shift part 12A is set to 135 nm.

The second divided pattern section 20A shown in FIG. 10 (c) is constituted by an auxiliary pattern type phase shift mask pattern. That is, as shown in FIG. 10D, the second divided pattern portion 20A is
(Hereinafter, referred to as a second regular part)
21A and an auxiliary pattern portion (hereinafter, referred to as an auxiliary portion) 22A composed of a small through-hole. Auxiliary portions 22A are arranged at front and rear positions in the Y direction of each second regular portion 21A, and the pitch Py in the Y direction between the second regular portion 21A and the auxiliary portion 22A is set to 290 nm. The pitch Px in the X direction between the second regular part 21A and the auxiliary part 22A is set to 260 nm.

In this embodiment, similarly to the above embodiment, after the first divided pattern portion 10A of the photomask 1A having the above structure is exposed to the positive resist on the wafer in the first exposure step, the second exposure step is performed. In the above, the second divided pattern 20A of the photomask 1A according to the above configuration is double-exposed to the first transfer portion of the same positive resist in the first exposure step.

Then, the wafer that has completed the step-and-scan of the first exposure step and the second exposure step for the photomask 1A is sequentially sent to the development step and the etching step. Through the development step and the etching step, the element isolation pattern 60A shown in FIG.

FIG. 11 shows a photomask used in a method for exposing a pattern of a storage node according to another embodiment of the present invention.

FIG. 11A shows the first divided pattern portion 10B.
And is constituted by a Levenson-type phase shift mask pattern. That is, as shown in FIG. 11B, the first divided pattern portion 10B includes a light-transmitting pattern portion (hereinafter, referred to as a normal portion) 11B including the light-transmitting portion 4 to which no shifter is attached, and a shifter. 13 includes a light-transmitting pattern portion (hereinafter, referred to as a shift portion) 12B including the light-transmitting portion 4 attached thereto. Each of the regular portion 11B and each of the shift portions 12B is formed in a line shape. I have. At the rear position in the Y direction of each normal part 11B, a shift part (shown by hatching with a broken line) 12B is arranged, and the normal part 11B is arranged.
The pitch Py in the Y direction between B and the shift portion 12B is 435
nm, and the width w of the normal part 11B and the shift part 12B is set to 150 nm.

The second divided pattern portion 20B shown in FIG. 11C is also constituted by a Levenson-type phase shift mask pattern. That is, as shown in FIG. 11D, the second divided pattern portion 20B is a light-transmitting pattern portion (hereinafter, referred to as a second regular portion) 21B including the light-transmitting portion 4 to which no shifter is attached. , And a light-transmitting pattern portion (hereinafter, referred to as a shift portion) 22B including the light-transmitting portion 4 to which the shifter 23 is attached. Each of the regular portion 21B and each of the shift portions 22B are formed in a line shape. Have been. Each of the second regular portions 21B and the shift portion 22B are aligned in the X direction, and a shift portion (shown by hatching with a broken line) 22B is located behind the second regular portion 21B in the X direction. Are arranged, the pitch Px in the X direction between the second regular portion 21B and the shift portion 12B is set to 260 nm, and the interval Dx between the second regular portion 21B and the shift portion 22B is 130 nm.
nm.

In this embodiment, similarly to the above embodiment, after the first divided pattern portion 10B of the photomask 1B according to the above configuration is exposed to the negative resist of the wafer in the first exposure step, the second exposure step is performed. In the above, the second divided pattern 20B of the photomask 1B according to the above configuration is double-exposed to the first transfer portion of the same negative resist in the first exposure step.

Then, the wafer which has completed the step-and-scan of the first exposure step and the second exposure step for the photomask 1B is sequentially sent to the development step and the etching step. Through the development step and the etching step, a storage node pattern 60B shown in FIG. 11E is formed on the wafer 81.

FIG. 12 shows a photomask used in a random circuit pattern exposure method according to another embodiment of the present invention.

This embodiment is different from the above embodiment in that
First divided pattern unit 10C and second divided pattern unit 2
Each of the first divided pattern portions 10C shown in FIG. 12 (a) corresponds to the left portion of the circuit pattern 60C shown in FIG. 12 (c). Fig. 1
The second divided pattern 20C shown in FIG. 2B is configured to cover the right side portion. Since the shifters 13 and 23 can be alternately arranged in the Y direction by arranging them in the left and right directions in this manner, a Levenson-type phase shift mask pattern can be formed even for a random circuit pattern.

In this embodiment, similarly to the above embodiment, after the first divided pattern portion 10C of the photomask 1C according to the above configuration is exposed to the resist on the wafer in the first exposure step, the second exposure step The second divided pattern portion 20C of the photomask 1C according to the above configuration is double-exposed to the first transfer portion of the same resist by the first exposure step.

Then, the wafer that has completed the step-and-scan in the first exposure step and the second exposure step for the photomask 1C is sequentially sent to a development step and an etching step. Through the development step and the etching step, a random circuit pattern 60C shown in FIG. 12C is formed on the wafer 81.

FIGS. 13 and 14 show a photomask used in an exposure method according to another embodiment of the present invention.

This embodiment is different from the above embodiment in that
As shown in FIG. 13A, the photomask 1D
The first divided pattern portion 10D, the second divided pattern portion 20D, and the third divided pattern portion 30
The pattern 60D having the isolated contact hole shown in FIG. 13B is formed by performing the multiple exposure of the three pattern portions.

FIG. 14 shows the first division pattern portion 10D.
The contact hole pattern shown in FIG. 14A is formed, and the contact hole pattern shown in FIG. 14B is formed in the second divided pattern portion 20D.
An isolated hole pattern shown in FIG. 14C is formed in the third divided pattern portion 30D. Each of the first divided pattern portion 10D and the second divided pattern portion 20D is configured by a Levenson-type phase shift mask pattern, and the second regular portion 21 of the second divided pattern portion 20D.
D and the shift unit 22D are arranged in the empty space of the first divided pattern unit 10D.

The third divided pattern portion 30D has a size of 180n.
It is constituted by a halftone type phase shift mask for transferring a micro isolated hole pattern of m. That is, the light-shielding film around the isolated hole pattern portion (hereinafter, referred to as an isolated portion) 31D of the third divided pattern portion 30 is formed by the halftone film 32D. The halftone film is a semi-transparent film that transmits exposure light having a phase inverted with respect to exposure light transmitted through the isolated portion by several percent. In this embodiment, the transmittance of the halftone film is 6%.

In this embodiment, after the first divided pattern portion 10D of the photomask 1D according to the above configuration is exposed to the resist of the wafer in the first exposure step, the first exposure of the same resist is performed in the second exposure step. The second division pattern 20D of the photomask 1D according to the above configuration is double-exposed to the first transfer portion by the process, and the third division pattern 30D of the photomask 1D according to the above configuration is further provided to the same transfer portion in the same resist. Triple exposure is performed.

Then, the wafer which has completed the step-and-scan in the first exposure step and the second exposure step (twice) for the photomask 1D is sequentially sent to the development step and the etching step. After the development step and the etching step, the pattern 6 having the isolated contact hole shown in FIG.
0D is formed.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and can be variously modified without departing from the gist thereof. Needless to say.

For example, the first exposure step and the second exposure step may be alternately repeated without performing the second exposure step after completing the first exposure step. That is, after the entire mask pattern of the photomask is transferred to the resist on the wafer in the first exposure step, the mask stage and the Y stage are retracted in the reverse direction in the Y direction by a half pitch of the scan pitch of the scan exposure operation. The second exposure step may be continuously performed with a half pitch shift. Also in this case, since the mask pattern in the second exposure step is shifted by a half pitch with respect to the shot part in the first exposure step, the first transfer pattern part of the first division pattern part of the photomask has the first transfer pattern part. Since the first transfer portion is double-exposed, the same operation and effect as in the above-described embodiment can be obtained.

In the above description, the invention made mainly by the present inventor has been described in terms of the DRA which is the application field in which the invention is based.
Although the description has been given of the case where the present invention is applied to the manufacturing technique of the memory cell of M, the present invention is not limited to this, and can be applied to all exposure methods used in the manufacturing method of a gate array, a liquid crystal display device (LCD), and the like. .

[0083]

The effects obtained by typical aspects of the invention disclosed in the present application will be briefly described as follows.

By transferring the mask pattern of the photomask to the resist on the wafer by a scanning exposure method,
Since it is possible to prevent the aberration of the projection lens in the scanning direction from deteriorating, it is possible to prevent the accuracy of the transfer pattern from deteriorating.

The mask pattern of the photomask is divided into a first divided pattern portion and a second divided pattern portion, and the first divided pattern portion is double-exposed to the same resist by the first divided pattern portion, thereby obtaining the first divided pattern portion. Since the transfer portion of the divided pattern portion and the second transfer portion of the second divided pattern portion can be formed with high density, it is possible to promote the high density of the IC.

By forming the first divided pattern portion by a Levenson type phase shift mask pattern and the second divided pattern portion by an auxiliary pattern type phase shift mask pattern, the first transfer portion by the first divided pattern portion is formed. Since the second transfer portion can be arranged between the first transfer portion and the shift portion, the density of the IC can be increased.

[Brief description of the drawings]

FIGS. 1A and 1B show a photomask used in an exposure method according to an embodiment of the present invention, wherein FIG.
(B) is a partial bottom view of the first divided pattern portion, (c) is a partial bottom view of the second divided pattern portion, and (d) is d− of (b).
FIG. 4E is a side sectional view taken along line d, and FIG. 4E is a side sectional view taken along line ee in FIG.

FIG. 2 is a schematic diagram showing a scanner used in an exposure method according to an embodiment of the present invention.

FIG. 3 shows a memory cell of a DRAM;
2 is a plan view, and FIG. 2B is a front sectional view taken along line bb of FIG.

4A and 4B show a state after a first exposure step, wherein FIG. 4A is a plan view of a shot portion, and FIG. 4B is a plan view of a wafer.

5A and 5B show a state after a second exposure step, wherein FIG. 5A is a plan view of a shot portion, and FIG. 5B is a plan view of a wafer.

FIG. 6 is an explanatory diagram for explaining an exposure operation of a first divided pattern portion.

FIG. 7 is an explanatory diagram for explaining an exposure operation of a second divided pattern portion.

FIGS. 8A and 8B are explanatory views for explaining the effect of double exposure, wherein FIG. 8A is a plan view showing a first transfer portion after a first exposure step, and FIG. 8B is a view bb of FIG. Front sectional view along the line,
(C) is a plan view showing a double exposure portion after the second exposure step,
(D) is front sectional drawing which follows the dd line of (c).

FIGS. 9A and 9B show a state after a developing step, wherein FIG. 9A is a plan view of a wafer, and FIG. 9B is a partial plan view of a chip portion.

10A and 10B show a photomask used in a method of exposing a pattern of an element isolation (locos layer) according to another embodiment of the present invention, wherein FIG. 10A is a partial bottom view of a first divided pattern portion, (b) is a cross-sectional view along the line bb in (a), (c) is a partial bottom view of the second divided pattern portion, and (d) is d in (c).
It is sectional drawing which follows the -d line. (E) is a partial plan view showing a pattern formed by the photomask.

11A and 11B show a photomask used in a method of exposing a pattern of a storage node according to another embodiment of the present invention, wherein FIG. 11A is a partial bottom view of a first divided pattern portion, and FIG. (A) is a sectional view taken along the line bb, (c) is a partial bottom view of the second divided pattern portion, and (d) is d in (c).
It is sectional drawing which follows the -d line. (E) is a partial plan view showing a pattern formed by the photomask.

FIG. 12 shows a photomask used in a random circuit pattern exposure method according to another embodiment of the present invention, where (a) is a partial bottom view of a first divided pattern portion,
(B) is a partial bottom view of the second divided pattern portion.
(C) is a partial plan view showing a pattern formed by the photomask.

FIG. 13 (a) is a bottom view showing a photomask used in a method for exposing a pattern having an isolated contact hole according to another embodiment of the present invention, and FIG. 13 (b) is a pattern having the isolated contact hole. FIG.

14A and 14B show the photomask, wherein FIG. 14A is a partial bottom view of a first divided pattern portion, FIG. 14B is a partial bottom view of a second divided pattern portion, and FIG. It is a partial bottom view.

[Explanation of symbols]

1, 1A, 1B, 1C, 1D photomask, 2 mask blank, 3 light shielding film, 4 light transmissive portion, 5D mask pattern, 10A, 10B, 10C, 10D ...
A first divided pattern portion, 11, 11A, 11B, 11C,
11D: regular part (light-transmitting pattern part), 12, 12A, 1
2B, 12C,... Shift part (light-transmitting pattern part composed of light-transmitting part 4 with a shifter), 13 ... shifter, 20, 2
0A, 20B, 20C, 20D ... second division pattern portion,
21, 21A, 21B, 21C, 21D: second regular portion (light-transmitting pattern portion), 22, 22A, 22B, 22C,
22D: auxiliary part (auxiliary pattern part composed of small through holes), 23: shifter, 30: DRAM memory cell,
30D: third division pattern portion, 31: word line, 31D
... isolated hole pattern portion (isolated portion), 32 ... data line,
32D: halftone film, 33: capacitor, 33a ...
Lower electrode, 33b: dielectric film, 33c: upper electrode, 34
... active area, 35 ... plug electrode, 36 ... opening, 37 ...
Gate insulating film, 38 gate electrode, 39 source, 40
... Drain, 41, 42 ... silicon oxide film, 43 ... interlayer insulating film, 44 ... wiring, 50, 50 '... one-shot pattern portion (shot portion), 51, 51' ... first transfer pattern portion (first transfer portion) ), 52, 52 ': second transfer pattern portion (second transfer portion), 53: first regular exposure portion, 54: shift exposure portion, 55: empty space portion, 56: second regular exposure portion, 57: chip Part, 60, 60D ... pattern, 60A
... Element separation pattern, 60B storage node pattern, 60C circuit pattern, 70 scanner (scanning KrF excimer laser reduction projection exposure apparatus), 71 light source, 72 fly-eye lens, 73 first condenser lens, 74 ... mirror, 75 ... second condenser lens, 7
6, 77 ... aperture, 78 ... pellicle, 79 ... mask stage, 80 ... projection lens, 81 ... wafer, 82 ... sample table, 83 ... Z stage, 84 ... XY stage, 85 ...
Laser length measuring device, 86 ... Mirror, 87 ... Z stage driving device, 88 ... XY stage driving device, 89 ... Main controller, 90 ... Mask stage driving device, 91 ... Laser length measuring device, 92 ... Mirror, 93 ... Alignment optics System, 9
4. Network.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Katsuya Hayano 3-16-6 Shinmachi, Ome-shi, Tokyo F-term in the Device Development Center, Hitachi, Ltd. F-term (reference) 5F046 AA13 AA25 BA04 BA05 CB17

Claims (12)

[Claims] In an exposure method in which a pattern formed on a photomask is repeatedly exposed to the same resist on an exposure object by a scanning exposure method, the pattern is divided into a plurality of regions in a scanning direction of the scanning exposure method. Preparing a photomask in which each divided pattern portion is formed in each divided region; and forming one of the plurality of divided pattern portions of the photomask on the resist on the exposure object. The first exposure step is exposed, the other divided pattern portion of the plurality of divided pattern portions of the photomask in the exposure area exposed by the first exposure step in the resist on the exposure object A second exposure step of performing double exposure, wherein the second exposure step is repeated the remaining number of times of the plurality of divided pattern portions. An exposure method characterized by being returned. 2. The method according to claim 1, wherein after the first exposure step is repeatedly performed over the entirety of the exposure target, the second exposure step is repeatedly performed over the entirety of the exposure target. Exposure method according to the above. 3. The exposure method according to claim 1, wherein the first exposure step and the exposure step are alternately and repeatedly performed over the entirety of the object to be exposed. 4. The pattern is divided into two parts, one of which is formed with a divided pattern portion composed of a Levenson-type phase shift mask pattern, and the other divided region is composed of an auxiliary pattern type phase shift mask pattern. 4. The exposure method according to claim 1, wherein a divided pattern portion is formed. 5. The exposure method according to claim 4, wherein the two divided pattern portions are double-exposed to form one contact hole pattern. 6. The exposure method according to claim 4, wherein the two divided pattern portions are double-exposed to form one element isolation pattern. 7. The pattern according to claim 1, wherein the pattern is divided into two, and each of the divided regions is formed with a divided pattern portion composed of a different Levenson-type phase shift mask pattern. Or 3
Exposure method according to 1. 8. The exposure method according to claim 7, wherein the two divided pattern portions are double-exposed to form one storage node pattern. 9. The pattern is divided into two, and each of the divided regions is formed with a divided pattern portion composed of a different Levenson-type phase shift mask pattern, and the regions of both divided pattern portions are assigned. 4. The exposure method according to claim 1, wherein the area is shared by half. 10. The exposure method according to claim 9, wherein the two divided pattern portions are double-exposed to form one random circuit pattern. 11. The pattern is divided into three parts, each of which is formed of a different Levenson-type phase shift mask pattern in the first and second divided areas, and is formed in the third divided pattern area. 4. The exposure method according to claim 1, wherein a divided pattern portion formed of a halftone phase shift mask pattern is formed. 12. The method according to claim 11, wherein the three divided pattern portions are subjected to multiple exposure to form a contact hole pattern having one isolated hole pattern.
Exposure method according to 1.