JP2001015373A - Manufacture of laminated ceramic electronic component and laminated ceramic electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a method by which a laminated ceramic electronic component which does not fluctuate much in electrical characteristics, such as capacitance, etc., even when a laminate deviation occurs in a laminate of mother green ceramic sheets, regardless of the number of laminated internal electrodes, whether it is an even number or an odd number, can be manufactured. SOLUTION: A method for manufacturing a laminated ceramic electronic component includes a step of laminating mother ceramic green sheets, on which a plurality of internal electrode patterns 2 and 3 are formed in lines in the directions of rows and columns upon another. The patterns 2 and 3 are formed, in such a way that their widths become narrower, going toward the other ends from one ends in the directions of rows and the patterns 2 and 3 which adjoin each other in the direction of rows have symmetrical shapes, with respect to the middle point the patterns 2 and 3. At lamination of the green sheets upon another, in addition, the sheets are alternately shifted from each other in the direction of rows.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer ceramic electronic component such as a multilayer capacitor and a multilayer thermistor, and to a multilayer ceramic electronic component. The present invention relates to a method for manufacturing a multilayer ceramic electronic component having an internal electrode and a multilayer ceramic electronic component.

[0002]

2. Description of the Related Art Conventionally, production of multilayer ceramic electronic components such as multilayer capacitors has been performed as follows. First, a mother ceramic green sheet is prepared. Next, a plurality of internal electrode patterns aligned in the row and column directions are formed on one side of the mother ceramic green sheet. Next, the mother ceramic green sheets on which the internal electrode patterns are formed are stacked, and an appropriate number of plain mother ceramic green sheets are stacked one above the other, and a mother laminate is obtained by pressing in the thickness direction.

[0003] Next, the mother laminate is cut in the thickness direction to obtain a raw laminate of individual multilayer ceramic electronic components. Further, the green laminate is fired to obtain a sintered body, and an external electrode is provided on an outer surface of the obtained sintered body.

In a multilayer ceramic electronic component such as a multilayer capacitor, it is necessary that a plurality of internal electrodes be accurately overlapped. That is, when the lamination accuracy of the internal electrodes is not sufficient, it is impossible to obtain desired electrical characteristics such as capacitance.

[0005] However, it is very difficult to laminate the ceramic green sheets so that the internal electrodes overlap exactly. Therefore, conventionally, various attempts have been made to suppress the fluctuation of the characteristics due to the lamination deviation (for example, JP-A-8-273973, JP-A-8-181015, and JP-A-8-181333). Gazettes).

Referring to FIG. 9, an example of a method for manufacturing this kind of multilayer ceramic electronic component will be described. In the conventional method of manufacturing a multilayer ceramic electronic component of this type, a relatively wide rectangular internal electrode 52 is formed on a ceramic green sheet 51. Also, the ceramic green sheet 51
A relatively narrow internal electrode 54 is formed on the lower ceramic green sheet 53 to be laminated. A plurality of internal electrodes 52 and 54 are alternately stacked in the thickness direction.

In the multilayer capacitor having the above internal electrode structure, even if the ceramic green sheet 53 is slightly shifted in the width W direction with respect to the ceramic green sheet 51, the internal electrode 52 and the internal electrode 54 overlap. The area does not change. Therefore, it is possible to prevent the capacitance from fluctuating due to the lamination displacement in the W direction.

In FIG. 9, an electrode pattern 54a is formed so as to face the tip of the internal electrode 52, and the electrode pattern 52a is formed so as to face the tip of the internal electrode 54. This is because, as shown in the plan view of FIG. 10, the internal electrode pattern 52A and the internal electrode pattern 54A are formed on the mother ceramic green sheet 55.
Are alternately arranged in the row direction, that is, in the X direction.

That is, in order to obtain the above laminated structure, a plurality of one kind of mother ceramic green sheets 55 on which the internal electrode patterns 52A and 54A shown in FIG. 10 are printed are prepared. Next, a plurality of ceramic green sheets 55 are stacked one by one with a predetermined pitch shifted in the X direction, that is, the row direction. More specifically, the second ceramic green sheet 55 is laminated on the ceramic green sheet 55 with a predetermined pitch shifted in the X direction, and then the third ceramic green sheet is placed at the same position as the first ceramic green sheet 55. The sheet 55 is laminated. By repeating such steps, a mother laminate is obtained.

By cutting the mother laminate in the thickness direction, a laminate of individual multilayer capacitors can be obtained. Therefore, as shown in FIG.
The electrode patterns 54a, 52
a will remain.

In the above manufacturing method, the internal electrode pattern 52
A mother laminated body can be obtained only by preparing one type of ceramic green sheet 55 on which A and 54A are formed and devising a laminating method as described above. Further, as described above, even if lamination misalignment occurs between the internal electrodes 52 and 54 in the W direction, it is possible to prevent a change in capacitance.

[0012]

However, when a large number of multilayer capacitors are manufactured by the above-described manufacturing method, the variation in capacitance may be large. In particular, when the number of laminated internal electrodes is an even number, as shown schematically in FIG. 11A, the variation in capacitance was not so large, but when the number of laminated internal electrodes was an odd number,
As shown in FIG. 11B, two capacitance distributions A and B
Was formed, and the variation in capacitance was very large.

This is because when a large number of multilayer capacitors are manufactured by the above manufacturing method, and when the number of laminated internal electrodes is an odd number, a multilayer capacitor having two types of internal electrodes is obtained. That is, when the mother ceramic green sheet 55 having the electrode pattern shown in FIG. 10 is used, each of the electrode structures shown in the cross-sectional views in FIGS. Is obtained.

In the multilayer capacitor 56 shown in FIG. 12A, three layers of internal electrodes 54 and two layers of internal electrodes 52 are stacked, while in the multilayer capacitor 57 shown in FIG. Three-layer internal electrode 52 and two-layer internal electrode 54
Are laminated.

Accordingly, the multilayer capacitor 56 and the multilayer capacitor 57 have different effective electrode overlapping areas as a whole and have different electrostatic capacities. Therefore, FIG.
Two capacitance distributions A and B as shown in FIG.

That is, in the conventional manufacturing method using the mother ceramic green sheet 55 having the electrode pattern shown in FIG.
A multilayer capacitor having various types of electrode structures was obtained, and the variation in capacitance had to be large.

An object of the present invention is to solve the above-mentioned drawbacks of the prior art and to suppress fluctuations in electrical characteristics such as capacitance caused by misalignment of ceramic green sheets of a mother on which internal electrode patterns are formed. A method of manufacturing a multilayer ceramic electronic component and a multilayer ceramic electronic component, in which even if the number of laminated internal electrodes is odd, variations in electrical characteristics such as capacitance are unlikely to occur. It is in.

[0018]

SUMMARY OF THE INVENTION The present invention relates to a method of manufacturing a multilayer ceramic electronic component, comprising a step of laminating a mother ceramic green sheet in which a plurality of internal electrode patterns are aligned and formed in a row direction and a column direction. The internal electrode pattern has a shape such that the width decreases from one end to the other end in the row direction, and the internal electrode patterns adjacent in the row direction have a shape symmetric about an intermediate point between the two. A step of preparing a mother ceramic green sheet having a plurality of internal electrode patterns formed on one surface, and laminating a plurality of the mother ceramic green sheets alternately in the row direction every other sheet to form a mother laminate. Obtaining, and cutting the mother laminate in the thickness direction to obtain a laminate of individual multilayer ceramic electronic component units, Serial firing the laminated body, and obtaining a sintered body, characterized in that it comprises a step of applying the external electrodes on the outer surface of the sintered body.

In a specific aspect of the present invention, the internal electrode pattern is a trapezoid having an upper side and a lower side extending in a column direction, and upper sides or lower sides of the trapezoidal internal electrode patterns adjacent in the row direction are opposed to each other. ing.

In another specific aspect of the present invention, the internal electrode pattern is located at one end in the row direction, and is connected to the first rectangular portion having a relatively large width and the first rectangular portion. A second rectangular portion having a relatively narrow width located on the other end side, and the first rectangular portions or the second rectangular portions between the internal electrode patterns adjacent in the row direction. The parts are opposed to each other.

The multilayer ceramic electronic component according to the present invention is obtained by the method for manufacturing a multilayer ceramic electronic component according to the present invention, and preferably has an odd number of internal electrode stacks.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be clarified by describing specific embodiments of the present invention.

(First Embodiment) In the first embodiment, first, as shown in FIG. 1A, a rectangular mother ceramic green sheet is prepared. The mother ceramic green sheet 1 is obtained by sheet-forming a ceramic slurry mainly composed of a dielectric ceramic such as a barium titanate-based ceramic.

On the upper surface 1a of the mother ceramic green sheet 1, a plurality of internal electrode patterns 2 and 3 are formed in a row direction and a column direction. It should be noted that the row direction refers to FIG.
In (a), the horizontal direction means the column direction, and the column direction means the vertical direction.

Each of the internal electrode patterns 2 and 3 has such a shape that its width decreases from one end to the other end in the row direction. In this embodiment, the shape of the internal electrode patterns 2 and 3 is a trapezoidal shape. The upper and lower sides of this isosceles trapezoid extend in the column direction.

The internal electrode pattern 2 is configured such that its width decreases from one end 2a toward the other end 2b.
Further, the internal electrode pattern 3 is formed so that the width decreases from one end 3a to the other end 3b. In the row direction, the internal electrode patterns 2 and 3 are alternately arranged. In the column direction, the same internal electrode patterns are arranged and formed. That is, in the leftmost column, the plurality of internal electrode patterns 2 are formed in the column direction, and in the second column from the left, the plurality of internal electrode patterns 3 are formed in the column direction.

Further, the internal electrode patterns 2 and 3 adjacent in the row direction are configured to have a symmetrical shape with a center point between the two. That is, the upper sides or the lower sides of the adjacent internal electrode patterns 2 and 3 are opposed to each other.

In this embodiment, in the column direction,
Although the same internal electrode patterns are arranged and formed as described above, the internal electrode patterns 2 and 3 may be alternately formed in the column direction.

The internal electrode patterns 2 and 3 can be formed by screen-printing a conductive paste. However, in addition to printing of the conductive paste, the internal electrode patterns 2 and 2 are formed by a thin film forming method such as evaporation or sputtering.
3 may be formed.

Next, a plurality of mother ceramic green sheets 1 on which the internal electrode patterns 2 and 3 are formed are prepared.
Every other sheet is shifted in the row direction and stacked to obtain a mother laminate. That is, the second mother ceramic green sheet 1 is laminated on the first mother ceramic green sheet 1 while being shifted in the row direction, and then the third mother ceramic green sheet 1 is placed on the first mother ceramic green sheet 1. Laminated at the same position as the mother's ceramic green sheet 1,
The fourth mother ceramic green sheet 1 is laminated at the same position as the second mother ceramic green sheet 1.

In this way, a plurality of mother ceramic green sheets 1 are stacked alternately in the row direction every other sheet, and an appropriate number of plain mother ceramic green sheets are stacked one above the other. Obtain a laminate.

After the mother laminate obtained as described above is pressed in the thickness direction, it is cut in the thickness direction to obtain a laminate of individual multilayer capacitors. At the time of this cutting, for example, by cutting along the positions indicated by the dashed lines C and D in FIG. 1, it is possible to obtain a multilayer body for each multilayer capacitor unit.

The multilayer body of each multilayer ceramic capacitor obtained as described above is fired to obtain a sintered body.
By applying an external electrode to the outer surface of the obtained sintered body, a multilayer ceramic capacitor is obtained. The external electrodes can be formed in any direction such as a thin film forming method such as application and baking of a conductive paste, vapor deposition, plating or sputtering. Further, a first electrode film is formed by applying and baking a conductive paste such as an Ag paste, and a Ni plating film and a Sn plating film are sequentially formed on the first electrode film to form a laminated film. External electrodes may be formed.

FIG. 3 is a vertical sectional view of the internal structure of the multilayer capacitor obtained as described above, and FIG. 4 is a perspective view of the external appearance. In the multilayer capacitor 4, the internal electrodes 2A and 3A are alternately arranged in the thickness direction in the sintered body 5 obtained as described above. The internal electrode 2A is drawn out to the first end face 5a of the sintered body 5. The internal electrode 3A is
Second end face 5b of sintered body 5 opposite to first end face 5a
Has been drawn to. Reference numerals 6 and 7 denote external electrodes, respectively.

According to the manufacturing method of this embodiment, the variation in the capacitance of the multilayer capacitor 4 can be reduced. This will be described with reference to FIG. As described above, in the conventional method in which a mother ceramic green sheet in which a plurality of internal electrode patterns are formed in a matrix is alternately stacked in the row direction to obtain a mother laminate, the mother laminate is caused by misalignment. Variations in capacitance have been a problem.

On the other hand, in the manufacturing method of this embodiment,
Since the internal electrode patterns 2 and 3 are formed, it is possible to reduce variation in capacitance due to stacking deviation.

FIG. 1B is a plan sectional view of the ceramic sintered body 5 obtained by the manufacturing method of this embodiment. By cutting the mother laminate along the dashed lines C and D in FIG. 1, a laminate of individual multilayer ceramic capacitors is obtained. An internal electrode 2A formed by cutting the internal electrode pattern 2 at a certain height position is configured. A part of the internal electrode pattern 3 adjacent to the internal electrode pattern 2 remains at the same height position as the internal electrode 2A so as to face the other end 2b of the internal electrode 2A. The remaining portion of the internal electrode pattern 3 is referred to as an electrode 3B.

Similarly, an internal electrode 3A indicated by a broken line is located below the internal electrode 2A. An electrode 2B that is formed by cutting a part of the adjacent internal electrode pattern 2 and remaining is formed at the same height position as the internal electrode 3A so as to face the other end 3b of the internal electrode 3A. The capacitance is
When the internal electrode 2A and the internal electrode 3A are in the thickness direction,
It is extracted in the overlapping area via the ceramic layer.

Now, it is assumed that when a plurality of mother ceramic green sheets 1 are stacked, a stacking deviation occurs in the column direction. That is, the internal electrode 2A is formed on the mother ceramic green sheet for forming the internal electrode 3A.
It is supposed that the ceramic green sheet of the mother for constructing the above is shifted in the direction of arrow E in FIG. In that case, the internal electrode 2A moves to the position indicated by the dashed line F.

Accordingly, the overlapping area between the internal electrode 2A and the internal electrode 3A shifts to the area surrounded by the dashed line F and the area where the internal electrode 3A overlaps. Therefore, when the above-mentioned displacement occurs, the overlapping area is reduced only by the region G indicated by hatching, but the overlapping area is increased by the region H indicated by hatching. On the other hand, the areas of the region G and the region H are substantially equal.

Therefore, as described above, even if lamination misalignment occurs in the direction E, that is, in the column direction, it is possible to suppress a change in the overlapping area between the internal electrodes. Therefore, similarly to the case of the conventional multilayer capacitor shown in FIG. 9, it is possible to effectively suppress the variation in the capacitance due to the stacking deviation in the column direction at the stage of the mother ceramic green sheet.

In addition, in the method of manufacturing a multilayer ceramic electronic component of the present embodiment, the variation in the capacitance of a large number of the obtained multilayer capacitors is also reduced. This will be described based on specific experimental examples.

On a mother ceramic green sheet 1 of 135 × 135 × 0.03 mm thickness, 100 μm
m, internal electrode patterns 2 and 3 having an isosceles trapezoidal shape with a lower side of 130 μm and a height of 580 μm were printed in a matrix. This mother's ceramic green sheet 1
According to the above-described embodiment, four sheets are stacked while being shifted in the row direction every other sheet, and eleven plain mother ceramic green sheets are stacked one above the other, and a mother laminate of 135 × 135 × 0.45 mm thick is formed. Obtained.

The laminate of the mother was pressed in the thickness direction and then cut to obtain a laminate of individual multilayer capacitor units.
The laminated body was adjusted to obtain a ceramic sintered body, and external electrodes 9 and 10 were applied to the outer surface of the ceramic sintered body to obtain a multilayer capacitor 4. As described above, a multilayer capacitor 4 having a designed capacitance value of 5 pF was obtained.

FIG. 5 shows the capacitance distribution of the obtained multilayer capacitor 4. As is clear from FIG. 5, the capacitance distribution is almost equal to the normal type distribution, and the variation CV value is 0.9%.
Met.

For comparison, a multilayer capacitor was obtained by laminating mother ceramic green sheets having rectangular internal electrode patterns formed in a matrix, and by following the same procedures as in the example. In the multilayer capacitor thus obtained, as shown in FIG.
2 are arranged so as to overlap with each other via the ceramic layer in the thickness direction. Reference numerals 22A and 21A denote electrodes which remain at the same height position as the internal electrodes 21 and 22, respectively, after the adjacent internal electrode patterns are cut off.

FIG. 6B shows the capacitance distribution of the multilayer capacitor of the comparative example obtained as described above. As is clear from FIG. 6, although the capacitance distribution is almost a normal type, a certain number of multilayer capacitors having a small capacitance are generated. That is, in the multilayer capacitor indicated by the arrow I in FIG. 6B, it is considered that the capacitance is lowered due to the stacking displacement in the column direction.

Further, a multilayer capacitor was obtained according to the conventional manufacturing method shown in FIG. 9, that is, in the same manner as in the example except that the internal electrodes 52 and 54 were provided. The width of the internal electrode 52 was 130 μm, and the width of the internal electrode 54 was 100 μm. In this case, when the number of laminated internal electrodes is an even number, as described with reference to FIG. 10A, the variation in the capacitance distribution is a normal type, and the variation CV value is 0.8%. .

However, when the number of laminated internal electrodes is odd, the capacitance distribution is as shown in FIG. 10B, and two normal-type capacitance distributions appear, and the variation CV value as a whole is It was very high at 2.4%. This is because, as described above, the multilayer capacitor 56 shown in FIG.
It is considered that the multilayer capacitor 57 shown in FIG. 11B was obtained.

On the other hand, in the multilayer capacitor 4 of the present embodiment, the capacitance distribution is almost normal regardless of whether the number of laminated internal electrodes is even or odd.
The variation CV value was as low as 0.9%. That is, in the manufacturing method of the present embodiment, the internal electrode patterns 2 and 3 have the same shape and are formed symmetrically with respect to the center point between the adjacent internal electrode patterns 2 and 3, in other words, Since the internal electrode patterns 2 and 3 have the same shape, even when the number of laminated internal electrodes is an odd number, the capacitance distribution becomes almost a normal distribution as a whole, and the variation in the capacitance is reduced. Can be effectively reduced.

Therefore, according to the present embodiment, not only is it difficult for capacitance variation due to stacking deviation to occur, but also to capacitance variation even when the number of internal electrode layers is an odd number. A multilayer ceramic capacitor can be provided.

The manner of laminating the ceramic green sheets 1 alternately in the row direction for every other sheet is not limited to the method of the above-described embodiment. In the sintered body, the internal electrode 2
A and the internal electrode 3A may be stacked such that the end on the wide side is located at the tip of the internal electrode.

(Second Embodiment) In the first embodiment, the planar shape of the internal electrode patterns 2 and 3 is an isosceles trapezoid. However, the internal electrode patterns are arranged from one end to the other end in the row direction. There is no particular limitation as long as it is formed so that the width decreases toward the side.

As shown in FIG. 7, in the second embodiment, internal electrode patterns 12 and 13 are formed on a mother ceramic green sheet 11. That is, the internal electrode patterns 12, 13 are alternately formed in the row direction. In the column direction, the same internal electrode patterns are arranged and formed. However, the internal electrode patterns 12 and 13 may be alternately formed also in the column direction.

The internal electrode patterns 12 and 13 are located at the ends 12a and 13a, respectively, and are connected to a relatively wide first rectangular portion 12c and the first rectangular portion. A second rectangular portion 12d having a relatively small width and located on the end 12b side. Similarly, the internal electrode pattern 13 is also located on the one end 13a side and is located on the relatively wide first rectangular portion 13c and the other end 13b side, and is located on the other end 13b side. And two rectangular portions 13d. Further, the internal electrode patterns 12 and 13 adjacent in the row direction are the first rectangular portions 12c and 13c,
Alternatively, the second rectangular portions 12d and 13d are opposed to each other. Except for the shape of the internal electrode pattern, in the second embodiment, a multilayer capacitor is obtained in the same manner as in the first embodiment.

FIG. 8 is a plan sectional view of a ceramic sintered body in the multilayer capacitor obtained in the second embodiment.
In this embodiment, the internal electrodes 12A and 13A obtained by cutting the mother laminate are arranged so as to overlap with each other via the ceramic layer. In this case, even if a stacking misalignment occurs in the column direction, the overlapping area between the internal electrodes 12 and 13 is unlikely to fluctuate, as in the first embodiment. Variation can be reduced. Further, similarly to the first embodiment,
Even when the number of laminated internal electrodes is an odd-numbered layer, the capacitance distribution becomes almost normal, and the variation in capacitance can be reduced.

In the above embodiments, the method of manufacturing a multilayer capacitor and a multilayer capacitor have been described. However, the present invention can be applied to a method of manufacturing another multilayer ceramic electronic component such as a multilayer varistor and a multilayer thermistor. Accordingly, it is possible to reduce variations in electrical characteristics, for example, variations in electrical resistance or the like due to variations in the overlapping area between the internal electrodes.

[0058]

In the method of manufacturing a multilayer ceramic electronic component according to the present invention, when a plurality of mother ceramic green sheets in which a plurality of internal electrode patterns are aligned and formed in a row direction and a column direction are laminated, the internal electrode patterns are Since the width is formed so that the width becomes narrower from one end to the other end in the row direction, and the internal electrode patterns adjacent in the row direction are formed so as to have a symmetrical shape with respect to an intermediate point between the two. In addition, in the finally obtained ceramic sintered body, it is possible to reduce the variation in the overlapping area between the internal electrodes. That is, even when stacking misalignment occurs in the column direction, it is possible to reduce the variation in the overlapping area between the internal electrodes, and even when the internal electrode stacking number is either an even layer or an odd layer. In addition, it is possible to reduce the variation in the total overlapping area between the internal electrodes, thereby providing a multilayer ceramic electronic component having a small variation in electrical characteristics.

If the internal electrode pattern is a trapezoid having an upper side and a lower side extending in the column direction, and the upper sides or lower sides of the trapezoidal internal electrode patterns adjacent in the row direction are opposed to each other, the lamination is performed in the column direction. Even if a displacement occurs, the variation in the overlapping area between the internal electrodes in the oblique side portion of the trapezoidal internal electrode pattern is offset between one oblique side and the other oblique side, so that the overlapping area between the internal electrodes is reduced. Variation can be reduced.

When the internal electrode pattern has first and second rectangular portions connected in the row direction, the widths of the first and second rectangular portions are different from each other, and are adjacent in the row direction. Since the first rectangular portions or the second rectangular portions are opposed to each other between the internal electrode patterns, in the finally obtained sintered body, the overlap between the internal electrodes due to the lamination misalignment in the column direction. Area variation can be reduced.

The multilayer ceramic electronic component according to the present invention comprises:
Since it is obtained by the method for manufacturing a multilayer ceramic electronic component according to the present invention, the variation in the overlapping area between the internal electrodes is small, and therefore, the variation in the electrical characteristics such as capacitance and electrical resistance can be effectively reduced. .

[Brief description of the drawings]

FIGS. 1A and 1B are a plan view of a ceramic green sheet of a mother prepared in a first embodiment of the present invention and a plan sectional view of a ceramic sintered body.

FIG. 2 is a plan sectional view of a ceramic sintered body obtained in a modification of the first embodiment.

FIG. 3 is a vertical sectional view showing the multilayer capacitor obtained in the first embodiment.

FIG. 4 is a perspective view showing the appearance of the multilayer capacitor obtained in the first embodiment.

FIG. 5 is a diagram showing a capacitance distribution of the multilayer capacitor obtained in the first embodiment.

FIGS. 6A and 6B are a schematic exploded perspective view for explaining a multilayer capacitor prepared for comparison, and a diagram showing a capacitance distribution of the multilayer capacitor prepared for comparison;

FIG. 7 is a partially cutaway plan view showing a mother ceramic green sheet prepared in a method for manufacturing a multilayer capacitor according to a second embodiment.

FIG. 8 is a plan sectional view of a ceramic sintered body in the multilayer capacitor obtained in the second embodiment.

FIG. 9 is a schematic exploded perspective view for explaining a conventional method for manufacturing a multilayer capacitor.

FIG. 10 is a plan view showing a mother ceramic green sheet prepared by the conventional method for manufacturing a multilayer capacitor shown in FIG. 9;

11A and 11B show the capacitance distribution of a multilayer capacitor obtained by a conventional multilayer capacitor manufacturing method, respectively, and FIG. 11A shows a case where the number of internal electrode layers is even; (B) shows the case where the number of laminated internal electrodes is odd.

FIGS. 12A and 12B are cross-sectional views showing electrode structures of a multilayer capacitor obtained by a conventional multilayer capacitor manufacturing method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Mother ceramic green sheet 1a ... Upper surface 2, 3 ... Internal electrode pattern 2a, 3a ... One end 2b, 3b ... Other end 2A, 3A ... Internal electrode 2B, 3B ... Electrode remaining part 4 ... Multilayer capacitor 5 ... Ceramic sintering Body 6, 7 External electrode 11 Mother ceramic green sheet 12, 13 Internal electrode pattern 12a, 13a One end 12b, 13b Other end 12c, 13c First rectangular portion 12d, 13d Second rectangular portion 12A, 13A ... internal electrode 12B, 13B ... electrode

 ────────────────────────────────────────────────── ─── Continued on the front page F term (reference) 5E001 AB03 AC02 AC04 AC08 AE02 AE03 AF00 AF06 AH01 AH03 AH05 AH06 AH07 AH09 AJ01 AJ02 AJ03

Claims (5)

[Claims] 1. A method for manufacturing a laminated ceramic electronic component, comprising a step of laminating a mother ceramic green sheet in which a plurality of internal electrode patterns are aligned and formed in a row direction and a column direction, wherein the internal electrode pattern is in a row direction. A plurality of internal electrode patterns are formed on one surface so that the internal electrode patterns have a shape in which the width decreases from one end to the other end, and the internal electrode patterns adjacent in the row direction have a shape symmetrical with respect to an intermediate point between the two. A step of preparing the formed mother ceramic green sheets; a step of laminating a plurality of the mother ceramic green sheets alternately in the row direction to obtain a mother laminated body; Obtaining a laminate of individual multilayer ceramic electronic component units by cutting in the direction, and firing the laminate to obtain a sintered body. That process and characterized by comprising a step of applying the external electrodes on the outer surface of the sintered body, the method of production of a multilayer ceramic electronic component. 2. The internal electrode pattern is a trapezoid having an upper side and a lower side extending in a column direction, and upper sides or lower sides of the adjacent trapezoidal internal electrode patterns in the row direction are opposed to each other. 3. The method for producing a multilayer ceramic electronic component according to item 1. 3. The internal electrode pattern is located at one end in the row direction, is connected to a relatively wide first rectangular portion, and is connected to the first rectangular portion, and is located at the other end. A second rectangular portion having a relatively narrow width, and the first rectangular portions or the second rectangular portions are opposed to each other between the internal electrode patterns adjacent in the row direction. The method for manufacturing a multilayer ceramic electronic component according to claim 1, wherein: 4. A multilayer ceramic electronic component obtained by the method for manufacturing a multilayer ceramic electronic component according to claim 1. 5. The multilayer ceramic electronic component according to claim 4, wherein the number of stacked internal electrodes is odd.