JP2001077374A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the operating characteristics and reliability of a semiconductor and to reduce the amount of consumed power by forming the pixel electrode of a pixel section into the shape of an insulating film made of an organic insulating material having a light-reflecting surface. SOLUTION: First, spacers, which are columnar spacers, are formed on an active matrix substrate. Columnar spacers 173 are formed to overlap a contact portion of a pixel electrode 168 in a manner covering the contact portion, in a pixel section. Then, an alignment layer 174 is formed using a polyimide resin, and then rubbed to align the layer such that liquid crystal molecules are aligned at a predetermined pre-tilt angle. A light-shielding film 176, a transparent conductive film 177, and an alignment layer 178 are formed on a mating substrate 175 on the opposite side. Then, the active matrix substrate wherein the pixel section and a driving circuit are formed is laminated to the mating substrate with a sealing agent 179. Thereafter, a liquid crystal material 606 is charged to fill a space between both substrates for their complete closure with a closing material.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a circuit formed of thin film transistors (hereinafter, referred to as TFTs) on a substrate having an insulating surface, and a method for manufacturing the same. In particular, the present invention provides a technique which can be suitably used for an electro-optical device typified by a liquid crystal display device in which a pixel portion and a driving circuit provided therearound are provided on the same substrate, and an electronic device equipped with the electro-optical device. I do. In this specification, a semiconductor device generally refers to a device that functions by utilizing semiconductor characteristics, and includes the above-described electro-optical device and an electronic device including the electro-optical device in its category.

[0002]

2. Description of the Related Art In an electro-optical device typified by an active matrix type liquid crystal display device, a technique using a TFT for forming a switching element or an active circuit has been developed. A TFT forms a semiconductor film on a substrate such as glass by a vapor phase growth method, and forms the semiconductor film as an active layer. For the semiconductor film, a material mainly containing silicon such as silicon or silicon / germanium is preferably used. Further, as the silicon semiconductor film, an amorphous silicon film, a crystalline silicon film typified by polycrystalline silicon, or the like can be obtained by a manufacturing method thereof.

A TFT using an amorphous silicon film as an active layer
Cannot essentially obtain a field effect mobility of several cm ² / Vsec or more due to electronic physical factors caused by an amorphous structure or the like. Therefore, in an active matrix type liquid crystal display device, although it can be used as a switching element (pixel TFT) for driving liquid crystal provided in each pixel of a pixel portion, a driving circuit for displaying an image is formed. It was impossible to do. For that, TAB
(Tape Automated Bonding) method and COG (Chip on Gl
A technique of mounting a driver IC or the like using the (ass) method has been used.

[0004] On the other hand, when a crystalline silicon film is used as an active layer, T
In the FT, a high field-effect mobility can be obtained, so that various functional circuits can be formed on the same glass substrate. , A shift register circuit, a level shifter circuit, a buffer circuit, a sampling circuit, and the like formed based on the CMOS circuit. Based on such technology, in order to promote weight reduction and thinning in a liquid crystal display device, a crystalline semiconductor film in which a driving circuit in addition to a pixel portion can be integrally formed on the same substrate is used as an active layer. TFTs have proven to be suitable.

[0005]

Compared with the TFT characteristics, it is better to use a crystalline silicon film as the active layer. The process became complicated and the number of processes increased. An increase in the number of steps not only causes an increase in manufacturing cost, but also causes a reduction in manufacturing yield.

For example, the operating conditions of the pixel TFT and the TFT of the driving circuit are not necessarily the same, and the characteristics required for the TFT are not less different. The pixel TFT is composed of an n-channel type TFT, and drives a liquid crystal by applying a voltage to the liquid crystal as a switching element. Since the liquid crystal is driven by alternating current, a method called frame inversion drive is often used. In this method, in order to suppress power consumption, a characteristic required of the pixel TFT is to sufficiently reduce an off-current value (a drain current flowing when the TFT is turned off). on the other hand,
Since a high drive voltage is applied to the buffer circuit of the control circuit, it is necessary to increase the withstand voltage so that the buffer circuit is not broken even when the high voltage is applied. On-current value (drain current that flows when the TFT is turned on) in order to enhance current driving capability
It is necessary to secure enough.

As a structure of a TFT for reducing an off-current value, a lightly doped drain (LDD) is used.
n) Structure is known. In this structure, a region to which an impurity element is added at a lower concentration is provided between a channel formation region and a source or drain region formed by adding an impurity element at a high concentration. This is called the LDD region. As means for preventing the deterioration of the on-current value due to hot carriers, a so-called GOLD (Gate-drain Overlapped LDD) in which an LDD region is arranged so as to overlap with a gate electrode via a gate insulating film.
The structure is known. With such a structure, it is known that a high electric field near the drain is relieved, hot carrier injection is prevented, and deterioration is effectively prevented.

As described above, the pixel TFT and the TFT of the driving circuit such as the shift register circuit and the buffer circuit are:
The required properties are not necessarily the same. For example,
A large reverse bias (negative voltage for an n-channel TFT) is applied to the gate of the pixel TFT, but the TFT of the drive circuit does not basically operate in the reverse bias state. Also, the operation speed of the pixel TFT may be 1/100 or less of the TFT of the control circuit. The GOLD structure is highly effective in preventing the deterioration of the on-current value, but on the other hand,
There is a problem that the off-current value becomes larger than that of a normal LDD structure. Therefore, it was not a preferable structure to be applied to the pixel TFT. Conversely, the ordinary LDD structure has a high effect of suppressing the off-current value, but has a low effect of relaxing the electric field near the drain to prevent deterioration due to hot carrier injection. As described above, in a semiconductor device having a plurality of integrated circuits having different operating conditions, such as an active matrix liquid crystal display device, it is not always preferable to form all the TFTs with the same structure. Such problems have become more apparent as the characteristics of crystalline silicon TFTs have increased, and the performance required for active matrix type liquid crystal display devices has increased.

Further, in order to stabilize the operation of these circuits manufactured using an n-channel TFT and a p-channel TFT, it is necessary to set a value such as a threshold voltage or a sub-threshold constant (S value) of the TFT. Must be within a predetermined range. For that purpose, it is necessary to consider the TFT from both the structural aspect and the material constituting the TFT.

The present invention is a technique for solving such a problem, and is provided in various circuits in an electro-optical device and a semiconductor device typified by an active matrix type liquid crystal display device manufactured using a TFT. TF
By making the structure of T appropriate according to the function of the circuit, the operating characteristics and reliability of the semiconductor device are improved, the power consumption is reduced, and the number of steps is reduced to reduce the manufacturing cost. The purpose is to realize reduction and improvement in yield.

[0011]

SUMMARY OF THE INVENTION In order to reduce the number of steps and to reduce the manufacturing cost and the yield, a TFT is required.
It is necessary to reduce the number of photomasks required for manufacturing the semiconductor device. A photomask is used in a photolithography technique to form a resist pattern used as a mask in an etching step on a substrate. Therefore, the use of a single photomask means that, in addition to the steps of film formation and etching in the preceding and subsequent steps, a resist peeling, cleaning, drying step, and the like are added, and in the photolithography step, It means that complicated processes such as resist coating, pre-baking, exposure, development, and post-baking are performed.

In order to solve the above problem, the configuration of the present invention comprises a pixel TFT provided in a pixel portion and a pixel TFT provided around the pixel portion.
In a semiconductor device including a driver circuit provided with a channel TFT and an n-channel TFT on the same substrate, a p-channel TFT of the driver circuit includes a channel formation region and a source region or a drain region. The n-channel TFT of the driver circuit having a p-type impurity region with four concentrations forms a channel formation region and an LDD region provided in contact with the channel formation region and overlapping with the gate electrode and not overlapping with the gate electrode. A pixel TFT having a first concentration of an n-type impurity region and a third concentration of an n-type impurity region provided outside the first concentration of the n-type impurity region to form a source region or a drain region; A channel formation region, a second concentration n-type impurity region provided in contact with the channel formation region to form an LDD region, and a second concentration n-type impurity region. A third concentration n-type impurity region provided on the side of the pixel TFT to form a source region or a drain region. An insulating film made of an inorganic insulating material is formed on the gate electrode of the pixel TFT. An insulating film made of the formed organic insulating material is formed, and the pixel electrode of the pixel portion has a light reflective surface and is formed on the insulating film made of the organic insulating material. .

According to another aspect of the invention, a pixel TFT provided in a pixel portion and a driving circuit provided with a p-channel TFT and an n-channel TFT around the pixel portion are provided on the same substrate. In the semiconductor device, the p-channel TFT of the driving circuit has a channel formation region and a fourth concentration p-type impurity region forming a source region or a drain region, and the n-channel TFT of the driving circuit has a channel. A formation region, a first concentration n-type impurity region provided in contact with the channel formation region to form an LDD region partially overlapping the gate electrode, and a source provided outside the first concentration n-type impurity region. And a third concentration n-type impurity region forming a region or a drain region.
Forming a channel formation region, a second concentration n-type impurity region provided in contact with the channel formation region to form an LDD region, and forming a source region or a drain region provided outside the second concentration n-type impurity region An insulating film made of an inorganic insulating material, and an insulating film made of an organic insulating material formed on the insulating film, above the gate electrode of the pixel TFT. Is formed, and the pixel electrode of the pixel portion is formed on an insulating film having a light transmitting property and made of the organic insulating material.

Another aspect of the invention is a semiconductor device in which liquid crystal is sandwiched between a pair of substrates, wherein a pixel TFT provided in a pixel portion and a p-channel TFT and an n-type TFT are provided around the pixel portion.
One of the substrates having a driving circuit provided with a channel TFT includes a p-channel TFT of the driving circuit having a channel formation region and a fourth concentration p-type impurity region forming a source region or a drain region. And n of the driving circuit
The channel type TFT includes a channel formation region and an L which is provided in contact with the channel formation region and partially overlaps with the gate electrode.
A first concentration n-type impurity region forming a DD region; and a third concentration n-type impurity region provided outside the first concentration n-type impurity region to form a source region or a drain region; The pixel TFT includes a channel formation region, a second concentration n-type impurity region provided in contact with the channel formation region to form an LDD region, and a source region provided outside the second concentration n-type impurity region. A third concentration n-type impurity region forming a drain region, an insulating film made of an inorganic insulating material on an upper layer of the gate electrode of the pixel TFT, and an organic insulating material formed on the insulating film. An insulating film made of a material is formed, and a pixel electrode of the pixel portion is formed on an insulating film having a light-reflective surface and made of the organic insulating material. Insulation material Is connected to the pixel TFT at an opening portion penetrating the insulating film, and is bonded to the other substrate on which the transparent conductive film is formed via at least one columnar spacer formed so as to overlap the opening. It is characterized by having.

Another aspect of the invention is a semiconductor device in which liquid crystal is sandwiched between a pair of substrates, wherein a pixel TFT provided in a pixel portion and a p-channel TFT and an n-type TFT are provided around the pixel portion.
One of the substrates having a driving circuit provided with a channel TFT includes a p-channel TFT of the driving circuit having a channel formation region and a fourth concentration p-type impurity region forming a source region or a drain region. And n of the driving circuit
The channel type TFT includes a channel formation region and an L which is provided in contact with the channel formation region and partially overlaps with the gate electrode.
A first concentration n-type impurity region forming a DD region; and a third concentration n-type impurity region provided outside the first concentration n-type impurity region to form a source region or a drain region; The pixel TFT includes a channel formation region, a second concentration n-type impurity region provided in contact with the channel formation region to form an LDD region, and a source region provided outside the second concentration n-type impurity region. A third concentration n-type impurity region forming a drain region, an insulating film made of an inorganic insulating material on an upper layer of the gate electrode of the pixel TFT, and an organic insulating material formed on the insulating film. An insulating film made of a material is formed, and a pixel electrode of the pixel portion is formed on an insulating film made of the organic insulating material having optical transparency, and an insulating film made of the inorganic insulating material and the organic insulating material. Material It is connected to the pixel TFT at an opening portion penetrating the insulating film, and is bonded to the other substrate on which the transparent conductive film is formed via at least one columnar spacer formed so as to overlap the opening. It is characterized by:

In the structure of the present invention, in the p-channel TFT of the driving circuit, an offset region is formed between a channel forming region and a fourth concentration p-type impurity region forming a source region or a drain region. It may be. Such a p-channel TFT can be suitably used as an analog switch.

In the configuration of the present invention, the pixel TFT and a p-channel TFT and an n-type TFT are provided around the pixel portion.
A gate electrode with the channel type TFT is formed of a heat-resistant conductive material, extends from the driving circuit, and a gate wiring connected to the gate electrode is formed of a low-resistance conductive material. The heat-resistant conductive material is an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo), and tungsten (W), a compound containing the element, or a compound combining the elements; Alternatively, a nitride containing the above-mentioned element as a component and a silicide containing the above-mentioned element as a component are desirable.

In the above-mentioned structure of the present invention, the columnar spacer is formed of a p-channel TFT of the driving circuit and an n-type TFT.
It is formed on a channel type TFT, or the columnar spacer is formed so as to cover at least a source wiring or a drain wiring of a p-channel TFT and an n-channel TFT of the driving circuit. I do.

In order to solve the above problems, a method for manufacturing a semiconductor device according to the present invention comprises the steps of: a pixel TFT provided in a pixel portion;
A p-channel TFT and an n-channel TFT are provided around the pixel portion.
In a method for manufacturing a semiconductor device including a driver circuit provided with an FT on a same substrate, a step of forming a base film in close contact with the substrate and forming a plurality of island-shaped semiconductor layers on the base film Forming a first concentration n-type impurity region in a selected region of the island-shaped semiconductor layer, the first concentration forming an LDD region partially overlapping a gate electrode of the n-channel TFT of the driving circuit; Forming a second concentration n-type impurity region forming an LDD region with the pixel TFT in a selected region of the island-shaped semiconductor layer; Forming a third concentration n-type impurity region for forming a source region or a drain region in the n-channel type TFT and the pixel TFT of the circuit; and forming the drive circuit of the drive circuit in a selected region of the island-shaped semiconductor layer. p channel Forming a fourth-concentration p-type impurity region forming a source region or a drain region of the type TFT; Forming an insulating film made of an inorganic insulating material;
Forming an insulating film made of an organic insulating material in close contact with the insulating film made of the inorganic insulating material;
Forming a pixel electrode having a light-reflective surface to be connected to an insulating film made of the organic insulating material.

Further, another invention is directed to a pixel T provided in a pixel portion.
In a method for manufacturing a semiconductor device including an FT and a driver circuit provided with a p-channel TFT and an n-channel TFT around the pixel portion over the same substrate, a step of forming a base film over the substrate Forming a plurality of island-shaped semiconductor layers on the base film; and forming an LDD region partially overlapping with a gate electrode of an n-channel TFT of the drive circuit in a selected region of the island-shaped semiconductor layer. Forming a first concentration n-type impurity region to be formed; and forming a second concentration n-type impurity region for forming an LDD region with the pixel TFT in a selected region of the island-shaped semiconductor layer. Forming a third concentration n-type impurity region forming a source region or a drain region in the n-channel TFT and the pixel TFT of the driving circuit in a selected region of the island-shaped semiconductor layer; Said Forming a fourth concentration p-type impurity region for forming a source region or a drain region of a p-channel TFT of the drive circuit in a selected region of the semiconductor layer; Forming an insulating film made of an inorganic insulating material on an upper layer of the gate electrodes of the pixel TFT and the p-channel TFT;
Forming an insulating film made of an organic insulating material in close contact with the insulating film made of the inorganic insulating material;
Forming a conductive metal wiring connected to the conductive metal wiring, and forming a pixel electrode made of a transparent conductive film connected to the conductive metal wiring on the insulating film made of the organic insulating material. I have.

According to another aspect of the invention, there is provided a method of manufacturing a semiconductor device in which liquid crystal is sandwiched between a pair of substrates, wherein a pixel TFT provided in a pixel portion, a p-channel TFT and an Forming a base film on the one substrate with a driving circuit provided with a type TFT;
Forming a plurality of island-shaped semiconductor layers on the base film;
An LDD that partially overlaps a gate electrode of an n-channel TFT of the driving circuit in a selected region of the island-shaped semiconductor layer;
Forming a first concentration n-type impurity region forming a region; and forming a second concentration n-type impurity region forming an LDD region with the pixel TFT in a selected region of the island-shaped semiconductor layer. Forming a third concentration n-type impurity region for forming a source region or a drain region in the n-channel TFT and the pixel TFT of the drive circuit in a selected region of the island-shaped semiconductor layer. Forming a fourth concentration p-type impurity region forming a source region or a drain region of a p-channel TFT of the drive circuit in a selected region of the island-shaped semiconductor layer; Forming an insulating film made of an inorganic insulating material on an upper layer of the gate electrode of the channel type TFT, the pixel TFT, and the p-channel type TFT; Forming an insulating film made of an organic insulating material; and connecting light to the pixel TFT through holes formed in the insulating film made of the organic insulating material and the insulating film made of the inorganic insulating material. Forming a pixel electrode having a reflective surface on an insulating film made of the organic insulating material, and forming at least a transparent conductive film on the other substrate, and forming the pixel electrode on the opening. And bonding the one substrate and the other substrate via at least one columnar spacer.

According to another aspect of the invention, there is provided a method of manufacturing a semiconductor device in which a liquid crystal is sandwiched between a pair of substrates, wherein a pixel TFT provided in a pixel portion, a p-channel TFT and an n-channel TFT are provided around the pixel portion. Forming a base film on the substrate with a driving circuit provided with a type TFT;
Forming a plurality of island-shaped semiconductor layers on the base film;
An LDD that partially overlaps a gate electrode of an n-channel TFT of the driving circuit in a selected region of the island-shaped semiconductor layer;
Forming a first concentration n-type impurity region forming a region; and forming a second concentration n-type impurity region forming an LDD region with the pixel TFT in a selected region of the island-shaped semiconductor layer. Forming a third concentration n-type impurity region for forming a source region or a drain region in the n-channel TFT and the pixel TFT of the drive circuit in a selected region of the island-shaped semiconductor layer. Forming a fourth concentration p-type impurity region forming a source region or a drain region of a p-channel TFT of the drive circuit in a selected region of the island-shaped semiconductor layer; Forming an insulating film made of an inorganic insulating material on an upper layer of the gate electrode of the channel type TFT, the pixel TFT, and the p-channel type TFT; A step of forming an insulating film made of an organic insulating material, and forming a conductive metal wiring connected to the pixel TFT through openings provided in the insulating film made of the organic insulating material and the protective insulating film. And a step of forming a pixel electrode made of a transparent conductive film connected to the metal wiring on the interlayer insulating film, and the other substrate has a step of forming at least a transparent conductive film, And bonding the one substrate and the other substrate via at least one columnar spacer formed so as to overlap the substrate.

In the above method for manufacturing a semiconductor device according to the present invention, the p-channel TFT of the driving circuit may be formed after the step of forming an insulating film made of an inorganic insulating material on the gate electrode of the p-channel TFT. Forming a fourth concentration p-type impurity region for forming a source region or a drain region of the p-channel TFT in a selected region of the island-shaped semiconductor layer; An offset region is formed between the source region and the fourth concentration p-type impurity region forming the drain region.

In the method for manufacturing a semiconductor device according to the present invention, the step of forming the pixel TFT and gate electrodes of a p-channel TFT and an n-channel TFT around the pixel portion from a heat-resistant conductive material. And forming a gate wiring extending from the driving circuit and connected to the gate electrode from a low-resistance conductive material. The heat-resistant conductive material is an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo), and tungsten (W), a compound containing the element, or a compound combining the elements; Alternatively, it is desirable to form the film from a nitride containing the above element and a silicide containing the above element.

In the method of manufacturing a semiconductor device according to the present invention, the columnar spacer is formed also on a p-channel TFT and an n-channel TFT of the driving circuit. And a source wiring or a drain wiring of the p-channel TFT and the n-channel TFT of the driving circuit.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described in detail with reference to the following examples. Embodiment 1 An embodiment of the present invention will be described with reference to FIGS. Here, the pixel TFT and the storage capacitor of the pixel portion,
A method for simultaneously manufacturing TFTs of a driver circuit provided around the display region will be described in detail according to steps.

In FIG. 1A, a substrate 101 is made of a glass substrate such as barium borosilicate glass or aluminoborosilicate glass typified by Corning # 7059 glass or # 1737 glass, etc., and polyethylene terephthalate (PET). ), Polyethylene naphthalate (P
EN), a plastic substrate having no optical anisotropy such as polyethersulfone (PES) can be used. When a glass substrate is used, heat treatment may be performed in advance at a temperature lower by about 10 to 20 ° C. than the glass strain point. Then, a base film 102 such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed on the surface of the substrate 101 where a TFT is to be formed, in order to prevent impurity diffusion from the substrate 101. For example, plasma CVD
_{SiH 4, NH 3, N 2} O silicon oxynitride film 102a made from 10 to 200 nm (preferably 50 to by law
100 nm), as well SiH _4, N ₂ O hydrogenated silicon oxynitride film 102b made from 50 to 200 nm (preferably laminated in a thickness of 100 to 150 nm).

The silicon oxynitride film is a conventional parallel plate type
It is formed by a plasma CVD method. Silicon oxynitride
The film 102a is made of SiH_FourTo 10 SCCM, NH_ThreeTo 100 SCC
M, N _TwoO was introduced into the reaction chamber at 20 SCCM, and the substrate temperature was 3
25 ° C, reaction pressure 40Pa, discharge power density 0.41W / c
m^TwoAnd the discharge frequency was 60 MHz. On the other hand, hydrogen oxynitride
The silicon film 102b is made of SiH_FourTo 5 SCCM, N_TwoO to 12
0 SCCM, H_TwoInto the reaction chamber as 125 SCCM
Temperature 400 ° C, reaction pressure 20Pa, discharge power density 0.41
W / cm^TwoAnd the discharge frequency was 60 MHz. These films are
Change the temperature and change the reaction gas
It can also be done.

The silicon oxynitride film 102a manufactured in this manner has a density of 9.28 × 10 ²² / cm ³ , 7.13% of ammonium hydrogen fluoride (NH ₄ HF ₂ ) and ammonium fluoride (NH ₄ HF ₂ ). NH ₄ F) of 15.4% comprising mixed solution (Stella Chemifa Co., Ltd., trade name LAL500) of 20
The etching rate at a temperature of ° C. is as low as about 63 nm / min, and the film is dense and hard. Use of such a film as a base film is effective in preventing an alkali metal element from a glass substrate from diffusing into a semiconductor layer formed thereover.

Next, 25 to 80 nm (preferably 30 to 6 nm)
Semiconductor layer 103a having a thickness of 0 nm) and having an amorphous structure.
Is formed by a known method such as a plasma CVD method or a sputtering method. For example, an amorphous silicon film is formed to a thickness of 55 nm by a plasma CVD method. The semiconductor film having an amorphous structure includes an amorphous semiconductor film and a microcrystalline semiconductor film, and a compound semiconductor film having an amorphous structure such as an amorphous silicon / germanium film may be used. In addition, the base film 10
2 and the amorphous semiconductor layer 103a can be formed continuously. For example, as described above, after the silicon oxynitride film 102a and the silicon oxynitride hydride film 102b are continuously formed by a plasma CVD method, the reaction gas is Si.
H _4, N ₂ O, be switched from H ₂ only SiH ₄ and H ₂ or SiH _4, once can be continuously formed without exposure to the atmosphere. As a result, the hydrogenated silicon oxynitride film 102b
To prevent contamination of the surface of the TFT
And variations in threshold voltage can be reduced.

Then, a crystallization step is performed to form a crystalline semiconductor layer 103b from the amorphous semiconductor layer 103a. Laser annealing, thermal annealing (solid phase growth), or rapid thermal annealing (RTA)
Law) can be applied. When a glass substrate or a plastic substrate having low heat resistance as described above is used, it is particularly preferable to apply a laser annealing method. RT
In the method A, an infrared lamp, a halogen lamp, a metal halide lamp, a xenon lamp, or the like is used as a light source. Alternatively, according to the technique disclosed in Japanese Patent Application Laid-Open No. Hei 7-130652, the crystalline semiconductor layer 10 is formed by a crystallization method using a catalytic element.
3b can also be formed. First, in the crystallization process,
It is preferable to release hydrogen contained in the amorphous semiconductor layer, and heat treatment is performed at 400 to 500 ° C. for about 1 hour to reduce the amount of hydrogen contained to 5 atomic% or less. It is good because it can be prevented.

When crystallization is performed by laser annealing, a pulse oscillation type or continuous emission type excimer laser or argon laser is used as the light source. When a pulse oscillation type excimer laser is used, laser annealing is performed by processing the laser beam into a linear shape. Laser annealing conditions are appropriately selected by the practitioner, for example,
The laser pulse oscillation frequency is 30 Hz, and the laser energy density is 100 to 500 mJ / cm ² (typically 300
４００400 mJ / cm ² ). Then, a linear beam is irradiated over the entire surface of the substrate, and the superposition rate (overlap rate) of the linear beam at this time is set to 80 to 98%. In this manner, as shown in FIG.
3b can be obtained.

Then, a resist pattern is formed on the crystalline semiconductor layer 103b by photolithography using a photomask 1 (PM1), and the crystalline semiconductor layer is divided into islands by dry etching. The semiconductor layers 104 to 108 are formed. For dry etching, a mixed gas of CF ₄ and O ₂ is used. Then, plasma C
A mask layer 194 of a silicon oxide film having a thickness of 50 to 100 nm is formed by a VD method or a sputtering method.

In this state, an impurity element imparting p-type conductivity to the island-like semiconductor layer for controlling the threshold voltage (Vth) of the TFT is about 1 × 10 ^{16 to} 5 × 10 ¹⁷ atoms / cm ³ . The concentration may be added to the entire surface of the island-shaped semiconductor layer. The impurity element imparting p-type to the semiconductor includes boron (B),
Elements of Group 13 of the periodic table, such as aluminum (Al) and gallium (Ga), are known. As the method, an ion implantation method or an ion doping method can be used, but the ion doping method is suitable for treating a large-area substrate.
In the ion doping method, diborane (B ₂ H ₆ ) is used as a source gas and boron (B) is added. The implantation of such an impurity element is not always necessary and may be omitted. However, it is a method preferably used for keeping the threshold voltage of the n-channel TFT within a predetermined range.

In order to form an LDD region of an n-channel TFT of a driving circuit, an impurity element imparting n-type is selectively added to the island-shaped semiconductor layers 105 and 107. Therefore, resist masks 195a to 195e were formed using the photomask 2 (PM2). As an impurity element imparting n-type, phosphorus (P) or arsenic (As) may be used. Here, an ion doping method using phosphine (PH ₃ ) is applied to add phosphorus (P). The phosphorus (P) concentration of the formed first concentration n-type impurity regions 196 and 197 is in a range of 2 × 10 ^{16 to} 5 × 10 ¹⁹ atoms / cm ³ . In this specification, the concentration of the impurity element imparting n-type contained in the impurity regions 196 and 197 formed here is expressed as (n ⁻ ). Further, the impurity region 198
This is a semiconductor layer for forming a storage capacitor in a pixel portion, and phosphorus (P) is added to this region at the same concentration (FIG. 1).
(D)).

Next, a step of activating the added impurity element is performed. Activation is performed in a nitrogen atmosphere at 500 to 600
C. for 1 to 4 hours, or a laser activation method. Further, both may be performed in combination. In the case of the laser activation method, a linear beam is formed using KrF excimer laser light (wavelength 248 nm), and the oscillation frequency is 5 to 50 Hz and the energy density is 100 to 100.
Scanning was performed at 500 mJ / cm ^{2 with an} overlap ratio of the linear beam of 80 to 98% to process the entire surface of the substrate on which the island-shaped semiconductor layer was formed. There are no particular restrictions on the laser light irradiation conditions, and the conditions may be determined appropriately by the practitioner. At this stage, the mask layer 194 is removed by etching with a solution such as hydrofluoric acid.

The gate insulating film 109 is formed of an insulating film containing silicon with a thickness of 40 to 150 nm by using a plasma CVD method or a sputtering method. For example, a silicon oxynitride film having a thickness of 120 nm is preferably used. Also, S
A silicon oxynitride film formed by adding O ₂ to iH ₄ and N ₂ O is a preferable material for this application because the fixed charge density in the film is reduced. Needless to say, the gate insulating film is not limited to such a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure (FIG. 1E).

Then, as shown in FIG. 1E, a heat-resistant conductive layer for forming a gate electrode is formed over the gate insulating film 109. The heat-resistant conductive layer may be formed as a single layer, or may be formed as a multilayer structure including a plurality of layers such as two layers or three layers as necessary. Using such a heat-resistant conductive material, for example, a conductive layer (A) 110 made of a conductive nitride metal film and a conductive layer (B) 111 made of a metal film
Are preferably laminated. The conductive layer (B) 111 is made of tantalum (Ta), titanium (Ti), molybdenum (M
o), an element selected from tungsten (W), an alloy containing the above element as a main component, or an alloy film (typically, a Mo—W alloy film or a Mo—Ta alloy film) that combines the above elements. The conductive layer (A) 110 may be formed using tantalum nitride (TaN), tungsten nitride (WN), titanium nitride (TiN), molybdenum nitride (MoN), or the like. The conductive layer (A) 110 may be formed using tungsten silicide, titanium silicide, or molybdenum silicide. It is preferable that the impurity concentration of the conductive layer (B) 111 be reduced in order to reduce the resistance. In particular, the oxygen concentration is preferably 30 ppm or less.
For example, tungsten (W) can achieve a specific resistance of 20 μΩcm or less by setting the oxygen concentration to 30 ppm or less.

The conductive layer (A) 110 has a thickness of 10 to 50 nm (preferably 20 to 30 nm), and the conductive layer (B) 111 has a thickness of 20 to 50 nm.
The thickness may be 0 to 400 nm (preferably 250 to 350 nm). When W is used as the gate electrode, argon (Ar) gas and nitrogen (N
₂ ) A conductive layer (A) 111 is formed with tungsten nitride (WN) to a thickness of 50 nm by introducing a gas, and a conductive layer (B) 1 is formed.
10 is formed with W to a thickness of 250 nm. As another method, the W film can be formed by a thermal CVD method using tungsten hexafluoride (WF ₆ ). In any case, in order to use it as a gate electrode, it is necessary to reduce the resistance, and it is desirable that the resistivity of the W film be 20 μΩcm or less. The resistivity of the W film can be reduced by enlarging the crystal grains. However, when there are many impurity elements such as oxygen in W, crystallization is inhibited and the resistance is increased. From this, when the sputtering method is used, W of 99.9999% purity is obtained.
By using a target and forming a W film with sufficient care so as not to mix impurities from the gas phase during film formation, a resistivity of 9 to 20 μΩcm can be realized.

On the other hand, a TaN film is formed on the conductive layer (A) 110.
When a Ta film is used for the conductive layer (B) 111, it can be formed by a sputtering method in the same manner. TaN film is T
The target film a is formed using a mixed gas of Ar and nitrogen as a sputtering gas, and the Ta film uses Ar as a sputtering gas. When an appropriate amount of Xe or Kr is added to these sputter gases, the internal stress of the film to be formed can be relaxed and the film can be prevented from peeling. The resistivity of the α-phase Ta film is about 20 μΩcm and can be used for a gate electrode, but the resistivity of the β-phase Ta film is about 180 μΩcm and is not suitable for a gate electrode. Since the TaN film has a crystal structure close to the α-phase, an α-phase Ta film can be easily obtained by forming a Ta film thereon. Although not shown, it is effective to form a silicon film doped with phosphorus (P) with a thickness of about 2 to 20 nm under the conductive layer (A) 110. Thereby, the adhesion of the conductive film formed thereon is improved and oxidation is prevented, and at the same time, the conductive layer (A) is formed.
It is possible to prevent a small amount of an alkali metal element contained in the gate insulating film 109 from being contained in the conductive layer 110 or the conductive layer (B) 111. In any case, the resistivity of the conductive layer (B) 111 is preferably in the range of 10 to 50 μΩcm.

Next, using the photomask 3 (PM3),
The resist masks 112 to 117 are formed by using a photolithography technique, and the conductive layer (A) 110 and the conductive layer (B) 111 are collectively etched to form the gate electrode 11.
8 to 122 and the capacitor wiring 123 are formed. Gate electrode 1
18 to 122 and the capacitor wiring 123 are made of conductive layers (A) 118 a to 123 a and conductive layers (B) 118
b to 123b are integrally formed (see FIG. 2).
(A)).

The method of etching the conductive layer (A) and the conductive layer (B) may be appropriately selected by a practitioner. However, when the conductive layer (A) and the conductive layer (B) are formed of a material containing W as a main component as described above, It is desirable to apply a dry etching method using high-density plasma in order to perform etching at high speed and with high accuracy. One of the techniques for obtaining high-density plasma is inductively coupled plasma (Inductively Coupled Plasma:
It is preferable to use an ICP) etching apparatus. In the method of etching W using an ICP etching apparatus, two kinds of gases, CF ₄ and Cl ₂ , are introduced into a reaction chamber as an etching gas, and the pressure is set to 0.5 to 1.5 Pa (preferably 1 Pa). To a high frequency (13.56 MHz) power of 200 to 1000 W. At this time, the stage on which the substrate is placed is 2
By applying a high-frequency power of 0 W and charging to a negative potential by a self-bias, positive ions are accelerated and anisotropic etching can be performed. By using an ICP etching apparatus, a hard metal film such as W can be formed at 2 to 5 nm /
Second etching rates can be obtained. In order to perform etching without leaving a residue, overetching is preferably performed by increasing the etching time at a rate of about 10 to 20%. At this time, however, it is necessary to pay attention to the etching selectivity with the base. For example, the selectivity of the silicon oxynitride film (gate insulating film 109) to the W film is 2.
5 to 3, the exposed surface of the silicon oxynitride film is 20 to 50
It is etched by about nm and becomes substantially thinner.

Then, the n-channel TFT of the pixel TFT
In order to form an LDD region, a step of adding an impurity element imparting n-type (n ⁻ doping step) is performed. Using the gate electrodes 118 to 122 and the capacitor wiring 123 as a mask, an impurity element imparting n-type in a self-aligned manner is added by an ion doping method. The concentration of phosphorus (P) added as an impurity element imparting n-type is 1 × 10 ^{16 to} 5 × 10 ¹⁹ atoms / cm ^3.
In the concentration range of Thus, as shown in FIG. 2B, the second concentration n-type impurity region 1 is formed in the island-shaped semiconductor layer.
24 to 129 are formed.

Next, in an n-channel TFT, a saw
Concentration of n serving as a source region or a drain region
Formation of a type impurity region (n⁺Doping step). First,
Using photomask 4 (PM4), resist mask 1
30 to 134 are formed, and an impurity element imparting n-type is added.
To form third concentration n-type impurity regions 135 to 140
I do. Phosphorus (P) is used for the impurity element that imparts n-type
Its concentration is 1 × 10 ²⁰~ 1 × 10^{twenty one}atoms / cm^ThreeNo
Phosphine (PH_ThreeB)
This is performed by an on-doping method (FIG. 2C).

Then, fourth concentration p-type impurity regions 144 and 145 serving as a source region and a drain region are formed in the island-shaped semiconductor layers 104 and 106 forming the p-channel TFT. Here, an impurity element imparting p-type is added using the gate electrodes 118 and 120 as a mask to form a fourth-concentration p-type impurity region in a self-aligned manner. At this time,
Island-shaped semiconductor films 105, 1 forming an n-channel TFT
07 and 108, resist masks 141 to 143 are formed using the photomask 5 (PM5), and the entire surface is covered. The fourth concentration p-type impurity regions 144 and 145 are formed by an ion doping method using diborane (B ₂ H ₆ ). The boron (B) concentration in this region is 3 × 10 ^{20 to} 3 × 10 ²¹ atom
s / cm ³ (FIG. 2D). Phosphorus (P) is added to the fourth concentration p-type impurity regions 144 and 145 in the previous step, and 1 × 10 ²⁰ to 1 × 10 ²¹ is added to the fourth concentration p-type impurity regions 144a and 145a. atom
a fourth concentration p-type impurity region 144b having a concentration of s / cm ³ ,
Although 145b contains a concentration of 1 × 10 ^{16 to} 5 × 10 ¹⁹ atoms / cm ³ , by increasing the concentration of boron (B) added in this step from 1.5 to 3 times. , P
There is no problem in functioning as the source and drain regions of the channel type TFT.

Thereafter, as shown in FIG. 3A, a protective insulating film 146 is formed over the gate electrode and the gate insulating film. The protective insulating film may be formed using a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or a stacked film including a combination thereof. In any case, the protective insulating film 146
Is formed from an inorganic insulating material. The thickness of the protective insulating film 146 is 100 to 200 nm. Here, when a silicon oxide film is used, Tetraethyl Ortho Silicate (TEO) is formed by a plasma CVD method.
S) and O2 were mixed, the reaction pressure was 40 Pa, and the substrate temperature was 30.
It can be formed by discharging at a high-frequency (13.56 MHz) power density of 0.5 to 0.8 W / cm ² at 0 to 400 ° C. When a silicon oxynitride film is used, the plasma C
A VD method may be used to form a silicon oxynitride film formed from SiH ₄ , N ₂ O, and NH ₃ , or a silicon oxynitride film formed from SiH ₄ and N ₂ O. The production conditions in this case are a reaction pressure of 20 to 200 Pa and a substrate temperature of 300 to 400.
° C, high frequency (60MHz) power density 0.1 ~ 1.0W / c
It can be formed in m ^2. Further, SiH ₄ , N ₂ O, H
Alternatively, a silicon oxynitride hydride film manufactured from Step ₂ may be used. Similarly, a silicon nitride film is formed by plasma CVD.
It can be made from iH ₄ and NH ₃ .

Thereafter, a step of activating the impurity elements imparting n-type or p-type added at the respective concentrations is performed. This step is performed by a thermal annealing method using a furnace annealing furnace. In addition, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied. In the thermal annealing method, the oxygen concentration is 400 to 70 ppm in a nitrogen atmosphere of 1 ppm or less, preferably 0.1 ppm or less.
0 ° C., typically at 500-600 ° C.,
In this embodiment, the heat treatment was performed at 550 ° C. for 4 hours. When a plastic substrate having a low heat-resistant temperature is used as the substrate 101, a laser annealing method is preferably applied (FIG. 3B).

After the activation step, an additional 3 to 100%
1 to 12 at 300 to 450 ° C. in an atmosphere containing hydrogen
Heat treatment was performed for a long time to perform a step of hydrogenating the island-shaped semiconductor film. In this step, dangling bonds of 10 ¹⁶ to 10 ¹⁸ / cm ^{3 in} the island-like semiconductor film are terminated by thermally excited hydrogen. Plasma hydrogenation (using hydrogen excited by plasma) as another means of hydrogenation
May be performed.

When the activation and hydrogenation steps are completed,
The interlayer insulating film 147 made of an organic insulating material is
It is formed with an average thickness of 2.0 μm. As the organic resin material, polyimide, acrylic, polyamide, polyimide amide, BCB (benzocyclobutene), or the like can be used. For example, in the case of using a polyimide of a type which is thermally polymerized after being applied to a substrate, it is formed by firing at 300 ° C. using a clean oven. In the case of using acrylic, a two-liquid type is used, and after mixing the main material and the curing agent, the whole surface is applied using a spinner, and then preheating at 80 ° C. for 60 seconds using a hot plate. Do
Further, it can be formed by firing at 250 ° C. for 60 minutes using a clean oven.

As described above, the surface can be satisfactorily flattened by forming the interlayer insulating film with the organic insulating material. In addition, since organic resin materials generally have a low dielectric constant, parasitic capacitance can be reduced. However, since it is hygroscopic and is not suitable as a protective film, as in this embodiment, a silicon oxide film formed as the protective insulating film 146,
It is necessary to use in combination with a silicon oxynitride film, a silicon nitride film, or the like.

Thereafter, a resist mask having a predetermined pattern is formed using the photomask 6 (PM6), and a contact hole reaching the source region or the drain region formed in each of the island-shaped semiconductor films is formed. The formation of the contact hole is performed by a dry etching method. In this case, an interlayer insulating film made of an organic resin material is first etched using a mixed gas of CF ₄ , O ₂ , and He as an etching gas, and then, the protective insulating film 146 is etched using CF ₄ and O ₂ as an etching gas. I do. Further, in order to increase the selectivity with the island-shaped semiconductor layer, the etching gas is CH
By etching the gate insulating film is switched to F _3, can satisfactorily form a contact hole.

Then, a conductive metal film is formed by a sputtering method or a vacuum evaporation method, a resist mask pattern is formed by the photomask 7 (PM7), and the source wirings 148 to 152 and the drain wirings 153 to 158 are etched.
To form Here, the drain wiring 157 functions as a pixel electrode. Although not shown, in this embodiment, this electrode is formed by forming a Ti film with a thickness of 50 to 150 nm, forming a contact with the semiconductor film forming the source or drain region of the island-shaped semiconductor layer, and forming the Ti film. Aluminum (Al) is formed in a thickness of 300 to 400 nm on the upper portion to form a wiring.

When hydrogenation treatment was performed in this state, favorable results were obtained for improving the characteristics of the TFT. For example, 3 ~
Heat treatment may be performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 100% hydrogen, or the same effect can be obtained by using a plasma hydrogenation method. Further, by such a heat treatment, the protective insulating film 146 and the base film 102 are formed.
May be diffused into the island-shaped semiconductor films 104 to 108 for hydrogenation. In any case, the defect density in the island-shaped semiconductor films 104 to 108 is desirably 10 ¹⁶ / cm ³ or less.
What is necessary is just to give about 1 atomic% (FIG. 3 (C)).

In this way, a substrate having a TFT of a driving circuit and a pixel TFT of a pixel portion on the same substrate can be completed by using seven photomasks. The driving circuit includes a first p-channel TFT 200, a first concentration n-channel TFT 201, a second p-channel TFT 202,
A second n-channel TFT 203 and a pixel TF
T204 and a storage capacitor 205 are formed. In this specification, such a substrate is referred to as an active matrix substrate for convenience.

First p-channel TFT 20 of drive circuit
0, the channel forming region 20 in the island-shaped semiconductor film 104
6. Source region 20 composed of fourth concentration p-type impurity region
7a, 207b and a single drain structure having drain regions 208a, 208b. In the first n-channel TFT 201, the LDD region 210, which is formed from the channel formation region 209 and the first concentration impurity region in the island-shaped semiconductor film 105 and overlaps the gate electrode 119,
It has a source region 212 and a drain region 211 formed from impurity regions having a high concentration. In this LDD region, the LDD region overlapping with the gate electrode 119 is Lov, and the length in the channel length direction is 0.5 to 3.0 μm, preferably 1.0 to 2.0 μm. n-channel type TFT
By setting the length of the LDD region in this manner, a high electric field generated in the vicinity of the drain region can be reduced to prevent generation of hot carriers and prevent deterioration of the TFT. Second p-channel TFT 20 of drive circuit
Similarly, the channel-forming region 2 is formed in the island-shaped semiconductor film 106.
13. Source region 2 made of a fourth concentration p-type impurity region
It has a single drain structure having 14a, 214b and drain regions 215a, 215b. The second n
In the channel type TFT 203, the LDD region 21 which is formed from the channel forming region 216 and the first concentration impurity region in the island-shaped semiconductor film 107 and partially overlaps the gate electrode 121.
7, 218, a third concentration impurity region, and a source region 220 and a drain region 219 are formed.
The length of Lov overlapping the gate electrode of this TFT is also 0.5 to
3.0 μm, preferably 1.0 to 2.0 μm. The LDD region that does not overlap the gate electrode is Loff, and the length in the channel length direction is 0.5 to 4.0 μm
Preferably, it was 1.0 to 2.0 μm. Pixel TFT 20
4 includes a channel forming region 22 in the island-shaped semiconductor film 108.
LD formed from impurity regions 1, 222 and second concentration
D regions 223 to 225 and source or drain regions 226 to 228 formed from third concentration impurity regions are provided. The length of the LDD region (Loff) in the channel length direction is 0.5 to 4.0 μm, preferably 1.5 to 2.5 μm. Further, the storage capacitor 20 is formed by the capacitor wiring 123, an insulating film made of the same material as the gate insulating film, and the semiconductor layer 229 connected to the drain region 228 of the pixel TFT 204.
5 are formed. In FIG. 3C, the pixel TFT 204
Has a double gate structure, but may have a single gate structure or a multi-gate structure provided with a plurality of gate electrodes.

FIG. 16 is a top view showing almost one pixel of the pixel portion. The cross section AA ′ shown in the drawing corresponds to the cross-sectional view of the pixel portion shown in FIG. The pixel TFT 204 is
The gate electrode 122 also serving as a gate wiring is formed with an island-shaped semiconductor layer 108 thereunder via a gate insulating film (not shown).
Intersects. Although not shown, a source region, a drain region, and an LDD region are formed in the island-shaped semiconductor layer. Reference numeral 256 denotes a contact portion between the source wiring 152 and the source region 226, and reference numeral 257 denotes a drain wiring 157.
And a contact portion between the drain region 228. The storage capacitor 205 is formed in a region where the capacitor wiring 123 overlaps with the semiconductor layer 229 extending from the drain region 228 of the pixel TFT 204 via a gate insulating film. In this structure, an impurity element for the purpose of controlling valence electrons is not added to the semiconductor layer 229.

The above configuration enables the structure of the TFT constituting each circuit to be optimized in accordance with the specifications required by the pixel TFT and the drive circuit, thereby improving the operation performance and reliability of the semiconductor device. . Further, the activation of the LDD region, the source region, and the drain region is facilitated by forming the gate electrode with a conductive material having heat resistance.

[Second Embodiment] In order to realize a liquid crystal display device with high definition and high image quality, it is necessary to improve the characteristics of the pixel TFT and the TFT constituting each circuit of the drive circuit. The required characteristics of the TFT may reduce a current (off current) flowing in an off state in addition to a threshold voltage, a field effect mobility, a subthreshold coefficient (S value), and the like. When the off-state current value is high, not only power consumption is increased, but also the operating characteristics of the driving circuit are degraded, which causes deterioration in image quality. An LDD region is formed in the n-channel TFT manufactured in Example 1, whereby the off-current value can be reduced to a level that does not cause any problem.
On the other hand, since the p-channel type TFT has a single drain structure, an increase in off-state current often poses a problem. In this embodiment, a method for manufacturing a p-channel TFT having an offset region suitable for such a case will be described with reference to FIGS.

First, FIG. 1A to FIG.
The process shown in FIG. 2A is performed, and the gate electrodes 118 to 12 are formed.
2 and the capacitor wiring 123 are formed. Then, in order to form an LDD region in the n-channel TFT, a step of adding an impurity element imparting n-type (n ^- doping step) is performed.
Here, an impurity element imparting n-type conductivity is added in a self-alignment manner using the gate electrode as a mask. However, the island-shaped semiconductor layer 104 for forming a p-channel TFT using a photomask is used.
The entire surface of 106 is covered with resist masks 158 and 159 so that an impurity element is not added. Thus, the second concentration n-type impurity regions 125 to 129 are formed in the island-shaped semiconductor layer as shown in FIG.

Next, in the n-channel TFT, a third concentration of n which functions as a source region or a drain region
A type impurity region is formed. Using a photomask, resist masks 130 to 134 are formed, and an impurity element imparting n-type is added to add n-type impurity
To 140 are formed (FIG. 4B).

Thereafter, a protective insulating layer 146 is formed in the same manner as in the first embodiment. Then, the fourth concentration p-type impurity regions 144 and 1 serving as a source region and a drain region are formed in the island-shaped semiconductor layers 104 and 106 forming the p-channel TFT.
45 is formed. Resist masks 160 to 162 are formed using a photomask to cover the entire surface of the island-shaped semiconductor films 105, 107, and 108 forming the n-channel TFT. This step is performed by an ion doping method or the like. Although the impurity element to be implanted has a slight fluctuation, it is incident almost perpendicularly to the surface of the island-shaped semiconductor layer. Here, since the protective insulating layer 146 is formed with good coverage even at the end of the gate electrode, the protective insulating layer formed at the end functions as a mask. , And fourth concentration p-type impurity regions 144 and 145 are formed. That is, the offset regions 230 and 231 are formed with a length of Lo between the channel forming region and the fourth concentration p-type impurity region. More specifically, the length Lo is equivalent to the thickness of the protective insulating layer 146, and is therefore formed with a length of 100 to 200 nm.

Such an offset region contributes as a series resistance component in the electrical characteristics of the TFT, and can reduce the off-current value by about 1/10 to 1/100. Thereafter, the steps from FIG. 3A are performed in the same manner as in Example 1, whereby the active matrix substrate can be completed with seven photomasks.

[Embodiment 3] The embodiment 1 shows an example in which a heat-resistant conductive material such as W or Ta is used as the material of the gate electrode. The reason for using such a material is that the impurity element added to the semiconductor layer for the purpose of controlling valence electrons after the formation of the gate electrode is mainly activated by thermal annealing at 400 to 700 ° C. However, such a heat-resistant conductive material has a sheet resistance of about 10Ω,
It is not suitable for a liquid crystal display device having a screen size of 4 inches or more. This is because if the gate wiring connected to the gate electrode is formed of the same material, the length of the wiring on the substrate surface is inevitably increased, and the problem of wiring delay due to the influence of wiring resistance cannot be ignored.

For example, if the pixel density is VGA, 480
Gate wirings and 640 source wirings are formed.
In the case of GA, 768 gate wirings and 1024 source wirings are formed. The screen size of the display area is 13
In the case of the inch class, the length of the diagonal line is 340 mm and 1
In the case of the 8-inch class, it is 460 mm. In this embodiment, as a means for realizing such a liquid crystal display device, a method for forming a gate wiring with a low-resistance conductive material such as Al or copper (Cu) will be described with reference to FIGS.

First, FIG. 1A to FIG.
The step shown in FIG. 2D is performed. Then, a step of activating the impurity element added to each island-shaped semiconductor layer for the purpose of controlling valence electrons is performed. This step is performed by a thermal annealing method using a furnace annealing furnace. In addition, laser annealing or rapid thermal annealing (R
TA method) can be applied. In the thermal annealing method, the oxygen concentration is 400 to 700 ° C in a nitrogen atmosphere of 1 ppm or less, preferably 0.1 ppm or less, typically 500 to 600 ° C.
In this embodiment, the heat treatment is performed at 525 ° C. for 4 hours.

In this heat treatment, the gate electrodes 118 to
122 and a conductive layer (B) 118 forming a capacitor wiring 123
As for b to 123b, conductive layers (C) 118c to 123c are formed with a thickness of 5 to 80 nm from the surface. For example, when the conductive layers (B) 118b to 123b are tungsten (W), tungsten nitride (WN) is formed, and when the conductive layers (B) 118b to 123b are tantalum (Ta), tantalum nitride (TaN) is formed. Further, the conductive layers (C) 118c to 123c can be formed in the same manner even when the gate electrodes 118 to 123 are exposed to a plasma atmosphere containing nitrogen using nitrogen or ammonia. Further, a heat treatment is performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% of hydrogen to hydrogenate the island-shaped semiconductor layer. In this step, dangling bonds in the semiconductor layer are terminated by thermally excited hydrogen. As another means of hydrogenation,
Plasma hydrogenation (using hydrogen excited by plasma) may be performed (FIG. 5A).

When the activation and hydrogenation steps are completed,
The gate wiring is formed of a low resistance conductive material. This low-resistance conductive layer is formed of a conductive layer (D) containing Al or Cu as a main component. For example, an Al film containing 0.1 to 2% by weight of Ti is formed on the entire surface as a conductive layer (D) (not shown). The conductive layer (D) 145 has a thickness of 200 to 400 nm (preferably 250 to 400 nm).
３５０350 nm). Then, a predetermined resist pattern is formed using a photomask, and etching is performed to form gate wirings 163 and 164 and a capacitor wiring 165. In the etching treatment, the conductive layer (D) is removed by wet etching using a phosphoric acid-based etching solution, so that the gate wiring can be formed while maintaining the selectivity with the base. Then, a protective insulating film 146 is formed (FIG. 5B).

Thereafter, in the same manner as in the first embodiment, the interlayer insulating film 147 made of an organic insulating material and the source wirings 148 to 1
51, 167 and drain wirings 153 to 156, 168 can be formed to complete the active matrix substrate. FIGS. 6A and 6B are top views in this state. FIG. 6A is a cross-sectional view taken along line BB ′ of FIG. 6A and FIG.
The cross section C ′ corresponds to AA ′ and CC ′ in FIG. 5C. Although the gate insulating film, the protective insulating film, and the interlayer insulating film are omitted in FIGS. 6A and 6B, the source and drain regions (not shown) of the island-shaped semiconductor layers 104, 105, and 108 are formed in the source and drain regions. Wiring 148, 149, 167
And drain wirings 153, 154, 168 are connected via contact holes. Further, D- in FIG.
FIGS. 7A and 7B show a D ′ cross section and an EE ′ cross section in FIG. 6B, respectively. The gate wiring 163 is formed so as to overlap with the gate electrodes 118 and 119, and the gate wiring 164 is formed so as to overlap with the gate electrode 122 outside the island-shaped semiconductor layers 104, 105 and 108. Electrically conductive upon contact. By forming the gate wiring from a low-resistance conductive material in this manner, the wiring resistance can be sufficiently reduced. Therefore, the present invention can be applied to a display device having a pixel portion (screen size) of 4 inch class or more.

[Embodiment 4] The active matrix substrate manufactured in Embodiment 1 can be applied as it is to a reflection type liquid crystal display device. On the other hand, in the case of a transmissive liquid crystal display device, a pixel electrode provided for each pixel in the pixel portion may be formed of a transparent electrode. In this embodiment, a method for manufacturing an active matrix substrate corresponding to a transmission type liquid crystal display device will be described with reference to FIGS.

The active matrix substrate is manufactured in the same manner as in the first embodiment. In FIG. 10A, a conductive metal film is formed for a source wiring and a drain wiring by a sputtering method or a vacuum evaporation method. In this method, a Ti film is formed to a thickness of 50 to 150 nm, a contact is formed with a semiconductor film forming a source or drain region of an island-shaped semiconductor layer, and aluminum (Al) is formed on the Ti film by a thickness of 300 to 150 nm. It is formed to a thickness of 400 nm, and a Ti film or a titanium nitride (TiN) film is
It was formed to a thickness of 00 to 200 nm to form a three-layer structure. After that, a transparent conductive film is formed over the entire surface, and a pixel electrode 171 is formed by a patterning process using a photomask and an etching process. The pixel electrode 171 is formed of the interlayer insulating film 14.
7 and the drain wiring 16 of the pixel TFT 204.
9 is provided to form a connection structure.

In FIG. 10B, first, the interlayer insulating film 147 is formed.
This is an example in which a transparent conductive film is formed thereon, a patterning process and an etching process are performed to form a pixel electrode 171, and then a drain wiring 169 is formed by providing a portion overlapping the pixel electrode 171. The drain wiring 169 has a thickness of 50 to
A contact is formed with a semiconductor film forming a source or drain region of an island-shaped semiconductor layer, and aluminum (Al) is formed on the Ti film so as to have a thickness of 30 nm.
It is formed and provided with a thickness of 0 to 400 nm. With this configuration, the pixel electrode 171 is connected to the T
It comes into contact with only the i film. As a result, it is possible to prevent the reaction between the transparent conductive film material and Al.

The material of the transparent conductive film is indium oxide (I
n ₂ O ₃ ) and indium tin oxide alloy (In ₂ O ₃ —S
nO ₂ ; ITO) or the like can be formed by a sputtering method, a vacuum evaporation method, or the like. The etching of such a material is performed using a hydrochloric acid-based solution. However, in particular, since etching of ITO easily generates residues, an indium oxide-zinc oxide alloy (In ₂ O ₃ —ZnO) may be used in order to improve the etching processability. Since the indium oxide zinc oxide alloy has excellent surface smoothness and excellent thermal stability with respect to ITO, it is possible to prevent a corrosion reaction with Al contacting at the end face of the drain wiring 169. Similarly,
Zinc oxide (ZnO) is also a suitable material, and zinc oxide (ZnO: Ga) to which gallium (Ga) is added to increase the transmittance and conductivity of visible light can be used.

Thus, an active matrix substrate corresponding to a transmission type liquid crystal display device can be completed. In the present embodiment, steps similar to those in the first embodiment have been described. However, such a configuration can be applied to the active matrix substrates described in the second and third embodiments.

[Embodiment 5] In this embodiment, another manufacturing method of the crystalline semiconductor layer for forming the active layer of the TFT of the active matrix substrate shown in Embodiments 1 to 4 will be described. The crystalline semiconductor layer is formed by crystallizing an amorphous semiconductor layer by a thermal annealing method, a laser annealing method, an RTA method, or the like. In addition, a catalytic element disclosed in JP-A-7-130652 is used. A crystallization method can also be applied. An example in that case will be described with reference to FIG.

As shown in FIG. 8A, similar to the first embodiment, the base films 102a, 102a
b, The amorphous semiconductor layer 103a is formed with a thickness of 25 to 80 nm. For example, an amorphous silicon film is formed with a thickness of 55 nm. Then, an aqueous solution containing 10 ppm by weight of a catalytic element is applied by spin coating to form a layer 170 containing the catalytic element. Nickel (N
i), germanium (Ge), iron (Fe), palladium (Pd), tin (Sn), lead (Pb), cobalt (C
o), platinum (Pt), copper (Cu), gold (Au) and the like. In the layer 170 containing the catalyst element, a layer of the catalyst element may be formed to a thickness of 1 to 5 nm by a sputtering method or a vacuum evaporation method other than the spin coating method.

Then, in the crystallization step shown in FIG. 8B, first, a heat treatment is performed at 400 to 500 ° C. for about 1 hour to reduce the hydrogen content of the amorphous silicon film to 5 atomic% or less. Then, thermal annealing is performed in a nitrogen atmosphere at 550 to 600 ° C. for 1 to 8 hours using a furnace annealing furnace. Through the above steps, a crystalline semiconductor layer 103c made of a crystalline silicon film can be obtained (FIG. 8).
(C)). However, when the crystalline semiconductor layer 103c formed by this thermal annealing is macroscopically observed with an optical microscope, it may be observed that an amorphous region locally remains in such a case. Similarly, in Raman spectroscopy, an amorphous component having a broad peak at 480 cm ^-1 is observed. Therefore, after the thermal annealing, the crystalline semiconductor layer 1 is formed by the laser annealing method described in the first embodiment.
Treating 03c to increase its crystallinity can be applied as an effective means.

When the island-shaped semiconductor layers 104 to 108 are manufactured from the crystalline semiconductor layer 103c manufactured as described above, an active matrix substrate can be completed in the same manner as in the first embodiment. However, when a catalyst element that promotes crystallization of silicon is used in the crystallization step, a trace amount (1 × 10 ¹⁷ to 1 × 10 ¹⁹⁾ is contained in the island-shaped semiconductor film.
atoms / cm ³ ) of the catalytic element remains. Of course, it is possible to complete the TFT in such a state,
It is more preferable to remove the remaining catalyst element from at least the channel formation region. One of the means for removing the catalytic element is a means utilizing a gettering action by phosphorus (P).

The gettering process using phosphorus (P) for this purpose can be performed simultaneously in the activation step described with reference to FIG. This will be described with reference to FIG. The concentration of phosphorus (P) necessary for gettering may be approximately the same as the impurity concentration of the third concentration n-type impurity region, and the channel formation regions of the n-channel TFT and the p-channel TFT are formed by thermal annealing in the activation step. Thus, the catalyst element can be segregated into the impurity region containing phosphorus (P) at that concentration (in the direction of the arrow shown in FIG. 9). As a result, about 1 × 10 ¹⁷ to 1 × 10 ¹⁹ atoms / cm ³ of a catalytic element segregated in the impurity region. The TFT thus manufactured has a low off-current value and high crystallinity, so that a high field-effect mobility can be obtained and good characteristics can be achieved.

[Embodiment 6] In this embodiment, a process for manufacturing an active matrix type liquid crystal display device from the active matrix substrate manufactured in Embodiment 1 will be described. First,
As shown in FIG. 11A, a spacer including a columnar spacer is formed on the active matrix substrate in the state of FIG. 3C. The spacer may be provided by scattering particles of several μm, but here, a method of forming a resin film on the entire surface of the substrate and then patterning the resin film is adopted. Although the material of such a spacer is not limited, for example, JSR
After applying by a spinner using NN700 manufactured by KK, a predetermined pattern is formed by exposure and development. Further, it is cured by heating at 150 to 200 ° C. in a clean oven or the like. The shape of the spacer manufactured in this manner can be varied depending on the conditions of the exposure and the development processing. Preferably, as shown in FIG.
If the shape of the column 73 is a column and the top is flat, the mechanical strength of the liquid crystal display panel can be secured when the substrates on the opposite side are combined. The shape is not particularly limited, such as a cone or a pyramid. For example, when the shape is a cone, specifically, the height H is 1.2 to 5 μm, the average radius L1 is 5 to 7 μm, and the average radius L1 is Bottom radius L
The ratio to 2 is 1: 1.5. At this time, the taper angle of the side surface is set to ± 15 ° or less.

The arrangement of the columnar spacers may be determined arbitrarily. Preferably, as shown in FIG. 11A, the pixel portion overlaps the contact portion of the drain wiring 168 (pixel electrode) to cover the portion. Columnar spacer 173
Should be formed. Since the flatness of the contact portion is impaired and the liquid crystal is not well aligned in this portion, disclination and the like are prevented by forming the columnar spacer 173 in such a manner that the contact portion is filled with the resin for the spacer. be able to.

Thereafter, an alignment film 174 is formed. Usually, a polyimide resin is used for the alignment film of the liquid crystal display element. After forming the alignment film, a rubbing treatment was performed so that the liquid crystal molecules were aligned with a certain pretilt angle. The area not rubbed in the rubbing direction from the end of the columnar spacer 173 provided in the pixel portion was set to 2 μm or less. In the rubbing process, the generation of static electricity often poses a problem.
By forming 2, the original role as a spacer,
The effect of protecting the TFT from static electricity can be obtained.

The opposing substrate 175 on the opposing side has a light shielding film 17
6, a transparent conductive film 177 and an alignment film 178 are formed.
The light shielding film 176 is made of Ti, Cr, Al,
It is formed with a thickness of nm. Then, the active matrix substrate on which the pixel portion and the driver circuit are formed and the counter substrate are bonded with a sealant 179. A filler 180 is mixed in the sealant 179, and the two substrates are bonded at a uniform interval by the filler 180 and the spacers 172 and 173. Thereafter, a liquid crystal material 606 is injected between the two substrates, and completely sealed with a sealant (not shown). A known liquid crystal material may be used as the liquid crystal material.
Thus, the active matrix liquid crystal display device shown in FIG. 11B is completed.

Further, as shown in FIG.
May be formed, and then a spacer may be formed.

In FIG. 11, the spacer 172 is connected to the T of the driving circuit.
An example in which the spacer is formed on the entire surface of the FT has been described. However, as shown in FIG.
To 172e. The spacer provided in the portion where the driving circuit is formed may be formed so as to cover at least the source wiring and the drain wiring of the driving circuit. With such a configuration,
Each TFT of the drive circuit includes a protective insulating film 146, an interlayer insulating film 147, a spacer 172 or spacers 172a to 172a.
2e will be completely covered and protected.

FIG. 14 is a top view of the active matrix substrate, showing a positional relationship between the pixel portion and the drive circuit portion, the spacers, and the sealant. A scanning signal driving circuit 185 and an image signal driving circuit 186 are provided as driving circuits around the pixel portion 188. In addition, other C
A signal processing circuit 187 such as a PU or a memory may be added. These drive circuits are connected to the connection wiring 18.
3 is connected to the external input / output terminal 182. In the pixel portion 188, a group of gate wiring groups 189 extending from the scanning signal driving circuit 185 and a group of source wirings 190 extending from the image signal driving circuit 186 intersect in a matrix to form pixels. And a storage capacitor 205.

Columnar spacer 1 provided in pixel portion
73 may be provided for all the pixels, or may be provided every several to several tens of pixels arranged in a matrix. That is, the ratio of the number of spacers to the total number of pixels constituting the pixel portion is preferably 20 to 100%. Also,
Spacers 172, 172 ', 17 provided in the drive circuit section
2 '' may be provided so as to cover the entire surface, or may be provided in a plurality as shown in FIG.

The sealant 179 is formed outside the pixel portion 188 and the scanning signal control circuit 185, the image signal control circuit 186, and other signal processing circuits 187 on the substrate 101 and inside the external input / output terminal 182. I do.

The structure of such an active matrix type liquid crystal display device will be described with reference to the perspective view of FIG. FIG.
In 5, the active matrix substrate is a glass substrate 1
The pixel unit 188, the scanning signal driving circuit 185, the image signal driving circuit 186, and the other signal processing circuits 187 are formed on the pixel unit 01. The pixel T has a pixel T
An FT 204 and a storage capacitor 205 are provided, and a driving circuit provided around the pixel portion is configured based on a CMOS circuit. The scanning signal driving circuit 185 and the image signal driving circuit 186 respectively include the gate wiring 122 and the source wiring 1
At 52, it is connected to the pixel TFT 204. Also, Flexible Printed Circuit (F)
(PC) 191 is connected to the external input terminal 182 and used to input image signals and the like. And the connection wiring 183
Is connected to each drive circuit. Although not shown, the opposing substrate 175 is provided with a light-shielding film and a transparent electrode.

FIG. 18 shows the external input / output terminal 182 and the FPC1.
FIG. 9 is a diagram for explaining a connection structure with a connector 91; The external input / output terminal 182 has the same configuration as the source wiring or the drain wiring, is formed from a conductive metal film, and is formed on the substrate 101 from which the interlayer insulating film 147 has been removed. The FPC 191 has a copper wiring 302 formed on an organic resin film 301 made of polyimide or the like.
Connect to 2. The anisotropic conductive adhesive is an adhesive 303,
Dozens to hundreds of μm mixed with gold and plated
Particle 304 having a conductive surface having a diameter is formed. When particle 304 contacts external input / output terminal 182 and copper wiring 302, an electrical contact is formed at this portion. In order to increase the adhesive strength of the FPC 191 with the substrate 101, the FPC 191 is protruded to the outside of the external input / output terminal 182 and is bonded, and a resin layer 192 is provided at an end to increase the mechanical strength at this portion.

As shown in FIG. 20, the connection structure between the external input / output terminal 182 and the FPC 191 is the same, and a spacer 199 is provided outside the sealant 179.
By sandwiching the active matrix substrate and the counter substrate, the mechanical strength of this portion can be increased. Such a configuration is particularly effective when a part of the opposing substrate is cut to expose the external input / output terminals 182.

The liquid crystal display device having such a structure can be formed by using the active matrix substrates shown in the first to fourth embodiments. By using the active matrix substrates shown in Examples 1 to 3, a reflection type liquid crystal display device can be obtained.
When the active matrix substrate described in Embodiment 4 is used, a transmission type liquid crystal display device can be obtained.

[Embodiment 7] FIG. 17 shows an example of the circuit configuration of the active matrix substrate shown in Embodiments 1-4.
FIG. 3 is a diagram illustrating a circuit configuration of a direct-view display device. This active matrix substrate has an image signal driving circuit 186, scanning signal driving circuits (A) and (B) 185, and a pixel portion 188. Note that the driving circuits described in this specification include an image signal driving circuit 186 and a scanning signal driving circuit 185.
Is a generic term that includes

The image signal driving circuit 186 includes a shift register circuit 501a, a level shifter circuit 502a, a buffer circuit 503a, and a sampling circuit 504.
Each of the scanning signal driving circuits (A) and (B) 185 includes a shift register circuit 501b, a level shifter circuit 502b, and a buffer circuit 503b.

The shift register circuits 501a and 501b have a driving voltage of 5 to 16 V (typically 10 V), and the TFT of the CMOS circuit forming this circuit is shown in FIG.
Of the first p-channel TFT 200 and the first n-channel TFT 201. Also, the level shifter circuit 5
Although the drive voltage of the buffer circuits 02a and 502b and the buffer circuits 503a and 503b becomes as high as 14 to 16 V, a TFT similar to the shift register circuit may be used. In these circuits, when the gate is formed in a multi-gate structure, the withstand voltage increases, which is effective in improving the reliability of the circuit.

The sampling circuit 504 is composed of an analog switch and has a drive voltage of 14 to 16 V. However, since the polarity is alternately inverted and the off current value needs to be reduced, the sampling circuit 504 shown in FIG. It is desirable to form the second p-channel type TFT 202 and the second concentration n-channel type TFT 203 shown in FIG. In this circuit, when the off-state current value of the p-channel TFT 202 becomes a problem, it is preferable to use a TFT having a single drain structure provided with an offset region and manufactured in the process described in Embodiment 2.

The driving voltage of the pixel portion is 14 to 16 V, and it is required to further reduce the off-current value as compared with the sampling circuit from the viewpoint of low power consumption.
It is desirable to have a multi-gate structure like the pixel TFT 204 shown in (C) and a structure provided with an LDD region.

The structure of this embodiment can be easily realized by fabricating a TFT according to the steps shown in the first to fourth embodiments. In the present embodiment, only the configuration of the pixel portion and the driving circuit is shown. However, according to the steps of Embodiments 1 to 4, the signal dividing circuit, the frequency dividing circuit, the D / A converter, the γ correcting circuit, An operational amplifier circuit, a signal processing circuit such as a memory circuit or an arithmetic processing circuit, or a logic circuit can be formed over the same substrate. As described above, the present invention can realize a semiconductor device including a pixel portion and a driver circuit over the same substrate, for example, a liquid crystal display device including a signal control circuit and a pixel portion.

[Embodiment 8] An active matrix substrate, a liquid crystal display device, and an E manufactured according to the present invention are manufactured.
The L-type display device can be used for various electro-optical devices. The present invention can be applied to all electronic devices incorporating such an electro-optical device as a display medium. Examples of the electronic device include a personal computer, a digital camera, a video camera, a portable information terminal (such as a mobile computer, a mobile phone, and an electronic book), and a navigation system. An example of them is shown in FIG.
Shown in

FIG. 22A shows a personal computer, which comprises a main body 2001 provided with a microprocessor and a memory, an image input unit 2002, a display device 2003, and a keyboard 2004. The present invention relates to a display device 20.
03 and other signal processing circuits can be formed.

FIG. 22B shows a video camera, which includes a main body 2101, a display device 2102, an audio input unit 2103, operation switches 2104, a battery 2105, and an image receiving unit 21.
06. The present invention can be applied to the display device 2102 and other signal control circuits.

FIG. 22C shows a portable information terminal, which comprises a main body 2201, an image input section 2202, an image receiving section 2203, operation switches 2204, and a display device 2205. The present invention can be applied to the display device 2205 and other signal control circuits.

[0102] Such portable information terminals are often used outdoors as well as indoors. In order to enable long-term use, no backlight is used, and a reflective liquid crystal display device that uses external light is suitable as a low-power-consumption type, but a backlight is provided when the surroundings are dark. A transmissive liquid crystal display device is suitable. Against this background, a hybrid type liquid crystal display device having both the reflection type and the transmission type features has been developed, but the present invention can also be applied to such a hybrid type liquid crystal display device. FIG. 21 shows an example in which it is applied to a portable information terminal. Display device 2
205 is a touch panel 3002, a liquid crystal display device 300
3. It is composed of an LED backlight 3004. The touch panel 3002 is provided to simplify the operation of the portable information terminal. In the configuration of the touch panel 3002, a light emitting element 3100 such as an LED is provided at one end, and a light receiving element 3200 such as a photodiode is provided at the other end, and an optical path is formed between the two. When the optical path is interrupted by pressing the touch panel 3002, the light receiving element 3200
Since the output of the light-emitting element changes, the light-emitting element and the light-receiving element are arranged in a matrix on the liquid crystal display device using this principle, so that the element can function as an input medium.

FIG. 21B shows a structure of a pixel portion of a hybrid liquid crystal display device, in which a drain electrode 169 and a pixel electrode 171 are provided over an interlayer insulating film 147. Such a configuration can be formed by applying the fourth embodiment. The drain electrode is configured to also serve as a pixel electrode as a laminated structure of a Ti film and an Al film. The pixel electrode 171 is formed using the transparent conductive film material described in Embodiment 4.
By manufacturing the liquid crystal display device 3003 from such an active matrix substrate, the liquid crystal display device 3003 can be suitably used for a portable information terminal.

FIG. 22D shows an electronic game machine such as a video game or a video game. A main body 23 on which an electronic circuit 2308 such as a CPU and a recording medium 2304 are mounted is shown.
01, a controller 2305, a display device 2303, and a display device 2302 incorporated in the main body 2301. The display device 2303 and the display device 2302 incorporated in the main body 2301 may display the same information, or display information on the recording medium 2304 using the former as a main display device and the latter as a sub-display device. The operation state can be displayed or a touch panel function can be added to form an operation panel. Further, the main body 2301, the controller 2305, and the display device 2303 may be wired communication to transmit signals to each other, or may be a sensor unit 2306,
2307 may be provided for wireless communication or optical communication.
The present invention can be applied to the display devices 2302 and 2303. The display device 2303 can use a conventional CRT.

FIG. 22E shows a player using a recording medium (hereinafter, referred to as a recording medium) on which a program is recorded.
403, a recording medium 2404, and operation switches 2405. The recording medium is DVD (Digital Versatil).
Using an eDisc) or a compact disc (CD), music programs can be played back, images can be displayed, and information can be displayed via video games (or video games) or the Internet. The present invention can be suitably used for the display device 2402 and other signal control circuits.

FIG. 22F shows a digital camera, which comprises a main body 2501, a display device 2502, an eyepiece 2503, operation switches 2504, and an image receiving unit (not shown). The present invention can be applied to the display device 2502 and other signal control circuits.

FIG. 23A shows a front type projector, which comprises a light source optical system, a projection device 2601, and a screen 2602. The present invention can be applied to a projection device and other signal control circuits. FIG. 23B illustrates a rear type projector, which includes a main body 2701, a light source optical system and a projection device 2702, a mirror 2703, and a screen 2704. The present invention can be applied to a projection device and other signal control circuits.

FIG. 23 (C) shows the light source optical system and the projection device 26 shown in FIGS. 23 (A) and 23 (B).
01 and 2702 are shown as examples. The light source optical system and the projection devices 2601 and 2702 include a light source optical system 2801, mirrors 2802 and 2804 to 2806, a dichroic mirror 2803, a beam splitter 2807, a liquid crystal display device 2808, a phase difference plate 2809, and a projection optical system 2810.
It consists of. The projection optical system 2810 includes a plurality of optical lenses. In FIG. 23C, the liquid crystal display device 2808 is used.
Although an example of a three-plate system using three is shown, the present invention is not limited to such a system, and a single-plate optical system may be used. An optical path indicated by an arrow in FIG. 23C may be provided with a suitable optical lens, a film having a polarizing function, a film for adjusting a phase, an IR film, or the like. FIG. 23D shows the light source optical system 2 shown in FIG.
801 is a diagram showing an example of the structure of FIG. In this embodiment,
The light source optical system 2801 includes a reflector 2811 and a light source 28.
12, a lens array 2813, 2814, a polarization conversion element 2815, and a condenser lens 2816. FIG.
The light source optical system shown in FIG. 3D is an example and is not limited to the illustrated configuration.

Although not shown here, the present invention can also be applied to a navigation system, a reading circuit of an image sensor, and the like. As described above, the applicable range of the present invention is extremely wide, and the present invention can be applied to electronic devices in all fields. Further, the electronic apparatus of the present embodiment can be realized by using the crystallization techniques of Embodiments 1 to 4.

[0110]

According to the present invention, in a semiconductor device having a plurality of functional circuits formed on the same substrate (specifically, an electro-optical device in this case) according to the specifications required by the functional circuits. It is possible to arrange TFTs having appropriate performance, and the operating characteristics thereof can be greatly improved.

According to the method for manufacturing a semiconductor device of the present invention,
The p-channel TFT of the drive circuit section has a single drain structure, and the n-channel TFT has a GOLD structure or LD.
An active matrix substrate having a D structure and a pixel TFT in a pixel portion having an LDD structure can be manufactured with six photomasks, and a reflective liquid crystal display device can be manufactured from such an active matrix substrate. .
Further, according to this step, a transmission type liquid crystal display device can be manufactured with seven photomasks.

According to the method for manufacturing a semiconductor device of the present invention,
An active matrix substrate having a p-channel TFT of a drive circuit portion having a single drain structure having an offset region, a n-channel TFT having a GOLD structure or an LDD structure, and a pixel TFT of a pixel portion having an LDD structure has seven photomasks. A reflective liquid crystal display device can be manufactured from such an active matrix substrate. In addition, according to this step, a transmission type liquid crystal display device can be manufactured with eight photomasks.

According to the method for manufacturing a semiconductor device of the present invention,
In a TFT in which a gate electrode is formed of a heat-resistant conductive material and a gate wiring is formed of a low-resistance conductive material, a p-channel TFT of a driving circuit portion has a single drain structure, and an n-channel TFT has a GOLD structure or an LDD structure. In addition, an active matrix substrate having an LDD structure of a pixel TFT in a pixel portion can be manufactured using seven photomasks, and a reflective liquid crystal display device can be manufactured from such an active matrix substrate. Further, according to this step, a transmission type liquid crystal display device can be manufactured with eight photomasks.

As described above, by setting the number of photomasks required for manufacturing the active matrix substrate to 6 to 8, the manufacturing process is simplified and the manufacturing cost can be significantly reduced.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.

FIG. 2 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.

FIG. 3 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.

FIG. 4 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.

FIG. 5 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.

FIG. 6 is a top view illustrating a structure of a driving circuit TFT and a pixel TFT.

FIG. 7 is a cross-sectional view illustrating a manufacturing process of a TFT of a driver circuit.

FIG. 8 is a cross-sectional view illustrating a manufacturing process of a crystalline semiconductor film.

FIG. 9 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.

FIG. 10 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.

FIG. 11 is a cross-sectional view illustrating a manufacturing process of an active matrix liquid crystal display device.

FIG. 12 is a cross-sectional view illustrating a manufacturing process of an active matrix liquid crystal display device.

FIG. 13 is a diagram illustrating the shape of a columnar spacer.

FIG. 14 is a top view illustrating input / output terminals, wiring, circuit arrangement, spacers, and sealants of a liquid crystal display device.

FIG. 15 is a perspective view illustrating a structure of a liquid crystal display device.

FIG. 16 is a top view illustrating a pixel in a pixel portion.

FIG. 17 is a block diagram illustrating a circuit configuration of a liquid crystal display device.

FIG. 18 is a diagram illustrating a connection structure between a flexible printed wiring board and external input / output terminals.

FIG. 19 is a cross-sectional view illustrating a manufacturing process of an active matrix liquid crystal display device.

FIG. 20 illustrates a connection structure between a flexible printed wiring board and external input / output terminals.

FIG. 21 illustrates an example of a semiconductor device.

FIG. 22 illustrates an example of a semiconductor device.

FIG. 23 illustrates a configuration of a projection type liquid crystal display device.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09F 9/00 348 G09F 9/30 348A 9/30 338 G02F 1/136 500 348 H01L 29/78 612B 617A

Claims (21)

[Claims] 1. A semiconductor device comprising: a pixel TFT provided in a pixel portion; and a driving circuit provided with a p-channel TFT and an n-channel TFT around the pixel portion on the same substrate. The p-channel TFT has a channel formation region and a fourth concentration p-type impurity region forming a source region or a drain region. The n-channel TFT of the driving circuit has a channel formation region and the channel formation region. L which is provided in contact with the region and partially overlaps the gate electrode
A first concentration n-type impurity region forming a DD region; and a third concentration n-type impurity region provided outside the first concentration n-type impurity region to form a source region or a drain region; The pixel TFT includes a channel formation region, a second concentration n-type impurity region provided in contact with the channel formation region to form an LDD region, and a source region provided outside the second concentration n-type impurity region. A third concentration n-type impurity region forming a drain region, an insulating film made of an inorganic insulating material on an upper layer of the gate electrode of the pixel TFT, and an organic insulating material formed on the insulating film. A semiconductor device, wherein an insulating film made of a material is formed, and a pixel electrode of the pixel portion is formed on an insulating film having a light-reflective surface and made of the organic insulating material. 2. A semiconductor device, comprising: a pixel TFT provided in a pixel portion; and a drive circuit provided with a p-channel TFT and an n-channel TFT around the pixel portion on the same substrate. The p-channel TFT has a channel formation region and a fourth concentration p-type impurity region forming a source region or a drain region. The n-channel TFT of the driving circuit has a channel formation region and the channel formation region. LD provided in contact with the region and partially overlapping the gate electrode
A first concentration n-type impurity region forming a D region;
A third concentration n-type impurity region provided outside the n-type impurity region having a concentration to form a source region or a drain region, wherein the pixel TFT is provided in contact with the channel formation region; And a second concentration n-type impurity region forming an LDD region, and a first concentration n-type impurity region provided outside the second concentration n-type impurity region and forming a source region or a drain region. An insulating film made of an inorganic insulating material and an insulating film made of an organic insulating material formed on the insulating film are formed on the gate electrode of the pixel TFT. A semiconductor device, which is formed on an insulating film having transparency and made of the organic insulating material. 3. A semiconductor device in which liquid crystal is sandwiched between a pair of substrates, wherein a pixel TFT provided in a pixel portion and a p-type driving circuit are provided.
On one substrate having a channel type TFT and an n-channel type TFT, a p-channel type TFT of the driving circuit is provided.
Has a channel forming region and a fourth concentration p-type impurity region forming a source region or a drain region. The n-channel TFT of the driving circuit includes a channel forming region,
A first concentration n-type impurity region provided in contact with the channel formation region and forming an LDD region partially overlapping the gate electrode; and a source region or a drain region provided outside the first concentration n-type impurity region. The pixel TFT includes a channel forming region, a second concentration n-type impurity region provided in contact with the channel forming region and forming an LDD region, A third concentration n-type impurity region provided outside the second concentration n-type impurity region to form a source region or a drain region, and an inorganic insulating material is formed on an upper layer of the gate electrode of the pixel TFT. And an insulating film made of an organic insulating material formed on the insulating film. The pixel electrode of the pixel portion has a light-reflective surface and is formed on the insulating film made of the organic insulating material. Formed into The other substrate on which a transparent conductive film is formed is connected to the pixel TFT at an opening penetrating the insulating film made of the inorganic insulating material and the insulating film made of the organic insulating material; A semiconductor device, which is bonded via at least one columnar spacer formed so as to overlap a hole. 4. A semiconductor device in which liquid crystal is sandwiched between a pair of substrates, wherein a pixel TFT provided in a pixel portion is connected to a driving circuit of a driving circuit.
On one substrate having a channel type TFT and an n-channel type TFT, a p-channel type TFT of the driving circuit is provided.
Has a channel forming region and a fourth concentration p-type impurity region forming a source region or a drain region. The n-channel TFT of the driving circuit includes a channel forming region,
A first concentration n-type impurity region provided in contact with the channel formation region and forming an LDD region partially overlapping the gate electrode; and a source region or a drain region provided outside the first concentration n-type impurity region. The pixel TFT includes a channel forming region, a second concentration n-type impurity region provided in contact with the channel forming region and forming an LDD region, A third concentration n-type impurity region provided outside the second concentration n-type impurity region to form a source region or a drain region, and an inorganic insulating material is formed on an upper layer of the gate electrode of the pixel TFT. And an insulating film made of an organic insulating material formed on the insulating film. The pixel electrode of the pixel portion has a light-transmitting property and is formed on the insulating film made of the organic insulating material. Formed The other substrate on which a transparent conductive film is formed is connected to the pixel TFT at an opening penetrating the insulating film made of the inorganic insulating material and the insulating film made of the organic insulating material; A semiconductor device, wherein the semiconductor device is bonded via at least one stacked columnar spacer. 5. The p-channel TFT according to claim 1, wherein the p-channel TFT of the driving circuit has a channel formation region and a fourth concentration p-type impurity region forming a source region or a drain region. Wherein an offset region is formed between the semiconductor device and the semiconductor device. 6. The semiconductor device according to claim 5, wherein the p-channel TFT of the driving circuit is used as an analog switch. 7. The pixel TFT according to claim 1, wherein a gate electrode of each of the pixel TFT and a p-channel TFT and an n-channel TFT of the driving circuit is formed of a heat-resistant conductive material. And a gate wiring extending from the driving circuit and connected to the gate electrode is formed of a low-resistance conductive material. 8. The heat-resistant conductive material according to claim 7, wherein the heat-resistant conductive material is tantalum (Ta), titanium (Ti), molybdenum (M
o) an element selected from tungsten (W), a compound containing the element, a compound combining the elements, a nitride containing the element, or a silicide containing the element as a component A semiconductor device characterized by the above-mentioned. 9. The driving circuit according to claim 3, wherein the columnar spacer is formed of a p-channel TFT and an n-type TFT of the driving circuit.
A semiconductor device formed on a channel type TFT. 10. The method according to claim 3, wherein the columnar spacer is formed so as to cover a source wiring or a drain wiring of the p-channel TFT and the n-channel TFT of the driving circuit. Semiconductor device. 11. The semiconductor device according to claim 1, wherein the semiconductor device is a personal computer, a video camera, a portable information terminal, a digital camera,
A semiconductor device, which is one selected from a digital video disc player, an electronic game machine, and a projector. 12. A method for manufacturing a semiconductor device including a pixel TFT provided in a pixel portion and a driver circuit provided with a p-channel TFT and an n-channel TFT around the pixel portion over the same substrate, Forming a base film in close contact with the substrate; forming a plurality of island-shaped semiconductor layers on the base film; and forming an n-channel type driving circuit in a selected region of the island-shaped semiconductor layer. Forming a first concentration n-type impurity region forming an LDD region that partially overlaps with a gate electrode of the TFT; and forming an LDD region of the pixel TFT in a selected region of the island-shaped semiconductor layer. Forming a two-concentration n-type impurity region; and forming an n-channel TFT of the drive circuit in a selected region of the island-shaped semiconductor layer.
Forming a third concentration n-type impurity region forming a source region or a drain region in the pixel TFT and the pixel TFT;
Forming a fourth concentration p-type impurity region forming a source region or a drain region of a p-channel TFT of the drive circuit in a selected region of the island-shaped semiconductor layer;
N-channel type TFT and p-channel type TF of the driving circuit
T, forming an insulating film made of an inorganic insulating material on the gate electrode of the pixel TFT, and forming an insulating film made of an organic insulating material in close contact with the insulating film made of the inorganic insulating material. Forming a pixel electrode having a light-reflective surface connected to the pixel TFT on an insulating film made of the organic insulating material. 13. A method for manufacturing a semiconductor device including a pixel TFT provided in a pixel portion and a driver circuit provided with a p-channel TFT and an n-channel TFT around the pixel portion over the same substrate. A step of forming a base film on the substrate, a step of forming a plurality of island-shaped semiconductor layers on the base film, and forming an n-channel TFT of the drive circuit in a selected region of the island-shaped semiconductor layer. Forming an n-type impurity region of a first concentration forming an LDD region partially overlapping with the gate electrode of the first embodiment, and forming a second LDD region of the pixel TFT in a selected region of the island-shaped semiconductor layer. Forming a source region or a drain region in the n-channel TFT and the pixel TFT of the driving circuit in a selected region of the island-shaped semiconductor layer; n-type Forming a pure region and forming a fourth concentration p-type impurity region for forming a source region or a drain region of a p-channel TFT of the drive circuit in a selected region of the island-shaped semiconductor layer. Forming an insulating film made of an inorganic insulating material on a gate electrode of the n-channel TFT, the pixel TFT, and the p-channel TFT of the driving circuit; and an insulating film made of the inorganic insulating material. Forming an insulating film made of an organic insulating material in close contact with the substrate, forming a conductive metal wiring connected to the pixel TFT, and forming the conductive metal wiring on the insulating film made of the organic insulating material. Forming a pixel electrode made of a transparent conductive film connected to the semiconductor device. 14. A method for manufacturing a semiconductor device in which a liquid crystal is sandwiched between a pair of substrates, comprising: a pixel TFT provided in a pixel portion;
One of the substrates provided with the p-channel TFT and the n-channel TFT of the driving circuit includes a step of forming a base film on the substrate and a step of forming a plurality of island-shaped semiconductor layers on the base film. Forming, in a selected region of the island-shaped semiconductor layer, a first concentration n-type impurity region forming an LDD region that partially overlaps a gate electrode of an n-channel TFT of the drive circuit; Forming a second concentration n-type impurity region for forming an LDD region of the pixel TFT in a selected region of the island-shaped semiconductor layer; and forming an n-type impurity region of the drive circuit in a selected region of the island-shaped semiconductor layer. Channel type TFT
Forming a third concentration n-type impurity region forming a source region or a drain region in the pixel TFT and the pixel TFT;
Forming a fourth concentration p-type impurity region forming a source region or a drain region of a p-channel TFT of the drive circuit in a selected region of the island-shaped semiconductor layer;
Forming an insulating film made of an inorganic insulating material on an upper layer of the gate electrodes of the n-channel TFT, the pixel TFT, and the p-channel TFT of the driving circuit; and closely contacting the insulating film made of the inorganic insulating material. Forming an insulating film made of an organic insulating material, and connecting to the pixel TFT via openings provided in the insulating film made of the organic insulating material and the insulating film made of the inorganic insulating material. Forming a pixel electrode having a light-reflective surface on the insulating film made of the organic insulator material, and forming at least a transparent conductive film on the other substrate. And bonding the one substrate and the other substrate via at least one columnar spacer formed by the method. 15. A method for manufacturing a semiconductor device in which a liquid crystal is sandwiched between a pair of substrates, comprising: a pixel TFT provided in a pixel portion;
One of the substrates provided with the p-channel TFT and the n-channel TFT of the driving circuit includes a step of forming a base film on the substrate and a step of forming a plurality of island-shaped semiconductor layers on the base film. Forming, in a selected region of the island-shaped semiconductor layer, a first concentration n-type impurity region forming an LDD region that partially overlaps a gate electrode of an n-channel TFT of the drive circuit; Forming a second concentration n-type impurity region for forming an LDD region of the pixel TFT in a selected region of the island-shaped semiconductor layer; and forming an n-type impurity region of the drive circuit in a selected region of the island-shaped semiconductor layer. Channel type TFT
Forming a third concentration n-type impurity region forming a source region or a drain region in the pixel TFT and the pixel TFT;
Forming a fourth concentration p-type impurity region forming a source region or a drain region of a p-channel TFT of the drive circuit in a selected region of the island-shaped semiconductor layer;
Forming an insulating film made of an inorganic insulating material on an upper layer of the gate electrodes of the n-channel TFT, the pixel TFT, and the p-channel TFT of the driving circuit; and closely contacting the insulating film made of the inorganic insulating material. Forming an insulating film made of an organic insulating material, and forming a conductive metal wiring connected to the pixel TFT through an opening provided in the insulating film made of the organic insulating material and the protective insulating film. Forming,
Forming a pixel electrode made of a transparent conductive film connected to the metal wiring on the interlayer insulating film; and forming at least a step of forming a transparent conductive film on the other substrate. A method for manufacturing a semiconductor device, comprising a step of bonding the one substrate and the other substrate via at least one formed columnar spacer. 16. The p-channel TFT of the driving circuit according to claim 12, wherein an insulating film made of an inorganic insulating material is formed on a gate electrode of the p-channel TFT. After the step, a step of forming a fourth concentration p-type impurity region forming a source region or a drain region of the p-channel TFT in a selected region of the island-shaped semiconductor layer is performed. A method of manufacturing a semiconductor device, characterized in that an offset region is formed between the channel formation region of (1) and a fourth concentration p-type impurity region forming a source region or a drain region. 17. The pixel TFT according to claim 12, wherein gate electrodes of the p-channel TFT and the n-channel TFT are formed of a heat-resistant conductive material around the pixel portion. A method for manufacturing a semiconductor device, comprising: a step of forming; and a step of forming, from a low-resistance conductive material, a gate wiring extending from the driver circuit and connected to the gate electrode. 18. The compound according to claim 17, wherein the heat-resistant conductive material is an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo), and tungsten (W), or a compound containing the element as a component. , Or a compound of the above elements, or a nitride containing the above elements,
A method for manufacturing a semiconductor device, which is formed from silicide containing the above element. 19. The method according to claim 14, wherein
The columnar spacer is connected to the p-channel type TF of the driving circuit.
A method for manufacturing a semiconductor device, which is also formed over a T-channel and an n-channel TFT. 20. The method according to claim 14, wherein
The columnar spacer is a p-channel type TF of the driving circuit.
A method for manufacturing a semiconductor device, which is formed so as to cover a source wiring or a drain wiring of a T and n-channel TFT. 21. The semiconductor device according to claim 12, wherein the semiconductor device is a personal computer, a video camera, a portable information terminal, a digital camera,
A method for manufacturing a semiconductor device, which is one selected from a digital video disk player, an electronic game machine, and a projector.