JP2000068282A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an emitter region and electrode structure of a double polysilicon bipolar transistor semiconductor device and manufacture thereof. SOLUTION: An impurity diffused polycrystalline film 5 is provided on specific region, including an opening (emitter) 8, a heat radiating film 3 is provided in a lower part of the polycrystalline film 5, except for the region of the opening 8, and a short-wavelength laser beam is irradiated to form an impurity region 7 directly below the opening 8. Thus only the opening (emitter region) is heated to diffuse an impurity (emitter), while heat is radiated from other parts, and no difference in characteristic between elements due to the heat is produced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a semiconductor device of a bipolar transistor in which both an emitter and a base electrode wiring layer are formed of polysilicon and a method of manufacturing the same.

[0002]

2. Description of the Related Art As shown in FIG. 6, in a semiconductor device of a bipolar transistor having a double polysilicon structure, an emitter electrode 64 formed of a polysilicon film and a base electrode 63 formed of a polysilicon film are separated. Further, a side wall 81 for forming an emitter region 85 in a self-aligned (self-aligned) manner is formed on a surface layer of the intrinsic base region 79. A p-type impurity such as boron is implanted into the n-type epitaxial layer 71 through the base window 77 by using an ion implantation method or the like, so that a p-type intrinsic base region 79 is formed. After that, a polysilicon film serving as the base electrode 63 is formed and patterned to form the base electrode 63. An insulating film 76 of SiO ₂ or the like is formed on the polysilicon film (63). Subsequently, the polysilicon film is heated to diffuse high-concentration p-type impurities into the n-type epitaxial layer 71, thereby forming a graft base region 80. You. At the time of this diffusion, the intrinsic base region 79 and the graft base region 80 are connected in the n-type epitaxial layer 71 immediately below the sidewall 81.

Further, an insulating film is deposited on the entire surface and etched back to form a side wall 81 around the base window 77. Thereafter, a high-concentration n-type polysilicon film 64 is formed on the base window 77 and the outer periphery thereof, and impurities are diffused into the intrinsic base region 79 by lamp annealing using a halogen lamp to form an emitter region 85.

In the method of forming the emitter region 85, it is important to make the base-emitter shallow junction particularly for high performance. In order to realize this shallow junction, a halogen lamp is used as a light source. Lamp annealing has been used. Subsequently, a collector window is opened, and for example, an Al metal film is deposited on the window opening to form a collector metal electrode 89. However, as described above, since the halogen lamp has a wide range of wavelengths, the entire wafer is heated by absorbing long-wavelength light. This is because, when a heat treatment for forming an emitter is performed after forming a silicide or high dielectric film or after forming a CMOS using a BiCMOS device or the like, these film characteristics and C
Affects MOS characteristics.

[0005] Further, the temperature rise and fall temperature characteristics in the wafer differ due to the difference in the film structure on the wafer surface and the difference in the light absorption coefficient, resulting in a difference in electrical or physical characteristics. As a method for solving these problems, there is laser annealing of short-wavelength light. However, since the heat storage characteristics vary depending on the film structure of the wafer surface and a temperature difference occurs, this annealing method has not been sufficiently satisfactory.

[0006]

The present invention relates to a method for forming an emitter region in the above-described semiconductor device and a semiconductor device for a bipolar transistor formed by this method. It is to control heat generation as much as possible. Another object of the present invention is to improve the structure of a film to be heated when heating polycrystalline silicon for forming an emitter region or the like so as to eliminate the dependence of the ultimate temperature difference on the underlying film structure.

[0007]

According to a first aspect of the present invention, there is provided a semiconductor layer, an interlayer film formed in an outer peripheral region of an opening on the semiconductor layer, and a heat dissipation film formed on the interlayer film. When,
This is a semiconductor device including an opening and a polycrystalline film containing impurities formed on the heat dissipation film.

According to a second aspect of the present invention, there is provided a semiconductor layer of a first conductivity type, an interlayer film formed in an outer peripheral region of an opening on the semiconductor layer of the first conductivity type, and Including a semiconductor region of the second conductivity type formed inside the semiconductor layer of the first conductivity type, a heat dissipation film formed on the interlayer film, and an impurity formed on the opening and the heat dissipation film A semiconductor device having a semiconductor junction including a semiconductor layer of a second conductivity type.

According to a third aspect of the present invention, there is provided a p-type first semiconductor layer, and an n-type first semiconductor layer formed inside the p-type first semiconductor layer in a region of the opening and the opening of the heat dissipation film. Semiconductor region of
a p-type second semiconductor layer connected to the p-type first semiconductor layer, a first conductive layer formed on the p-type second semiconductor layer, and an opening on the first conductive layer An interlayer film formed outside the portion, a heat dissipation film formed on the interlayer film, an insulating region formed on a side wall of the first conductive layer and the interlayer film at an outer peripheral portion of the opening, A semiconductor device including an emitter-base junction bipolar transistor including an n-type first semiconductor film including an n-type impurity formed on a heat dissipation film.

According to a fourth aspect of the present invention, in a method of manufacturing a bipolar transistor semiconductor device, a first polycrystalline semiconductor film is formed on a first conductive type semiconductor layer in a region surrounded by an insulating region. And forming a first insulating layer on the first polycrystalline semiconductor film, and opening the first polycrystalline semiconductor film and a part of the first insulating layer continuously by using a resist mask. Forming a first opening; and implanting high-concentration impurities of the second conductivity type into the first by an ion implantation method.
Forming an intrinsic base region by injecting it into the opening, forming a second insulating layer, and etching back the insulating layer to form a third insulating layer on the side surface of the first opening. Forming a second opening, forming a heat dissipation film on a surface outside the first opening, and linking a link base layer in the semiconductor substrate of the fourth insulating layer forming portion to the fourth base. Forming a graft base region by introducing impurities of the second conductivity type into the outer peripheral portion of the intrinsic base region; forming a fifth insulating layer; By etching back the insulating layer, a sixth insulating layer is formed on the side surface of the third insulating layer, and the third insulating layer is formed.
Forming a third opening by opening a part of the insulating layer, and forming a heat dissipation film outside the third opening;
A second conductive layer of a first conductivity type including an impurity of the first conductivity type for forming an emitter region on the third opening and the heat dissipation film;
Forming a polycrystalline semiconductor film, and introducing an impurity of the second polycrystalline semiconductor film into an intrinsic base region to form an emitter region and to form a collector region. It is a manufacturing method of.

According to a fifth aspect of the present invention, in a method of manufacturing a semiconductor device of a bipolar transistor, a first polycrystalline semiconductor film is formed on a first conductive type semiconductor layer in a region surrounded by an insulating region. Forming, forming a first insulating layer on the first polycrystalline semiconductor film, forming a heat-dissipating film on the first insulating layer, and using the resist mask to form the first polycrystalline semiconductor film. Forming a first opening by continuously opening the semiconductor film, a part of the first insulating layer and the heat dissipation film, and removing a high-concentration second-conductivity-type impurity into the first by an ion implantation method. Forming an intrinsic base region by injecting the second insulating layer into the opening, and etching back the second insulating layer to form a third insulating layer on the side surface of the first opening. Forming a second opening, and forming an intrinsic base. Forming a graft base region by introducing impurities of the second conductivity type into the outer peripheral portion of the region, forming a fourth insulating layer, and etching back the fourth insulating layer to form a third insulating layer. Forming a fifth insulating layer on the side surface of the layer and forming a third opening by partially opening the third insulating layer; and forming a heat dissipation film outside the third opening. Forming a second polycrystalline semiconductor film of a first conductivity type including an impurity of the first conductivity type to form an emitter region on the third opening and the heat dissipation film; 2
And a step of forming an emitter region by introducing an impurity of the polycrystalline semiconductor film into the intrinsic base region, and a step of forming an electrode by opening a collector window.

Therefore, in the semiconductor device of the double polysilicon bipolar transistor of the present invention, the heat dissipation film is formed in the region outside the emitter opening, and the inside of the emitter opening is formed of the polysilicon film containing the high concentration impurity. Irradiation with a laser beam heats only the inside of the emitter opening and diffuses impurities from the polysilicon film into the intrinsic base region to form an emitter region.
At this time, even if the region of the polysilicon film formed on the heat radiation film other than the emitter opening is irradiated with the laser, the region is radiated and is not heated.

[0013]

FIG. 1 shows an embodiment of the present invention. An interlayer insulating film ₂ such as SiO ₂ is deposited on a semiconductor substrate 1 and, if necessary, an insulating film is further deposited, and an opening 8 is formed in a predetermined pattern. Thereafter, the side wall 6 may be formed on the side wall of the window 4 by etching back. When the side wall 6 is not formed, a heat dissipation film 3, for example, polysilicon or the like is deposited on the interlayer insulating film ₂ such as SiO ₂ , and then a resist is applied and patterned into a predetermined shape. The interlayer insulating film 2 and the heat dissipation film 3 are etched by RIE or the like. The etching is performed until the surface of the semiconductor substrate 1 is exposed, and a window 4 having a predetermined shape is formed.

Thereafter, a polycrystalline film (polysilicon film) 5 further containing impurities is formed on the entire surface and patterned to form electrodes. Then, the patterned polysilicon film 5 is irradiated with a short-wavelength laser beam, so that only the inside of the opening 8 is heated. Impurities diffuse from polysilicon film 5 into semiconductor substrate 1 only in the heated region, and impurity regions 7 are formed there. If impurity region 7 is formed of an impurity having a conductivity type different from that of semiconductor substrate 1, a semiconductor junction is formed. Specifically, assuming that the semiconductor substrate is a p-type semiconductor, the impurity region 7 is an n-type semiconductor (region), so that a PN junction is formed between them, and in a semiconductor device of a diode or a bipolar transistor, It has a base-emitter junction.

On the other hand, when the conductivity type of the polysilicon film 5 is the same as that of the semiconductor substrate 1, if the impurity concentration of the impurity region 7 is set higher than that of the latter, the resistance of the impurity region 7 decreases. Therefore, the contact resistance between the polysilicon film 5 and the impurity region 7 is reduced, and a good contact electrode is formed.

When the polysilicon film 5 is heated, the heat radiating film 3 and the region where the polysilicon film 5 is deposited on the film are radiated (or diffused) by the heat radiating film 3 to be heated. Never. Therefore, when heating only a certain specific region, it is preferable to form a single-layer polysilicon film in this manner, and to form a non-heated region on the lower layer with a polysilicon film such as a wiring on the upper layer of the heat dissipation film.

[0017]

Embodiments of the present invention will be described below with reference to the accompanying drawings. First Embodiment First, a structure of a semiconductor device according to a first embodiment of the present invention will be described with reference to FIG.

FIG. 2 is a schematic sectional structural view of a semiconductor device of a double polysilicon bipolar transistor. In this example, the structure of a vertical npn transistor is shown. An n-type high-concentration collector buried region (n-BL: n-Burie) in a p-type semiconductor substrate (p-sub) 28
d Layer) 29 is formed, and an ISO 30, also called a channel stop region, is formed on the outer periphery of the region as a p-type high-concentration diffused region in the vertical direction. Each element is separated by using the channel stop region 30. I have.

On the channel stop region of the p-type high-concentration impurity region, an insulating layer 33 (or an element isolation region, LOCOS; Local Oxida) further formed of a silicon oxide film on top of ISO (Isolation) 30
T. of Silicon). An element such as a transistor is formed in a region surrounded by the LOCOS 33. An n-type epitaxial layer (n-ep) formed by epitaxial growth on the n-type collector buried region (n-BL) 29
i) 31 are formed. Further, inside the n-type epitaxial layer 31, a p-type intrinsic base region 3 is formed.
9. Further, an emitter region 45 in which an n-type impurity is diffused is formed in the intrinsic base region 39.

On the other hand, a base electrode 23 made of a polysilicon film of a p-type impurity is formed on the upper surface of an intrinsic base region (also referred to as an intrinsic base layer) 39, and a graft base region is formed below the base electrode 23. 40 are formed. The inner region of the graft base region 40 is formed so as to overlap the intrinsic base region 39, and the two base regions are connected.

Further, an insulating layer 3 is provided above the LOCOS 33 for element isolation and in the region around the graft base region 40.
6, a base electrode 23 made of a polysilicon film 35 is formed on the insulating layer 36, and one end on the intrinsic base region 39 side is connected to the graft base region 40 to form a base. I have. An insulating layer 36 such as SiO ₂ is formed on the base electrode 23, and an insulating film such as SiO ₂ is formed on the inner peripheral end of the insulating layer 36 on the side wall of the base window 37 or the emitter window (opening) 42.
Are configured. Further, a light absorbing material or a heat diffusion (radiation) material film is formed in a region other than the emitter window (opening) 42 described above, and the emitter electrode 2 is formed.
4 and other electrodes, for example, a predetermined pattern of electrodes such as the capacitor 22 are formed.

The heat-diffusing film (4
3) A polysilicon film 24 containing a high-concentration n-type impurity formed by a CVD method is formed on the upper surface, and an emitter window (opening) 42, a side wall 41, and an emitter having a predetermined shape over a part of SiO _2. Electrode (polysilicon film) 2
4 are configured. Thus, the sidewall 41
Although only the polysilicon film 24 containing impurities is formed therein, a heat-dissipating film 43 is formed on a part of the upper surface of the SiO ₂ film outside both the emitter window 42 and the outer peripheral portion of the sidewall 41. ing.

That is, the polysilicon film 24 for forming the emitter electrode 24 surrounded by the sidewall 41
The heat radiation film 4 which is a light absorbing material is further formed under the above-mentioned polysilicon film in a region which is formed of only one layer of polysilicon film and which does not need to diffuse impurities by heating in other regions.
3 are formed. For this reason, the polysilicon film existing inside the emitter region 45 is heated, and in the other region, for example, in the region where two polysilicon films are formed, the absorbed light, that is, heat is immediately released. Therefore,
Only the emitter region 45 is heated, and the impurity is diffused from the polysilicon film 24 containing the high concentration n-type impurity in this region to the underlying intrinsic base region 39.

Next, a collector electrode extraction region 34 (PLG; also referred to as a plug) formed of an n-type high-concentration impurity is formed from above the inside of the collector buried region 29 and connected to the n-type epitaxial layer 31. Is done.
A collector metal electrode 50 of Al or the like is formed above the collector electrode extraction region 34. The metal electrode of Al or the like is simultaneously laminated on the wiring layer of the polysilicon electrode of the other base and emitter, and one of the electrodes is formed. Part is formed and connected to other elements and the like.

Second Embodiment Next, a method of manufacturing a double-polysilicon bipolar transistor semiconductor device according to a second embodiment of the present invention will be described with reference to the drawings. 3 to 5 that are the same as those in FIG. 2 are given the same numbers. 3 (a) and 3 (b), and FIGS. 4 (c) to 4 (e) and 5 (f) to 5 (h) show the base electrode 23 and the emitter electrode 24 (3
5) illustrates the steps of a method for manufacturing an npn transistor having a so-called double polysilicon structure formed of a polysilicon film.

As shown in FIG. 3A, a p-type semiconductor substrate (also referred to as p-sub or substrate) 2
8 on the main surface of the n-type high concentration collector buried region (n
-BL) 29 is formed by selective diffusion or the like, and the periphery of the portion where the collector buried region 29 is formed is surrounded, that is, around the finally obtained circuit elements, for example, a p-type high concentration channel is formed in a mesh pattern. Stop area (IS
O) 30 is selectively formed. A semiconductor substrate (p-SUB, n-epi) is grown by growing an n-type epitaxial layer 31 of a conductivity type different from the main surface of the substrate (p-sub) 28 on which the collector buried region 29 and the channel stop region 30 are formed. , N-BL) 32 are formed.

Next, as shown in FIG. 3B, a so-called field portion such as a portion corresponding to a space between elements to be finally formed, for example, an isolation region including the channel stop region (ISO) 30, and the like. Finally, selective oxidation is performed on the isolation region of the insulating layer (LOCOS) 33 that separates the base region and the collector region in the bipolar transistor to form an insulating film of a thick SiO ₂ oxide film. Then, an n-type high-concentration impurity is doped by, for example, selective ion implantation to form a low-resistance collector electrode extraction region (PLG) 34.

A p-type impurity serving as a diffusion source of the graft base region 40 is formed on the entire surface of the n-type epitaxial layer 31 constituting a part of the semiconductor substrate 32 for forming an npn bipolar transistor having a vertical structure by a low pressure CVD method. Is formed to a thickness of about 150 nm. This low pressure CVD method is performed, for example, at a production temperature of 630 ° C.
SiH ₄ 1500cc / min, a PH ₃ 450 cc / m
in, He 0.8 l / min, generation pressure 1.4 To
The production rate is 7.3 nm / min at rr. The polysilicon film 35 may be formed by forming a polysilicon film having no impurities and then diffusing impurities using ion implantation or the like to form the p-type polysilicon film 35. As shown in FIG. 4C, the polysilicon film 35 is etched into a pattern of the base electrode 23 (35), and portions other than the base region are removed.

Subsequently, the insulating layer 36 is formed by a normal pressure CVD method.
For example, an SiO ₂ film is formed to a thickness of about 300 nm on the entire surface of the oxide film
Degree formed. The atmospheric pressure CVD method used here is, for example, a generation temperature of 380 ° C., 500 cc / min of SiH ₄ , 120 cc / min of O ₂ , 3.8 l / min of He, and a generation speed of about 10 nm / min.

Next, a resist film is applied to the entire surface, and the emitter window 42 of the transistor is opened with a width of about 1.0 μm using a usual photolithography method.
Subsequently, the polysilicon film 23 (3) to be a portion to be a base region immediately below the emitter, ie, an intrinsic base region 39, is formed by dry etching such as RIE.
5), the insulating layer 36 of the SiO ₂ film is etched. This etching is performed on the n-type epitaxial layer 3 of the semiconductor substrate 32.
1 until the surface of the substrate 1 is exposed to form a base window 37. A thin SiO ₂ oxide film of, for example, about 1 nm may be formed on the exposed surface of the base window 37 as needed to form the protective film 38. Thereafter, the resist film used as the etching mask is removed.

Subsequently, the base window 3 is formed by ion implantation.
7, boron difluoride (BF ₂ ) or boron (B) which is a p-type impurity for forming the intrinsic base region 39 is introduced. The conditions for this ion implantation are, for example, that the implantation energy is set to 10 keV and the dose is set to about 1 × 10 ¹³ / cm ² .

After ion implantation in the region of the base window 37,
For example, by annealing at 900 to 1000 ° C., a p-type impurity is diffused into the n-type epitaxial layer 31 from the impurity-containing polysilicon film 35 in the semiconductor layer having a low resistance to form the graft base region 40. Since the diffused impurities are simultaneously diffused not only in the vertical direction but also in the horizontal direction at the time of diffusion, the base is connected by contacting both ends of the intrinsic base region 39. (See Fig. 4 (d))

Next, as shown in FIGS. 4E and 5F, a side wall 41 is formed on the polysilicon film 35 for the base electrode while the inside of the opening of the base window 37 is buried. An insulating layer 36 of SiO ₂ to be formed is formed to a thickness of about 500 nm by, for example, a normal pressure CVD method. Subsequently, the SiO ₂ insulating layer 36 is etched back from the upper layer of the SiO ₂ insulating layer 36 to a predetermined thickness by anisotropic etching, for example, dry etching by RIE.
The required side wall 41 is provided on the outer side wall of the base window 37.
Is formed, and an emitter window 42 surrounded by the sidewall 41 is also formed in the base window (opening) 37. At this time, the polysilicon film 35 and the SiO
Due to the etching selectivity with respect to the _second insulating layer 36, only the side wall 41 is over-etched.

Next, as shown in FIG. 5 (g), a polysilicon film (heat dissipation film) 43 is deposited on the entire surface of the region except for the base window 37 and the opening for the emitter window 42. The conditions for forming the polysilicon film 43 include, for example, a forming temperature of 600 ° C., a reaction pressure of 0.8 Torr, and SiH _4.
To 250 cc / min, He (N ₂ ) 1.5 l / mi
n, a low-pressure CVD method (LP at a production rate of about 8 nm / min)
CVD), and a polysilicon film 4 is formed on the entire surface of the insulating layer 36.
3 is formed to about 100 nm. This polysilicon film 4
Numeral 3 plays a role of diffusing absorbed heat when short-wavelength light is absorbed, and reduces the influence of heat by not transferring unnecessary heat to a lower semiconductor region and a wiring layer during heat treatment. On the polysilicon film 43, a polysilicon film 24 as a wiring layer of the emitter electrode 24 is further laminated. The laminated polysilicon film 24 is doped with an n-type impurity so as to lower the wiring resistance.

The polysilicon film (43, 24) in which the lower layer and the upper layer are laminated is patterned as an emitter wiring or another wiring, and is etched into a predetermined shape by RIE or the like. At this time, the lower polysilicon film 43 is not formed in the emitter region 45 surrounded by the sidewall 41 and in the intrinsic base region 39.
That is, only the oxide film as the protective film 38 and the polysilicon film (24) as the wiring for the emitter electrode 24 exist on the upper surface of the intrinsic base region 39.

Thereafter, laser annealing for forming the emitter region 45 is performed. At this time, the polysilicon film 24 containing the n-type high-concentration impurity, which is surrounded by the sidewall 41 formed on the side wall of the emitter window 42 and deposited on the surface of the intrinsic base region 39, is coherent with a wavelength of 190 to 310 nm, for example. Light is irradiated for several seconds to about 10 seconds. By this heat treatment, an emitter region 45 is formed through the emitter window 42 on the surface of the above-described intrinsic base region 39 with the impurity of the polysilicon film as an n-type impurity.

When an excimer laser is used as a laser diode for laser annealing as described above, light having a short wavelength of 193 nm for ArF, 248 nm for KrF, and 308 nm for XeCl is emitted. When this laser beam is irradiated, the absorption coefficient of the polysilicon film, the polysilicon film containing impurities, and the polycide film with respect to the wavelength to be irradiated is larger than that of another interlayer insulating layer, for example, a SiO ₂ film, and the irradiation is performed for several seconds to 10 seconds. However, the polysilicon film can sufficiently absorb light, that is, heat, and can store or radiate heat only in the region where the polysilicon film is formed. This is related to the wavelength of the absorbed light. If the material of the absorption film such as the heat radiation film 43 or the emitter electrode polysilicon film 24 is different, there is a wavelength suitable for the film. Here, in order to form the emitter region 45, its wiring material and its wiring resistance must be reduced as much as possible, so that a polysilicon film or the like is suitable.

As described above, the emitter electrode 24 and the emitter region 45 are formed in a self-aligned manner. Since the emitter region 45 can be diffused to a depth of about 0.15 to 0.20 μm, the width of the intrinsic base region 39 formed downward from the lower part of the emitter region is 0.1 mm.
From 1 to 0.2 μm, an NPN transistor with a shallow junction is realized.

Then, as shown in FIG. 5 (h), an insulating layer 46 is deposited on the entire surface, and thereafter, windows are formed on the respective electrodes of the emitter, base and collector and the electrode extraction region (34). In addition to forming a metal electrode or wiring of Al or the like, an electrode of another element is also formed at the same time. Also,
An interlayer insulating layer 51 is formed on the entire surface of a metal electrode such as an emitter, a base, and a collector by a CVD method or the like.

Third Embodiment Next, a method of manufacturing a semiconductor device of a double polysilicon bipolar transistor according to a third embodiment of the present invention will be described. The method of manufacturing a semiconductor device of a double-polysilicon bipolar transistor of the present invention will be described with reference to FIGS.
The same applies to (c). In the next FIG.
After forming the insulating layer 36 of O ₂ , a polysilicon film (heat dissipation film) 43 is deposited on the entire surface without applying a resist film on the entire surface, and the heat dissipation film 43 is patterned into a predetermined shape.
Next, the base window 37 is opened. The temperature of about 4 ° C. is applied to the exposed surface of the n-type epitaxial layer 31 by opening the base window 37.
Atmospheric pressure CVD at 00 ° C or TEOS- at 165 ° C
A thin oxide film of about 10 nm is formed by using the O ₃ method.

Thereafter, a resist film is applied over the entire surface, and the emitter window 42 of the transistor is opened with a width of about 1.0 μm using a usual photolithography method. Thereafter, the manufacturing method up to FIG. 5F is the same as that of the second embodiment.

Next, FIG. 5G is the same as the other steps except the step of depositing the polysilicon film 43. Further, FIG. 5H thereafter shows the same steps as those of the second embodiment. Therefore, in the third embodiment, the second embodiment
The order of the step of depositing the heat radiation film 43 and the step of forming the protective film 38 formed on the exposed surface of the inner region of the base window 37 are different from those of the first embodiment.

In the above example, the impurity is diffused from the n-type epitaxial layer 31 to form the intrinsic base region 39, or the impurity is diffused from the polysilicon film 35 to the n-type epitaxial layer 31 to form the graft base region 40. And the step of diffusing impurities into the intrinsic base region 39 in order to form the emitter region 45 from the polysilicon film 24 is performed separately. However, these may be performed by the same heat treatment process. Various changes such as possible are possible.

[0044]

As is apparent from the above description, in the semiconductor device of the double polysilicon bipolar transistor of the present invention, the emitter region is formed of a single polysilicon film, and the region where the other polysilicon film exists, for example, By providing a film made of polysilicon as a heat dissipation film below the wiring layer, the electrode of the capacitor, etc., the entire surface of the polysilicon is irradiated with laser light having a short wavelength light source, and the emitter diffusion region of the emitter opening is formed. Only the polysilicon region is heated, and other regions with the polysilicon film are radiated and are not heated. Therefore, conventionally, since the polycrystalline silicon on the opening insulating film is formed on SiO ₂ , which has poor heat dissipation characteristics, the temperature at which the heating reaches this portion increases,
Depending on the region, the difference in characteristics of elements and the like was caused.However, by using the configuration or the manufacturing method of the present invention, the polycrystalline silicon film for emitter diffusion was a film having excellent heat dissipation properties both inside and outside the opening. Therefore, it is possible to prevent the difference in the temperature attained by heating due to the difference in the structure of the lower layer film, thereby reducing the difference in the temperature characteristics of the element and the like.

[Brief description of the drawings]

FIG. 1 is a schematic sectional structural view of a semiconductor device having an electrode structure according to an embodiment of the present invention.

FIG. 2 is a schematic sectional view of a semiconductor device of a double polysilicon bipolar transistor according to the first embodiment of the present invention.

FIGS. 3 (a) and 3 (b) show Embodiment 2 of the present invention.
FIG. 9 is a schematic cross-sectional structure diagram for describing a process of a method for manufacturing a semiconductor device of a double-polysilicon bipolar transistor according to Example 3 and Example 3;

FIGS. 4 (c) to 4 (e) show Embodiment 2 of the present invention.
FIG. 9 is a schematic cross-sectional structure diagram for describing a process of a method for manufacturing a semiconductor device of a double-polysilicon bipolar transistor according to Example 3 and Example 3;

FIGS. 5 (f) to 5 (h) show Embodiment 2 of the present invention.
FIG. 9 is a schematic cross-sectional structure diagram for describing a process of a method for manufacturing a semiconductor device of a double-polysilicon bipolar transistor according to Example 3 and Example 3;

FIG. 6 is a schematic sectional structural view of a main part of a conventional bipolar transistor semiconductor device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 2 ... Interlayer insulating film, 3 ... Heat dissipation film, 4 ...
Windows, 5: polycrystalline film (polysilicon film), 6: sidewall, 7: impurity region, 8: opening (emitter region),
21: bipolar transistor, 22: capacitance, 23, 6
3 ... base electrode (polysilicon film), 24, 64 ... emitter electrode (polysilicon film), 26, 36 ... insulating film, 2
8 ... p-type semiconductor substrate (p-sub), 29 ... collector buried region (n-BL), 30 ... channel stop region (ISO), 31, 71 ... n-type epitaxial layer, 3
2 ... semiconductor substrate, 33 ... insulating layer (LOCOS), 34 ...
Collector electrode extraction region, 35: semiconductor layer (polysilicon film), 37: base window (opening), 39, 79 ... intrinsic base region (intrinsic base layer), 40, 8
0: graft base region, 41, 81: sidewall, 42: emitter window (opening), 43: heat dissipation film (polysilicon film), 44: polysilicon film, 45, 85 ...
Emitter region, 47 upper metal wiring layer, 48 emitter metal electrode, 49 base metal electrode, 50, 89 collector metal electrode, 51 interlayer insulating film

Claims (22)

[Claims] A semiconductor layer; an interlayer film formed in an outer peripheral region of an opening on the semiconductor layer; a heat dissipation film formed on the interlayer film; and a heat dissipation film on the opening and the heat dissipation film. And a polycrystalline film containing impurities formed in the semiconductor device. 2. The semiconductor device according to claim 1, wherein said semiconductor layer is formed of a p-type semiconductor layer. 3. The semiconductor device according to claim 1, wherein said heat radiation film is made of polycrystalline silicon. 4. The semiconductor device according to claim 1, wherein a semiconductor region having a conductivity type different from that of the impurity is formed between the semiconductor layer and the polycrystalline film containing the impurity. 5. The semiconductor device according to claim 1, wherein said interlayer film is made of SiO ₂ . 6. A semiconductor layer of a first conductivity type, an interlayer film formed in an outer peripheral region of an opening on the semiconductor layer of the first conductivity type, and a first layer in the region of the opening. A semiconductor region of the second conductivity type formed inside the semiconductor layer of the conductivity type; a heat dissipation film formed on the interlayer film; and an impurity formed on the opening and the heat dissipation film. A semiconductor device comprising a semiconductor junction including a semiconductor layer of a second conductivity type. 7. The semiconductor device according to claim 6, wherein the semiconductor layer of the first conductivity type is formed of a p-type semiconductor layer. 8. The semiconductor device according to claim 6, wherein said heat dissipation film is made of polycrystalline silicon. 9. The semiconductor device according to claim 6, wherein the second conductive type semiconductor layer is an n-type conductive semiconductor layer.
13. The semiconductor device according to claim 1. 10. The semiconductor device according to claim 6, wherein said interlayer film is made of SiO ₂ . 11. A p-type first semiconductor layer; an n-type semiconductor region formed inside the p-type first semiconductor layer in a region of the opening and the opening of the heat dissipation film; A p-type second semiconductor layer connected to the p-type first semiconductor layer; a first conductive layer formed on the p-type second semiconductor layer; and the first conductive layer An interlayer film formed on the outside of the opening, a heat dissipation film formed on the interlayer film, and a first conductive layer and a side wall of the interlayer film formed on an outer peripheral portion of the opening. Bipolar transistor having an emitter-base junction comprising an insulating region, and an opening and an n-type first semiconductor film containing an n-type impurity formed on the heat dissipation film. Semiconductor device. 12. The bipolar transistor semiconductor device according to claim 11, wherein said heat dissipation film is made of polycrystalline silicon. 13. The bipolar transistor semiconductor device according to claim 11, wherein said interlayer film is made of SiO ₂ . 14. The bipolar transistor semiconductor device according to claim 11, wherein said interlayer film is formed of a sidewall of SiO ₂ . 15. A method for manufacturing a semiconductor device of a bipolar transistor, comprising: forming a first polycrystalline semiconductor film on a first conductivity type semiconductor layer in a region surrounded by an insulating region; Forming a first insulating layer on the first polycrystalline semiconductor film, and opening a part of the first polycrystalline semiconductor film and a part of the first insulating layer continuously with a resist mask; Forming an opening, implanting high-concentration second conductivity type impurities into the first opening by ion implantation to form an intrinsic base region, and forming a second insulating layer. Forming a third insulating layer on a side surface of the first opening by etching back the second insulating layer to form a second opening; and forming a second opening outside the first opening. Forming a heat dissipation film on the surface; Forming a graft base region by introducing the impurity of the second conductivity type into the outer periphery of the source region; forming a fourth insulating layer; and etching back the fourth insulating layer to form the graft base region. Forming a fifth insulating layer on the side surface of the third insulating layer and opening a part of the third insulating layer to form a third insulating layer;
Forming an opening, and forming a heat dissipation film outside the third opening; and forming the emitter region on the third opening and the heat dissipation film. Forming a second polycrystalline semiconductor film of a first conductivity type containing an impurity of the first conductivity type; introducing an impurity of the second polycrystalline semiconductor film into the intrinsic base region to form an emitter region; A method of manufacturing a semiconductor device for a bipolar transistor, comprising: forming a collector window and forming an electrode by opening a collector window. 16. The graft base region according to claim 15, wherein an impurity is diffused from the first polycrystalline semiconductor film to the intrinsic base region.
A manufacturing method of a semiconductor device of a bipolar transistor as described in the above. 17. The semiconductor for a bipolar transistor according to claim 15, wherein said second polycrystalline semiconductor film is irradiated with a laser beam to introduce impurities into said intrinsic base region to form an emitter region. Device manufacturing method. 18. The method according to claim 17, wherein the second polycrystalline semiconductor film is irradiated with an excimer laser.
A manufacturing method of a semiconductor device of a bipolar transistor as described in the above. 19. The method of manufacturing a semiconductor device for a bipolar transistor according to claim 18, wherein said second polycrystalline semiconductor film is formed of a polysilicon film. 20. A method of manufacturing a semiconductor device of a bipolar transistor, comprising: forming a first polycrystalline semiconductor film on a semiconductor layer of a first conductivity type in a region surrounded by an insulating region; Forming a first insulating layer on the first polycrystalline semiconductor film; forming a heat dissipation film on the first insulating layer; using a resist mask to form the first polycrystalline semiconductor film; Forming a first opening by continuously opening a part of the first insulating layer and the heat dissipation film; and forming a high concentration second conductivity type impurity by the ion implantation into the first opening. Forming an intrinsic base region by injecting the second insulating layer into a second insulating layer, and etching back the second insulating layer to form a third insulating layer on the side surface of the first opening. Forming and forming a second opening; Forming a graft base region by introducing the impurity of the second conductivity type into the outer peripheral portion of the base region; forming a fourth insulating layer; and etching back the fourth insulating layer to form the graft base region. Forming a fifth insulating layer on the side surface of the third insulating layer and opening a part of the third insulating layer to form a third insulating layer;
Forming an opening, and forming a heat dissipation film outside the third opening; and forming the emitter region on the third opening and the heat dissipation film. Forming a second polycrystalline semiconductor film of a first conductivity type containing an impurity of the first conductivity type; introducing an impurity of the second polycrystalline semiconductor film into the intrinsic base region to form an emitter region; A method of manufacturing a semiconductor device for a bipolar transistor, comprising: forming a collector window and forming an electrode by opening a collector window. 21. The graft base region according to claim 20, wherein an impurity is diffused from the first polycrystalline semiconductor film to the intrinsic base region.
A manufacturing method of a semiconductor device of a bipolar transistor as described in the above. 22. The semiconductor of claim 20, wherein the second polycrystalline semiconductor film is irradiated with laser light to introduce impurities into the intrinsic base region to form an emitter region. Device manufacturing method.