JP2000040773A - Resin-sealed semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a chip aggregate to be pelletized satisfactorily into chips in dicing step, by preventing auto-alignment marks for dicing from being concealed. SOLUTION: A semiconductor device has a structure, where a bump 10 or a gold ball is provided onto the electrode 2 of a semiconductor chip formed on a board 1, and the surface of the semiconductor chip is covered with a transparent of semitransparent resin protective film 11 or a molding resin. In this case, the bump 10 or the gold ball is exposed to the surface of the resin protective film 11 or to the surface of the molding resin.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a high-quality, high-reliability resin-sealed semiconductor device and a method of manufacturing the same.

[0002]

2. Description of the Related Art A technique described in Japanese Patent Application Laid-Open No. 8-64725 is known as a thin resin-sealed semiconductor device most suitable for a package for an IC card or a memory card. This technology relates to a resin-encapsulated semiconductor device in which a bump or a gold ball is formed on an electrode of a semiconductor chip and the bump or the gold ball is exposed on the surface of a molding resin. The present invention discloses a technique in which, when not exposed to the molding resin surface or a sufficient exposed area cannot be obtained, the molding resin surface is ground as necessary to expose the bumps or gold balls.

[0003]

According to the technique described in this publication, after exposing bumps or gold balls on the surface of a molding resin, dicing is performed on a semiconductor wafer formed with a large number of semiconductor chips. However, the properties of the molding resin, for example, the color and the material, are not described in the official gazette, and are not disclosed.

[0004] If this molding resin is a general IC
If it is a black epoxy resin, the dicing auto-alignment mark provided in the semiconductor wafer is hidden and cannot be seen, and therefore, cannot be pelletized by dicing. In addition, even if the exposed bumps or gold balls are substituted for the dicing auto alignment marks, erroneous detection is likely to occur because these are not uniform in size and position, thereby preventing accurate dicing pelleting. There is a risk that defective chips will occur frequently.

As a technique similar to the above-mentioned technique, recently, a Super CSP (Chip Size Packa) has been proposed.
ge) is provided. (Super CSP; A BGA Type Real Chip Size Package
Using a New Encapsulation Method.Proceeding of th
e Pan pacific Microelectronics Symposium.pp415 ~ 42
However, even in this document, the properties (especially the color) of the sealing resin are not specified, and accurate dicing by the auto alignment mark for dicing provided in the semiconductor wafer has been performed. It is unknown whether it is. If you try to use the exposed bumps as dicing auto alignment marks as described above,
Since the resin surface is not ground or polished in the technique of this document, the exposed bumps become more and more irregular,
False detection is more likely to occur.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a resin capable of preventing dicing auto-alignment marks from being hidden and improving pelletizing in dicing. To provide an encapsulated semiconductor device and a method for manufacturing the same,
An object of the present invention is to provide a chip size package having an arbitrary chip thickness on which a bump and a surface protective film / mold resin are formed.

[0007]

According to the resin-encapsulated semiconductor device of the present invention, bumps or gold balls are provided on electrodes of a semiconductor chip formed on a substrate, and the surface of the semiconductor chip is transparent or translucent. The solution to the above-mentioned problem is that the bump or the gold ball is exposed on the surface of the resin protective film or the molding resin.

According to this resin-encapsulated semiconductor device, the surface of the semiconductor chip is covered with a transparent or translucent resin protective film or a molding resin. The auto alignment mark for dicing can be visually recognized through a transparent resin protective film or a molding resin.

According to a third aspect of the present invention, a bump or a gold ball is formed on an electrode of a semiconductor chip formed on a substrate, and then the surface of the semiconductor chip is made transparent. Alternatively, the means for solving the above problem is to cover with a translucent resin protective film or a molding resin, and then expose the bumps or gold balls on the surface of the resin protective film or the molding resin.

According to this manufacturing method, the surface of the semiconductor chip is covered with the transparent or translucent resin protective film or the molding resin. It becomes possible to visually recognize the alignment mark.

According to a seventh aspect of the present invention, in the method of manufacturing a resin-encapsulated semiconductor device, a plurality of semiconductor chips are formed on a substrate, alignment marks for dicing are formed, and the surface of the semiconductor chip is transparent or translucent. The resin protective film or the molding resin is covered with a resin wafer, and the bump or the gold ball formed on the electrode of the semiconductor chip is exposed on the surface of the resin protective film or the molding resin. The solution to the above-mentioned problem is to perform dicing processing based on the alignment mark for dicing detected through the resin and divide the semiconductor chips into respective semiconductor chips.

According to this manufacturing method, the surface of the semiconductor chip is covered with a transparent or translucent resin protective film or a molding resin, and the dicing alignment mark detected through the resin protective film or the molding resin is used as a basis. Since dicing is performed to divide the semiconductor chips into individual semiconductor chips, accurate dicing can be performed.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail.
1 (a) to 1 (e) and 2 (a) to 2 (c) are views for explaining a first embodiment of a method of manufacturing a resin-sealed semiconductor device according to claim 8 of the present invention. is there. In this example, as shown in FIG. 1A, a large number of semiconductor chips (not shown) are formed, 6 to 12 inches in diameter, and the thickness of the back-side ground grooves is 4 mm.
A silicon semiconductor wafer (substrate) 1 of about 00 μm is prepared. A passivation film 3 having a thickness of about 0.5 to 1.0 μm is formed on the semiconductor wafer 1 with an aluminum pad (Al pad) 2 serving as an electrode of the semiconductor chip exposed, and the semiconductor chips are individually partitioned. A scribe line 4 having a width of about 80 to 100 μm is formed as described above, and a dicing auto alignment mark 5 of, for example, a red cross mark is formed on the passivation film 3 by an Al film. Then, a resist film 6 is formed at a position other than immediately above the Al pad 2 by a known photolithography technique.

Next, a chromium (Cr) film 7 is formed on the entire upper surface of the semiconductor wafer 1 by vapor deposition or sputtering.
Is formed to a thickness of about 50 to 100 nm, and then copper (C
u) The film 8 is formed to a thickness of about 1 to 2 μm. here,
The Cr film 7 is for improving the adhesion between the Al pad 2 and the Cu film 8. Subsequently, an unnecessary Cr film 7 on the resist film 6 is removed by a lift-off method for removing the resist film 6.
Then, the Cu film 8 is removed, and as shown in FIG.
A barrier metal layer 9 made of a laminated film of Cr and Cu is formed only on the pad 2.

Next, as shown in FIG. 1D, a solder bump 10 having a height of about 80 to 100 μm is formed on the barrier metal layer 9. As a method for forming the solder bump 10, a conventionally known forming method such as a super-jafit method, a super solder method, or a beam solder PC method can be employed. Here, the Super Jaffite method is
The surface of the barrier metal layer 9 is treated with a chemical to form an adhesive film, and the adhesive film is brought into contact with the solder powder to cause the solder powder to adhere to the surface of the barrier metal layer 9;
This is a method for forming the solder bumps 10, and the bumps 10 made of lead (Pb) -free Sn-Ag-based or Sn-Zn-based solder are formed.

The super solder method is a method in which a solder powder is not contained in a system, a solder is synthesized in a paste by a reaction from an organic acid lead and an organic acid tin, and the solder is deposited on copper to form a solder bump 10. In addition, the bump 10 made of Sn-Pb based solder is formed. The beam solder PC method is a method in which tin and lead are deposited on a copper surface by a substitution reaction based on a galvanic cell composed of base copper, tin and lead to form a film, and then the solder bumps 10 are formed by electrolytic plating. The bump 10 made of Sn-Pb-based solder is formed.

After the solder bumps 10 are formed in this manner, a transparent or translucent resin protective film 11 having a thickness of about 5 to 10 μm is formed on the entire upper surface of the semiconductor wafer 1 as shown in FIG. The resin protective film 11 is made of a transparent or translucent resin such as polyimide, epoxy, epoxy acrylate, acrylic, silicone, polyimide silicone, and the like, and is formed by a coating agent made of the transparent or translucent resin. Is spin-coated on the upper surface of the semiconductor wafer 1 and cured under predetermined conditions. When the resin protective film 11 is formed in this manner, the solder bumps 10 are covered with the resin protective film 11. Before curing, it is desirable to remove air bubbles existing in the resin protective film and to perform defoaming by heating under pressure or under reduced pressure in order to improve the adhesion to the surface of the semiconductor wafer and the bumps. Heating is performed at a temperature lower than the curing temperature, for example, 50
８０80 ° C., pressurization is 5-10 kg / cm ² of air or N ₂
Vacuum conditions of 10 ^{−2 to 1} Torr are desirable for gas and reduced pressure.

The formation of the resin protective film 11 allows
The dicing auto-alignment marks 5 and the scribe lines 4 on the semiconductor wafer 1 are also covered with the resin protective film 11, but these dicing auto-alignment marks 5 and the scribe lines 4 are transparent or translucent resin protective films. Needless to say, it can be visually recognized through 11. That is, the description “transparent or translucent” in this specification means a state in which the underlayer has such a degree of transparency as to be visible.

Here, specifically, as the curing treatment, in the case of transparent or translucent polyimide, 180 to 200 ° C.
For about 1 hour, and in the case of transparent or translucent epoxy, heat and cure at 120 to 150 ° C. for about 2 to 3 hours. In the case of transparent or translucent silicone, it is heated for about 1 to 150 ° C. for about 1 hour. Harden. Also,
2000 to 300 for transparent or translucent epoxy
After UV-curing treatment of about 0 (mJ / cm ² ), 1
Heat curing treatment may be performed at 00 to 130 ° C. for about 30 minutes. Further, in the case of transparent or translucent acrylic, 10
00~3000 (mJ / cm ²⁾ degree ultraviolet radiation curing treatment and may, in the case of transparent or translucent epoxy acrylates, 2000~3000 (mJ / cm ²⁾ was much ultraviolet radiation curing treatment, 80 to 100 ° C. For about 60 minutes.

Next, the resin protective film 11 and the solder bumps 10 are coated with a polishing cloth of a urethane foam or a nonwoven fabric substrate and a cerium oxide-based slurry to form a resin protective film 11 having a thickness of 5 mm.
Polishing is performed to a thickness of about 0 μm, and FIG.
As shown in FIG.
Expose to one surface. Then, by the electroless plating method,
As shown in FIG.
A flash gold plating layer 12 of about 02 to 0.03 μm is formed. Further, if necessary, a predetermined semiconductor wafer (chip) thickness is obtained by grinding the back surface of the semiconductor wafer. An ultraviolet irradiation curing type tape is bonded to the surface of the semiconductor wafer, and in this state, the back surface of the semiconductor wafer is ground. A semiconductor wafer having a thickness is obtained.

Next, a dicing support tape 13 having a thickness of about 90 μm is bonded to the back surface (lower surface) of the semiconductor wafer 1. Thereafter, the alignment mark 5 for dicing, for example, a red cross mark is detected through the resin protective film 11, and based on this, the dicing blade 14 is used to dice the support tape 13 for dicing from 30 to 30 as shown in FIG.
A full-cut dicing process is performed under conditions of cutting about 40 μm, and the resultant is divided into semiconductor chips to obtain a resin-sealed semiconductor device.

Here, as the support tape 13 for dicing, it is preferable to use an ultraviolet irradiation-curable tape in order to prevent chip breakage or chipping at the time of peeling. After the cut dicing, the pressure-sensitive adhesive of the tape is cured by ultraviolet irradiation treatment, and the tape is peeled off. With respect to dicing, a dual dicer is used to perform bevel cut to cut the resin protective film 11 into a tapered shape with a dicing blade 14a, or to perform step cut to cut wider than the scrub line width of the semiconductor wafer 1. However, the life of the dicing blade 14b can be extended, which is preferable. In particular, it is more preferable to perform the bevel cut because the chipping failure of the resin protective film 11 can be reduced.

As the dual dicer, specifically, a thick blade 14a and a thin blade 14b are used as shown in FIG. Thick blade 14a is Ni
It is an electroformed blade having a large particle size, and mainly comprises a resin protective film 11.
Or bevel (taper) cut or step cut of a molding resin described later. On the other hand, the thin blade 14b is an electroformed blade having a small Ni grain size, and is mainly composed of the semiconductor wafer 1 and the dicing support tape 13.
Used for cutting.

In such a method of manufacturing a resin-encapsulated semiconductor device, the surface of the semiconductor chip is covered with a resin protective film 11 and the dicing alignment marks 5 detected through the resin protective film 11 are used as a basis. Since dicing is performed and the semiconductor chips are divided into individual semiconductor chips, pelletization can be performed with accurate dicing, and a high-yield, high-quality, and highly reliable chip size package can be obtained.

Although the flash gold plating layer 12 is formed on the solder bumps 10 in the above-described example, the substrate on which the obtained resin-encapsulated semiconductor device is mounted is flat, and the resin-encapsulated semiconductor device is electrically connected. If the bumps to be electrically connected are not formed, instead of forming the flash gold plating layer 12, solder screen printing is performed on the resin protective film 11 and a new reflow process is performed to separate the bumps on the solder bumps 10. May be formed. Note that the solder bump 10 preferably has a higher melting point than another solder bump provided thereon. Also, it is desirable that the other solder bumps be Pb-free solder. In addition, the anisotropic conductive film is used for mounting on the substrate without forming the flash gold plating layer 12, and the solder bump 10 of the resin-encapsulated semiconductor device is connected to the conductive portion of the substrate via the anisotropic conductive film. You may make it do. It should be noted that a flash gold plating layer is not required on the solder bump surface when dirt or an oxide film is removed from the surface of the solder bump by plasma etching or the like immediately before mounting on the mount substrate.

FIGS. 3A to 3D are views for explaining a second embodiment of the method of manufacturing a resin-sealed semiconductor device according to claim 8 of the present invention. In this example, FIG.
As in the steps shown in FIGS.
As shown in FIG. 1, a solder bump 10 made of a lead (Pb) -free Sn-Ag-based or Sn-Zn-based solder is formed on the barrier metal layer 9 to a height of about 50 to 60 μm.

After the solder bumps 10 are formed in this manner, the entire upper surface of the semiconductor wafer 1 is sealed with a molding resin using a mold. Here, resin sealing with a mold is performed as shown in FIGS. First, the semiconductor wafer 1 on which the solder bumps 10 shown in FIG. 3A are formed is set on a lower mold 15a as shown in FIG. 4A. At this time, the transparent or translucent epoxy-based molding resin material 16 is used.
Is set almost at the center of the semiconductor wafer 1. The lower mold 15a and the upper mold 1 forming a pair with the lower mold 15a
5b is heated to 150 to 170 ° C., which is the thermosetting temperature of the molding resin material 16. The lower mold 15a
The release film 17 is set between the upper mold 15b and the upper mold 15b as described later. Generally, the molding resin material 16 may be one or several resin tablets or a granular resin of about several mm, but in this case, vacuum molding is necessary as a measure against voids.

Next, as shown in FIG.
a and the upper mold 15b are combined, and the semiconductor wafer 1 is sealed with a molding resin. Here, the molding die 15 composed of the lower die 15a and the upper die 15b will be described in detail. As shown in FIG. 5, the molding die 15 is configured to be able to move up and down, and to be separated from the upper surface thereof. It comprises a lower mold 15a having a vacuum suction hole subjected to a mold treatment, and an upper mold 15b which is also configured to be able to move up and down and has a lower surface subjected to a mold release treatment. Mold 15a
And a support ring 18 for setting the release film 17 between the upper mold 15b and the upper mold 15b.
Here, as the mold releasing treatment of the lower mold 15a and the upper mold 15b, nickel / T by electrolytic plating or electroless plating is used.
It is preferably formed by a composite plating film of PFE or nickel / BN (boron nitride) eutectoid.

The support ring 18 includes an inner ring 18a and an outer ring 18b, and the release film 17 is fixed by sandwiching the release film 17 therebetween. In addition, as the release film 17, for example, a heat-resistant, gas-barrier film formed by coating one or both surfaces with a release material, such as Teflon, a film of aramid, liquid crystal polymer, polyimide, polyetherimide, or the like is used. Can be These Teflon-coated films have high heat resistance (Teflon softening temperature; about 250 ° C.) and high releasability, so that they can be reused.

The resin sealing with the molding resin on the semiconductor wafer 1 is performed as follows. (1) The semiconductor wafer on which the solder bumps or gold balls are formed is set on the lower mold 15a, and a predetermined amount of granular resin having a size of about several mm is set on the semiconductor wafer. In the case of a resin tablet, one or several resin tablets of an appropriate size are set. (2) The release film 17 is moved to the upper mold 15b and the lower mold 15
Close the mold with a. (3) The air in the space surrounded by the release film 17 and the lower mold 15a is sucked through the vacuum port. (4) Simultaneously with evacuation, the lower mold 15b is raised to melt the resin by the heat and pressure of the sealing mold, spread over the surface of the semiconductor wafer, and held in the mold to thermally cure the resin. At this time, the gas in the melted resin and the air in the space are forcibly discharged, so that a molding resin having no voids and good adhesion is formed on the surface of the semiconductor wafer. (5) The release film 17 to which the semiconductor wafer has adhered is removed from the mold. (6) The release film 17 is peeled off from the semiconductor wafer.

When resin sealing by molding resin molding is performed by using such a molding die 15, FIG.
The upper mold 15b and the lower mold 15a are separated from each other as shown in FIG. At this time, since the Teflon-coated surface of the release film 17 is in contact with the molding resin surface of the semiconductor wafer 1, the release is easily performed without any trouble. Since the release film 17 is flexible,
The solder bumps 10 on the surface of the semiconductor wafer 1 are exposed with their tops slightly projecting without being covered with the molding resin. Further, the molding resin 19 slightly enters between the back surface of the semiconductor wafer 1 and the lower mold 15a, but is removed by a subsequent dicing support tape or removed by grinding the back surface.

Next, the surface of the semiconductor wafer 1 taken out of the molding die 15 on the side of the molding resin 19 is polished with an abrasive such as cerium oxide, and as shown in FIG. Is exposed on the surface of the molding resin 19 so that the layer thickness of the molding resin 19 is 30 μm.
Degree. At this time, if necessary, the semiconductor wafer 1 is polished on the back surface to reduce the thickness (for example, from 400 μm to 10 μm).
0 μm) and then a predetermined thickness (for example, the entire thickness including the molding resin 19 is about 80 to 100 μm) by double-side polishing. Further, lightly etching solution HF-HNO ₃ based as needed (several μm
About) Silicon etching may be performed to remove polishing distortion to further improve chip strength.

Next, FIG.
As shown in (c), a thickness of 0.02
A flash gold plating layer 12 of about 0.03 μm is formed. Subsequently, a dicing support tape 13 having a thickness of about 90 μm is bonded to the back surface (lower surface) of the semiconductor wafer 1 as in the above example. Thereafter, the alignment mark 5 for dicing is detected through the transparent or translucent molding resin 19 as in the previous example, and based on this, the dicing alignment mark 5 is shown in FIG.
As shown in (1), the dicing blade 14 performs a full-cut dicing process under conditions of cutting the dicing support tape 13 by about 30 to 40 μm, and the resultant is divided into semiconductor chips to obtain a resin-encapsulated semiconductor device.

Even in such a method of manufacturing a resin-encapsulated semiconductor device, a transparent or translucent molding resin 1 may be used.
9 covers the surface of the semiconductor chip, performs dicing based on the dicing alignment mark 5 detected through the molding resin 19, and divides the semiconductor chip into individual semiconductor chips, so that pelletizing can be performed with accurate dicing. Thus, a chip size package with high yield, high quality, and high reliability can be obtained.

In this embodiment, another solder bump may be formed on the solder bump 10 without forming the flash gold plating layer 12 on the solder bump 10 as in the previous embodiment. Flash gold plating layer 12
May be mounted on a substrate using an anisotropic conductive film without forming the conductive film. In this example, compression molding is performed. However, as a molding method, a transfer molding method, an injection molding method, an extrusion molding method, or the like may be used instead. However, since there are no gold wires on the semiconductor chip and only solder bumps or gold ball bumps are formed, it is desirable to employ a compression molding method in which molding conditions are simple.

FIGS. 6A to 6E are views for explaining a third embodiment of the method for manufacturing a resin-sealed semiconductor device according to claim 8 of the present invention. In this example, as in the example shown in FIG. 1, a large number of semiconductor chips (not shown) are formed as shown in FIG.
A 6 ″ to 12 ″ φ semiconductor wafer 20 made of silicon is prepared. On the semiconductor wafer 20, a surface protection film 22 made of Si ₃ N ₄ is formed in a state where an aluminum pad (Al pad) 21 formed on the semiconductor chip is exposed, and the width is set so as to individually divide the semiconductor chip. 8
A scribe line 23 of about 0 to 100 μm is formed, and a dicing auto-alignment mark 24 such as a red cross mark is formed on the surface protective film 22.
It is formed of a film.

Then, an outer diameter of 80 to 90 μm and a height of 50 to 60 μm are formed on the aluminum pad 21 of the semiconductor wafer 20 thus prepared by a wire bonder.
Is formed. Next, in the same manner as in the example shown in FIG. 1, a transparent or translucent resin protective film 26 having a thickness of about 5 to 10 μm is formed on the entire upper surface of the semiconductor wafer 20 as shown in FIG. This resin protective film 2
6 is the same as the resin protective film 11 shown in FIG. 1, and the same applies to the formation method 1 and the like. Further, instead of forming the resin protective film 26, the semiconductor wafer 20 is formed as shown in FIG.
50-thickness almost the same as the gold ball bump 25 on the entire upper surface of
Transparent or translucent molding resin of about 60 μm 2
7 may be formed.

Next, polishing is performed in the same manner as in the example shown in FIG. 1 or the example shown in FIG. 3, and as shown in FIG.
The height of the gold ball bump 25 is about 30 μm while the thickness is about 0 μm. The gold ball bump 25
Can be changed as appropriate.

Subsequently, the back surface (lower surface) of the semiconductor wafer 1
Then, a dicing support tape 28 having a thickness of about 90 μm is bonded as in the previous example, and then the dicing alignment mark 24 is passed through the resin protective film 26 or the molding resin 27 as in the previous example. Based on this, based on this, as shown in FIG. 6E, a dicing blade 14 is used to perform a full-cut dicing process in which the dicing support tape 28 is cut by about 30 to 40 μm. A semiconductor device having a stop type is obtained.

Even in such a method of manufacturing a resin-encapsulated semiconductor device, the surface of the semiconductor chip is covered with a transparent or translucent resin protection film 26 or molding resin 27, and the resin protection film 26 or molding resin is formed. 27
Mark 24 for dicing detected through
The semiconductor chip is divided into individual semiconductor chips based on the dicing method, so that the pelletization can be performed with accurate dicing, thereby obtaining a chip size package with high yield, high quality, and high reliability.

FIGS. 7A to 7D are views for explaining a fourth embodiment of the method of manufacturing a resin-sealed semiconductor device according to claim 8 of the present invention. In this example, similarly to the example shown in FIG. 1, a plurality of semiconductor chips (not shown) are formed as shown in FIG.
6-12 inch φ semiconductor wafer 1 made of silicon
Prepare Next, in the same manner as in the example shown in FIGS. 1A to 1E, as shown in FIG.
To form In place of the formation of the solder bump 10, the semiconductor wafer 2 is formed in the same manner as in the example shown in FIG.
0, and the gold ball bump 25 may be formed thereon. (Hereinafter, the case of the semiconductor wafer 1 will be described.)

Next, as shown in FIG. 7 (b), a dam (wall) 29 made of a highly damp resin is formed around the semiconductor wafer 1 by a dispense method.
As a resin for forming the dam 29, transparent, translucent or opaque polyimide, epoxy, acrylic, epoxy acrylate, silicone, polyimide silicone, or the like is used.

Next, a transparent or translucent resin is potted on the semiconductor wafer 1 and cured at the same time as the dam resin under a predetermined condition to form a transparent or translucent resin protective film as shown in FIG. Form 30. As a resin for forming the resin protective film 30, transparent or translucent polyimide, epoxy, acrylic, epoxy acrylate, silicone, polyimide silicone, or the like is used. The resin for forming the dam 29 and the resin protective film 3
For the transparent or translucent resin for 0, it is preferable to use a resin that is an ultraviolet irradiation-curable type and a heat-curable type. In that case, the curing conditions include, for example, 2000 to 3
UV irradiation at 000 (mJ / cm ² ) and 80-13
Heating at 0 ° C. for 30-60 minutes is employed.

Next, polishing is performed in the same manner as in the example shown in FIGS. 1 (a) to 1 (e), and as shown in FIG.
9. Process the resin protective film 30 and the solder bumps 10 (or the gold ball bumps 25) to a predetermined height (for example, about 30 μm). Thereafter, as in the examples shown in FIGS. 1A to 1E, a dicing alignment mark (not shown) is detected through the resin protective film 30, and based on this, a dicing alignment mark is shown in FIG.
A full-cut dicing process is performed by using a dicing blade as shown in FIG.

Even in such a method of manufacturing a resin-sealed semiconductor device, the semiconductor chip surface is covered with a transparent or translucent resin protective film 30 and the alignment for dicing detected through the resin protective film 30 is detected. Since dicing is performed based on the mark and the wafer is divided into individual semiconductor chips,
Pelletization can be performed by accurate dicing, and thereby, a chip size package with high yield, high quality, and high reliability can be obtained.

FIGS. 8A to 8D are views for explaining a fifth embodiment of the method for manufacturing a resin-sealed semiconductor device according to claim 8 of the present invention. In this example, as in the example shown in FIG. 1, solder bumps 10 are formed on a semiconductor wafer 1 having a diameter of 6 to 12 inches as shown in FIG.
Subsequently, a resin protective film 11 or a molding resin 19 is formed of a transparent or translucent resin, and after performing a polishing process, a flash gold plating layer 12 is formed.
The semiconductor wafer 1 has a thickness of 700 in this example.
Those having a size of about 800 μm are used.

Next, a transparent and heat-shrinkable ultraviolet irradiation curing type tape 31 is bonded to the side on which the flash gold plating layer 12 is formed. As the ultraviolet radiation curing type tape 31, for example, a tape made of a uniaxially stretched base film having a thickness of about 40 μm and an acrylic ultraviolet radiation curing adhesive having a thickness of about 40 μm is used.

Next, as shown in FIG. 8B, the back surface of the semiconductor wafer 1 is reduced to a thickness of about 100 μm by a grinding method and an etching method. Specifically, first, a 400 μm-thick finish is performed by one-axis # 400 by in-feed grinding, and then 200 μm by two-axis # 2000.
m thickness finish, and then 100
Perform a μm thick finish.

Next, as shown in FIG. 8C, a dicing support tape 13 having a thickness of about 90 μm is bonded to the back surface (lower surface) of the semiconductor wafer 1. Subsequently, the dicing alignment mark 5 is detected through the resin protective film 11 or the molding resin 19 while the ultraviolet irradiation curing type tape 31 is adhered, and based on this, the dicing blade 14 is used for dicing. Support tape 13
A full-cut dicing process is performed under conditions of cutting at about 0 to 40 μm, and the resultant is divided into semiconductor chips to obtain a resin-sealed semiconductor device.

Next, ultraviolet rays are applied to the dicing support tape 13 and the ultraviolet radiation curing type tape 31, for example, for 200 hours.
Irradiation at ~ 400 mJ / cm ² for curing, then
As shown in FIG. 8D, the resin-encapsulated semiconductor device 32 is vacuum-adsorbed and held on the semiconductor wafer 1 side using a collet 33, and is blown with hot air of about 120 to 150 ° C. to irradiate heat shrink ultraviolet rays. The curable tape 31 is peeled off by itself, and the resin-sealed semiconductor device 32 is mounted at a predetermined position.

Even in such a method of manufacturing a resin-encapsulated semiconductor device, the surface of a semiconductor chip is covered with a transparent or translucent resin protective film 11 or a molding resin 19, and the resin protective film 11 or the molding resin is formed. 1
9 for dicing alignment mark 5 detected through
The semiconductor chip is divided into individual semiconductor chips based on the dicing method, so that the pelletization can be performed with accurate dicing, thereby obtaining a chip size package with high yield, high quality, and high reliability. Further, if the surface of the solder bumps 10 is protected by using a heat shrinkable ultraviolet irradiation curing type tape 31 having no adhesive residue problem, the soldering property is improved at the time of mounting on the mounting board, and chip cracking and chipping are also prevented. Thus, productivity, quality and reliability can be improved and cost can be reduced.

Although not particularly specified in the above embodiment, the electrode pads 2 of the semiconductor chip may be peripheral pads arranged at the periphery of the chip, or may be rearranged at appropriate positions in the chip. Area pad.

[0053]

As described above, in the resin-encapsulated semiconductor device of the present invention, the semiconductor chip surface is covered with a transparent or translucent resin protective film or molding resin. The dicing process is performed based on the alignment marks for dicing detected through the resin protective film or the molding resin, and the semiconductor chips can be divided into individual semiconductor chips. This results in a high quality, high reliability chip size package. Further, since the semiconductor chip is protected by the resin protective film or the molding resin, damage to the chip surface is reduced, moisture resistance is improved, and quality and reliability are improved.

Furthermore, conventionally, when a chip is found to be defective in a functional test or burn-in after connecting to a mounting substrate with a flip chip bonder, a connecting material is removed by applying mechanical force or heating. After removing the chip and cleaning the mounting substrate, a new bare chip was placed, and after confirming that it was a good product, the sealing resin was injected between the chip and the mounting substrate, and the resin was cured. Since the resin-encapsulated semiconductor device is already resin-encapsulated,
Injection + curing work is not required, and productivity, quality and reliability are improved. In addition, since there is a gap between the chip and the mounting substrate, stress on the bump due to a difference in thermal expansion coefficient between the chip and the mounting substrate is reduced, and the reliability of the bump connection is increased. Also, since there is a gap between the chip and the mounting board, it is easy to replace defective chips,
Cleaning of the mounting substrate is easy.

The method of manufacturing a resin-encapsulated semiconductor device according to claim 3 of the present invention is a method in which a semiconductor chip surface is covered with a transparent or translucent resin protective film or a molding resin. The dicing auto alignment mark can be visually recognized through the protective film or the molding resin, and the dicing process can be performed based on the dicing auto alignment mark. Can do, high yield, high quality,
A highly reliable chip size package can be obtained.

According to a seventh aspect of the present invention, in a method of manufacturing a resin-encapsulated semiconductor device, the surface of a semiconductor chip is covered with a transparent or translucent resin protective film or a molding resin, and the resin protective film or the molding resin is removed. Since the dicing process is performed based on the alignment marks for dicing detected through the semiconductor chip to divide the semiconductor chips into individual semiconductor chips, accurate dicing can be performed to achieve high yield and high yield. A chip size package with high quality and high reliability can be obtained.

The exposed surface of the bump or the gold ball is
By performing precision grinding or polishing, the flatness is enhanced, and mounting on a printed circuit board or the like can be performed with high precision, thereby improving productivity, quality, and reliability. In addition, if a semiconductor wafer with bumps or gold balls before being sealed with a resin protective film or molding resin is treated with a silane coupling agent, a resin protective film or molding resin and a passivation film or bumps or gold balls can be used. This improves the adhesion to the substrate, so that the quality and reliability can be improved.

Further, if a resin protective film of fluorine-containing polyimide, epoxy, acrylic, or the like is used, or if a fluorine-containing epoxy, polyimide, or acrylic resin is molded, water repellency is increased, and external The quality and reliability can be improved by reducing solder bump corrosion, Al corrosion and the like due to water intrusion. In addition, by forming stud bumps of gold balls only on non-defective chips, the surface of the semiconductor chip is covered with a resin protective film or a molding resin, thereby facilitating GO / NG discrimination of the chip and improving productivity. can do.

When performing compression molding, a Teflon-coated film having high heat resistance and gas barrier properties may be inserted between the upper mold and the molten transparent resin and bumps or gold balls. Although the spaces are in close contact with each other, they can be easily peeled off due to the releasability of Teflon (ethylene tetrafluoride resin), so that the workability can be improved. Further, since this film has high heat resistance and releasability, it can be used repeatedly and many times, so that the cost can be reduced. Also, the thickness of the package,
It can be made arbitrarily thinner than conventional various systems, and can be mounted on a memory card or the like in multiple stages, mounted on an ISO standard card, and the like.

Further, it is possible to reduce the mounting area by making the package size and the chip the same size, thereby enabling high-density mounting. In addition, since wire bonding to the lead is not required, the arrangement of the electrode pads is relatively free, and it is easy to handle the peripheral pads and the area pads. Therefore, it is not necessary to uselessly route the circuit, and higher integration of the semiconductor chip can be realized. Also, when performing batch reflow soldering or thermocompression bonding with hot air, infrared rays, etc., the chip surface is exposed, so the heat conduction efficiency up to the bumps is high, and mounting can be performed in a shorter time than before, thereby improving productivity. Can be.

Further, since there is no lead frame, steps such as die bonding and lead processing become unnecessary, and defects caused by lead bending, coplanarity, lead plating and the lead frame are eliminated. Therefore, the yield, quality, and productivity are improved, material costs such as Ag paste and lead frame are eliminated, and a die bonder (a wire bonder is not required for solder bumps. However, a gold ball bonder is required for stud bumps) and leads. It is possible to realize a significant cost reduction due to a reduction in capital investment due to the elimination of processing materials and a reduction in production lead time.

[Brief description of the drawings]

FIGS. 1A to 1E are cross-sectional views of a main part for describing a first embodiment of a method of manufacturing a resin-sealed semiconductor device according to the present invention in the order of steps.

2 (a) to 2 (c) are cross-sectional side views of main parts for describing a step following FIG. 1 (e).

FIGS. 3A to 3D are cross-sectional side views of a main part for describing a second embodiment of the method of manufacturing the resin-encapsulated semiconductor device of the present invention in the order of steps.

FIGS. 4 (a) to 4 (c) show examples in the example shown in FIG.
It is a figure for explaining the process of molding resin sealing.

FIG. 5 is a schematic configuration diagram of a molding die.

6 (a) to 6 (e) are cross-sectional views of a main part for describing a third embodiment of a method of manufacturing a resin-sealed semiconductor device according to the present invention in the order of steps.

FIGS. 7A to 7D are side sectional views of a main part for describing a fourth embodiment of a method of manufacturing a resin-sealed semiconductor device according to the present invention in the order of steps.

FIGS. 8A to 8D are side sectional views of a main part for describing a fifth embodiment of a method of manufacturing a resin-sealed semiconductor device according to the present invention in the order of steps.

[Explanation of symbols]

1, 20: semiconductor wafer, 5, 24: auto alignment mark for dicing, 10: solder bump, 11, 12
6, 30: resin protective film, 17: release film, 19, 2
7: molding resin, 25: gold ball bump, 32 ...
Resin-sealed semiconductor device

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 21/60 H01L 21/92 602L 23/29 604A 23/31 23/30 RF term (Reference) 4M109 AA02 BA03 CA10 CA21 CA22 DA10 EA02 EA07 EA10 EB06 EB18 EC01 ED01 EE12 GA03 GA06 5F061 AA02 BA03 CA10 CA21 CA22 CB02 CB04 CB12 DA01 DA06 DA09 DA11 DA12 DA14 DE03 DE04 FA03 GA01

Claims (23)

[Claims] A bump or a gold ball is provided on an electrode of a semiconductor chip formed on a substrate, and the surface of the semiconductor chip is covered with a transparent or translucent resin protective film or a molding resin; A resin-encapsulated semiconductor device, wherein bumps or gold balls are exposed on the surface of the resin protective film or the molding resin. 2. The resin-encapsulated semiconductor device according to claim 1, wherein the resin protective film or the molding resin is made of a fluorine-added material. 3. A bump or a gold ball is formed on an electrode of a semiconductor chip formed on a substrate, and the surface of the semiconductor chip is covered with a transparent or translucent resin protective film or a molding resin. A method of manufacturing a resin-encapsulated semiconductor device, wherein a bump or a gold ball is exposed on the surface of the resin protective film or the molding resin. 4. After the surface of the semiconductor chip is covered with a resin protective film or a molding resin, the surface of the resin protective film or the molding resin is ground or polished, and the bumps are removed from the surface of the resin protective film or the molding resin. 4. The method according to claim 3, wherein the gold balls are exposed. 5. The method according to claim 3, wherein the resin protective film or the molding resin is made of a fluorine-added material. 6. The resin-sealing mold according to claim 3, wherein the surface of the semiconductor chip is treated with a silane coupling agent before being covered with a transparent or translucent resin protective film or a molding resin. A method for manufacturing a semiconductor device. 7. A plurality of semiconductor chips are formed on a substrate, alignment marks for dicing are formed, the surface of the semiconductor chip is covered with a transparent or translucent resin protective film or molding resin, and formed on electrodes of the semiconductor chip. A dicing process is performed on a semiconductor wafer formed by exposing the formed bumps or gold balls on the surface of the resin protective film or the molding resin, based on alignment marks for dicing detected through the resin protective film or the molding resin. And dividing the semiconductor chip into individual semiconductor chips. 8. The dicing is performed by bevel cut using a dual dicer to cut the resin protective film or the molded resin into a taper shape, or by step cut to cut wider than the substrate. The manufacturing method of the resin-sealed semiconductor device according to the above. 9. The method for manufacturing a resin-encapsulated semiconductor device according to claim 7, wherein when the surface of the semiconductor chip is covered with a molding resin, the molding resin is formed by a vacuum molding method. 10. A heat-resistant, high-gas-barrier film coated with a release resin between an upper mold die and a semiconductor wafer on which bumps or gold balls are formed when molding a resin by vacuum forming. 10. The method for manufacturing a resin-encapsulated semiconductor device according to claim 9, wherein 11. An inner surface of an upper mold die and a lower mold die used for the molding resin molding is formed by co-depositing tetrafluoroethylene resin or boron nitride in nickel by electrolytic or electroless plating. 10. The method for manufacturing a resin-sealed semiconductor device according to claim 9, wherein a release treatment is performed by a composite plating layer. 12. The method according to claim 7, wherein the resin protective film or the molding resin is made of a fluorine-added material. 13. The resin-sealing mold according to claim 7, wherein the surface of the semiconductor chip is treated with a silane coupling agent before the surface is covered with a transparent or translucent resin protective film or a molding resin. A method for manufacturing a semiconductor device. 14. The method for manufacturing a resin-encapsulated semiconductor device according to claim 7, wherein the coated resin protective film is defoamed by heating under pressure or under reduced pressure and then cured under predetermined conditions. 15. The resin encapsulation according to claim 7, wherein a new solder bump is formed on the solder bump exposed from the resin protective film or the molded resin surface by screen printing and reflow processing of a solder paste. Of manufacturing a semiconductor device. 16. The method of manufacturing a resin-encapsulated semiconductor device according to claim 15, wherein the solder bump exposed from the resin protective film or the molded resin surface has a higher melting point than a new solder bump. 17. The method for manufacturing a resin-encapsulated semiconductor device according to claim 7, wherein the resin protective film thickness is equal to or less than the height of the solder bump or the ball bump. 18. The method for manufacturing a resin-encapsulated semiconductor device according to claim 7, wherein the molding resin is molded by a compression molding method, a transfer molding method, an injection molding method, an extrusion method, a potting method, or the like. 19. The method for manufacturing a resin-encapsulated semiconductor device according to claim 7, wherein vacuum molding is performed in the compression molding method or the transfer molding method. 20. The method of manufacturing a resin-encapsulated semiconductor device according to claim 7, wherein in the compression molding method and the transfer molding method, a granular resin is used and vacuum molding is performed. 21. The method for manufacturing a resin-encapsulated semiconductor device according to claim 7, wherein in the compression molding method or the transfer molding method, a vacuum evacuation hole is provided in the lower mold to perform vacuum molding. 22. An ultraviolet irradiation hardening tape having a high adhesive strength for dicing support is pasted, full cut dicing is performed using the exposed cross pattern on the back surface of the semiconductor wafer as an alignment mark, and an ultraviolet irradiation hardening tape having a high adhesive strength is obtained. The semiconductor chip is mounted on a carrier tape while being bonded, and thereafter, when picking up by a vacuum suction collet, the ultraviolet irradiation curing type tape having a high adhesive force is peeled off and mounted on a mounting substrate. Item 8. The method for manufacturing a resin-encapsulated semiconductor device according to Item 7. 23. Full-cut dicing using a cross pattern exposed on the back surface of a semiconductor wafer as an alignment mark by grinding the back surface and polishing the back surface of the surface protection of the thermal shrink ultraviolet ray irradiation hardening type tape, and applying the heat shrink ultraviolet ray. 8. The method for manufacturing a resin-encapsulated semiconductor device according to claim 7, further comprising: picking up with a vacuum suction collet with the curable tape adhered thereto; performing self-stripping by heat shrink with hot air blow; .