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IT1217322B - Procedimento di fabbricazione di un dispositivo nonolitico a semiconduttope comprendente almeno un transistor di un circuito integrato di comando e un transistor di rotenza in tegrato nella stessa piastrina - Google Patents

Procedimento di fabbricazione di un dispositivo nonolitico a semiconduttope comprendente almeno un transistor di un circuito integrato di comando e un transistor di rotenza in tegrato nella stessa piastrina

Info

Publication number
IT1217322B
IT1217322B IT06630/87A IT663087A IT1217322B IT 1217322 B IT1217322 B IT 1217322B IT 06630/87 A IT06630/87 A IT 06630/87A IT 663087 A IT663087 A IT 663087A IT 1217322 B IT1217322 B IT 1217322B
Authority
IT
Italy
Prior art keywords
transistor
tegrate
lithic
control circuit
device including
Prior art date
Application number
IT06630/87A
Other languages
English (en)
Other versions
IT8706630A0 (it
Inventor
Raffaelle Zambrano
Salvatore Musoneli
Original Assignee
Sgs Microelettronica Spa
Ora S G S Thomson Microelettro
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Microelettronica Spa, Ora S G S Thomson Microelettro filed Critical Sgs Microelettronica Spa
Priority to IT06630/87A priority Critical patent/IT1217322B/it
Publication of IT8706630A0 publication Critical patent/IT8706630A0/it
Priority to DE88202898T priority patent/DE3880996T2/de
Priority to EP88202898A priority patent/EP0322040B1/en
Priority to US07/287,067 priority patent/US4965215A/en
Priority to JP63322214A priority patent/JP2677644B2/ja
Application granted granted Critical
Publication of IT1217322B publication Critical patent/IT1217322B/it
Priority to US08/384,250 priority patent/USRE38510E1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
IT06630/87A 1987-12-22 1987-12-22 Procedimento di fabbricazione di un dispositivo nonolitico a semiconduttope comprendente almeno un transistor di un circuito integrato di comando e un transistor di rotenza in tegrato nella stessa piastrina IT1217322B (it)

Priority Applications (6)

Application Number Priority Date Filing Date Title
IT06630/87A IT1217322B (it) 1987-12-22 1987-12-22 Procedimento di fabbricazione di un dispositivo nonolitico a semiconduttope comprendente almeno un transistor di un circuito integrato di comando e un transistor di rotenza in tegrato nella stessa piastrina
DE88202898T DE3880996T2 (de) 1987-12-22 1988-12-16 Herstellungsverfahren für eine monolithische Halbleiteranordnung mit wenigstens einem Transistor einer integrierten Kontrollschaltung und einem auf dem gleichen Chip integrierten Leistungstransistor.
EP88202898A EP0322040B1 (en) 1987-12-22 1988-12-16 Manufacturing process for a monolithic semiconductor device comprising at least one transistor of an integrated control circuit and one power transistor integrated on the same chip
US07/287,067 US4965215A (en) 1987-12-22 1988-12-21 Manufacturing process for a monolithic semiconductor device comprising at least one transistor of an integrated control circuit and one power transistor integrated on the same chip
JP63322214A JP2677644B2 (ja) 1987-12-22 1988-12-22 半導体装置およびその製造方法
US08/384,250 USRE38510E1 (en) 1987-12-22 1995-02-06 Manufacturing process for a monolithic semiconductor device comprising at least one transistor of an integrated control circuit and one power transistor integrated on the same chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT06630/87A IT1217322B (it) 1987-12-22 1987-12-22 Procedimento di fabbricazione di un dispositivo nonolitico a semiconduttope comprendente almeno un transistor di un circuito integrato di comando e un transistor di rotenza in tegrato nella stessa piastrina

Publications (2)

Publication Number Publication Date
IT8706630A0 IT8706630A0 (it) 1987-12-22
IT1217322B true IT1217322B (it) 1990-03-22

Family

ID=11121612

Family Applications (1)

Application Number Title Priority Date Filing Date
IT06630/87A IT1217322B (it) 1987-12-22 1987-12-22 Procedimento di fabbricazione di un dispositivo nonolitico a semiconduttope comprendente almeno un transistor di un circuito integrato di comando e un transistor di rotenza in tegrato nella stessa piastrina

Country Status (5)

Country Link
US (1) US4965215A (it)
EP (1) EP0322040B1 (it)
JP (1) JP2677644B2 (it)
DE (1) DE3880996T2 (it)
IT (1) IT1217322B (it)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5529939A (en) * 1986-09-26 1996-06-25 Analog Devices, Incorporated Method of making an integrated circuit with complementary isolated bipolar transistors
USRE35642E (en) * 1987-12-22 1997-10-28 Sgs-Thomson Microelectronics, S.R.L. Integrated high-voltage bipolar power transistor and low voltage MOS power transistor structure in the emitter switching configuration and relative manufacturing process
IT1217323B (it) * 1987-12-22 1990-03-22 Sgs Microelettronica Spa Struttura integrata di transistor bipolare di potenza di alta tensione e di transistor mos di potenza di bassa tensione nella configurazione"emitter switching"e relativo processo di fabbricazione
IT1234252B (it) * 1989-06-16 1992-05-14 Sgs Thomson Microelectronics Dispositivo a semiconduttore comprendente un circuito di comando e uno stadio di potenza a flusso di corrente verticale integrati in modo monolitico nella stessa piastrina e relativo processo di fabbricazione
US5246871A (en) * 1989-06-16 1993-09-21 Sgs-Thomson Microelectronics S.R.L. Method of manufacturing a semiconductor device comprising a control circuit and a power stage with a vertical current flow, integrated in monolithic form on a single chip
EP0441635B1 (en) * 1990-02-09 1995-05-24 Canon Kabushiki Kaisha Ink jet recording system
GB2248142A (en) * 1990-09-19 1992-03-25 Koninkl Philips Electronics Nv A method of manufacturing a semiconductor device
IT1246759B (it) * 1990-12-31 1994-11-26 Sgs Thomson Microelectronics Struttura integrata di transistore bipolare di potenza e di transistore bipolare di bassa tensione nelle configurazioni ''emitter switching'' o ''semi-ponte'' e relativi processi di fabbricazione.
EP0555496B1 (en) * 1991-07-03 1997-03-26 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe Lateral bipolar transistor structure including an integrated control circuit and integrated power transistor and associated manufacturing process
IT1252102B (it) * 1991-11-26 1995-06-02 Cons Ric Microelettronica Dispositivo monolitico a semiconduttore a struttura verticale con transistore di potenza a base profonda e emettitore a dita avente resistenze di ballast
DE69331052T2 (de) * 1993-07-01 2002-06-06 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, Catania Integrierte Randstruktur für Hochspannung-Halbleiteranordnungen und dazugehöriger Herstellungsprozess
EP0632505B1 (en) * 1993-07-01 1997-10-01 Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno A vertical bipolar power transistor with buried base and interdigitated geometry
KR0171128B1 (ko) * 1995-04-21 1999-02-01 김우중 수직형 바이폴라 트랜지스터
EP0809294B1 (en) * 1996-05-21 2002-01-02 Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Power semiconductor device structure with vertical PNP transistor
EP0810662A1 (en) * 1996-05-29 1997-12-03 Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno An integrated device in an "emitter switching" configuration and with a cellular structure
EP0837507B1 (en) 1996-10-18 2004-08-18 STMicroelectronics S.r.l. A bipolar power transistor with buried base and interdigitated geometry
EP0878848A1 (en) * 1997-05-16 1998-11-18 STMicroelectronics S.r.l. Vertical bipolar semiconductor power transistor with an interdigitised geometry, with optimisation of the base-to-emitter potential difference
IT1298516B1 (it) * 1998-01-30 2000-01-12 Sgs Thomson Microelectronics Dispositivo elettronico di potenza integrato su un materiale semiconduttore e relativo processo di fabricazione
US6448160B1 (en) 1999-04-01 2002-09-10 Apd Semiconductor, Inc. Method of fabricating power rectifier device to vary operating parameters and resulting device
US6451655B1 (en) * 1999-08-26 2002-09-17 Stmicroelectronics S.R.L. Electronic power device monolithically integrated on a semiconductor and comprising a first power region and at least a second region as well as an isolation structure of limited planar dimension
US6495423B1 (en) * 1999-08-26 2002-12-17 Stmicroelectronics S.R.L. Electronic power device monolithically integrated on a semiconductor and comprising edge protection structures having a limited planar dimension
JP4508606B2 (ja) * 2003-03-20 2010-07-21 株式会社リコー 複数種類のウエルを備えた半導体装置の製造方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3481801A (en) * 1966-10-10 1969-12-02 Frances Hugle Isolation technique for integrated circuits
US4054899A (en) * 1970-09-03 1977-10-18 Texas Instruments Incorporated Process for fabricating monolithic circuits having matched complementary transistors and product
US4032372A (en) * 1971-04-28 1977-06-28 International Business Machines Corporation Epitaxial outdiffusion technique for integrated bipolar and field effect transistors
DE2351985A1 (de) * 1973-10-17 1975-04-30 Itt Ind Gmbh Deutsche Planardiffusionsverfahren zum herstellen einer monolithisch integrierten festkoerperschaltung
JPS558070A (en) * 1978-07-03 1980-01-21 Mitsubishi Electric Corp Manufacture of semiconductor
GB2023340B (en) * 1978-06-01 1982-09-02 Mitsubishi Electric Corp Integrated circuits
US4233618A (en) * 1978-07-31 1980-11-11 Sprague Electric Company Integrated circuit with power transistor
NL8006827A (nl) * 1980-12-17 1982-07-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
FR2523370B1 (fr) * 1982-03-12 1985-12-13 Thomson Csf Transistor pnp fort courant faisant partie d'un circuit integre monolithique
EP0093304B1 (en) * 1982-04-19 1986-01-15 Matsushita Electric Industrial Co., Ltd. Semiconductor ic and method of making the same
WO1984001053A1 (fr) * 1982-08-26 1984-03-15 Mitsubishi Electric Corp Dispositif a semiconducteurs
DE3368344D1 (en) * 1983-02-12 1987-01-22 Itt Ind Gmbh Deutsche Method of making bipolar planar transistors
EP0144865B1 (en) * 1983-12-05 1991-06-26 General Electric Company Semiconductor wafer with an electrically-isolated semiconductor device
IT1214806B (it) * 1984-09-21 1990-01-18 Ates Componenti Elettron Dispositivo integrato monolitico di potenza e semiconduttore
IT1214808B (it) * 1984-12-20 1990-01-18 Ates Componenti Elettron Tico e semiconduttore processo per la formazione di uno strato sepolto e di una regione di collettore in un dispositivo monoli
IT1215024B (it) * 1986-10-01 1990-01-31 Sgs Microelettronica Spa Processo per la formazione di un dispositivo monolitico a semiconduttore di alta tensione

Also Published As

Publication number Publication date
US4965215A (en) 1990-10-23
JPH022664A (ja) 1990-01-08
JP2677644B2 (ja) 1997-11-17
EP0322040A2 (en) 1989-06-28
EP0322040B1 (en) 1993-05-12
EP0322040A3 (en) 1990-02-07
IT8706630A0 (it) 1987-12-22
DE3880996D1 (de) 1993-06-17
DE3880996T2 (de) 1993-10-07

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961227