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HK1111264A1 - Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate - Google Patents

Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate

Info

Publication number
HK1111264A1
HK1111264A1 HK08105914.4A HK08105914A HK1111264A1 HK 1111264 A1 HK1111264 A1 HK 1111264A1 HK 08105914 A HK08105914 A HK 08105914A HK 1111264 A1 HK1111264 A1 HK 1111264A1
Authority
HK
Hong Kong
Prior art keywords
semiconductor substrate
semiconductor
manufacturing
semiconductor device
substrate
Prior art date
Application number
HK08105914.4A
Other languages
English (en)
Inventor
Maxim Odnoblyudov
Vladislav Bougrov
Alexei Romanov
Teemu Lang
Original Assignee
Optogan Oy Tietotie
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Optogan Oy Tietotie filed Critical Optogan Oy Tietotie
Publication of HK1111264A1 publication Critical patent/HK1111264A1/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H01L29/045Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02458Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02505Layer structure consisting of more than two layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)
  • Chemical Vapour Deposition (AREA)
HK08105914.4A 2004-12-14 2008-05-28 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate HK1111264A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI20045482A FI20045482A0 (fi) 2004-12-14 2004-12-14 Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi
PCT/FI2005/000233 WO2006064081A1 (en) 2004-12-14 2005-05-19 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate

Publications (1)

Publication Number Publication Date
HK1111264A1 true HK1111264A1 (en) 2008-08-01

Family

ID=33548081

Family Applications (1)

Application Number Title Priority Date Filing Date
HK08105914.4A HK1111264A1 (en) 2004-12-14 2008-05-28 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate

Country Status (10)

Country Link
US (2) US20080308841A1 (fi)
EP (1) EP1834349A1 (fi)
JP (1) JP2008523635A (fi)
KR (1) KR101159156B1 (fi)
CN (1) CN100487865C (fi)
FI (1) FI20045482A0 (fi)
HK (1) HK1111264A1 (fi)
RU (1) RU2368030C2 (fi)
TW (1) TW200639926A (fi)
WO (1) WO2006064081A1 (fi)

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JP5749888B2 (ja) * 2010-01-18 2015-07-15 住友電気工業株式会社 半導体素子及び半導体素子を作製する方法
JP6090998B2 (ja) * 2013-01-31 2017-03-08 一般財団法人電力中央研究所 六方晶単結晶の製造方法、六方晶単結晶ウエハの製造方法
US9564494B1 (en) * 2015-11-18 2017-02-07 International Business Machines Corporation Enhanced defect reduction for heteroepitaxy by seed shape engineering
JP2017178769A (ja) * 2016-03-22 2017-10-05 インディアン インスティテゥート オブ サイエンスIndian Institute Of Science 横方向に配向した低欠陥密度で大面積の金属窒化物アイランドのプラットフォームおよびその製造方法
RU2753180C2 (ru) * 2017-02-16 2021-08-12 Син-Эцу Кемикал Ко., Лтд. Слоистая подложка из полупроводникового соединения, способ ее изготовления и полупроводниковый элемент
CN112930605B (zh) * 2018-09-07 2022-07-08 苏州晶湛半导体有限公司 半导体结构及其制备方法
CN114600248A (zh) * 2019-10-29 2022-06-07 京瓷株式会社 半导体元件和半导体元件的制造方法
CN113921664B (zh) * 2021-10-11 2023-01-06 松山湖材料实验室 一种高质量氮化物紫外发光结构的生长方法

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Also Published As

Publication number Publication date
CN101080808A (zh) 2007-11-28
CN100487865C (zh) 2009-05-13
FI20045482A0 (fi) 2004-12-14
TW200639926A (en) 2006-11-16
RU2007126749A (ru) 2009-01-27
US20080308841A1 (en) 2008-12-18
EP1834349A1 (en) 2007-09-19
KR101159156B1 (ko) 2012-06-26
US20120064700A1 (en) 2012-03-15
JP2008523635A (ja) 2008-07-03
KR20070108147A (ko) 2007-11-08
WO2006064081A1 (en) 2006-06-22
RU2368030C2 (ru) 2009-09-20

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20140519