[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

FI20045482A0 - Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi - Google Patents

Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi

Info

Publication number
FI20045482A0
FI20045482A0 FI20045482A FI20045482A FI20045482A0 FI 20045482 A0 FI20045482 A0 FI 20045482A0 FI 20045482 A FI20045482 A FI 20045482A FI 20045482 A FI20045482 A FI 20045482A FI 20045482 A0 FI20045482 A0 FI 20045482A0
Authority
FI
Finland
Prior art keywords
preparation
semiconductor substrate
dislocation density
lower dislocation
density
Prior art date
Application number
FI20045482A
Other languages
English (en)
Swedish (sv)
Inventor
Maxim Odnoblyudov
Vladislav Bougrov
Original Assignee
Optogan Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Optogan Oy filed Critical Optogan Oy
Priority to FI20045482A priority Critical patent/FI20045482A0/fi
Publication of FI20045482A0 publication Critical patent/FI20045482A0/fi
Priority to KR1020077015679A priority patent/KR101159156B1/ko
Priority to EP05742487A priority patent/EP1834349A1/en
Priority to PCT/FI2005/000233 priority patent/WO2006064081A1/en
Priority to RU2007126749/28A priority patent/RU2368030C2/ru
Priority to US11/792,687 priority patent/US20080308841A1/en
Priority to JP2007546092A priority patent/JP2008523635A/ja
Priority to CNB2005800429707A priority patent/CN100487865C/zh
Priority to TW094143517A priority patent/TW200639926A/zh
Priority to HK08105914.4A priority patent/HK1111264A1/xx
Priority to US13/211,627 priority patent/US20120064700A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)
  • Chemical Vapour Deposition (AREA)
FI20045482A 2004-12-14 2004-12-14 Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi FI20045482A0 (fi)

Priority Applications (11)

Application Number Priority Date Filing Date Title
FI20045482A FI20045482A0 (fi) 2004-12-14 2004-12-14 Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi
CNB2005800429707A CN100487865C (zh) 2004-12-14 2005-05-19 半导体衬底、半导体器件和制造半导体衬底的方法
RU2007126749/28A RU2368030C2 (ru) 2004-12-14 2005-05-19 Полупроводниковая подложка, полупроводниковое устройство и способ получения полупроводниковой подложки
EP05742487A EP1834349A1 (en) 2004-12-14 2005-05-19 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate
PCT/FI2005/000233 WO2006064081A1 (en) 2004-12-14 2005-05-19 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate
KR1020077015679A KR101159156B1 (ko) 2004-12-14 2005-05-19 반도체 기판, 반도체 장치 및 반도체 기판의 제조 방법
US11/792,687 US20080308841A1 (en) 2004-12-14 2005-05-19 Semiconductor Substrate, Semiconductor Device and Method of Manufacturing a Semiconductor Substrate
JP2007546092A JP2008523635A (ja) 2004-12-14 2005-05-19 半導体基板、半導体装置、および半導体基板の製造方法
TW094143517A TW200639926A (en) 2004-12-14 2005-12-09 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate
HK08105914.4A HK1111264A1 (en) 2004-12-14 2008-05-28 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate
US13/211,627 US20120064700A1 (en) 2004-12-14 2011-08-17 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20045482A FI20045482A0 (fi) 2004-12-14 2004-12-14 Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi

Publications (1)

Publication Number Publication Date
FI20045482A0 true FI20045482A0 (fi) 2004-12-14

Family

ID=33548081

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20045482A FI20045482A0 (fi) 2004-12-14 2004-12-14 Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi

Country Status (10)

Country Link
US (2) US20080308841A1 (fi)
EP (1) EP1834349A1 (fi)
JP (1) JP2008523635A (fi)
KR (1) KR101159156B1 (fi)
CN (1) CN100487865C (fi)
FI (1) FI20045482A0 (fi)
HK (1) HK1111264A1 (fi)
RU (1) RU2368030C2 (fi)
TW (1) TW200639926A (fi)
WO (1) WO2006064081A1 (fi)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9406505B2 (en) * 2006-02-23 2016-08-02 Allos Semiconductors Gmbh Nitride semiconductor component and process for its production
JP5903714B2 (ja) * 2007-07-26 2016-04-13 ソイテックＳｏｉｔｅｃ エピタキシャル方法およびこの方法によって成長させられたテンプレート
KR101355593B1 (ko) * 2007-07-26 2014-01-24 아리조나 보드 오브 리젠츠 퍼 앤 온 비하프 오브 아리조나 스테이트 유니버시티 개선된 에피택시 재료들의 제조 방법
JP5749888B2 (ja) * 2010-01-18 2015-07-15 住友電気工業株式会社 半導体素子及び半導体素子を作製する方法
JP6090998B2 (ja) * 2013-01-31 2017-03-08 一般財団法人電力中央研究所 六方晶単結晶の製造方法、六方晶単結晶ウエハの製造方法
US9564494B1 (en) * 2015-11-18 2017-02-07 International Business Machines Corporation Enhanced defect reduction for heteroepitaxy by seed shape engineering
JP2017178769A (ja) * 2016-03-22 2017-10-05 インディアン インスティテゥート オブ サイエンスＩｎｄｉａｎ Ｉｎｓｔｉｔｕｔｅ Ｏｆ Ｓｃｉｅｎｃｅ 横方向に配向した低欠陥密度で大面積の金属窒化物アイランドのプラットフォームおよびその製造方法
WO2018151189A1 (ja) * 2017-02-16 2018-08-23 信越化学工業株式会社 化合物半導体積層基板及びその製造方法、並びに半導体素子
CN112930605B (zh) * 2018-09-07 2022-07-08 苏州晶湛半导体有限公司 半导体结构及其制备方法
EP4053881B1 (en) * 2019-10-29 2024-10-09 Kyocera Corporation Semiconductor element and method for producing semiconductor element
CN113921664B (zh) * 2021-10-11 2023-01-06 松山湖材料实验室 一种高质量氮化物紫外发光结构的生长方法

Family Cites Families (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4174422A (en) 1977-12-30 1979-11-13 International Business Machines Corporation Growing epitaxial films when the misfit between film and substrate is large
US4522661A (en) 1983-06-24 1985-06-11 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Low defect, high purity crystalline layers grown by selective deposition
JPS62119196A (ja) 1985-11-18 1987-05-30 Univ Nagoya 化合物半導体の成長方法
US5300793A (en) * 1987-12-11 1994-04-05 Hitachi, Ltd. Hetero crystalline structure and semiconductor device using it
JP3026087B2 (ja) 1989-03-01 2000-03-27 豊田合成株式会社 窒化ガリウム系化合物半導体の気相成長方法
US5122843A (en) * 1990-02-15 1992-06-16 Minolta Camera Kabushiki Kaisha Image forming apparatus having developing devices which use different size toner particles
US5290393A (en) 1991-01-31 1994-03-01 Nichia Kagaku Kogyo K.K. Crystal growth method for gallium nitride-based compound semiconductor
US5091767A (en) 1991-03-18 1992-02-25 At&T Bell Laboratories Article comprising a lattice-mismatched semiconductor heterostructure
US5656832A (en) 1994-03-09 1997-08-12 Kabushiki Kaisha Toshiba Semiconductor heterojunction device with ALN buffer layer of 3nm-10nm average film thickness
JP3116731B2 (ja) 1994-07-25 2000-12-11 株式会社日立製作所 格子不整合系積層結晶構造およびそれを用いた半導体装置
JP3771952B2 (ja) 1995-06-28 2006-05-10 ソニー株式会社 単結晶ｉｉｉ−ｖ族化合物半導体層の成長方法、発光素子の製造方法およびトランジスタの製造方法
KR19980079320A (ko) 1997-03-24 1998-11-25 기다오까다까시 고품질 쥐에이엔계층의 선택성장방법, 고품질 쥐에이엔계층 성장기판 및 고품질 쥐에이엔계층 성장기판상에 제작하는 반도체디바이스
JPH11130597A (ja) * 1997-10-24 1999-05-18 Mitsubishi Cable Ind Ltd 転位線の伝搬方向の制御方法およびその用途
EP0874405A3 (en) * 1997-03-25 2004-09-15 Mitsubishi Cable Industries, Ltd. GaN group crystal base member having low dislocation density, use thereof and manufacturing methods thereof
JPH10335750A (ja) * 1997-06-03 1998-12-18 Sony Corp 半導体基板および半導体装置
FR2769924B1 (fr) 1997-10-20 2000-03-10 Centre Nat Rech Scient Procede de realisation d'une couche epitaxiale de nitrure de gallium, couche epitaxiale de nitrure de gallium et composant optoelectronique muni d'une telle couche
US6051849A (en) 1998-02-27 2000-04-18 North Carolina State University Gallium nitride semiconductor structures including a lateral gallium nitride layer that extends from an underlying gallium nitride layer
US6218280B1 (en) * 1998-06-18 2001-04-17 University Of Florida Method and apparatus for producing group-III nitrides
US6252261B1 (en) 1998-09-30 2001-06-26 Nec Corporation GaN crystal film, a group III element nitride semiconductor wafer and a manufacturing process therefor
US6177688B1 (en) 1998-11-24 2001-01-23 North Carolina State University Pendeoepitaxial gallium nitride semiconductor layers on silcon carbide substrates
JP4032538B2 (ja) * 1998-11-26 2008-01-16 ソニー株式会社 半導体薄膜および半導体素子の製造方法
JP3591710B2 (ja) * 1999-12-08 2004-11-24 ソニー株式会社 窒化物系ｉｉｉ−ｖ族化合物層の成長方法およびそれを用いた基板の製造方法
JP4145437B2 (ja) * 1999-09-28 2008-09-03 住友電気工業株式会社 単結晶ＧａＮの結晶成長方法及び単結晶ＧａＮ基板の製造方法と単結晶ＧａＮ基板
JP3557441B2 (ja) * 2000-03-13 2004-08-25 日本電信電話株式会社 窒化物半導体基板およびその製造方法
JP3680751B2 (ja) * 2000-03-31 2005-08-10 豊田合成株式会社 Ｉｉｉ族窒化物系化合物半導体の製造方法及びｉｉｉ族窒化物系化合物半導体素子
WO2001080311A1 (en) 2000-04-17 2001-10-25 Virginia Commonwealth University Defect reduction in gan and related materials
JP4556300B2 (ja) * 2000-07-18 2010-10-06 ソニー株式会社 結晶成長方法
US6610144B2 (en) * 2000-07-21 2003-08-26 The Regents Of The University Of California Method to reduce the dislocation density in group III-nitride films
US6599362B2 (en) * 2001-01-03 2003-07-29 Sandia Corporation Cantilever epitaxial process
JP3988018B2 (ja) * 2001-01-18 2007-10-10 ソニー株式会社 結晶膜、結晶基板および半導体装置
JP3956637B2 (ja) * 2001-04-12 2007-08-08 ソニー株式会社 窒化物半導体の結晶成長方法及び半導体素子の形成方法
US6653166B2 (en) 2001-05-09 2003-11-25 Nsc-Nanosemiconductor Gmbh Semiconductor device and method of making same
US6967359B2 (en) * 2001-09-13 2005-11-22 Japan Science And Technology Agency Nitride semiconductor substrate production method thereof and semiconductor optical device using the same
JP3968566B2 (ja) 2002-03-26 2007-08-29 日立電線株式会社 窒化物半導体結晶の製造方法及び窒化物半導体ウエハ並びに窒化物半導体デバイス
WO2004008509A1 (en) 2002-07-11 2004-01-22 University College Cork - National University Of Ireland, Cork Defect reduction in semiconductor materials
JP4186603B2 (ja) * 2002-12-05 2008-11-26 住友電気工業株式会社 単結晶窒化ガリウム基板、単結晶窒化ガリウム基板の製造方法および窒化ガリウム成長用下地基板
US7221037B2 (en) * 2003-01-20 2007-05-22 Matsushita Electric Industrial Co., Ltd. Method of manufacturing group III nitride substrate and semiconductor device
JP3760997B2 (ja) * 2003-05-21 2006-03-29 サンケン電気株式会社 半導体基体
US7323256B2 (en) * 2003-11-13 2008-01-29 Cree, Inc. Large area, uniformly low dislocation density GaN substrate and process for making the same
US7687827B2 (en) * 2004-07-07 2010-03-30 Nitronex Corporation III-nitride materials including low dislocation densities and methods associated with the same
JP4720125B2 (ja) * 2004-08-10 2011-07-13 日立電線株式会社 Ｉｉｉ−ｖ族窒化物系半導体基板及びその製造方法並びにｉｉｉ−ｖ族窒化物系半導体

Also Published As

Publication number Publication date
US20120064700A1 (en) 2012-03-15
HK1111264A1 (en) 2008-08-01
EP1834349A1 (en) 2007-09-19
KR20070108147A (ko) 2007-11-08
CN100487865C (zh) 2009-05-13
RU2007126749A (ru) 2009-01-27
TW200639926A (en) 2006-11-16
US20080308841A1 (en) 2008-12-18
KR101159156B1 (ko) 2012-06-26
JP2008523635A (ja) 2008-07-03
RU2368030C2 (ru) 2009-09-20
CN101080808A (zh) 2007-11-28
WO2006064081A1 (en) 2006-06-22

Similar Documents

Publication Publication Date Title
GB2427071B (en) Semiconductor device having SiC substrate and method for manufacturing the same
HK1097350A1 (en) Nitride-based compound semiconductor, method of cleaning a compound semiconductor, method of producing the same and substrate
EP1953814A4 (en) WAFER HOUSING STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
TWI316284B (en) Semiconductor device, fabrication methods thereof and methods for forming a tungsten-containing layer
EP1962342A4 (en) SUBSTRATE WITH INTEGRATED CHIP AND METHOD FOR MANUFACTURING THE SAME
HK1101220A1 (en) Method for manufacturing nitride semiconductor substrate
EP2090680A4 (en) SAPHIRSUBSTRATE, NITRIDE-SEMICONDUCTOR LUMINESCENE ELEMENT USING THE SAPPHIRE SUBSTRATE AND METHOD FOR PRODUCING THE NITRIDE-SULPHIDE-LUMINESCENZEL MEMBER
SG126899A1 (en) Light-emitting device, method for making the same,and nitride semiconductor substrate
EP1723673A4 (en) METHOD FOR PRODUCING A SEMICONDUCTOR CONSTRUCTION ELEMENT AND SEMICONDUCTOR ELEMENT PRODUCED THEREFOR
SG129398A1 (en) Semiconductor wafer and process for producing a semiconductor wafer
EP1873131A4 (en) METHOD FOR PRODUCING A CERAMIC SUBSTRATE AND CERAMIC SUBSTRATE
PL1801269T3 (pl) Sposób wytwarzania wolno stojącej warstwy III-N i wolno stojące podłoże III-N
EP2009135A4 (en) BASE SUBSTRATE FOR EPITAXIC DIAMOND FILM, METHOD FOR MANUFACTURING BASE SUBSTRATE FOR EPITAXIC DIAMOND FILM, EPITAXIC DIAMOND FILM MANUFACTURED BY THE BASE SUBSTRATE FOR EPITAXIC DIAMOND FILM, AND METHOD FOR FABRICATION
EP1790759A4 (en) NITRIDE MONOCRYSTAL SEMICONDUCTOR COMPRISING Ga, METHOD FOR MANUFACTURING THE SAME, AND SUBSTRATE AND DEVICE USING THE CRYSTAL
EP1811548A4 (en) SEMICONDUCTOR WAFER MANUFACTURING METHOD
SG118322A1 (en) Chip scale package with open substrate
GB2438567B (en) Free-standing substrate, method for producing the same and semiconductor light-emitting device
EP1736572A4 (en) GROUP III NITRIDE CRYSTAL SUBSTRATE, MANUFACTURING METHOD AND GROUP III NITRIDE SEMICONDUCTOR ELEMENT
HK1111264A1 (en) Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate
EP1970946A4 (en) AlxGayIn1-x-yN CRYSTALLINE SUBSTRATE, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
EP1918989A4 (en) CIRCUIT CONNECTION STRUCTURE, IDENTITY MANUFACTURING METHOD, AND SEMICONDUCTOR SUBSTRATE FOR CIRCUIT CONNECTION STRUCTURE
FR2872343B1 (fr) Substrat semi-conducteur et son procede de preparation
EP1763071A4 (en) GAAS SUBSTRATE PURIFICATION METHOD, GAAS SUBSTRATE MANUFACTURING METHOD, PRODUCTION METHOD FOR EPITAXIAL SUBSTRATE AND GAAS WAFER
EP1816671A4 (en) EXPOSURE METHOD, DEVICE MANUFACTURING METHOD, AND SUBSTRATE
HK1079336A1 (en) Semiconductor wafer and manufacturing method therefor

Legal Events

Date Code Title Description
FD Application lapsed